TECHNICAL PUBLICATION

Fundamentals of PCB Manufacturing

Mark Laing, US product marketing manager - Mentor Graphics
May 2007

w w w. m e n t o r. c o m
INTRODUCTION
This document provides a description of the PCB
manufacturing process with respect to the Systems
Manufacturing Solutions (SMS) product portfolio of the
Systems Design Division (SDD). This is the process of
taking the bare PCB and adding the various
components to it to create an operational PCB.
MANUFACTURING LINE PROCESSES
There are many processes that a PCB may go
through as it travels down the manufacturing line. For
example:
• Screen print
• Paste inspection
• Glue deposit
• Automatic component placement
• Automatic optical component inspection
• Wave solder
• Reflow oven
• Manual component placement
• Automatic optical component/pin inspection
• Automatic X-Ray component/pin inspection
• Flying probe test
• In-Circuit test
• Boundary Scan test
• Functional test
These processes typically have a pre-determined
order though various factors can affect which of these
processes is used in individual production lines. In the
case of a double-sided PCB a second set of
processes may be defined that is different for each
side of the board. Production requirements such as
single or double sided boards, production volumes,
target product industry can all affect the exact
production line configuration.
ASSEMBLY, TEST AND INSPECTION
PROGRAMMING
The majority of the equipment used on a PCB
manufacturing line needs to be programmed
individually with the details of what tasks they are
required to perform. In most cases this involves
detailed information on the PCB being manufactured
so that it operates correctly.
Assembly equipment
Any individual component on the board will only be
physically placed by one machine during the PCB
manufacturing process. Therefore decisions need to
be made that determines which machine will place
each component on to the PCB to maximize through-
put or minimize line configuration changes. Line
balancing is the technique used to decide which
components should be placed by which machines.
Usually there may be only one machine that can
physically place the component to the board, however
it is not unusual to have choices for individual
components and so decisions have to be made as to
which machine should ultimately place the component.
There are many factors that can affect the choices of
which machine to pick. For highest throughput the line
should be balanced to reduce the slowest machine, or
bottleneck process, that dictates the overall
throughput of the line. In high mix environments where
throughput is less of an issue minimum changeover
may be more of a factor. Here the line configuration is
set up to reduce the number of machine setup
processes that need to take place when multiple
products are being run down the same line. Moving a
single component from one machine to another can
have a significant effect on the individual machine
optimization and hence the overall line optimization.
Once components are allocated to a specific machine
within the line, machine specific optimization can be
used to improve the performance of that machine
within the line. This is known as machine optimization.
Combining line optimization and machine optimization
multiple times to achieve a better and better solution is
called iterative line balancing.
Once the components have been allocated to a
specific machine and optimized, a program can be
created that describes all component placements, the
settings that should be used for each placement and
the order in which the placements should be made.
Inspection equipment
There are four categories of inspection equipment for
manufacturing defect detection. These are Paste
Automated Optical Inspection (AOI), Pre-reflow AOI,
Post-reflow AOI and Automated X-Ray Inspection
(AXI).
Paste AOI is used to detect any issues once the paste
has been laid on to the PCB. At this point very little
incremental cost has been added to the PCB in the
form of expensive components. Insufficient solder can
be rectified at this point very easily.
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Pre-reflow AOI inspects the components prior to them
being soldered to the board. Only presence/absence
inspection can take place at this point because the
solder joints have not been formed yet. Again
adjustments can be made with minimal cost at this
point because the solder has not been formed yet.
Post-reflow AOI can inspect both the component and
the joints because the solder has set at this point.
Hidden joints cannot be inspected with AOI because
this technique relies on visible line of sight to the joint.
Components can be repaired if defects are found
though the repair cost will be higher now because the
existing component needs to be removed and
replaced with a new one.
AXI can be used to detect component and pin level
issues and even find defects within the solder joints or
hidden defects under components due to its ability to
look through the board or component.
Test equipment
There are four categories of electrical test equipment;
In-Circuit Test (ICT), Boundary Scan Test (BST), Flying
Probe Test (FPT) and Functional Test (FT).
ICT uses electrical test techniques to isolate each
component on the board, confirm that the connectivity
of the design is correct and hence deduce that the
board should in theory operate correctly. In reality
certain circuit configurations and functional defects
limit the detection capability that in term will reduce the
overall fault coverage achieved with these techniques.
BST is a specific test technique that uses the IEEE
1149 standard to perform manufacturing defect
detection via additional circuitry built in to certain types
of component that provide simple access to complex
component circuitry.
FPT uses similar techniques to ICT but instead of
using a custom fixture interface it uses a handful of
movable probes that contact the PCB. Due to physical
movement of the probes the test times associated with
FPT will be significantly longer than ICT but for small
batches and quick turn around can be used as an ICT
fixture is not required.
FT covers a wide number of specific test systems that
are primarily used to confirm the operation of the PCB
not for manufacturing defect detection. The test
systems are usually custom in nature for a specific
application.
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NEW PRODUCT INTRODUCTION
Once a product is being readied for initial PCB
manufacture it typically interfaces between design and
build as a step called New Product Introduction or NPI.
Here the design is analyzed for overall manufacturing
applicability and potential pilot runs. The intention is to
ensure success when the product is switched to
volume production.
The goals of NPI differ from Volume Manufacture. In
NPI fast turnaround and quick results are usually
preferred over maximizing production volumes. Test
strategies usually involve flying probe test and bench
top boundary scan as opposed to in-circuit test with
embedded boundary scan. Assembly equipment may
be set up for smaller match runs that allow multiple
products to be produced with minimal set up changes.
Data Preparation
PCB manufacturing needs to know what components
are fitted to the board, where they are positioned on
the board and the electrical connectivity between
these components. This data mainly comes from two
sources; the physical make up of the PCB is provided
by either intelligent ECAD layout files or unintelligent
Gerber files whereas the component list or Bill of
Materials (BOM) file provides the remaining data.
Although this provides a lot of the data there are still a
lot of other information that needs to be manually
added to provide a complete data set necessary to run
manufacturing.
The design environment usually has BOM files and
even variant data that can be used by manufacturing.
However this should be consider as the design BOM
and does not necessarily represent the same
information that the board will be built to. In today’s
global manufacturing companies the facility building
the board will source components locally that are
electrically compatible with the design though may be
slightly different physically to the actual part specified
by the designer. This introduces another source of
data that give guidelines to these substitute parts; the
Approved Vendor List (AVL). This provides data on
approved parts that can be used instead of the original
design part. However although these parts may be
electrically the same as each other they can be slightly
different physically that may cause issues within the
manufacturing process.
Bill of Materials data
Bill of Materials (BOM) data is probably one the area
that encounters the most variation in input data within
manufacturing. BOM data can be supplied into
manufacturing in binary or ASCII formats, it can be
structured or unstructured, it can be text, HTML, PDF,
Excel or even just a piece of paper.
Tools exist that specifically focus on the parsing of
BOM files and transforming them in to structured,
intelligent information that can be used in
manufacturing. Usually this data consists of part
number, value, tolerance, description and package
fields. Also the BOM lists components that will actually
be placed on the final board variation so by inference
those parts not listed in the BOM are components that
won’t be placed. These parts are described as no
pops, or not fitted, NF, components and are equally
important as PCB manufacturers may want to
specifically check that they have not been placed.
Schematic data
Today the main PCB data that drives manufacturing is
generated from the design layout tools. As mentioned
earlier this data does not contain all the information
that is available in the design environment. A wealth of
electrical information can be found in the schematic
capture tools that are not passed to the layout tools
and hence do not make it in to manufacturing in a
useable format. Today schematic data is passed as a
printed circuit diagram that can be hundreds of pages
long that is virtually impossible to navigate or at best a
searchable PDF file that is at least searchable but still
must be manually mined for additional data.
Providing complete, intelligent schematic data to the
manufacturing environment significantly improves the
time to market that can be achieved today. This
electrical information is ultimately merged together
manually by manufacturing but it needs to be provided
in a useable format capable of accelerating
manufacturing not hindering it.
DESIGN FOR MANUFACTURE ANALYSIS
Design Rule Checking (DRC) is used to confirm that
the PCB is designed to certain criteria. Design for
Fabrication (DFF) is used to detect and correct PCB
fabrication issues that could affect the performance of
the final PCB. However there are also manufacturing
specific checks that are performed by the
manufacturer to highlight possible issues that are
process dependent. This is the area of Design For
Manufacturing or DFM.
For example fiducials have no affect on the actual
performance of the product but are used extensively
as part of the manufacturing process. Fiducials are
small features on the board that are used for
alignment purposes of both the board and individual
components. Without these features the automatic
placement and inspection equipment would not be
able to reliably place or inspect a lot of the
components on the board.
Tooling holes are features that may be used to hold
the board in the final product but also are used in the
manufacturing process. The requirements on tooling
holes may differ for the product than for
manufacturing. For example two tooling holes of a
minimum size would be used to hold the PCB on the
test fixture for electrical test purposes. Ideally these
tooling holes would also be in diagonal corners of the
board to reduce alignment issues.
Test points are added for the purpose of electrically
detecting manufacturing issues or for confirming
correct product performance. Depending on the
design the number and position of these features may
be sub-optimal for the manufacturing process that will
be used.
As stated earlier it is very common for substitute parts
to be used instead of the original design specified
parts. As a consequence of this, manufacturing issues
can arise because the relationship of the component
pin to the board land pattern is affected. For example
the distance from the toe, heel and sides of the pin to
the land pattern can be enough to cause, at a
minimum, optimal solder results. At worse the
component may not even fit on the land pattern at all.
These are critical issues that need to be discovered
before products are produced in any volume.
DESIGN FOR TEST ANALYSIS
Design for Test (DFT) analysis covers two areas within
manufacturing, electrical DFT and physical DFT. The
former can be employed in the design environment
but is equally useful in manufacturing. Again design
requirements may lead to issues that greatly affect the
ability to produce the product. In normal operation a
component would always need to be enabled so a
designer may tie the component’s Chip Enable (CE)
directly to a power or ground rail. For normal operation
of the board this is perfectly acceptable, however to
allow sufficient testability of this part or even it’s
surrounding parts the test engineer needs to be able
to disable the component at certain times for
acceptable test coverage. Adding a simple resistor
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between the CE pin and the rail along with a test point
provides the test engineer with access to improve
coverage and therefore improve overall production
yields and detect manufacturing issues earlier.
Physical DFT analysis is used to provide initial
coverage estimates based on the amount of physical
access that the test engineer has to be board. Once
the design is complete further analysis is used to
implement the test strategy based on the goals of
manufacturing.
During the NPI process DFT analysis would be used
to determine the availability and coverage that
boundary scan test could achieve. It could also be
used to analyze the board for flying probe test
purposes and even generate programs that could be
used to drive the flying probe test systems.
STENCIL CREATION
Once the final land pattern and soldermask layers
have been created, stencil layers can either be
created from the paste layers or derived from the land
pattern layers. These will be used to create the stencil
that is used to apply solder paste to the appropriate
areas of the board in the required quantity.
The stencil apertures can be a percentage reduction
in the size of the original copper pad, a specific
distance inset from the copper pad or some form of
custom aperture that is not related to the copper pad
underneath but more a function of the package that
will be placed on the land pattern. For example 2 pin
surface mount components usually have an aperture
that looks like a baseball home plate feature but with
the points of the aperture pointing inward towards
each other.
CENTROID GENERATION
One of the most frustrating problems in PCB
manufacturing can be determining the correct rotation
of a part on the board. This may seem a simple task
at first given that the component rotation is specified in
the source PCB layout data. However that rotation is
the rotation of the geometry of a component relative to
the final rotation on the board. So two 1206 SMD
components that need to be placed with pin 1 to the
east and pin 2 to the west can have two different
rotation values depending on how the 1206 land
pattern geometry was defined.
To further complicate this area the component will
have a specific feeder rotation in the automatic
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insertion machine that ultimately places the part. This
needs to be factored in to the final component rotation
that the machine uses so that the part does indeed
get placed with the correct orientation.
Software solutions such as CAMCAD Professional use
a normalization algorithm on the source CAD data that
create a centroid marker for each component
placement. This can be positioned and orientated
separately from the land pattern rotation. For
assembly rotation output files this centroid marker will
be used to create the correct component position and
rotation that the machine can successfully apply the
final feeder offsets an hence place the component
correctly on the board.
VOLUME MANUFACTURE
In volume manufacture the line is tuned more for
higher production volumes though this does not
necessarily mean for ultimate speed. Sometimes
single products are pushed down dedicated
production lines 24x7. In this case line optimization is
the key to producing the most boards in a given
amount of time. However it may be desirable to slow a
specific down because different variants of the board
need to be produced without significantly changing the
configuration of the line.
Line utilization is a measure of how much a line is
producing boards as a ratio to the time not spent
producing boards. In reality line utilization varies from
20% to 35% in most PCB manufacturing lines. In other
words the majority of the time the line is not producing
boards due to machine failures, lack of components or
changeover for example. Being able to increase line
utilization by single percentage points can have a
huge impact on the profitability of a PCB
manufacturer.
REPAIR AND REWORK
Even the most well optimized production line will
generate defects that will cause the final board to not
function correctly. The defects need to be accurately
detected and repaired. Depending on the configuration
of the production line, board to be manufactured and
the volumes to be produced the manufacturer may
deploy various techniques to detect the product
defects and hence be able to correct them.
As test and inspection equipment is used to process
control or defect detection a repair or rework station
will usually be deployed in conjunction with it. If
boards fail the test or inspection stage they are
removed from the production line and are passed in to
the repair and rework loop. Here the fault ticket
produced from the test or inspection equipment will be
used along with the knowledge of the repair engineer
to determine whether the board can be repaired or
must be scrapped.
Once the board has been repaired it will usually be
moved back into the production line and be test or
inspected again at the same point it failed. This is to
confirm that the repair actually did resolve the defect
reported. In some cases, and this level of this varies
with technique to technique, the equipment may
highlight a problem with a board that does not exist.
These are called false failures and cost money to the
manufacture as it means time is spent trying to
diagnose an issue that does not exist. It also
increases the level of Work in Progress or WIP where
product is held within the production line and not being
shipped.
To optimize the defect detection capability and
minimize false failures, a PCB manufacturer can
deploy different test strategies that fit the board and
defect spectrum generated by that specific line. This
area is described next.
TEST STRATEGIES
If boards were produced correctly there would not be
a need for test techniques to be used. However the
manufacturing process is not perfect, even the best
manufacturers in the world, making thousands of
identical products a day generate defects. These
defects cost money to fix before the product can be
shipped and the revenue collected. The challenge is
knowing how much test to do and where to apply it.
As a board travels down the production line more and
more components are added to it increasing the
opportunity that it is defective. In other words the
chance of a defective board being manufactured at
the bare board stage may be close to 100% but once
it is fully populated with all the components highly
dense boards may be closer to 50%. For a
manufacturer producing millions of boards per day this
is an unacceptable number of boards being repaired in
functional test or even worse being shipped to your
customer. However it is possible to estimate the
defects per board and associated yields at each stage
of the production line and to implement test and
inspection strategies that integrate with the overall
quality goals of the product.
DEFECTS PER BOARD AND YIELD
It is possible to estimate a products future Process
Yield using historical DPMO (Defects Per Million
Opportunities) data for the components specified on
the Bill Of Materials. DPMO is a normalized
assessment of the defects generated in the PCB
manufacturing process. The estimated PCB Defects
Per Board is the sum of all the individual DPMO
numbers associated with all the components fitted to
the board divided by 1,000,000. For example, if I have
three components on the board with the following
DPMO values.
R1 1500
R2 3500
C1 5000
The total Defects Per Board will be
(1500+3500+5000)/1000000=0.01
Using the equation Yield=e-Defects per Board the
Process Yield of building this board can be found. In
this case it will be e-0.01 or 99%.
Now consider a board with 1000 components with an
average DPMO value of 500. This gives a Process
Yield of 60% or put in other terms 40% of the board
produced will be bad.
If the board costs $10 to produce and 10,000 are
manufactured each day then over a year the bad
boards will cost $14.4M. If we can invest $2M in a test
strategy that could detect 95% of the defects
produced enabling them to be fixed we would only
have 1800 bad boards at a cost of $18,000 a net
saving of $12.382M. In this case we have improved
yield from 60% to 99.95%. This then has a significant
return on investment.
PAGE 5
GLOSSARY Automatic optical component/pin inspection.
Once soldered to the board, automated optical
Screen Print. Solder is automatically applied to inspection can be used either for
the PCB through a stencil under compression by presence/absence component inspection or at
a squeegee. the pin level to determine joint integrity.

Paste inspection. Automated optical inspection Automatic X-Ray component/pin inspection.

machines that are capable of determining that all These inspection machines use X-Ray images to
areas of the PCB that should have solder paste look under components are inside of the joints to
on them were deposited correctly. determine the structural integrity of the solder
connections.
Glue deposit. Glue is automatically placed at the
center of a component for extra structural Flying probe test. Automatic, electrical test
integrity as a bonding agent between the compo- machine that uses moving probes to contact the
nent and the board. PCB for electrical test purposes.

Automatic component placement. Machines In-Circuit test. Automatic, electrical test machine
are used to automate component placement. that uses a board specific test fixture consisting
High-speed component placement machines, of a bed of probe nails that make electrical
known as chip shooters, place the smaller, lower contact with the board at the same time.
pin count components. More complex compo-
nents with higher pin counts are placed by fine- Boundary Scan test. Edge connector test
pitch machines that have greater precision. systems that utilize the IEEE 1149 standard for
describing test functionality that may be
Automatic optical component inspection. embedded within certain components.
Post placement optical inspection of component
presence/absence using automated systems. Functional test. Test systems that perform
design operation defect detection as opposed to
Wave solder. Components pass over a bath of manufacturing defect detection.
solder where a single wave is used to apply
solder to the necessary component connections.

Reflow oven. Boards pass through an oven to

set the solder paste deposited earlier.

Manual component placement. Some compo-

nents can only be inserted via operators and so
are not placed by machines.

For more information, call us or visit: www.mentor.com/pcb

Copyright © 2006 Mentor Graphics Corporation. This document contains information that is proprietary to Mentor Graphics Corporation and may be duplicated in whole or in part by the original recipient for
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information. Mentor Graphics is a registered trademark of Mentor Graphics Corporation. All other trademarks are the property of their respective owners.

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