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FLOORPLAN ASSIGNMENT

PST
  Default domain1 domain2 domain3 domain4
Alloff off off off off off
Q1 on off off off on
Q2 on on off off on
Q3 on on on off off
Q4 off on on on off
Q5 on on on on off
Q6 on off on on off
Allon on on on on on

Power domain - 5 (Multi power domain) domain 4 : VDD_PD4


domain 1 : VDD_PD1 default : VDD_default
domain 2 : VDD_PD2
domain 3 : VDD_PD3

POWER DOMAIN CONNECTIVITY Inter Domain Macro connections


Domain3 ---------> Default (20 contn) M10 -------- > M15
Domain3 ----------> Domain1 (10 contn) M11 -------- > M2
Domain4 ---------- > Default (15 contn) M13 -------- > M16
Total Area of block: 0.29mmsq
Domain1 std cell area : 0.029mmsq Domain2 std cell area: 0.035mmsq
Domain3 std cell area : 0.032mmsq Domain4 std cell area: 0.020mmsq
Default std cell area : 0.045mmsq

Nos of Dimension
Power Domain Macros Name (microns) Connectivity

M1 -------> M2 (50 contn)


M2 -------> M1 (40 contn)
M3 --------> M4 (50 contn)
domain 1 : VDD_PD1

M4 --------> M3 (50 contn)


M4 --------> M5 (20 contn)
2 M1,M2 {40,20} M1,M2 ------> Core area (200 contn)
3 M3,M4,M5 {40,10} M3,M4,M5 --------> core area (150 contn)

M6 --------> M7 (50 contn)


M7 --------> M6 (50 contn)
M9 --------> M8 (20 contn)
M8 --------> M9 (40 contn)
2 M6,M7 {40,20} M6,M7,M8,M9 --------> core area (150
domain 2 : VDD _PD2 2 M8,M9 {30,10} contn)

M10 --------> M11 (50 contn)


M11 --------> M12 (50 contn)
M12 --------> M10 (20 contn)
M10,M11,M1 M10,M11,M12 --------> core area (50
domain3 :VDD_PD3 3 2 {60,10} contn)

M13 --------> M14 (60 contn)


domain4 :VDD _PD4 2 M13,M14 {50,15} M13,M14 -------> Core (100 contn)
M15 -------> M16 (35)
domain5: default 2 M15,M16 {35,15} M15,M16 -------> Core area(250 contn)

 Mention if isolation cells/level shifters/retention registers are needed (specify domain and
reason)
 Place blockages if required.
 Draw the halo cells & other pre place cells if required
 Specify if you need more area or if you have extra area or if you need shape change(mention
reasons also)
 Consider the standard cell area given and divide the voltage area
FLOORPLAN ASSIGNMENT NAME_________ SAP ID___________
1. What if you find some additional ports in your floor plan? From where you might have got the
additional ports and why they have been reported as additional.
2. Why do we do power planning before the placement of standard cells?
Without power mesh, PNR tool may not calculate placement congestion accurately.
3. How do you decide the placement of macros and what precautions you take?
Macros are placed at boundaries, aligned properly by considering connection with rest of the macros &
standard cells, spacing between the channels are placed. Keepout & halo’s are placed around the
macros
4. How the length and width of power rail affects the IR?
If length is more voltage gets dropped, if strap width is less voltage gets dropped.
5. How do you validate your floorplan?
Macros shouldn’t get overlapped, IO ports shouldn’t be blocked, memory channels should have soft
blockage, congestion should be low
6. Calculate the power straps width and power ring width and number of straps
If core power consumption of the block is 5mw.
7. How do you deal with congestion caused by wrong floorplan? Explain your approach to fix the
floorplan
Congestion can be fixed by proper alignment of Macros, fly line analysis, macros are distributed evenly,
8. Why do we keep space between inner boundary and outer boundary of the block?
9. Can we place 7 track std cells 12 track std cells next to each other.
No
10. How do you decide the floorplan of the following? Justify the placement of each IP.
S1 S2 S6 and S9 are talking to M2
S4 S5 and S8 are talking to M1
M1 is talking to A1 and M2
M2 is talking to core and S7
A1 talking to S9 and S5

1. IR drop analysis is carried out for Power network only?


2. How to fix if voltage is dropped at VDD input of a std cell?
3. Signal IR drop how it’s dealt?
4. How Die size estimation is done?
5.

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