M.

Tech (VLSI Design) (First Semester)

Syllabus
COMPUTATIONAL TECHNIQUES IN VLSI DESIGN (MTVD101)

 Unit-I: Introduction to Spice

DC Analysis, Transient analysis, AC analysis, DC sweep, Parametric sweep,
Temperature sweep, Project work.

Unit-II: Design of Experiments

Full factorial, Taguchi/Plackett-Burman, Formation of Predictive equations, Pareto Plot,
ANOVA, Response surface methodology, Project work.

Unit-III: Optimization techniques:

  Optimisation using Predictive equations, Motecarlo-Hybrid Mote-carlo, RSM, Project
work.

Unit-IV : Advanced VHDL Programming

  VHDL advanced features, Generics and Configurations, Subprograms & Overloading,
Packages and libraries, Overloading, Subprogram Overloading, Overloading Operators,

Aliases, User-Defined Attributes, Synthesis Issues.

Univ-V: Advance Verilog HDL Programming

Gate level modeling Tasks and functions, Modeling Techniques, Logic synthesis with
Verilog, Synthesis Issues.

Books:

1. Understanding Industrial Designed Experiments, 4th Edition by Stephen R.

Schmidt (Author), Robert G. Launsby (Author), Mark J. Kiemele (Editor).
2. J. Bhasker, "A VHDL Primer", Addison-Weseley Longman Singapore Pte Ltd. 2009.
3. Z. Navabi, "VHDL Analysis and Modeling of Digital Systems", McGRAW-Hill, 1998
4. Sudhakar Yalamanchili, “Introductory VHDL From Simulation to Synthesis”, Prentice
Hall.

 
 VLSI TECHNOLOGY (MTVD 102)
 

Unit-I
Introduction to Silicon, History of Transistors, Crystal structure, crystal growth, and vapour
phase epitaxy, Wafer Preparation steps, Unit processes for VLSI.

Unit-II
Oxidation, Photolithography, diffusion, sources of diffusion, and ion implementation. Deposition
of metal and dielectric films by vacuum evaporation, sputtering and CVD techniques, wet
chemical and dry etching techniques.
 
Unit-III
Clean Room technology, Sources, ULPHA & HIPA filters, Parameters associated with clean
room process.

Unit-IV
Device and circuit fabrication, N - well, P-well, twin tub process, self alignment, dielectric
isolation, local oxidation techniques (LOCOS Process), Latch up Problem.

Unit-V
MOS based silicon ICs-NMOS and CMOS ICs, memory devices, SOI devices, comparison
between CMOS ,BICMOS, TTL families, Bipolar CMOS (BICMOS) ICs, Resistors, Capacitors.

Books:

1.    S.K.Gandhi, VLSI Fabrication Principles, John Wiley and Sons, NY 1994
2.    S.M.Sze, VLSI Technology McGraw-Hill Book Company, NY-1988
3.    D.Nagchoudhary, Principles of Microelectronics Technology, Wheeler (India), 1998.
4. Silicon VLSI Technology: Fundamentals, Practice and Modeling -James D.
Plummer, Michael D. Deal, Peter B. Griffin
 
 
 ANALYSIS AND DESIGN OF I.C. (MTVD 103)
 
Unit-I Basics of IC’s
System for design, Classification of system, System Design Cycle, Introduction to IC’s,
Monolithic IC’s, Thick film IC’s, Thin film IC’s, Hybrid IC’s, Formation of IC’s, Design flow
for IC’s

Unit-II Circuit Configuration for Linear IC

Basic MOSFET, Types, Operation of MOSFET, Channel formation, Characteristics of
MOSFET, Drain –Current equation, Channel length modulation, Short channel effects: Punch
through, Drain induced barrier lowering (DIBL), hot carrier effect, Velocity saturation, Scaling
of MOS transistor, MOS capacitances
 
Unit-III MOS Inverter & Logic circuits
 Basics of CMOS, CMOS inverter, Logic gates, Sizing of transistor, Propagation delay, Power
dissipation in CMOS, Static CMOS logic, Pseudo NMOS, Dynamic logic, Cascading problem,
Domino logic, Charge sharing problem, NP domino, CVSL.

Unit-IV Circuit Configuration for digital IC

Flip - Flops, D Flip- Flop, J-K Flip Flop, Counters, asynchronous counter (ripple counter),
synchronous counters, general microprocessor, architecture of a processor (CPU), and
microcomputer based system.
.
 Unit-V Mixed signal circuits
Introduction to mixed signal circuits, mixed signal system, ADC’s, Types of ADC, block
diagram of ADC, transfer characteristics of a unipolar & nonlinear ADC, Types of errors: gain,
offset, DNL, INL, real life model of ADC, resolution, effective number of bits (ENOB),
calculation of ENOB, Signal to noise ratio(SNR) , DAC, Types of DAC.

Books:
1. Phillip E. Allen, Douglas R. Holberg, Cmos Analog circuit design, Oxford university press.
2. Sung- Mo Kang, Yusuf Leblebici, CMOS digital integrated circuits analysis & design, McGraw- Hill

edition, 2003.
3. Gray, Wooley, Brodersen, Analog MOS integrated circuits, IEEE Press, 1989.
4. Kenneth R. Laker Willy M.C. Sansen, William M.C. Sansen, Design of analog intergrated circuits
and systems, Mc Graw Hill, 1994.
5. Behzad Razavi, Principles of Data conversion system design, S. Chand & Company Ltd. 2000.
 ADVANCED DIGITAL SYSTEM DESIGN (MTVD 104)

Unit – I: Digital Systems Design

Design of Combinational and Sequential Systems – Boolean function implementation using
multiplexer, Analysis of clocked sequential circuits, Derivation of state tables and state diagrams
– clocked synchronous state machine design and analysis, state machine design, state
minimization, state assignment, designing state machines using state diagrams, Synthesis using
D, JK and T flip flops, Mealy and Moore model of finite state machines.

Unit II:VHDL: Basics - Introduction to HDL - Entity - Architecture - Basic language elements -
Behavioral modeling - Data flow modeling - Structural modeling, Test Bench

Unit-III:Verilog: Basics - Modeling Levels, Data Types, Modules and Ports, Instances, Basic
Language Concepts, Dataflow modeling, Behavioral modeling, Test Bench.`

Unit IV:FPGA Architectures: Introduction to field programmable gate arrays, Basic Xilinx
architecture, Configurable Logic Block (CLB) I/O Block (IOB), Xilinx Spartan XL FPGAs,
Xilinx Spartan-II FPGAs, Xilinx Virtex FPGAs, Logic Cell array (LCA), Programmable
Interconnect Point (PIP), RAM based FPGAs - Antifuse FPGAs, Introduction to System on a
Chip.

Unit-V Programmable Logic Devices: Basic concepts, Programming Technologies, Read Only
Memory, Combinational Circuit implementation using ROM, Programmable Logic Array (PLA),
Programmable Array Logic (PAL). Standard PLDs, Complex PLDs (CPLD), design examples.

Books:
1. Morries Mano, “Digital Design”, Forth Edition, Pearson Education..
2. John Wakerly, Digital Design, Principles and Practices, Forth Edition, Pearson (2008).
3. Parag K. Lala, "Digital System Design using programmable Logic Devices", Prentice Hall,
NJ, 1994
4. Geoff Bestock, "FPGAs and programmable LSI; A Designers Handbook", Butterworth
Heinemann, 1996
5. Smith, "Application Specific Integrated Circuits", Addison-Wesley, 1997
6. J. Bhasker, "A VHDL Primer", Addison-Weseley Longman Singapore Pte Ltd. 1992.
7. Verilog HDL: A Guide to Digital Design and Synthesis 

Reference Books:
1. Jesse H. Jenkins, "Designing with FPGAs and CPLDs", Prentice Hall, NJ,1994
2. Kevin Skahill, "VHDL for Prgrammable Logic", Addison -Wesley, 1996
3. Z. Navabi, "VHDL Analysis and Modeling of Digital Systems", McGRAW-Hill, 1998
4. Sudhakar Yalamanchili, “Introductory VHDL From Simulation to Synthesis”, Prentice
Hall
 Elective I: (I) DESIGN OF SEMICONDUCTOR MEMORIES (MTVD 1051)

 Unit-I Random Access Memory Technologies

Static Random Access Memories (SRAMs): SRAM cell structure- MOS SRAM architecture
MOS SRAM cell and peripheral circuit operation bipolar SRAM technologies silicon on
insulator (SOI) technology advanced SRAM architectures and technologies, application specific
SRAMs. Dynamic Random Access Memories (DRAMs): DRAM technology development
CMOS CRAMs DRAMs cell theory and advanced cell structures- BiCMOS DRAMs-soft error
failure in DRAMs Advanced DRAM designs and architecture application specific DRAMs.
 
Unit-II
Nonvolatile Memories:
Masked Read only memories (ROMs): High density ROMs programmable read-only memories
(PROMs)- bipolar PROMs CMOS PROMs erasable (UV)- Programmble read-only memories
(EPROMs)- Floating Gate EPROM cell- one time progammable (OTP) Eproms Electrically
Erasable PROMs (EEPROMs) EEPROM technology and architecture nonvolatile SRAM-Flash
memories (EPROMs or EEPROM) Advanced flash memory architecture.
 
Unit-III
Memory fault modeling, testing and memory design for Testability and fault tolerance,
RAM fault modeling, electrical testing, Peusdo random testing megabit DRAM testing
nonvolatile memory modeling and testing IDDQ fault modeling and testing application specific
memory testing.
 
Unit-IV
Advanced memory technologies and high-density memory packaging technologies
Ferroelectric Random Access Memories (FRAMs) Gallium Arsenide (GaAs) FRAMs Analog
memories magnetoresistive random access memories (MRAMs).

Unit V
Experimental memory devices. Memory hybrids and MCMs (2D) Memory stacks and MCMs
(3D) Memory MCM testing and reliability issues- memory cards- high density memory
packaging future directions.

Books:
1. Ashok K.Sharma, Semiconductor Memories Technology, testing and reliability Prentice
hall of India Private Limited, New Delhi 1997.
2. Nonvolatile Semiconductor Memory Technology: A Comprehensive Guide to Understanding
and Using NVSM Devices - William D. Brown , Joe Brewer 

3. Testing Semiconductor Memories: A. J. Van De Goor (Author)

4. Semiconductor Memory Design and Application  Jack Luecke (Author), William N.
Carr. 

M.Tech (VLSI Design) (Second Semester)

Syllabus
EMBEDDED SYSTEMS (MTVD201)

Unit-I Introduction Review of Embedded Hardware

Terminology gates- timing diagram , memorys,microprocessors buses-direct memory access-interrupts-
bulit-ins on the microprocessor-conventions used on schematic- schematic, interrupts microprocessor
architecture , interrupts basics- share data problem- interrupt latency.
 
Unit-II PIC Micro-controller and Interfacing
Introduction, CPU architecture, registers, instruction sets addressing modes loop timing, timers interrupts,
interrupts, timing I/o expansion, I 2 C bus operation serial EPROM, analog to digital converter, UART-
Baud Rate-Data Handling-initialization, special features- serial programming parallel slave port.
 
Unit-III Embedded Microcomputer Systems
Motorola MC68H11 family architecture registers, addressing modes programs, interfacing methods
parallel i/o interface, parallel port interface, memory interfacing. High speed I/O interfacing, interrupts ,
interrupt service routine-features of interrupts ,interrupt vector and priority, timing generation and
measurements, input capture, output compare, frequency measurement, serial i/o devices Rs232, Rs485.
Analog interfacing, applications.

Unit-IV Software Development and Tools

Embedded system evolution trends, round-robin, robin with interrupts, function , one scheduling
architecture, algorithms, introduction to- assembler - compiler-cross compilers and integrated
development environment (IDE). Object oriented interfacing, recursion, debugging strategies, simulators.

Unit-V Real Time Operating Systems

Task and Task States, tasks and data, semaphores and shared Data Operating system services-
message questimer function- events - memory management, interrupt routines in an RTOS environment,
basic design using RTOS.
Books:
1.    David E Simon, An embedded software primer, Pearson education Asia, 2001.
2.    John B Peat man, Design with micro-controller, Pearson education Asia, 1998.
3.   Jonarthan W Valvano Brooks/code, Embedded micro computer systems, Real time interfacing,
Thomson learning 2001.
4. Burns, Alan and Welling, Andy,real ,time systems and Programming languages,Second edition.
Harlow: Addison-Wesley-Longman, 1997.
5. Raymond J A Bhur and Donald L Bialey, An introduction to real time systems: Design to networking
with C/C++, Prentice hall Inc.New Jersey, 1999
M.Tech (VLSI Design)
CAD OF DIGITAL SYSTEMS (MTVD202)

Unit-I: Introduction to VLSI Methodologies , VLSI Physical Design Automation ,Design and Fabrication of
VLSI Devices ,Fabrication process and its impact on Physical Design.
 
Unit-II: A Quick Tour of VLSI design automation tools, Data structures and basic algorithms graph theory
and computational complexity, tractable and intractable problems.
 
Unit-III: General purpose methods for combinational optimization, partitioning- floor planning and pin
assignment, placement, routing.
 
Unit-IV: Simulation, logic synthesis- verification, high level synthesis, compaction.
 
Unit-V: Physical design automation of FPGAs, MCMS-VHDL-Verilog-implementation of simple circuits
using VHDL and verilog.
 
Books:
1.    N.A. Sherwani, Algorithms for VLSI Physical Design Automation, 1999.
2.    S.H. Gerez, Algorithms for VLSI Design Automation, 1998.
 M.Tech (VLSI Design)
VLSI Signal Processing (MTVD 203)
Unit-I: Introduction to DSP systems, Iteration Bound Pipelined and parallel processing.

Unit-II: Retiming unfolding, algorithmic strength reduction in filters and transforms.

Unit-III: Systolic architecture design, fast convolution, pipelined and parallel recursive and adaptive filters.

Unit-IV: Scaling and round off noise, digital lattice filter structures, bit level arithmetic architecture
redundant arithmetic.

Unit-V: Numerical strength reduction synchronous, wave and asynchronous pipe lines, low power design
programmable digital signal processors

Book:
1.   Keshab K. Parthi, VLSI Digital signal processing systems, design and implementation, Wiley, Inter
Science, 1999.
2.   Mohammad Isamail and Terri Fiez, Analog VLSI signal and information processing, Mc Graw, Hill
3.   S.Y. Kung, H.J. White House, T. Kailath, VLSI and Modern Signal Processing, Prentice Hall, 1985.

 
 M.Tech (VLSI Design)

VLSI Physical Design Automation (MTVD 204)

Unit-I: VLSI Physical Design Automation: VLSI design cycle, physical design cycle, design styles and
system packaging styles.

Unit-II: Design and Fabrication of VLSI device: Fabrication materials, transistor fundamentals,
fabrication of VLSI circuits, design rules, layout of basic devices, and additional fabrication factors.

Unit-III: Data structure and basic algorithms: Basic terminology, complexity issues and NP-hard
problems, basic algorithms (Graph and computational geometry), Basic data structures and graph
algorithms for physical design.

Unit-IV: Partitioning: Problem formulation, classification of partitioning algorithms, group migration

algorithms, simulated annealing and evolution, other partitioning algorithms and performance driven
partitioning. Placement, floor planning and pin assignment: Placement, floorplanning, pin assignment,
integrated approach.

Unit-V: Global Routing: Problem formulation classification of global routing algorithms, maze routing
algorithms, line - probe algorithms, shortest path based algorithms, steiner tree based algorithms, and
integer programming based approach.

Books:
1.  Naveed Sherwani, Algorithms for VLSI physical design automation, Kluwer academic
publisher, 1993
 M.Tech (VLSI Design)
MTVD Elective –II
ASIC Design(MTVD2051)

Unit-I Introduction to ASICS, CMOS LOGIC and ASIC Library Design

Types of ASICs, design flow- CMOS transistors CMOS design rules, combinational logic cell sequential
logic cell- Data path logic cell, transistors and resistors, transistor parasitic capacitance, logical effort,
library cell design, library architecture.

Unit-II Programmable ASICS, Programmable ASIC Logic cells and Programmable ASIC I/o cells
Anti fuse- static RAM, EPROM and EEPROM technology, PREP benchmarks- Actel ACT-Xilinx LCA-
Altera FLEX-Altera MAX DC & AC inputs and outputs, clock & Power inputs Xilinx I/O blocks.

Unit-III Programmable ASIC Interconnect, Programmable ASIC design software and Low level
design entry
Actel ACT-Xilinx LCA , Xilinx EPLD, Altera MAX 5000 and 7000, Altera MAX 9000, Altera FLEX- Design
systems, Logic synthesis, half gate ASIC schematic entry low level design language, PLA tools, ENDIF-
CFI design representation.

Unit-IV Logic Synthesis, Simulation and Testing

Verilog and logic synthesis, VHDL and logic synthesis, types of simulation, boundary scan test- fault
simulation automatic test pattern generation.

Unit-V ASIC construction, Floor Planning, Placement and routing

System partition, FPGA partitioning, partitioning methods, floor planning, placement, physical design flow-
global routing, detailed routing, special routing, circuit extraction, DRC.

Books:

1.    M.J.S. Smith, Application, specific integrated circuits, Addison, Wesley Longman Inc. 1997.
2.    Andrew Brown, VLSI circuits and systems in silicon, Mc Graw Hill, 1991.
3.    S.D. Brown, R.J. Francis, J.Rox, Z.G. Uranesic, Field Programmable gate arrays, Khuever academic
publisher, 1992.
4.    S.Y.Kung, H.J. Whilo House, T.Kailath, VLSI and Modern Signal Processing, Prentice Hall, 1985.

M.Tech (VLSI Design)

Advanced Microprocessors and microcontrollers(MTVD2052)

Unit-I Microprocessor organization: CPU, memory, I/O operating system, multiprogramming,

multithreading, MS-Windows.
 
Unit-II Microprocessor Systems: Overview of 8086/8088, IBM PC Architecture, MASM- assembler
directive, exe files, con files, real mode, protected mode, DPMI services.
 
Unit-III 80386 Processor architecture, instruction set, SRAM interfacing, DRAM interfacing, interrupt
controllers, DMI controllers, interfacing and communication with 80387.

Unit-IV Memory management: Virtual memory concepts, memory management unit.

Differences between 80386 and 80486, Pentium processor architectural enhancements.

Unit-V Microcontrollers: overview of 8051 (8-bit) and 80196 (16-bit) microcontroller architectures,
architectural features of DSP microcontrollers such as ADSP21XX/TMS320 XX applications.

Books:
1.   Intel Microprocessors, architecture programming and interfacing 8086/8088/80186, 80286/80386 and
80486 by Barry B.Brey, PHI, 1995
 M.Tech (VLSI Design)
Testing of VLSI circuits(MTVD 301)

Unit-I Introduction:VLSI testing process and test equipment test economics and product quality fault
modeling, logic and fault simulation.
 
Unit-II Testability Measures: combinational circuit test generation sequential circuit test generation.
 
Unit-III Memory test: analog and mixed signal test, delay test, IDDQ Test.
 
Unit-IV DFT fundamentals: ATPQ fundamental, scan architecture and technique.
 
Unit-V System test: embedded core, test, and future testing.
 
Books:
1.  Viswani D. Agraval Michael L. Bushnell, Essentials of Electronic Testing for digital memory and mixed
signal VLSI circuit, Kluwer Academic Publications, 1999.
2.  Alfred L. Crouch, Design for test for digital ICs and embedded core systems, PHI 1999.
3. Parag K Lala, Fault tolerance nad fault testable hardware design, Pearson Education, Limited
 M.Tech (VLSI Design)
MTVD- Elective III
Computer architecture and parallel processing

 
Unit-I THEORY OF PARALLELISM
 Parallel computer models-the state of computing. Multiprocessors and Multicomputers and Multivectors
and SIMD computers, PRAM and VLSI models, Architectural development tracks. Programs and network
properties-Conditions of parallelism, Program partitioning and scheduling Program flow mechanisms,
System interconnect architectures. Principles of scalable performance matrices and measures, Parallel
processing applications, speed up performance laws, scalability analysis and approaches.
 
Unit-II HARWARE TECHNOLOGIES
 Processor and memory hierarchy advanced processor technology, superscalar and vector processors,
memory hierarchy technology, virtual memory technology , bus cache and shared memory backplane bus
systems, cache memory organizations, shared memory organizations, sequential and weak consistency
models.
 
Unit-III PIPELINING AND SUPER SCALAR TECHNOLOGIES
 Parallel and scalable architectures, Multiprocessor and multicomputers , Multivector and SIMD
computers, Scalable, Multithreaded and data flow architectures.
 
Unit-IV SOFTWARE AND PARALLEL PROGRAMMING
Parallel models, Languages and compilers, Parallel program development and environments, UNIX,
MACH and OSF/1 for parallel computers.
 
Books
1. Kai hwang, Advanced Computer Architecture, McGraw Hill International, 1993.
2. William Stalling, Computer Organization and Architecture, Macmillan Publishing Company, 1990.
3. M .J. Quinn, Designing Efficient Algorithms for Parallel Computers, McGraw Hill International ,
1994.
 

M.Tech (VLSI Design)

MTVD- Elective III
RELIABILITY ENGINEERING

Unit-I Introduction
Reliability fundamentals and bath tub curve, reliability measures and parameters, electronic system
reliability, hazard rate model, probability concepts and failure time distribution.
 
Unit-II System reliability
System reliability modeling, v-out of system, analysis of complex reliability structures, system reliability
estimation.
 
Unit-III Device Reliability
Accelerated life testing, early life reliability, long term device reliability, electrostatic discharge, electrical
stress, steady state hazard rate.
 
Unit-IV Reliability Techniques
Reliability prediction, cut set, tie set, FME set, PTA, Markov, Monte Carlo Simulation, application to
electronic systems.
 
Unit-V Maintainability and availability concepts
Guidelines for design for maintainability, MITR, BIT/BITE facility, spares provisioning, electronics system
packaging and interconnections.
 
Books:
 
1.    Lewis, Introduction to reliability engineering, 2nd edition, Wiley international 1996.
2.    O’Connor, P.D.T., “Practical reliability engineering, Hayden book company, New Jersey, 1981.