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Colour Television Chassis
Q548.1E
LA

18560_000_090401.eps
090401

Contents Page Contents Page


1. Revision List 2 10 LED Low-Pow: LED Drive Liteon 84 85
2. Technical Specifications and Connections 2 12 LED Low-Pow: Microcontroller Block Liteon 86 90
3. Precautions, Notes, and Abbreviation List 5 12 LED Low-Pow: Microcontroller Block Liteon 87 90
4. Mechanical Instructions 9 12 LED Low-Pow: LED Liteon 88 90
5. Service Modes, Error Codes, and Fault Finding 16 12 LED Low-Pow: LED Drive 89 90
6. Alignments 34 SSB: DC/DC +3V3 +1V2 91 119
7. Circuit Descriptions 39 SSB: DC/DC +3V3 +1V2 Standby 92 119
8. IC Data Sheets 49 SSB: Front End 93 119
9. Block Diagrams SSB: PNX8543 - Power 94 119
Wiring Diagram 32" (Frame) 57 SSB: PNX8543 - Video Streams/LVDS Output 95 119
Wiring Diagram 37" (Roadrunner) 58 SSB: PNX8543 Audio Amplifier 96 119
Wiring Diagram 42" (Frame/Roadrunner) 59 SSB: PNX8543 Audio 97 119
Wiring Diagram 47" (Frame) 60 SSB: PNX8543 Analog AV 98 119
Wiring Diagram 47" (Roadrunner) 61 SSB: PNX8543 SDRAM 99 119
Wiring Diagram 52" (Frame) 62 SSB: PNX8543 Control MIPS/Flash/PCI 100 119
Block Diagram Video 63 SSB: PNX8543 Standby Control/Debug 101 119
Block Diagram Audio 64 SSB: Bolt-on 102 119
Block Diagram Control & Clock Signals 65 SSB: Analog IO - Scart 1 & 2 103 119
Block Diagram I2C 66 SSB: YPbPr / Side I/O / S-video 104 119
Supply Lines Overview 67 SSB: HDMI 105 119
10. Circuit Diagrams and PWB Layouts Drawing PWB SSB: Ethernet 106 119
Interface Ambilight: Interface + Single DC-DC 68 71 SSB: PCMCIA 107 119
Interface Ambilight: Dual DC-DC 69 71 SSB: Class-D 108 119
Interface Ambilight: Microcontrollerblock 70 71 SSB: Display Interface (Common) 109 119
6 LED Low-Pow: Microcontroller Block Liteon 72 75 SSB: Display Supply 110 119
6 LED Low-Pow: Microcontroller Block Liteon 73 75 SSB: PNX5100 - Power 111 119
6 LED Low-Pow: LED Liteon 74 75 SSB: PNX5100 - SDRAM 112 119
8 LED Low-Pow: Microcontroller Block Liteon 76 80 SSB: PNX5100 - Control / PCI / Debug 113 119
8 LED Low-Pow: Microcontroller Block Liteon 77 80 SSB: PNX5100 - LVDS In/Out 114 119
8 LED Low-Pow: LED Liteon 78 80 SSB: PNX5100 - AmbiLight 115 119
8 LED Low-Pow: LED Drive Liteon 79 80 SSB: SRP List Explanation 116
10 LED Low-Pow: Microcontroller Block Liteon 81 85 SSB: SRP List Part 1 117
10 LED Low-Pow: Microcontroller Block Liteon 82 85 SSB: SRP List Part 2 118
10 LED Low-Pow: LED Liteon 83 85

©
Copyright 2009 Koninklijke Philips Electronics N.V.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic, mechanical,
photocopying, or otherwise without the prior permission of Philips.

Published by ER/TY 0964 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 18560
2009-Apr-03
EN 2 1. Q548.1E LA Revision List

1. Revision List
Manual xxxx xxx xxxx.0
• First release.

2. Technical Specifications and Connections


Index of this chapter:
2.1 Technical Specifications
2.2 Directions for Use
2.3 Connections
2.4 Chassis Overview

Notes:
• Figures can deviate due to the different set executions.
• Specifications are indicative (subject to change).

2.1 Technical Specifications

For on-line product support please use the links in Table 2-1.
Here is product information available, as well as getting started,
user manuals, frequently asked questions and software &
drivers.

Table 2-1 Described Model numbers

CTN Styling Published in:


32PFL7404H/12 Frame 3122 785 18560
42PFL7404H/12 3122 785 18560
47PFL7404H/12 3122 785 18560
52PFL7404H/12 3122 785 18560
32PFL8404H/12 Roadrunner 3122 785 18560
37PFL8404H/12 3122 785 18560
42PFL8404H/12 3122 785 18560
47PFL8404H/12 3122 785 18560

2.2 Directions for Use

You can download this information from the following websites:


http://www.philips.com/support
http://www.p4c.philips.com

2009-Apr-03
Technical Specifications and Connections Q548.1E LA 2. EN 3

2.3 Connections

Side connectors Back connectors


26-52”

1 11 10 9
19-22” AUDIO SPDIF EXT 2 EXT 1

2 OUT OUT (RGB/CVBS) (RGB/CVBS)

3
12
4
VGA

6
AUDIO IN :
LEFT / RIGHT
HDMI 1 / DVI HDMI 3
HDMI 2 / DVI
7 HDMI 3 / DVI
VGA

13
8 EXT 3 HDMI 2 HDMI 1

TV ANTENNA

14 15 16

18440_001_090217.eps
090217

Figure 2-1 Connection overview

Note: The following connector colour abbreviations are used 3 - S-Video (Hosiden): Video Y/C - In
(according to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, 1 - Ground Y Gnd H
Gy= Grey, Rd= Red, Wh= White, Ye= Yellow. 2 - Ground C Gnd H
3 - Video Y 1 VPP / 75 Ω j
2.3.1 Side Connections 4 - Video C 0.3 VPP / 75 Ω j

1 - Cinch: Audio - In 4 - Head phone (Output)


Rd - Audio R 0.5 VRMS / 10 kΩ jq Bk - Head phone 32 - 600 Ω / 10 mW ot
Wh - Audio L 0.5 VRMS / 10 kΩ jq
5 - Common Interface
2 - Cinch: Video CVBS - In 68p - See diagram B05C SSB: PCMCIA jk
Ye - Video CVBS 1 VPP / 75 Ω jq

2009-Apr-03
EN 4 2. Q548.1E LA Technical Specifications and Connections

6 - USB2.0 12 - VGA: Video RGB - In


1 5
10
6
11 15
1 2 3 4
10000_002_090121.eps
10000_022_090121.eps 090127
090121

Figure 2-4 VGA Connector


Figure 2-2 USB (type A)
1 - Video Red 0.7 VPP / 75 Ω j
1 - +5V k 2 - Video Green 0.7 VPP / 75 Ω j
2 - Data (-) jk 3 - Video Blue 0.7 VPP / 75 Ω j
3 - Data (+) jk 4 - n.c.
4 - Ground Gnd H 5 - Ground Gnd H
6 - Ground Red Gnd H
7 - HDMI: Digital Video, Digital Audio - In 7 - Ground Green Gnd H
(see connector 15) 8 - Ground Blue Gnd H
9 - +5VDC +5 V j
8 - Service Connector (UART) 10 - Ground Sync Gnd H
1 - Ground Gnd H 11 - n.c.
2 - UART_TX Transmit k 12 - DDC_SDA DDC data j
3 - UART_RX Receive j 13 - H-sync 0-5V j
14 - V-sync 0-5V j
2.3.2 Rear Connections 15 - DDC_SCL DDC clock j

9 - EXT1 & 2: Video RGB - In, CVBS - In/Out, Audio - In/Out 13 - Mini Jack: Audio - In
Wh - Audio L 0.5 VRMS / 10 kΩ jo
20 2 Rd - Audio R 0.5 VRMS / 10 kΩ jo

14 - EXT3: Cinch: Video YPbPr - In, Audio - In


21 1
10000_001_090121.eps Gn - Video Y 1 VPP / 75 Ω jq
090121
Bu - Video Pb 0.7 VPP / 75 Ω jq
Rd - Video Pr 0.7 VPP / 75 Ω jq
Figure 2-3 SCART connector Rd - Audio - R 0.5 VRMS / 10 kΩ jq
Wh - Audio - L 0.5 VRMS / 10 kΩ jq
1 - Audio R 0.5 VRMS / 1 kΩ k
2 - Audio R 0.5 VRMS / 10 kΩ j 15 - HDMI 1, 2 & 3: Digital Video, Digital Audio - In
3 - Audio L 0.5 VRMS / 1 kΩ k
4 - Ground Audio Gnd H 19 1
5 - Ground Blue Gnd H 18 2

6 - Audio L 0.5 VRMS / 10 kΩ j E_06532_017.eps


250505

7 - Video Blue 0.7 VPP / 75 Ω jk


8 - Function Select 0 - 2 V: INT Figure 2-5 HDMI (type A) connector
4.5 - 7 V: EXT 16:9
9.5 - 12 V: EXT 4:3 j 1 - D2+ Data channel j
9 - Ground Green Gnd H 2 - Shield Gnd H
10 - n.c. 3 - D2- Data channel j
11 - Video Green 0.7 VPP / 75 Ω j 4 - D1+ Data channel j
12 - n.c. 5 - Shield Gnd H
13 - Ground Red Gnd H 6 - D1- Data channel j
14 - Ground P50 Gnd H 7 - D0+ Data channel j
15 - Video Red 0.7 VPP / 75 Ω j 8 - Shield Gnd H
16 - Status/FBL 0 - 0.4 V: INT 9 - D0- Data channel j
1 - 3 V: EXT / 75 Ω j 10 - CLK+ Data channel j
17 - Ground Video Gnd H 11 - Shield Gnd H
18 - Ground FBL Gnd H 12 - CLK- Data channel j
19 - Video CVBS/Y 1 VPP / 75 Ω k 13 - Easylink Control channel jk
20 - Video CVBS 1 VPP / 75 Ω j 14 - n.c.
21 - Shield Gnd H 15 - DDC_SCL DDC clock j
16 - DDC_SDA DDC data jk
10 - Cinch: S/PDIF - Out 17 - Ground Gnd H
Bk - Coaxial 0.4 - 0.6VPP / 75 Ω kq 18 - +5V j
19 - HPD Hot Plug Detect j
11 - Cinch: Audio - Out 20 - Ground Gnd H
Rd - Audio - R 0.5 VRMS / 10 kΩ kq
Wh - Audio - L 0.5 VRMS / 10 kΩ kq 16 - Aerial - In
- - IEC-type (EU) Coax, 75 Ω D

2.4 Chassis Overview

Refer to chapter Block Diagrams for PWB/CBA locations.

2009-Apr-03
Precautions, Notes, and Abbreviation List Q548.1E LA 3. EN 5

3. Precautions, Notes, and Abbreviation List


Index of this chapter: picture carrier at 475.25 MHz for PAL, or 61.25 MHz for
3.1 Safety Instructions NTSC (channel 3).
3.2 Warnings • Where necessary, measure the waveforms and voltages
3.3 Notes with (D) and without (E) aerial signal. Measure the
3.4 Abbreviation List voltages in the power supply section both in normal
operation (G) and in stand-by (F). These values are
indicated by means of the appropriate symbols.
3.1 Safety Instructions
3.3.2 Schematic Notes
Safety regulations require the following during a repair:
• Connect the set to the Mains/AC Power via an isolation
• All resistor values are in ohms, and the value multiplier is
transformer (> 800 VA).
often used to indicate the decimal point location (e.g. 2K2
• Replace safety components, indicated by the symbol h,
indicates 2.2 kΩ).
only by components identical to the original ones. Any
• Resistor values with no multiplier may be indicated with
other component substitution (other than original type) may
either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω).
increase risk of fire or electrical shock hazard. Of de set
• All capacitor values are given in micro-farads (μ = × 10-6),
ontploft!
nano-farads (n = × 10-9), or pico-farads (p = × 10-12).
• Capacitor values may also use the value multiplier as the
Safety regulations require that after a repair, the set must be
decimal point indication (e.g. 2p2 indicates 2.2 pF).
returned in its original condition. Pay in particular attention to
• An “asterisk” (*) indicates component usage varies. Refer
the following points:
to the diversity tables for the correct values.
• Route the wire trees correctly and fix them with the
• The correct component values are listed on the Philips
mounted cable clamps.
Spare Parts Web Portal.
• Check the insulation of the Mains/AC Power lead for
external damage.
• Check the strain relief of the Mains/AC Power cord for 3.3.3 Spare Parts
proper function.
• Check the electrical DC resistance between the Mains/AC For the latest spare part overview, consult your Philips Spare
Power plug and the secondary side (only for sets that have Part web portal.
a Mains/AC Power isolated power supply):
1. Unplug the Mains/AC Power cord and connect a wire 3.3.4 BGA (Ball Grid Array) ICs
between the two pins of the Mains/AC Power plug.
2. Set the Mains/AC Power switch to the “on” position Introduction
(keep the Mains/AC Power cord unplugged!). For more information on how to handle BGA devices, visit this
3. Measure the resistance value between the pins of the URL: http://www.atyourservice-magazine.com. Select
Mains/AC Power plug and the metal shielding of the “Magazine”, then go to “Repair downloads”. Here you will find
tuner or the aerial connection on the set. The reading Information on how to deal with BGA-ICs.
should be between 4.5 MΩ and 12 MΩ.
4. Switch “off” the set, and remove the wire between the
BGA Temperature Profiles
two pins of the Mains/AC Power plug.
For BGA-ICs, you must use the correct temperature-profile.
• Check the cabinet for defects, to prevent touching of any
Where applicable and available, this profile is added to the IC
inner parts by the customer.
Data Sheet information section in this manual.

3.2 Warnings 3.3.5 Lead-free Soldering

• All ICs and many other semiconductors are susceptible to Due to lead-free technology some rules have to be respected
electrostatic discharges (ESD w). Careless handling by the workshop during a repair:
during repair can reduce life drastically. Make sure that, • Use only lead-free soldering tin. If lead-free solder paste is
during repair, you are connected with the same potential as required, please contact the manufacturer of your soldering
the mass of the set by a wristband with resistance. Keep equipment. In general, use of solder paste within
components and tools also at this same potential. workshops should be avoided because paste is not easy to
• Be careful during measurements in the high voltage store and to handle.
section. • Use only adequate solder tools applicable for lead-free
• Never replace modules or other components while the unit soldering tin. The solder tool must be able:
is switched “on”. – To reach a solder-tip temperature of at least 400°C.
• When you align the set, use plastic rather than metal tools. – To stabilize the adjusted temperature at the solder-tip.
This will prevent any short circuits and the danger of a – To exchange solder-tips for different applications.
circuit becoming unstable. • Adjust your solder tool so that a temperature of around
360°C - 380°C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
3.3 Notes Avoid temperatures above 400°C, otherwise wear-out of
tips will increase drastically and flux-fluid will be destroyed.
3.3.1 General To avoid wear-out of tips, switch “off” unused equipment or
reduce heat.
• Measure the voltages and waveforms with regard to the • Mix of lead-free soldering tin/parts with leaded soldering
chassis (= tuner) ground (H), or hot ground (I), depending tin/parts is possible but PHILIPS recommends strongly to
on the tested area of circuitry. The voltages and waveforms avoid mixed regimes. If this cannot be avoided, carefully
shown in the diagrams are indicative. Measure them in the clear the solder-joint from old tin and re-solder with new tin.
Service Default Mode with a colour bar signal and stereo
sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and

2009-Apr-03
EN 6 3. Q548.1E LA Precautions, Notes, and Abbreviation List

3.3.6 Alternative BOM identification 3.4 Abbreviation List

It should be noted that on the European Service website, 0/6/12 SCART switch control signal on A/V
“Alternative BOM” is referred to as “Design variant”. board. 0 = loop through (AUX to TV),
6 = play 16 : 9 format, 12 = play 4 : 3
The third digit in the serial number (example: format
AG2B0335000001) indicates the number of the alternative AARA Automatic Aspect Ratio Adaptation:
B.O.M. (Bill Of Materials) that has been used for producing the algorithm that adapts aspect ratio to
specific TV set. In general, it is possible that the same TV remove horizontal black bars; keeps
model on the market is produced with e.g. two different types the original aspect ratio
of displays, coming from two different suppliers. This will then ACI Automatic Channel Installation:
result in sets which have the same CTN (Commercial Type algorithm that installs TV channels
Number; e.g. 28PW9515/12) but which have a different B.O.M. directly from a cable network by
number. means of a predefined TXT page
By looking at the third digit of the serial number, one can ADC Analogue to Digital Converter
identify which B.O.M. is used for the TV set he is working with. AFC Automatic Frequency Control: control
If the third digit of the serial number contains the number “1” signal used to tune to the correct
(example: AG1B033500001), then the TV set has been frequency
manufactured according to B.O.M. number 1. If the third digit is AGC Automatic Gain Control: algorithm that
a “2” (example: AG2B0335000001), then the set has been controls the video input of the feature
produced according to B.O.M. no. 2. This is important for box
ordering the correct spare parts! AM Amplitude Modulation
For the third digit, the numbers 1...9 and the characters A...Z AP Asia Pacific
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be AR Aspect Ratio: 4 by 3 or 16 by 9
indicated by the third digit of the serial number. ASF Auto Screen Fit: algorithm that adapts
aspect ratio to remove horizontal black
Identification: The bottom line of a type plate gives a 14-digit bars without discarding video
serial number. Digits 1 and 2 refer to the production centre (e.g. information
AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers ATSC Advanced Television Systems
to the Service version change code, digits 5 and 6 refer to the Committee, the digital TV standard in
production year, and digits 7 and 8 refer to production week (in the USA
example below it is 2006 week 17). The 6 last digits contain the ATV See Auto TV
serial number. Auto TV A hardware and software control
system that measures picture content,
MADE IN BELGIUM and adapts image parameters in a
MODEL : 32PF9968/10
220-240V ~ 50/60Hz dynamic way
128W AV External Audio Video
PROD.NO: AG 1A0617 000001 VHF+S+H+UHF AVC Audio Video Controller
S BJ3.0E LA AVIP
B/G
Audio Video Input Processor
Monochrome TV system. Sound
10000_024_090121.eps carrier distance is 5.5 MHz
090121
BLR Board-Level Repair
BTSC Broadcast Television Standard
Figure 3-1 Serial number (example) Committee. Multiplex FM stereo sound
system, originating from the USA and
3.3.7 Board Level Repair (BLR) or Component Level Repair used e.g. in LATAM and AP-NTSC
(CLR) countries
B-TXT Blue TeleteXT
If a board is defective, consult your repair procedure to decide C Centre channel (audio)
if the board has to be exchanged or if it should be repaired on CEC Consumer Electronics Control bus:
component level. remote control bus on HDMI
If your repair procedure says the board should be exchanged connections
completely, do not solder on the defective board. Otherwise, it CL Constant Level: audio output to
cannot be returned to the O.E.M. supplier for back charging! connect with an external amplifier
CLR Component Level Repair
3.3.8 Practical Service Precautions ComPair Computer aided rePair
CP Connected Planet / Copy Protection
CSM Customer Service Mode
• It makes sense to avoid exposure to electrical shock.
CTI Color Transient Improvement:
While some sources are expected to have a possible
manipulates steepness of chroma
dangerous impact, others of quite high potential are of
transients
limited current and are sometimes held in less regard.
CVBS Composite Video Blanking and
• Always respect voltages. While some may not be
Synchronization
dangerous in themselves, they can cause unexpected
DAC Digital to Analogue Converter
reactions that are best avoided. Before reaching into a
DBE Dynamic Bass Enhancement: extra
powered TV set, it is best to test the high voltage insulation.
low frequency amplification
It is easy to do, and is a good service precaution.
DDC See “E-DDC”
D/K Monochrome TV system. Sound
carrier distance is 6.5 MHz
DFI Dynamic Frame Insertion
DFU Directions For Use: owner's manual
DMR Digital Media Reader: card reader
DMSD Digital Multi Standard Decoding
DNM Digital Natural Motion

2009-Apr-03
Precautions, Notes, and Abbreviation List Q548.1E LA 3. EN 7

DNR Digital Noise Reduction: noise uses 8 bit or 10 bit data words, and has
reduction feature of the set a maximum data rate of 270 Mbit/s,
DRAM Dynamic RAM with a minimum bandwidth of 135
DRM Digital Rights Management MHz.
DSP Digital Signal Processing ITV Institutional TeleVision; TV sets for
DST Dealer Service Tool: special remote hotels, hospitals etc.
control designed for service LS Last Status; The settings last chosen
technicians by the customer and read and stored
DTCP Digital Transmission Content in RAM or in the NVM. They are called
Protection; A protocol for protecting at start-up of the set to configure it
digital audio/video content that is according to the customer's
traversing a high speed serial bus, preferences
such as IEEE-1394 LATAM Latin America
DVB-C Digital Video Broadcast - Cable LCD Liquid Crystal Display
DVB-T Digital Video Broadcast - Terrestrial LED Light Emitting Diode
DVD Digital Versatile Disc L/L' Monochrome TV system. Sound
DVI(-d) Digital Visual Interface (d= digital only) carrier distance is 6.5 MHz. L' is Band
E-DDC Enhanced Display Data Channel I, L is all bands except for Band I
(VESA standard for communication LPL LG.Philips LCD (supplier)
channel and display). Using E-DDC, LS Loudspeaker
the video source can read the EDID LVDS Low Voltage Differential Signalling
information form the display. Mbps Mega bits per second
EDID Extended Display Identification Data M/N Monochrome TV system. Sound
(VESA standard) carrier distance is 4.5 MHz
EEPROM Electrically Erasable and MIPS Microprocessor without Interlocked
Programmable Read Only Memory Pipeline-Stages; A RISC-based
EMI Electro Magnetic Interference microprocessor
EPLD Erasable Programmable Logic Device MOP Matrix Output Processor
EU Europe MOSFET Metal Oxide Silicon Field Effect
EXT EXTernal (source), entering the set by Transistor, switching device
SCART or by cinches (jacks) MPEG Motion Pictures Experts Group
FDS Full Dual Screen (same as FDW) MPIF Multi Platform InterFace
FDW Full Dual Window (same as FDS) MUTE MUTE Line
FLASH FLASH memory NC Not Connected
FM Field Memory or Frequency NICAM Near Instantaneous Compounded
Modulation Audio Multiplexing. This is a digital
FPGA Field-Programmable Gate Array sound system, mainly used in Europe.
FTV Flat TeleVision NTC Negative Temperature Coefficient,
Gb/s Giga bits per second non-linear resistor
G-TXT Green TeleteXT NTSC National Television Standard
H H_sync to the module Committee. Color system mainly used
HD High Definition in North America and Japan. Color
HDD Hard Disk Drive carrier NTSC M/N= 3.579545 MHz,
HDCP High-bandwidth Digital Content NTSC 4.43= 4.433619 MHz (this is a
Protection: A “key” encoded into the VCR norm, it is not transmitted off-air)
HDMI/DVI signal that prevents video NVM Non-Volatile Memory: IC containing
data piracy. If a source is HDCP coded TV related data such as alignments
and connected via HDMI/DVI without O/C Open Circuit
the proper HDCP decoding, the OSD On Screen Display
picture is put into a “snow vision” mode OTC On screen display Teletext and
or changed to a low resolution. For Control; also called Artistic (SAA5800)
normal content distribution the source P50 Project 50: communication protocol
and the display device must be between TV and peripherals
enabled for HDCP “software key” PAL Phase Alternating Line. Color system
decoding. mainly used in West Europe (color
HDMI High Definition Multimedia Interface carrier= 4.433619 MHz) and South
HP HeadPhone America (color carrier PAL M=
I Monochrome TV system. Sound 3.575612 MHz and PAL N= 3.582056
carrier distance is 6.0 MHz MHz)
I2 C Inter IC bus PCB Printed Circuit Board (same as “PWB”)
I2D Inter IC Data bus PCM Pulse Code Modulation
I2S Inter IC Sound bus PDP Plasma Display Panel
IF Intermediate Frequency PFC Power Factor Corrector (or Pre-
IR Infra Red conditioner)
IRQ Interrupt Request PIP Picture In Picture
ITU-656 The ITU Radio communication Sector PLL Phase Locked Loop. Used for e.g.
(ITU-R) is a standards body FST tuning systems. The customer
subcommittee of the International can give directly the desired frequency
Telecommunication Union relating to POD Point Of Deployment: a removable
radio communication. ITU-656 (a.k.a. CAM module, implementing the CA
SDI), is a digitized video format used system for a host (e.g. a TV-set)
for broadcast grade video. POR Power On Reset, signal to reset the uP
Uncompressed digital component or PTC Positive Temperature Coefficient,
digital composite signals can be used. non-linear resistor
The SDI signal is self-synchronizing, PWB Printed Wiring Board (same as “PCB”)

2009-Apr-03
EN 8 3. Q548.1E LA Precautions, Notes, and Abbreviation List

PWM Pulse Width Modulation Y Luminance signal


QRC Quasi Resonant Converter Y/C Luminance (Y) and Chrominance (C)
QTNR Quality Temporal Noise Reduction signal
QVCP Quality Video Composition Processor YPbPr Component video. Luminance and
RAM Random Access Memory scaled color difference signals (B-Y
RGB Red, Green, and Blue. The primary and R-Y)
color signals for TV. By mixing levels YUV Component video
of R, G, and B, all colors (Y/C) are
reproduced.
RC Remote Control
RC5 / RC6 Signal protocol from the remote
control receiver
RESET RESET signal
ROM Read Only Memory
RSDS Reduced Swing Differential Signalling
data interface
R-TXT Red TeleteXT
SAM Service Alignment Mode
S/C Short Circuit
SCART Syndicat des Constructeurs
d'Appareils Radiorécepteurs et
Téléviseurs
SCL Serial Clock I2C
SCL-F CLock Signal on Fast I2C bus
SD Standard Definition
SDA Serial Data I2C
SDA-F DAta Signal on Fast I2C bus
SDI Serial Digital Interface, see “ITU-656”
SDRAM Synchronous DRAM
SECAM SEequence Couleur Avec Mémoire.
Color system mainly used in France
and East Europe. Color carriers=
4.406250 MHz and 4.250000 MHz
SIF Sound Intermediate Frequency
SMPS Switched Mode Power Supply
SoC System on Chip
SOG Sync On Green
SOPS Self Oscillating Power Supply
SPI Serial Peripheral Interface bus; a 4-
wire synchronous serial data link
standard
S/PDIF Sony Philips Digital InterFace
SRAM Static RAM
SRP Service Reference Protocol
SSB Small Signal Board
STBY STand-BY
SVGA 800x600 (4:3)
SVHS Super Video Home System
SW Software
SWAN Spatial temporal Weighted Averaging
Noise reduction
SXGA 1280x1024
TFT Thin Film Transistor
THD Total Harmonic Distortion
TMDS Transmission Minimized Differential
Signalling
TXT TeleteXT
TXT-DW Dual Window with TeleteXT
UI User Interface
uP Microprocessor
UXGA 1600x1200 (4:3)
V V-sync to the module
VESA Video Electronics Standards
Association
VGA 640x480 (4:3)
VL Variable Level out: processed audio
output toward external amplifier
VSB Vestigial Side Band; modulation
method
WYSIWYR What You See Is What You Record:
record selection that follows main
picture and sound
WXGA 1280x768 (15:9)
XTAL Quartz crystal
XGA 1024x768 (4:3)

2009-Apr-03
Mechanical Instructions Q548.1E LA 4. EN 9

4. Mechanical Instructions
Index of this chapter: Notes:
4.1 Cable Dressing • Figures below can deviate slightly from the actual situation,
4.2 Service Positions due to the different set executions.
4.3 Assy/Panel Removal
4.4 Set Re-assembly

4.1 Cable Dressing

18560_104_090401.eps
090402

Figure 4-1 Cable dressing 32PFL7404H/12

18560_102_090401.eps
090402

Figure 4-2 Cable dressing 42PFL7404H/12

2009-Apr-03
EN 10 4. Q548.1E LA Mechanical Instructions

18560_101_090401.eps
090402

Figure 4-3 Cable dressing 47PFL7404H/12

18560_100_090401.eps
090401

Figure 4-4 Cable dressing 52PFL7404H/12

2009-Apr-03
Mechanical Instructions Q548.1E LA 4. EN 11

18560_103_090401.eps
090402

Figure 4-5 Cable dressing 32PFL8404H/12

18560_105_090401.eps
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Figure 4-6 Cable dressing 37PFL8404H/12

2009-Apr-03
EN 12 4. Q548.1E LA Mechanical Instructions

18560_106_090401.eps
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Figure 4-7 Cable dressing 42PFL8404H/12

18560_107_090401.eps
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Figure 4-8 Cable dressing 47PFL8404H/12

2009-Apr-03
Mechanical Instructions Q548.1E LA 4. EN 13

4.2 Service Positions

For easy servicing of this set, there are a few possibilities


created: 1
• The buffers from the packaging.
• Foam bars (created for Service). 2 1 2

4.2.1 Foam Bars


3

1
3

Required for sets


1 42" 2
1

18560_408_090401.eps
090402

Figure 4-10 Ambi Light unit

1. Remove the Ambi Light cover [1].


2. Unplug the connector(s) [2].
E_06532_018.eps
171106 3. Remove the subframe [3].
4. The PWB can now be taken from the subframe.
Figure 4-9 Foam bars When defective, replace the whole unit.

The foam bars (order code 3122 785 90580 for two pieces) can 4.3.4 Main Supply Panel
be used for all types and sizes of Flat TVs.
See figure Figure 4-9 for details. Sets with a display of 42" and 1. Unplug all connectors.
larger, require four foam bars [1]. Ensure that the foam bars 2. Remove the fixation screws.
are always supporting the cabinet and never only the display. 3. Take the board out.
Caution: Failure to follow these guidelines can seriously When defective, replace the whole unit.
damage the display!
By laying the TV face down on the (ESD protective) foam bars,
4.3.5 IR & LED Board / Stand Support
a stable situation is created to perform measurements and
alignments. By placing a mirror under the TV, you can monitor
the screen. Refer to Figure 4-11 for details.

4.3 Assy/Panel Removal

The instructions apply to the 8000 series (Roadrunner - with


AmbiLight).

4.3.1 Rear Cover

Warning: Disconnect the mains power cord before you remove


the rear cover. 2
Note: it is not necessary to remove the stand while removing
the rear cover.
1. Remove all screws of the rear cover.
2. Lift the rear cover from the TV. Make sure that wires and 1
flat coils are not damaged while lifting the rear cover from
the set. 18560_109_090401.eps
090402

4.3.2 Speakers
Figure 4-11 IR & LED Board / Stand Support
Each speaker unit is mounted with two screws.
1. Remove the stand.
When defective, replace the whole unit.
2. Remove the IR/LED cover [1].
3. Remove the connectors on the IR/LED board.
4.3.3 Ambi Light 4. Remove the fixation screws from the IR/LED board.
When defective, replace the whole unit.
Each Ambi Light unit is mounted on a subframe. Refer to
Figure 4-10 for details.

2009-Apr-03
EN 14 4. Q548.1E LA Mechanical Instructions

Stand Support Removal for LCD panel removal


1. Remove the Main Supply Panel as earlier described.
2. Remove the screws [2] and take the support out. 4 4

4.3.6 Small Signal Board (SSB)

Caution: It is mandatory to remount screws at their original


position during re-assembly. Failure to do so may result in
damaging the SSB.
2
1. Unplug all connectors.
2. Remove the screws that secure the board.
3. The SSB can now be taken out of the set.

4.3.7 Keyboard Control Panel 3

1. Remove the right AmbiLight unit.


2. Follow instructions for removing the IR/LED board until 3.
3. Remove the connector on the IR/LED board.
4. Release the cable.
5. Release the clip on top of the unit and take the unit out.
When defective, replace the whole unit.

4.3.8 LCD Panel

Refer to Figure 4-12 to Figure 4-15 for details.


1. Remove the AmbiLight units as earlier described.
2. Remove the subwoofer as earlier described.
3. Remove the Top Support [1]. 4 4
4. Release the LVDS [2] - and other connectors [3] from the
18560_111_090401.eps
SSB. 090402
5. Remove the subframe of the SSB [4] with the SSB still
mounted on it. Figure 4-13 LCD Panel - SSB subframe
6. Release all connectors [5] from the PSU.
7. Remove the subframe of the PSU [6] with the PSU still
mounted on it.
8. Remove the stand support as earlier described.
9. Release the connectors [7] on the IR/LED Panel as earlier
described. 5
10. Remove the clips that secure the flare [8]. 6 5 6
11. Remove the flare.
12. Now the LCD Panel can be lifted from the front cabinet.

1 1
6 6

18560_112_090401.eps
090402

Figure 4-14 LCD Panel - PSU subframe

18560_110_090401.eps
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Figure 4-12 LCD Panel - top support

2009-Apr-03
Mechanical Instructions Q548.1E LA 4. EN 15

8 8
8
8

8 8 8 8
7

18560_113_090401.eps
090402

Figure 4-15 LCD Panel - panel removal

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse


order.

Notes:
• While re-assembling, make sure that all cables are placed
and connected in their original position.
See Figure 4-1, Figure 4-2 and Figure 4-3
• Pay special attention not to damage the EMC foams in the
set. Ensure that EMC foams are mounted correctly.

2009-Apr-03
EN 16 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding


Index of this chapter: • All service-unfriendly modes (if present) are disabled, like:
5.1 Test Points – (Sleep) timer.
5.2 Service Modes – Child/parental lock.
5.3 Step by step Start-up – Picture mute (blue mute or black mute).
5.4 Service Tools – Automatic volume levelling (AVL).
5.5 Error Codes – Skip/blank of non-favourite pre-sets.
5.6 The Blinking LED Procedure
5.7 Protections How to Activate SDM
5.8 Fault Finding and Repair Tips For this chassis there are two kinds of SDM: an analog SDM
5.9 Software Upgrading and a digital SDM. Tuning will happen according to Table 5-1.
• Analog SDM: use the standard RC-transmitter and key in
the code “062596”, directly followed by the “MENU” (or
5.1 Test Points
HOME) button.
Note: It is possible that, together with the SDM, the main
As most signals are digital, it will be difficult to measure menu will appear. To switch it “off”, push the “MENU” (or
waveforms with a standard oscilloscope. However, several key HOME) button again.
ICs are capable of generating test patterns, which can be • Digital SDM: use the standard RC-transmitter and key in
controlled via ComPair. In this way it is possible to determine the code “062593”, directly followed by the “MENU” (or
which part is defective. HOME) button.
Note: It is possible that, together with the SDM, the main
Perform measurements under the following conditions: menu will appear. To switch it “off”, push the “MENU” (or
• Service Default Mode. HOME) button again.
• Video: Colour bar signal. • Analog SDM can also be activated by, on the SSB,
• Audio: 3 kHz left, 1 kHz right. shorting for a moment the solder pads SDM [1] (see
Figure 5-1).
5.2 Service Modes

Service Default mode (SDM) and Service Alignment Mode


(SAM) offers several features for the service technician, while
the Customer Service Mode (CSM) is used for communication 1
SDM
between the call centre and the customer.

This chassis also offers the option of using ComPair, a


hardware interface between a computer and the TV chassis. It
offers the abilities of structured troubleshooting, error code
reading, and software version read-out for all chassis.
(see also section 5.4.1 ComPair).

Note: For the new model range, a new remote control (RC) is
used with some renamed buttons. This has an impact on the
activation of the Service modes. For instance the old “MENU”
button is now called “HOME” (or is indicated by a “house” icon).
18440_200_090225.eps
5.2.1 Service Default Mode (SDM) 090306

Figure 5-1 Service mode pads


Purpose
• To create a pre-defined setting, to get the same
After activating this mode, “SDM” will appear in the upper right
measurement results as given in this manual.
corner of the screen (when a picture is available).
• To override SW protections detected by stand-by
processor and make the TV start up to the step just before
protection (a sort of automatic step by step start up). See How to Navigate
section 5.3 Step by step Start-up. When the “MENU” (or HOME) button is pressed on the RC
• To start the blinking LED procedure where only layer 2 transmitter, the set will toggle between the SDM and the normal
errors are displayed (see also section 5.5 Error Codes). user menu (with the SDM mode still active in the background).

Specifications How to Exit SDM


Use one of the following methods:
• Switch the set to STAND-BY via the RC-transmitter.
Table 5-1 SDM default settings
• Via a standard customer RC-transmitter: key in “00”-
sequence.
Default
Region Freq. (MHz) system
Europe, AP(PAL/Multi) 475.25 PAL B/G
Europe, AP DVB-T 546.00 PID DVB-T
Video: 0B 06 PID
PCR: 0B 06 PID
Audio: 0B 07

• All picture settings at 50% (brightness, colour, contrast).


• All sound settings at 50%, except volume at 25%.

2009-Apr-03
Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 17

5.2.2 Service Alignment Mode (SAM) for the options can be found in chapter 8 “Alignments”) or
a method via a standard RC (described below).
Purpose Changing the display option via a standard RC: Key in the
• To perform (software) alignments. code “062598” directly followed by the “MENU” (or HOME)
• To change option settings. button and “XXX” (where XXX is the 3 digit decimal display
• To easily identify the used software version. code as mentioned in Table 6-4. Make sure to key in all three
• To view operation hours. digits, also the leading zero’s. If the above action is successful,
• To display (or clear) the error code buffer. the front LED will go out as an indication that the RC sequence
was correct. After the display option is changed in the NVM, the
TV will go to the Stand-by mode. If the NVM was corrupted or
How to Activate SAM
empty before this action, it will be initialized first (loaded with
Via a standard RC transmitter: key in the code “062596”
directly followed by the “INFO” or “I+” button. After activating default values). This initializing can take up to 20 seconds.
SAM with this method a service warning will appear on the
screen, continue by pressing the red button on the RC.

Contents of SAM (see also Table 6-5): Display Option


• Hardware Information Code

– A. SW Version. Displays the software version of the


main software (example: Q5431-0.26.2.0= 39mm

AAAaB_X.Y.W.Z). PHILIPS 040

27mm
• AAAA= the chassis name, where “a” indicates the MODEL:
32PF9968/10

chip version: e.g. TV543/32= Q543, TV543/82= PROD.SERIAL NO:


AG 1A0620 000001

Q548, Q543/92= Q549. (CTN Sticker)


• B= the SW branch version. This is a sequential
E_06532_038.eps
number (this is no longer the region indication, as 240108
the software is now multi-region).
• X.Y.W.Z= the software version, where X is the Figure 5-2 Location of Display Option Code sticker
main version number (different numbers are not
compatible with one another) and Y.W.Z is the sub • Store - go right. All options and alignments are stored
version number (a higher number is always when pressing “cursor right” (or the “OK” button) and then
compatible with a lower number). the “OK”-button.
– B. SBY PROC Version. Displays the software version • SW Maintenance.
of the stand-by processor. – SW Events. Not useful for Service purposes. In case
– C. Production Code. Displays the production code of of specific software problems, the development
the TV, this is the serial number as printed on the back department can ask for this information.
of the TV set. Note that if an NVM is replaced or is – HW Events. Not useful for Service purposes. In case
initialized after corruption, this production code has to of specific software problems, the development
be re-written to NVM. ComPair will foresee in a department can ask for this information.
possibility to do this. • Test settings. For development purposes only.
• Operation Hours. Displays the accumulated total of • Development file versions. Not useful for Service
operation hours (not the stand-by hours). Every time the purposes, this information is only used by the development
TV is switched “on/off”, 0.5 hours is added to this number. department.
• Errors (followed by maximum 10 errors). The most recent • Upload to USB. To upload several settings from the TV to
error is displayed at the upper left (for an error explanation an USB stick, which is connected to the SSB. The items are
see section 5.5 Error Codes). “Channel list”, “Personal settings”, “Option codes”,
• Reset Error Buffer. When “cursor right” (or the “OK “Display-related alignments” and “History list”. First a
button) is pressed and then the “OK” button is pressed, the directory “repair\” has to be created in the root of the
error buffer is reset. USB stick. To upload the settings select each item
• Alignments. This will activate the “ALIGNMENTS” sub- separately, press “cursor right” (or the “OK button), confirm
menu. See chapter 6. Alignments. with “OK” and wait until “Done” appears. In case the
• Dealer Options. Extra features for the dealers. See Table download to the USB stick was not successful “Failure” will
6-5. appear. In this case, check if the USB stick is connected
• Options. Extra features for Service. For more information properly and if the directory “repair” is present in the root of
regarding option codes, see chapter 6. Alignments. the USB stick. Now the settings are stored onto the USB
Note that if the option code numbers are changed, these stick and can be used to download onto another TV or
have to be confirmed with pressing the “OK” button before other SSB. Uploading is of course only possible if the
the options are stored. Otherwise changes will be lost. software is running and if a picture is available. This
• Initialize NVM. The moment the processor recognizes a method is created to be able to save the customer’s TV
corrupted NVM, the “initialize NVM” line will be highlighted. settings and to store them into another SSB.
Now, two things can be done (dependent of the service • Download from USB. To download several settings from
instructions at that moment): the USB stick to the TV. Same way of working as with
– Save the content of the NVM via ComPair for uploading. To make sure that the download of the channel
development analysis, before initializing. This will give list from USB to the TV is executed properly, it is necessary
the Service department an extra possibility for to restart the TV and tune to a valid preset if necessary.
diagnosis (e.g. when Development asks for this). Note: The “History list item” can not be downloaded from
– Initialize the NVM. USB to the TV. This is a “read-only” item. In case of
specific problems, the development department can ask
• Note: When the NVM is corrupted, or replaced, there is a for this information.
high possibility that no picture appears because the display
code is not correct. So, before initializing the NVM via the How to Navigate
SAM, a picture is necessary and therefore the correct • In SAM, the menu items can be selected with the
display option has to be entered. “CURSOR UP/DOWN” key (or the scroll wheel) on the RC-
Refer to chapter 6. Alignments for details. To adapt this transmitter. The selected item will be highlighted. When not
option, it’s advised to use ComPair (the correct HEX values

2009-Apr-03
EN 18 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding

all menu items fit on the screen, move the “CURSOR UP/ • Production Code. Displays the production code (the serial
DOWN” key to display the next/previous menu items. number) of the TV. Note that if an NVM is replaced or is
• With the “CURSOR LEFT/RIGHT” keys (or the scroll initialized after corruption, this production code has to be
wheel), it is possible to: re-written to NVM. ComPair will foresee a in possibility to
– (De) activate the selected menu item. do this.
– (De) activate the selected sub menu. • Installed date. Indicates the date of the first installation of
• With the “OK” key, it is possible to activate the selected the TV. This date is acquired via time extraction.
action. • Options 1. Gives the option codes of option group 1 as set
in SAM (Service Alignment Mode).
How to Exit SAM • Options 2. Gives the option codes of option group 2 as set
Use one of the following methods: in SAM (Service Alignment Mode).
• Switch the set to STAND-BY via the RC-transmitter. • 12NC SSB. Gives an identification of the SSB as stored in
• Via a standard RC-transmitter, key in “00” sequence, or NVM. Note that if an NVM is replaced or is initialized after
select the “BACK” key. corruption, this identification number has to be re-written to
NVM. ComPair will foresee in a possibility to do this. This
5.2.3 Customer Service Mode (CSM) identification number is the 12nc number of the SSB.
Remark: the content here can also be a part of the 12NC of
the SSB in combination with the serial number.
Purpose
• 12NC display. Shows the 12NC of the display
When a customer is having problems with his TV-set, he can
• 12NC supply. Shows the 12NC of the supply.
call his dealer or the Customer Helpdesk. The service
• 12NC “fan board”. Shows the 12NC of the “fan board”-
technician can then ask the customer to activate the CSM, in
module (for sets with LED backlight).
order to identify the status of the set. Now, the service
• 12NC “LED Dimming Panel”. Shows the 12NC of the
technician can judge the severity of the complaint. In many
LED dimming Panel (for sets with LED backlight).
cases, he can advise the customer how to solve the problem,
or he can decide if it is necessary to visit the customer.
The CSM is a read only mode; therefore, modifications in this Software versions
mode are not possible. • Current main SW. Displays the built-in main software
When CSM is activated, the layer 1 error is displayed via version. In case of field problems related to software,
blinking LED. Only the latest error is displayed. (see also software can be upgraded. As this software is consumer
section 5.5 Error Codes). upgradeable, it will also be published on the Internet.
Example: Q5431E_1.2.3.4.
• Stand-by SW. Displays the built-in stand-by processor
When CSM is activated and there is a USB stick connected to
software version. Upgrading this software will be possible
the TV, the software will dump the complete CSM content to the
via ComPair or via USB (see section Software Upgrading).
USB stick. The file (Csm.txt) will be saved in the root of the USB Example: STDBY_1.2.3.4.
stick. This information can be handy if no information is • MOP ambient light SW. Displays the MOP ambient light
displayed.
EPLD SW.
• MPEG4 software. Displays the MPEG4 software (for sets
Only for Q548.1: with MPEG4).
When in the Q548.1 chassis CSM is activated, a test pattern • PNX5120 boot NVM. Displays the SW-version that is used
will be displayed during 5 s.: 1 s. blue, 1 s. green, and 1 s. red, in the PNX5120 boot NVM (for sets with PNX5120).
then again 1 s. blue and 1 s. green. This test pattern is • LED Dimming SW. Displays the LED dimming EPLD SW
generated by the PNX5120. (for sets with LED backlight).
So if this test pattern is shown, it could be determined that the
back end video chain (PNX5120, LVDS, and display) of the
Quality items
SSB is working. • Signal quality. Poor/average/good
For LED backlight TV sets, the test pattern is build as follows:
• Child lock. Not active/active. This is a combined item for
1 s. blue, 1 s. green, 1 s. red (generated by the PNX5120) and
locks. If any lock (Preset lock, child lock, lock after or
further on with 3 seconds RGB pattern from the LED Dimming parental lock) is active, the item shall show “active”.
Panel.
• HDMI HDCP key. Indicates of the HDMI keys (or HDCP
keys) are valid or not. In case these keys are not valid and
How to Activate CSM the consumer wants to make use of the HDMI functionality,
Key in the code “123654” via the standard RC transmitter. the SSB has to be replaced.
• Ethernet MAC address. Not applicable.
Note: Activation of the CSM is only possible if there is no (user) • Wireless MAC address. Not applicable.
menu on the screen! • BDS key. Indicates if the “BDS level 1” key is valid or not.
• CI slot present. If the common interface module is
How to Navigate detected the result will be “YES”, else “NO”.
By means of the “CURSOR-DOWN/UP” knob (or the scroll • HDMI input format. The detected input format of the
wheel) on the RC-transmitter, can be navigated through the HDMI.
menus. • HDMI audio input stream. The HDMI audio input stream
is displayed: present / not present.
Contents of CSM • HDMI video input stream. The HDMI video input stream
The contents are displayed on three pages: General, Software is displayed: present / not present.
versions, and Quality items. However, these group names itself
are not shown anywhere in the CSM menu. How to Exit CSM
Press the “MENU” (or HOME) button twice on the RC-
General transmitter.
• Set Type. This information is very helpful for a helpdesk/
workshop as reference for further diagnosis. In this way, it
is not necessary for the customer to look at the rear of the
TV-set. Note that if an NVM is replaced or is initialized after
corruption, this set type has to be re-written to NVM.
ComPair will foresee in a possibility to do this.

2009-Apr-03
Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 19

5.3 Step by step Start-up

When the TV is in a protection state due to an error detected by


stand-by software (error blinking is displayed) and SDM is
activated via short cutting the pins on the SSB, the TV starts up
until it reaches the situation just before protection. So, this is a
kind of automatic step by step start-up. In combination with the
start-up diagrams below, it is shown which supplies are present
at a certain moment. Important to know is, that if e.g. the 3V3
detection fails and thus layer 2 error = 18 is blinking while the
TV is restarted via SDM, the Stand-by Processor will enable
the 3V3, but the TV set will not go to protection now. The TV
will stay in this situation until it is reset (Mains/AC Power supply
interrupted).
Caution: in case the start-up in this mode with a faulty FET
7101-1 is done, all ICs supplied by the +3V3 could be
destroyed, due to over voltage (12V on 3V3-line). It is
recommended to measure first the FET 7101-1 or others FETs
on short-circuit before activating SDM via the service pads.

The abbreviations “SP” and “MP” in the figures stand for:


• SP: protection or error detected by the Stand-by
Processor.
• MP: protection or error detected by the MIPS Main
Processor.

Mains
off Mains
on

- WakeUp requested
WakeUp
- Acquisition needed
requested
- Tact switch pushed

St by Semi
- stby requested and Active
no data Acquisition St by - St by requested
required - tact SW pushed

Tact switch
pushed
WakeUp
requested
- Tact switch pushed
(SDM)
- last status is hibernate
GoToProtection
after mains ON
Hibernate
GoToProtection

Protection

18440_215_090227.eps
270209

Figure 5-3 Transition diagram

2009-Apr-03
EN 20 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding

Off
Mains is applied
Stand by or
Protection
Standby Supply starts running.
All standby supply voltages become available.

st-by µP resets

If the protection state was left by short circuiting the


Initialise I/O pins of the st-by µP:
SDM pins, detection of a protection condition during
- Switch reset-AVC LOW (reset state)
startup will stall the startup. Protection conditions in a
- Switch WP-NandFlash LOW (protected)
playing set will be ignored. The protection mode will
- Switch reset-system LOW (reset state)
not be entered.
- Switch reset-5100 LOW (reset state)
- Switch reset-Ethernet LOW (reset state)
- keep reset-NVM high, Audio-reset and Audio-Mute-Up HIGH

- Switch Audio-Reset high.


start keyboard scanning, RC detection. Wake up reasons are It is low in the standby mode if the standby
off. mode lasted longer than 10s.

Confirmation received from NXP that there does not need to


Reset detect2_delay_flag be a delay between the rise of the +1V2 and the +3V3. Only
requirement is to have the +1V2 before or at the same time
as the +3V3. 150ms delay is deleted.

Switch ON Platform and display supply by switching


LOW the Standby line.

+12V, +24Vs, AL and Bolt-on power


is switched on, followed by the +1V2 DCDC converter

Detect2 should be polled on the standard 40ms


interval and startup should be continued when Delay 1.5 second before checking detect2 line Carefull we don’t hit this error
detect2 becomes high. if the detect2_delay_flag is set directly if the delay flag is set.

Power-OK error:
Detect2 high received
No Layer1: 3
within 2 seconds?
Layer2: 16

Yes

No
Enter protection
Wait fixed time of 15ms

If the supply is hicking, the first detect2 could


be positive (12V still present), followed by
negative Supply-fault (already low). Adding a
Detect2 high? fixed delay brings us behind this delay gap.

Yes

This enables the +3V3 and +5V converter. As a Reset detect2_delay_flag


result, also +5V-tuner, +2V5, +1V8-PNX8541 and
+1V8-PNX5100 (if present) become available.

Enable the DCDC converter for +3V3 and


+5V. (ENABLE-3V3)

Delay of 50ms needed because of the latency of


the detect-1 circuit. This delay is also needed for Set detect2_delay_flag
the PNX5100. The reset of the PNX5100 should Wait 50ms
only be released 10ms after powering the IC.

Detect-1 I/O line Detect-2 I/O line Disable 3V3, switch standby
No No
High? High? line high and wait 4 seconds

Yes

These checks prevent the set from going in to


Yes Wait 50ms standby on the false error condition where the
first 3V3 is negative because of a hickup,
although the 12V was about to reappear.
Because of this reappearance, the 12V check
is OK which would cause protection. If we wait
Yes Detect-1 I/O line
50ms, the 3V3 should be back as well.
High?

No
No

Detect-2 I/O line


High?

Yes

Enable the supply detection algorithm Voltage output error:


Layer1: 2
Layer2: 18
Enter protection
Set I²C slave address
of Standby µP to (A0h)

This will allow access to NVM and


Switch LOW the RESET-NVM line to allow access to NVM. (Add a NAND FLASH and can not be done
2ms delay before trying to address the NVM to allow correct NVM earlier because the FLASH needs to
initialization, this is no issue in this setup, the delay is automatically be in Write Protect as long as the
No covered by the architectural setup) supplies are not available.

Switch HIGH the WP-NandFlash to


allow access to NAND Flash

Only usefull in case of PNX5100 present. To avoid


Release Reset-PNX5100.
diversity in standby µP, the reset-PNX5100 will still be
PNX5100 will start booting.
switched by the standby µP.

This 10ms delay is still present to give some relaxation


Wait 10 ms to the supplies. (The PCI arbiter on the PNX5100 is
never used and is not the reason anymore)

Detect EJTAG debug probe


(pulling pin of the probe interface to An EJTAG probe (e.g. WindPower ICE probe) can be
ground by inserting EJTAG probe) connected for Linux Kernel debugging purposes.

EJTAG probe
Yes
connected ?

No

No Cold boot?

Yes

Release AVC system reset Release AVC system reset Release AVC system reset
Feed warm boot script Feed cold boot script Feed initializing boot script
disable alive mechanism 18440_216a_090227.eps
270209

To: 18440_216b_090227.eps To: 18440_216b_090227.eps

Figure 5-4 “Off/Stand-by” to “Semi Stand-by” flowchart (part 1)

2009-Apr-03
Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 21

From: 18440_216a_090227.eps From: 18440_216a_090227.eps

Reset-system is switched HIGH by the Reset-system is switched HIGH by the


AVC at the end of the bootscript AVC at the end of the bootscript
Reset-system is connected to the
Micronas MultiStandard decoder.

AVC releases Reset-Ethernet when the AVC releases Reset-Ethernet when the
end of the AVC boot-script is detected end of the AVC boot-script is detected
This cannot be done through the bootscript,
the I/O is on the standby µP

Reset-Audio and Audio-Mute-Up are Reset-Audio and Audio-Mute-Up are


switched by MIPS code later on in the switched by MIPS code later on in the
Timing need to be updated if startup process startup process
more mature info is available.

Bootscript ready
No
in 1250 ms?

Yes

Set I²C slave address


of Standby µP to (60h)

RPC start (comm. protocol)

Timing needs to
be updated if more
Flash to Ram mature info is
No image transfer succeeded available.
within 30s?
Code =
Layer1: 2
Layer2: 15 Yes
Timing needs to be
updated if more
Code = mature info is
Switch AVC PNX8543 SW initialization
Layer1: 2 No available.
in reset (active low) succeeded
Layer2: 53
within 20s?

Wait 10ms Yes

Enable Alive check mechanism


Switch the NVM reset
line HIGH.

MIPS reads the wake up reason Wait until AVC starts to


from standby µP. communicate
Disable all supply related protections and
switch off the +3V3 +5V DC/DC converter.

5100 SW start
Wait 5ms
Startup screen shall only be visible when there is a coldboot
Wake up reason to an active state end situation. The startup screen shall not
coldboot & not semi- be visible when waking up for reboot reasons or waking up to
switch off the remaining DC/DC
standby? semi-standby conditions.
converters

yes
Switch Standby I/O line high
3-th try?
and wait 4 seconds
The first time after the option turn on of the startup screen or
Startup screen cfg file when the set is virgin, the cfg file is not present and hence
present? the startup screen will not be shown.
Yes

yes
Blink Code as
error code
MIPS sends display parameters and
Bitmap to 5100

No To keep this flowchart readable, the exact display turn on


description is not copied here. Please see the Semi-standby
MIPS triggers 5100 to display the
Enter protection startup screen
to On description for the detailed display startup sequence.
During the complete display time of the Startup screen, the
No preheat condition of 100% PWM is valid.

Startup screen visible

Initialize audio

In case of a LED backlight display, a LED DIM panel is present


which is fed by the Vdisplay. To power the LED DIM Panel, the
Switch on the display in case of a LED backlight Vdisplay switch driven by the PNX5100 must be closed. The
display by sending the TurnOnDisplay(1) (I²C) display startup sequence is taken care of by the LED DIM
command to the PNX5100 panel. Secondly, this cmd will also enable the LVDS output of
the 5100 towards the LED DIM panel.

Enable the PWM output towards the display LVDS In case of a LED backlight display, the PWM-dimming signal
cable in case of a LED Backlight set. needs to be routed to the LVDS cable. This routing is not
(CTRL4-PNX5100) allowed in non-LED sets (see also display configuration)

Initialize tuner and Multi Standard decoder

Initialize source selection

Initialize video processing IC's :

- local contrast FPGA


- PNX5100 (if present)

Initialize AutoTV

Initialize Ambilight with Lights off.

18440_216b_090227.eps
270209

Semi-Standby

Figure 5-5 “Off/Stand-by” to “Semi Stand-by” flowchart (part 2)

2009-Apr-03
EN 22 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding

Constraints taken into account:


- Display may only be started when valid LVDS output clock can be delivered by the AVC.
- To have a reliable operation of the backlight, the backlight should be driven with a PWM duty cycle of 100%
during the first seconds. Only after this first one or two seconds, the PWM may be set to the required output level
(Note that the PWM output should be present before the backlight is switched on). To minimize the artefacts, the
picture should only be unblanked after these first seconds.

Semi Standby
The assumption here is that a fast toggle (<2s) can
only happen during ON->SEMI ->ON. In these states,
the AVC is still active and can provide the 2s delay. A
transition ON->SEMI->STBY->SEMI->ON cannot be
Wait until previous on-state is left more than 2
made in less than 2s, because the standby state will
seconds ago. (to prevent LCD display problems)
be maintained for at least 4s.

Assert RGB video blanking


CPipe already generates a valid output and audio mute
clock in the semi-standby state: display
startup can start immediately when leaving
the semi-standby state.

Display already on?


(splash screen)

No

No PNX5100 present?

Switch on the display power by


Yes Yes
The exact timings to switching LCD-PWR-ON low
switch on the Switch on the display by sending the
display (LVDS Initialize audio and video
TurnOnDisplay(1) (I²C) cmd to the PNX5100
delay, lamp delay) Wait x ms processing IC's and functions
are defined in the according needed use case.
display file. Delay Lamp-on with the sum of the LVDS delay and
Switch on LVDS output in 8543
the Lamp delay indicated in the display file

Switch off the dimming backlight feature, set


The sum of the LVDS delay and the Lamp delay needs the BOOST control to nominal and make sure
to be used because the Lamp delay is specified with PWM output is set to 100%
the appearance of the LVDS on the display as
reference. This moment is not known by ceplf, only the
switch on of the LCD power is known. The delta
between both is the LVDS delay. Switch on LCD backlight (Lamp-ON)

The complete algorithm description is


removed here.
Only the start of the algorithm
is mentioned here as reminder. Start POK line detection
algorithm
Wait until valid and stable audio and video, corresponding to the
requested output is delivered by the AVC
AND
the backlight has been switched on for at least the time which is
indicated in the display file as preheat time.
return

Switch Audio-Reset low and wait 5ms

Release audio mute and wait 100ms before any other audio
handling is done (e.g. volume change)

Restore dimming backlight feature, PWM and BOOST output


The higher level requirement is that audio and video
and unblank the video.
should be demuted without transient effects and that
the audio should be demuted maximum 1s before or
at the same time as the unblanking of the video.
Switch on the Ambilight functionality according the last status
settings.
The higher level requirement is that the
ambilight functionality may not be switched on
before the backlight is turned on in case the
set contains a CE IPB inverter supply. Startup screen Option
and Installation setting
Photoscreen ON?

Yes

Display cfg file present


and up to date, according
correct display option?
No
No
Yes
Prepare Start screen Display config
file and copy to Flash

18440_217_090227.eps
Active 270209

Figure 5-6 “Semi Stand-by” to “Active” flowchart

2009-Apr-03
Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 23

Active

Mute all sound outputs via softmute

Wait 100ms

Set main amplifier mute (I/O: audio-mute)

Force ext audio outputs to ground


(I/O: audio reset) a nd wait 5ms

Switch off Ambilight

The higher level requirement is that the


Wait until Ambilight has faded out: Output power backlight may not be switched off before the
Observer on PNX5100 should be zero ambilight functionality is turned off in case the
set contains a CE IPB inverter supply.

Switch off POK line detection


algorithm

Switch off LCD backlight

Mute all video outputs

Wait x ms (display file)

No PNX5100 present?
The exact timings to
switch off the
Yes display (LVDS
delay, lamp delay)
are defined in the
Switch off LVDS output in 8543
Switch off the display by sending: display file.
- TurnOnDisplay(0) (I²C) command to the PNX5100
Wait x ms - or sending OUTPUT-ENABLE(0) to the LED DIM
panel in case of a LED BL set.

Switch off the display power by


switching LCD-PWR-ON high

18440_219_090227.eps

Semi Standby 270209

Figure 5-7 “Active” to “Semi Stand-by” flowchart

2009-Apr-03
EN 24 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding

Semi Stand by

If ambientlight functionality was used in semi-standby


(lampadaire mode), switch off ambient light

Delay transition until ramping down of ambient light is *) If this is not performed and the set is
finished. *) switched to standby when the switch off of
the ambilights is still ongoing, the lights will
switch off abruptly when the supply is cut.

Transfer Wake up reasons to the Stand by µP.

Switch Memories to self-refresh (this creates a more


stable condition when switching off the power).

Switch AVC system in reset state (reset-system and


reset-AVC lines)
Switch reset-PNX5100 LOW
Switch Reset-Ethernet LOW

Wait 10ms

Switch the NVM reset line HIGH


Switch WP-Nandflash LOW

Disable all supply related protections and switch off


the DC/DC converters (ENABLE-3V3)

Wait 5ms

Switch OFF all supplies by switching HIGH the


Standby I/O line

Important remarks:

release reset audio 10 sec after entering


standby to save power

Also here, the standby state has to be


maintained for at least 4s before starting 18440_220_090227.eps
another state transition.
Stand by 270209

Figure 5-8 “Semi Stand-by” to “Stand-by” flowchart

2009-Apr-03
Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 25

5.4 Service Tools 5.5 Error Codes

5.4.1 ComPair 5.5.1 Introduction

Introduction The error code buffer contains all detected errors since the last
ComPair (Computer Aided Repair) is a Service tool for Philips time the buffer was erased. The buffer is written from left to
Consumer Electronics products. and offers the following: right, new errors are logged at the left side, and all other errors
1. ComPair helps to quickly get an understanding on how to shift one position to the right.
repair the chassis in a short and effective way. When an error occurs, it is added to the list of errors, provided
2. ComPair allows very detailed diagnostics and is therefore the list is not full. When an error occurs and the error buffer is
capable of accurately indicating problem areas. No full, then the new error is not added, and the error buffer stays
knowledge on I2C or UART commands is necessary, intact (history is maintained).
because ComPair takes care of this. To prevent that an occasional error stays in the list forever, the
3. ComPair speeds up the repair time since it can error is removed from the list after more than 50 hrs. of
automatically communicate with the chassis (when the uP operation.
is working) and all repair information is directly available. When multiple errors occur (errors occurred within a short time
4. ComPair features TV software up possibilities. span), there is a high probability that there is some relation
between them.
Specifications
ComPair consists of a Windows based fault finding program New in this chassis is the way errors can be displayed:
and an interface box between PC and the (defective) product.
The ComPair II interface box is connected to the PC via an
USB cable. For the TV chassis, the ComPair interface box and There is a simple blinking LED procedure for board level repair
the TV communicate via a bi-directional cable via the service (home repair) so called LAYER 1 errors next to the existing
connector(s). errors which are LAYER 2 errors (see Table 5-3).
The ComPair fault finding program is able to determine the – LAYER 1 errors are one digit errors
problem of the defective television, by a combination of – LAYER 2 errors are two digit errors.
automatic diagnostics and an interactive question/answer • In protection mode.
procedure. – From consumer mode: LAYER 1.
– From SDM mode: LAYER 2.
How to Connect • Fatal errors, if I2C bus is blocked and the set re-boots, CSM
This is described in the chassis fault finding database in and SAM are not selectable.
ComPair. – From consumer mode: LAYER 1.
– From SDM mode: LAYER 2.
TO TV Important remark:
TO TO TO
For all errors detected by MIPS which are fatal =>
UART SERVICE I2C SERVICE UART SERVICE
CONNECTOR CONNECTOR CONNECTOR rebooting of the TV set (reboot starts after LAYER 1
error blinking), one should short the solder paths at
start-up from the power OFF state by mains
ComPair II
Multi interruption and not via the power button to trigger the
RC in function
RC out
SDM via the hardware pins.
• In CSM mode
Optional Power Link/ Mode
Switch Activity I2C RS232 /UART – When entering CSM: error LAYER 1 will be displayed
by blinking LED. Only the latest error is shown.
• In SDM mode
PC – When SDM is entered via Remote Control code or the
hardware pins, LAYER 2 is displayed via blinking LED.
• In the ON state
– In “Display error mode”, set with the RC commands
“mute_06250X _OK” LAYER 2 errors are displayed via
blinking LED.
ComPair II Developed by Philips Brugge
• Error display on screen.
Optional power – In CSM no error codes are displayed on screen.
HDMI 5V DC
I2C only – In SAM the complete error list is shown.
E_06532_036.eps
150208
Basically there are three kinds of errors:
• Errors detected by the Stand-by software which lead to
Figure 5-9 ComPair II interface connection protection. These errors will always lead to protection and
an automatic start of the blinking LED LAYER 1 error.
Caution: It is compulsory to connect the TV to the PC as (see section 5.6 The Blinking LED Procedure).
shown in the picture above (with the ComPair interface in • Errors detected by the Stand-by software which not
between), as the ComPair interface acts as a level shifter. If lead to protection. In this case the front LED should blink
one connects the TV directly to the PC (via UART), ICs will be the involved error. See also section Extra Information. Note
blown! that it can take up several minutes before the TV starts
blinking the error (e.g. LAYER 1 error = 2, LAYER 2
How to Order error = 15 or 53).
ComPair II order codes: • Errors detected by main software (MIPS). In this case
• ComPair II interface: 3122 785 91020. the error will be logged into the error buffer and can be read
• Software is available via the Philips Service web portal. out via ComPair, via blinking LED method LAYER 1-2
• ComPair serial interface cable for Q52x.x. error, or in case picture is visible, via SAM.
(using 3.5 mm Mini Jack connectors): 3138 188 75051.

Note: When having problems, please contact your local


support desk.

2009-Apr-03
EN 26 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding

5.5.2 How to Read the Error Buffer content, as this history can give significant information). This to
ensure that old error codes are no longer present.
Use one of the following methods: If possible, check the entire contents of the error buffer. In
• On screen via the SAM (only when a picture is visible). some situations, an error code is only the result of another error
E.g.: code and not the actual cause (e.g. a fault in the protection
– 00 00 00 00 00: No errors detected detection circuitry can also lead to a protection).
– 23 00 00 00 00: Error code 23 is the last and only
detected error.
– 37 23 00 00 00: Error code 23 was first detected and There are several mechanisms of error detection:
error code 37 is the last detected error. • Via error bits in the status registers of ICs.
– Note that no protection errors can be logged in the • Via polling on I/O pins going to the stand-by processor.
error buffer. • Via sensing of analogue values on the stand-by processor
• Via the blinking LED procedure. See section 5.5.3 How to or the PNX8543.
Clear the Error Buffer. • Via a “not acknowledge” of an I2C communication.
• Via ComPair.
Take notice that some errors need several minutes before they
5.5.3 How to Clear the Error Buffer start blinking or before they will be logged. So in case of
problems wait 2 minutes from start-up onwards, and then
Use one of the following methods: check if the front LED is blinking or if an error is logged.
• By activation of the “RESET ERROR BUFFER” command
in the SAM menu. Table 5-2 Layer 1 code overview (multi chassis overview)
• With a normal RC, key in sequence “MUTE” followed by
“062599” and “OK”. LAYER 1 codes
• If the content of the error buffer has not changed for 50+ SSB 2
hours, it resets automatically. Display supply 3
Platform supply 4 Only for display option 196 and 197
Fan 7
5.5.4 Error Buffer
AmbiLight or DC/DC or 3D LED dim panel 8

In case of non-intermittent faults, clear the error buffer before


starting to repair (before clearing the buffer, write down the

Table 5-3 Error code overview (multi chassis overview)


EB: in Error Buffer
BL: Blinking LED

Special Remarks
Defective board
LAYER 1 error
LAYER 2 error
Description

Error/Prot.
Monitored

Medium

Device

Main NVM 2 0 MIPS I2C1 E x STM24C128 SSB TV shut down with red LED blinking 2.
Temp. protection 3 12 MIPS I2C4 P BL/EB Supply
I2C3 2 13 MIPS I2C3 E BL/EB SSB SSB TV is rebooting endlessly with red LED blinking “2”.
I2C2 2 14 MIPS I2C2 E BL/EB SSB SSB
PNX does not boot (HW cause) 2 15 St-by µP I2C1 P BL SSB SSB TV is rebooting endlessly with red LED blinking “2”
PNX 5100 does not boot
12V 3 16 St-by µP I/O P BL Supply TV shut down with red LED blinking “3”.
12V 3 16 St-by µP I/O P BL Platform Supply
Inverter or display supply 3 17 Mips I/O E EB Supply TV still in normal operation mode, but without backlights.
Enter CSM Layer 1 red LED blinking “3”.
Only for display option 196 and 197 4 17 Mips I/O E EB Display Supply
1V2, 1V2, 3V3, 5V to low 2 18 St-by µP I/O P BL SSB TV shut down with red LED blinking “2”.
PNX 5100 2 21 MIPS I2C3 E EB PNX 5100 SSB TV is rebooting endlessly, with red LED blinking “2” (shown
every 20 second).
HDMI MUX 2 23 MIPS I2C3 E EB TDA9996 SSB Activate CSM red LED blinking “2”.
I2C switch 2 24 Mips I2C2 E EB PCA9540 SSB
Boot-NVM PNX5120 2 25 MIPS I2C3 E EB STM24C08 SSB TV is rebooting endlessly, with red LED blinking “2” (shown
every minute).
Multi Standard demodulator (Micronas IF) 2 27 MIPS 2
I C3 E EB DRX3616K SSB TV is in normal operation but without video displayed (RF).
DRX3626K
2
ARM (AL) 8 28 MIPS I C3 E EB NXP LPC2103 AL mod. or DC/DC TV is in normal operation but without AMBILIGHT “on”.
FPGA (Local contrast) 2 29 MIPS I2C3 E EB Altera SSB
Tuner1 2 34 MIPS I2C3 E EB UV1783S SSB TV is in normal operation but without video displayed (RF).
HD1816
FAN I2C expander 7 41 MIPS I2C2 E EB PCA 9533 FAN mod.
T× sensor 7 42 MIPS I2C2 E EB LM 75 T×sensor
FAN 1 7 43 MIPS I2C2 E EB FAN
FAN 2 7 44 MIPS I2C2 E EB FAN
MIPS does not boot (SW cause) 2 53 St-by µP I2C1 P BL PNX8543 SSB TV is rebooting endlessly with white LED blinking.
Display 5 64 MIPS I2C2 E BL/EB Altera Display
FPGA LED dim 2D 2 65 MIPS I2C3 E EB Xilinx SSB
FPGA LED dim 3D 8 65 MIPS I2C2 E EB Altera SSB

2009-Apr-03
Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 27

Extra Information of hardware problems (NAND flash,...) or software


• Rebooting. When a TV is constantly rebooting due to initialization problems. Possible cause could be that there
internal problems, most of the time no errors will be logged is no valid software loaded (try to upgrade to the latest main
or blinked. This rebooting can be recognized via a ComPair software version). Note that it can take up to 2 minutes
interface and Hyperterminal (for Hyperterminal settings, before the TV starts blinking LAYER 1 error = “2” or in
see section 5.8.6 UART Logging). It’s shown that the SDM, LAYER 2 error = “53”.
loggings which are generated by the main software keep
continuing. In this case diagnose has to be done via
ComPair. 5.6 The Blinking LED Procedure
• Main NVM. When there is no I2C communication towards
the main NVM, LAYER 1 error = “2” will be displayed via 5.6.1 Introduction
the blinking LED procedure. In SDM, LAYER 2 error can be
“19”. Check the logging for keywords like “I2C bus blocked”. The blinking LED procedure can be split up into two situations:
• Error 13 (I2C bus 3 blocked). When this error occurs, the • Blinking LED procedure LAYER 1 error. In this case the
TV will constantly reboot due to the blocked bus. The best error is automatically blinked when the TV is put in CSM.
way for further diagnosis here, is to use ComPair. This will be only one digit error, namely the one that is
• Error 15 (PNX8543 doesn’t boot). Indicates that the main referring to the defective board (see table 5-3 Error code
processor was not able to read his bootscript. This error will overview (multi chassis overview)) which causes the failure
point to a hardware problem around the PNX8543 of the TV. This approach will especially be used for home
(supplies not OK, PNX 8541 completely dead, I2C link repair and call centres. The aim here is to have service
between PNX and Stand-by Processor broken, etc...). diagnosis from a distance.
When error 15 occurs it is also possible that I2C2 bus is • Blinking LED procedure LAYER 2 error. Via this procedure,
blocked (NVM). I2C2 can be indicated in the schematics as the contents of the error buffer can be made visible via the
follows: SCL-UP-MIPS, SDA-UP-MIPS, SCL-2 or SDA-2. front LED. In this case the error contains 2 digits (see table
Other root causes for this error can be due to hardware 5-3 Error code overview (multi chassis overview)) and will
problems with: NVM PNX5120, PNX5120 itself, or DDRs. be displayed when SDM (hardware pins) is activated. This
• Error 16 (12V). This voltage is made in the power supply is especially useful for fault finding and gives more details
and results in protection (LAYER 1 error = “3”). When SDM regarding the failure of the defective board.
is activated we see blinking LED LAYER 2 error = “16”.
• Error 17 (POK). The display is switched “on” with the Important remark:
signal “Lamp On”. If the inverter starts (or 24V display is For all errors detected by MIPS which are fatal (rebooting
OK) the POK line becomes “high”. If the POK line is not of the TV set, with reboot starts after LAYER 1 error
“high”, the set backlight will be switched “off” and “on” again blinking), one should short the SDM solder paths at start-
for 3 times (start-up). If the set POK line becomes “high” up from the power OFF state by mains interruption and not
after the retries, no error is logged; if the POK stays “low”, via the power button, to trigger the SDM via the hardware
error is logged: LAYER 1 error = “3”, LAYER 2 error = “17”. pins.
No protection is required, the start-up goes on.
• Error 18 (1V2-3V3-5V too low). All these supplies are
When one of the blinking LED procedures is activated, the front
generated by the DC/DC supply on the SSB. If one of these
LED will show (blink) the contents of the error-buffer. Error
supplies is too low, protection occurs and blinking LED
codes greater then 10 are shown as follows:
LAYER 1 error = “2” will be displayed automatically. In
1. “n” long blinks (where “n” = 1 to 9) indicating decimal digit
SDM this gives LAYER 2 error = “18”.
2. A pause of 1.5 s
• Error 21 (PNX5120). When there is no I2C communication
3. “n” short blinks (where “n”= 1 to 9)
towards the PNX5120 after start-up (power “off” by
4. A pause of approximately 3 s,
disconnection of the mains cord), LAYER 2 error will blink
5. When all the error codes are displayed, the sequence
continuously via the blinking LED procedure in SDM. (start-
finishes with a LED blink of 3 s
up the TV with the solder paths short to activate SDM).
6. The sequence starts again.
• Error 23 (HDMI). When there is no I2C communication
towards the HDMI multiplexer after start up, LAYER 2
Example: Error 12 8 6 0 0.
error = “23” will be logged and displayed via the blinking
After activation of the SDM, the front LED will show:
LED procedure if SDM is switched “on”.
1. One long blink of 750 ms (which is an indication of the
• Error 25 (Boot-NVM PNX5120). When there is no I2C
decimal digit) followed by a pause of 1.5 s
communication towards the PNX5120 NVM after start-up,
2. Two short blinks of 250 ms followed by a pause of 3 s
TV is rebooting endlessly with blinking LAYER 1 error = 2
3. Eight short blinks followed by a pause of 3 s
(shown every minute). When SDM is activated we see
4. Six short blinks followed by a pause of 3 s
blinking LED LAYER 2 error = “25”.
5. One long blink of 3 s to finish the sequence
• Error 27 (Multi Standard demodulator). When there is no
6. The sequence starts again.
I2C communication towards the Multi Standard
demodulator after start up, LAYER 2 error = “27” will be
logged and displayed via the blinking LED procedure when 5.6.2 How to Activate
SDM is switched “on”.
• Error 28 (FPGA ambilight). When there is no I2C Use one of the following methods:
communication towards the FPGA ambilight after start up, • Activate the CSM. The blinking front LED will show only
LAYER 2 error = “28” will be logged and displayed via the the latest layer 1 error, this works in “normal operation”
blinking LED procedure if SDM is switched “on”. Note that mode or automatically when the error/protection is
it can take up several minutes before the TV starts blinking monitored by the stand-by processor. At the time of this
LAYER 1 error = “2” in CSM or in SDM, LAYER 2 release, this layer 1 error blinking was not working as
error = “28”. expected.
• Error 34 (Tuner). When there is no I2C communication In case no picture is shown and there is no LED blinking,
towards the tuner after start up, LAYER 2 error = “34” will read the logging to detect whether “error devices” are
be logged and displayed via the blinking LED procedure mentioned. (see section 5.8.6 UART Logging).
when SDM is switched on. • Activate the SDM. The blinking front LED will show the
• Error 53. This error will indicate that the PNX8543 has entire contents of the layer 2 error buffer, this works in
read his bootscript (when this would have failed, error 15 “normal operation” mode or when SDM (via hardware pins)
would blink) but initialization was never completed because is activated when the tv set is in protection.

2009-Apr-03
EN 28 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding

Important remark: 5.7.3 Important remark regarding the blinking LED indication
For all errors detected by MIPS which are fatal =>
rebooting of the TV set (reboot starts after LAYER 1 error As for the blinking LED indication, the blinking LED of layer 1
blinking), one should short the solder paths at start-up from error displaying can be switched “off” by pushing the power
the power OFF state by mains interruption and not via the button on the keyboard.
power button to trigger the SDM via the hardware pins. This condition is not valid after the set was unpowered (via
• Transmit the commands “MUTE” - “062500” - “OK” mains interruption). The blinking LED starts again and can only
with a normal RC. The complete error buffer is shown. be switched “off” by unplugging the mains connection.
Take notice that it takes some seconds before the blinking This can be explained by the fact that the MIPS can not load
LED starts. the keyboard functionality from software during the start-up and
• Transmit the commands “MUTE” - “06250x” - “OK” does not recognise the keyboard commands at this time.
with a normal RC (where “x” is a number between 1
and 5). When x = 1 the last detected error is shown, x = 2
the second last error, etc.... Take notice that it takes some 5.8 Fault Finding and Repair Tips
seconds before the blinking LED starts.
Read also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra
Information”.
5.7 Protections
5.8.1 Ambilight
5.7.1 Software Protections

Due to degeneration process of the AmbiLights, there can be a


Most of the protections and errors use either the stand-by
difference in the colour and/or light output of the spare
microprocessor or the MIPS controller as detection device. ambilight module in comparison with the originals ones
Since in these cases, checking of observers, polling of ADCs,
contained in the TV set. Via ComPair, the light output can be
and filtering of input values are all heavily software based,
adjusted.
these protections are referred to as software protections.
There are several types of software related protections, solving
5.8.2 CSM
a variety of fault conditions:
• Protections related to supplies: check of the 12V, +5V,
+3V3 and 1V2. When CSM is activated and there is a USB stick connected to
• Protections related to breakdown of the safety check the TV, the software will dump the complete CSM content to the
mechanism. E.g. since the protection detections are done USB stick. The file (Csm.txt) will be saved in the root of the USB
by means of software, failing of the software will have to stick. If this mechanism works it can be concluded that a large
initiate a protection mode since safety cannot be part of the operating system is already working (MIPS, USB...)
guaranteed any more.
5.8.3 Exit “Factory Mode”
Remark on the Supply Errors
The detection of a supply dip or supply loss during the normal When an “F” is displayed in the screen’s right corner, this
playing of the set does not lead to a protection, but to a cold means the set is in “Factory” mode, and it normally
reboot of the set. If the supply is still missing after the reboot, happens after a new SSB is mounted. To exit this mode, push
the TV will go to protection. the “VOLUME minus” button on the TV’s local keyboard for 10
seconds (this disables the continuous mode).
Protections during Start-up Then push the “SOURCE” button on the TV’s local keyboard
During TV start-up, some voltages and IC observers are for 10 seconds until the “F” disappears from the screen.
actively monitored to be able to optimise the start-up speed,
and to assure good operation of all components. If these 5.8.4 DC/DC Converter
monitors do not respond in a defined way, this indicates a
malfunction of the system and leads to a protection. As the Introduction
observers are only used during start-up, they are described in • The best way to find a failure in the DC-DC converters is to
the start-up flow in detail (see section 5.3 Step by step Start- check their starting-up sequence at “power-on via the
up). mains cord”, presuming that the stand-by microprocessor
is operational.
5.7.2 Hardware Protections • If the input voltage of DC-DC converters is around 12.7 V
(measured on decoupling capacitors 2107 and 2123 and
The only real hardware protection in this chassis appears in the enable signals are “low” (active), then the output
case of an audio problem e.g. DC voltage on the speakers. The voltages should have their normal values. The +12V and
audio protection circuit pulls the “supply-fault” low and the tv set +5VPOD supplies start-up first (enabled by PODMODE
will blink LAYER 1 error = 2 or in SDM, LAYER 2 error = 19. signal from the stand-by microprocessor). There is a
Be very careful to overrule this protection via SDM (not to supplementary condition for 12V to start-up: if the +5V-
cause damage to the Class D audio amplifier). Check audio POD does not start up due to a local defect, then +12V will
part first before activating via SDM. In case one of the not be available as well. The +5V-ON supply is enabled by
speakers is not connected, the protection can also be the ONMODE signal (coming also from the stand-by
triggered. microprocessor). The +1V2 supply starts up when the
+12V appears, then at least 100 ms later, the +3V3 will be
Repair Tips activated via the ENABLE-3V3 signal from the stand-by
• It is also possible that the set has an audio DC protection microprocessor. If the +12V value is less than 10 V, the last
because of an interruption in one or both speakers (the DC enumerated voltages will not show up due to the under-
voltage that is still on the circuit cannot disappear through voltage detection circuit 7105-1 + 6101 and surrounding
the speakers). components. Furthermore, if the +12V is less than 8 V,
Caution: (Dis)connecting the speakers during the ON then also the +1V2 will not be available. The +5V5-TUN
state of the TV can damage the audio amplifier. generator 7202 (present only for the analogue version of
China platforms) will start to operate as soon as the 12V
(PSU) is present.

2009-Apr-03
Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 29

• The consumption of controller IC 7103 is around 19 mA 5.8.5 Fan self test (only for sets with LED backlight)
(that means almost 200 mV drop voltage across resistor
3108). In case fans are present, a softest can be done by pushing the
• The current capability of DC-DC converters is quite high red coloured button on the remote control while the TV set is in
(short-circuit current is 7 to 10 A). CSM. Exit CSM and check the status of the fans in the error
• The DETECT1 signal (active “low”) is an internal protection buffer by entering SAM (062596 + info button on the RC). In
(error 18) of the DC-DC convertor and will occur if the case of failure (fully red screen) more detailed information is
output voltage of any DC-DC convertor is out of limits (10% available in the error buffer (error 41, 42, 43, 44).
of the normal value).
5.8.6 UART Logging
Fault Finding
• Symptom: +1V2 not present (even for a short while ~10
When something is wrong with the TV set (f.i.the set is
ms)
rebooting) checking the UART logging using hyperterminal can
– Check 12 V availability (resistor 3108, MOS-FETs
be done to find more information. Hyperterminal is a standard
7101 and 7102), value of +12 V, and surrounding
Windows application. It can be found via Programs,
components) Accessories, Communications, Hyperterminal. Connect a
– Check the voltage on pin 9 (1.5 V),
“ComPair UART”-cable (3138 188 75051) from the Service
– Check for +1V2 output voltage short-circuit to GND that
connector in the TV set, via the ComPair interface (this is
can generate pulsed over-currents 7...10 A through coil compulsory, otherwise ICs are blown in the PC), to the
5103.
“COMx”-port of the PC. After start-up of Hyperterminal, fill in a
– Check the over-current detection circuit (2106 or 3131
name (f.i. “logging”) in the “Connection Description” box, then
interrupted). apply the following settings:
• Symptom: +1V2 present for about 100ms, +3V3 not rising.
1. COMx
– Check the ENABLE-3V3 signal (active “low”),
2. Bits per second = 115200
– Check the voltage on pin 8 (1.5 V), 3. Data bits = 8
– Check the under-voltage detection circuit (the voltage
4. Parity = none
on collector of transistor 7105-1 should be less than
5. Stop bits = 1
0.8 V), 6. Flow control = none
– Check for output voltages short-circuits to GND (+3V3)
During the start-up of the TV set, the logging will be displayed.
that can generate pulsed over currents 7...10 A
This is also the case during rebooting of the TV set (the same
through coil 5101, logging appears time after time). Also available in the logging
– Check the over-current detection circuit (2105 or 3127
is the “Display Option Code” (useful when there is no picture),
interrupted).
look for item “DisplayRawNumber” in the beginning of the
• Symptom: +1V2 OK, +3V3 present for about 100 ms. logging.
Possible cause: SUPPLY-FAULT line stays “low” even
Tip: When there is no picture available during reboot, it is
though the +3V3 and +1V2 is available - the stand-by
possible to check for “error devices” in the logging (LAYER 2
microprocessor is detecting that and switching “off” all
error). This can be very helpful to determine the failure cause
supply voltages. of the reboot. For protection state, there is no logging.
– Check the drop voltage across resistor 3108 (they
could be too high, meaning a defective controller IC or
5.8.7 Loudspeakers
MOS-FETs),
– Check if the boost voltage on pin 4 of controller IC 7103
is less than 14 V (should be 19 V), Make sure that the volume is set to minimum during
– Check if +1V2 or +3V3 are higher than their normal disconnecting the speakers in the “on” state of the TV. The
values - that can be due to defective DC feedback of audio amplifier can be damaged by disconnecting the speakers
the respective DC-DC convertor (ex. 3152, 3144). during “on” state of the set! Sometimes the set can go into
• Symptom: +1V2 and +3V3 show a high level of ripple protection, but that is not always the case.
voltage (audible noise can come from the filtering coils
5101, 5103). Possible cause: instability of the frequency 5.8.8 Tuner
and/or duty cycle of a DC-DC converter or stabiliser.
– Check the resistor 3164, capacitors 2102 and 2103, Attention: In case the tuner is replaced, always check the tuner
input and output decoupling capacitors. options!
– Check AC feedback circuits (2120, 2129, 3141, 3153,
2110, 2114 and 3135). 5.8.9 Display option code
• Symptom: +1V2, +3V3 ok, no +5V5-TUN (analogue sets
only). Possible cause: the “+5V5-TUN GENERATOR”
Attention: In case the SSB is replaced, always check the
circuit (7202 and surroundings components) is defective:
display option code in SAM, even when picture is available.
check transistor 7202 (it has to have gate voltage pulses of
Performance with the incorrect display option code can lead to
about 10 V amplitude and drain voltage pulses of about 35
unwanted side-effects for certain conditions.
V amplitude) and surrounding components. A high
See also Table 6-4 for the code.
consumption (more than 6 mA) from +5V5-TUN voltage
can cause also +5V5-TUN voltage to be too low or zero.
5.8.10 Upgrade HDMI EDID NVM
Note: when a pair of power MOSFETs (7101 or 7102)
becomes defective, the controller IC 7103 should be replaced To upgrade the HDMI EDID, see ComPair for further
as well. instructions.

2009-Apr-03
EN 30 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding

5.8.11 Upgrade VGA EDID NVM

To upgrade the VGA EDID NVM, pin 7 of the EDID NVM [2] has
to be short circuited to ground. See ComPair for further
instructions.

1
2
SDM
EDID

18440_201_090225.eps
090306

Figure 5-10 VGA EDID NVM

2009-Apr-03
Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 31

5.8.12 SSB Replacement

Follow the instructions in the flowchart in case a SSB has to be


exchanged. See Figure 5-11.

Instruction note: SSB replacement Q528.x, Q522.x, Q529.x, Q54x.x

START

Set is still
Set is going into protection after operating?
replacing the SSB
(blinking LED, error 2). No
Create “repair” directory on USB stick and
Take care that speakers are connected! connect USB stick to TV-set
In some sets, the speakers are in the rear Go to SAM mode (062596 i+) and
cover, and when the set is switched “on” save the TV settings via “Upload to USB”.
without speakers, it is possible that the Audio
protection is triggered.
- Replace SSB board by a Service SSB.
Advise: remount rear cover before switching - Make the SSB fit mechanically to the set.
“on” (see also SCC_71772).

Start-up set.
Set behaviour?

Set is starting up but no display. Set is starting up & display is OK. Set is starting up in “Factory” mode.

Noisy picture with bands/lines is visible and the


Update main software in this step, by using red LED is continuous “on”
“autorun.upg” file. (sometimes also the letter “F” is visible).

Press 5 s. the “Volume minus” button on the local


Program “Display Option” code via 062598 cntrl until the red LED switches “off”, and then
MENU/HOME, followed by 3 digits code (this press 5 s. the MENU (*) button of the local cntrl.
code can be found on a sticker inside the set). (* in some chassis this button is named SOURCE)
The picture noise is replaced by blue mute!

After entering “Display Option” code, set is Unplug the mainscord to verify the correct
going to Standby (= validation of code). disabling of the factory-mode.

Program “Display Option” code via 062598 MENU/


Restart the set.
HOME, followed by 3 digits code (this code can be
found on a sticker inside the set).

Saved settings
No After entering “Display Option” code, set is going
on USB stick?
to Standby (= validation of code).

Connect PC via ComPair interface to Service


connector.
Restart the set.
Yes

Start TV in Jett mode (DVD i+/OSD)


Open ComPair browser Q52x. In case of settings reloaded from USB, the set type,
serial number, Display 12NC, are automatically stored
Go to SAM mode, and reload settings
when entering display options.
via “Download from USB”.
Program “set type number”, “serial number”,
and “display 12NC”.
If not already done;
Check latest software on Service website.
Update Main and Standby software via USB.

- Check if correct “Display Option” code is


programmed.
Check and perform alignments in SAM
- Verify “Option Codes” according sticker inside the set.
according to the Service Manual. - Default settings for White drive ...see Service Manual
E.g. option codes, colour temperature...

Final check of all menus in CSM.


Special attention for HDMI Keys.
Q52xE SSB Board swap – v5.1
VDS/JA Updated 18-03-2009
END (changes are indicated in red)
H_16771_007.eps
090318

Figure 5-11 SSB replacement flowchart

2009-Apr-03
EN 32 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding

5.9 Software Upgrading 5. The renamed “upg” file will be visible and selectable in the
upgrade application.
5.9.1 Introduction
Back-up Software Upgrade Application
The set software and security keys are stored in a NAND- If the default software upgrade application does not start (could
Flash, which is connected to the PNX8543 via the PCI bus. be due to a corrupted boot 2 sector) via the above described
method, try activating the “back-up software upgrade
application”.
It is possible for the user to upgrade the main software via the
How to start the “back-up software upgrade application”
USB port. This allows replacement of a software image in a
manually:
stand alone set, without the need of an E-JTAG debugger. A
1. Disconnect the TV from the Mains/AC Power.
description on how to upgrade the main software can be found
2. Press the “INFO”-button on a Philips remote control or
in the DFU.
“CURSOR DOWN” button on a Philips DVD RC-6 remote
control (it is also possible to use a TV remote in “DVD”
Important: When the NAND-Flash must be replaced, a new mode). Keep the “INFO”-button (or “cursor down” button)
SSB must be ordered, due to the presence of the security keys! pressed while reconnecting the TV to the Mains/AC Power.
(copy protection keys, MAC address, ...). It is not possible 3. The software upgrade application will start.
anymore to replace the NAND-Flash with another one from a
scrap-board.
5.9.3 Stand-by Software Upgrade via USB
Perform the following actions after SSB replacement:
1. Set the correct option codes (see sticker inside the TV).
2. Update the TV software (see the DFU for instructions). In this chassis it is possible to upgrade the Stand-by software
3. Perform the alignments as described in section Reset of via a USB stick. The method is similar to upgrading the main
Repaired SSB. software via USB.
4. Check in CSM if the HDMI keys are valid. Use the following steps:
For the correct order number of a new SSB, always refer to the 1. Create a directory “UPGRADES” on the USB stick.
Spare Parts list, available on the Philips Spare Part web portal. 2. Copy the Stand-by software (part of the one-zip file, e.g.
StandbySW_CFT69_84.0.0.0.upg) into this directory.
3. Insert the USB stick into the TV.
5.9.2 Main Software Upgrade
4. Start the download application manually (see
section Manual Software Upgrade.
• The “UpgradeAll.upg” file is only used in the factory. 5. Select the appropriate file and press the “red” button to
• The “FlashUtils.upg” file is only used by Service centres upgrade.
that are allowed to do component level repair on the SSB.
5.9.4 Content and Usage of the One-Zip Software File
Automatic Software Upgrade
In “normal” conditions, so when there is no major problem with
Below the content of the One-Zip file is explained, and
the TV, the main software and the default software upgrade instructions on how and when to use it.
application can be upgraded with the “AUTORUN.UPG”
(FUS part of the one-zip file: e.g. FUS _Q5431E_
1.25.5.0_commercial.zip). This can also be done by the File name Description
consumers themselves, but they will have to get their software 907.5_PnSEsticker.zip Contains the E-sticker data. Not to be
used by Service technicians.
from the commercial Philips website or via the Software Update
cabinet_TV543_x.x.x.x.zip Contains acoustic parameters per
Assistant in the user menu (see DFU). The “autorun.upg” file cabinet. Not to be used by Service
must be placed in the root of the USB stick. technicians.
How to upgrade: ceisp2padll_P2PAD_x.x.x.x.zip Not to be used by Service technicians.
For ComPair development only.
1. Copy “AUTORUN.UPG” to the root of the USB stick.
display_TV543_x.x.x.x.zip Not to be used by Service technicians.
2. Insert USB stick in the set while the set is in ON MODE.
EJTAGDownload_Q5431_x.x.x.x.zip Only used by service centra which are
The set will restart and the upgrading will start allowed to do Component Level Repair.
automatically. As soon as the programming is finished, a Factory_Q5431_x.x.x.x.zip Only for production purposes, not to be
message is shown to remove the USB stick and restart the used by Service technicians.
set. FlashUtils_Q5431_x.x.x.x.zip Not to be used by Service technicians.
FUS_Q5431_x.x.x.x.zip Contains the “autorun.upg” which is
needed to upgrade the TV main software
Manual Software Upgrade and the software download application.
In case that the software upgrade application does not start HDMI_FHD_EDID_Q5431_x.x.x.x.zip Contains the EDID content of the different
automatically, it can also be started manually. (FHD) HDMI NVM’s. See ComPair for
further instructions.
How to start the software upgrade application manually:
HDMI_HD_EDID_Q5431_x.x.x.x.zip Contains the EDID content of the different
1. Disconnect the TV from the Mains/AC Power. (HD) HDMI NVM’s. See ComPair for
2. Press the “OK” button on a Philips TV remote control or a further instructions.
Philips DVD RC-6 remote control (it is also possible to use lightGuide_TV543_x.x.x.x.zip Not to be used by Service technicians.
a TV remote in “DVD” mode). Keep the “OK” button OAD_Q5431_x.x.x.x.zip Not to be used by Service technicians.
pressed while reconnecting the TV to the Mains/AC Power. Pgamma_xxxxxxxx_Q5431_x.x.x.x.zip Contains NVM data for the specific
3. The software upgrade application will start. display control board. Not to be used by
Service technicians.
PQ_Q5431_x.x.x.x.zip Not to be used by Service technicians.
Attention! processNVM_Q5431_x.x.x.x.zip Default NVM content. Must be
In case the download application has been started manually, programmed via ComPair.
the “autorun.upg” will maybe not be recognized.
What to do in this case:
1. Create a directory “UPGRADES” on the USB stick.
2. Rename the “autorun.upg” to something else, e.g. to
“software.upg”. Do not use long or complicated names,
keep it simple. Make sure that “AUTORUN.UPG” is no
longer present in the root of the USB stick.
3. Copy the renamed “upg” file into this directory.
4. Insert USB stick into the TV.

2009-Apr-03
Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 33

File name Description


StandbySW_CFT69_x.x.x.x.zip Contains the Stand-by software in “upg”
and “hex” format.
- The “StandbySW_xxxxx_prod.upg” file
can be used to upgrade the Stand-by
software via USB.
- The “StandbySW_xxxxx.hex” file can be
used to upgrade the Stand-by software
via ComPair.
- The files
“StandbySW_xxxxx_exhex.hex” and
“StandbySW_xxxxx_dev.upg” may not be
used by Service technicians (only for
development purposes).
Tcon_xxxxxxxx_Q5431_x.x.x.x.zip Contains NVM data for the specific
display control board. Not to be used by
Service technicians.
UpgradeAll_Q5431_x.x.x.x.zip Only for production purposes, not to be
used by Service technicians. Caution:
Never try to use this file, because it will
overwrite the HDCP keys!
UpgradeExe_Q5431_x.x.x.x.zip Only for production purposes, not to be
used by Service technicians.
VGA_FHD_EDID_TV543_x.x.x.x.zip Contains the EDID content of the different
(FHD) VGA NVM. See ComPair for
further instructions.
VGA_HD_EDID_TV543_x.x.x.x.zip Contains the EDID content of the different
(HD) VGA NVM. See ComPair for further
instructions.

2009-Apr-03
EN 34 6. Q548.1E LA Alignments

6. Alignments
Index of this chapter: • EU/AP-PAL models: a PAL B/G TV-signal with a signal
6.1 General Alignment Conditions strength of at least 1 mV and a frequency of 475.25 MHz
6.2 Hardware Alignments • US/AP-NTSC models: an NTSC M/N TV-signal with a
6.3 Software Alignments signal strength of at least 1 mV and a frequency of 61.25
6.4 Option Settings MHz (channel 3).
6.5 Reset of Repaired SSB • LATAM models: an NTSC M TV-signal with a signal
6.6 Total Overview SAM modes strength of at least 1 mV and a frequency of 61.25 MHz
(channel 3).

6.1 General Alignment Conditions


6.3.1 Tuner AGC (RF AGC Take Over Point Adjustment)

Perform all electrical adjustments under the following


Purpose: To keep the tuner output signal constant as the input
conditions:
signal amplitude varies.
• Power supply voltage (depends on region):
No alignment is necessary, as the AGC alignment is done
– AP-NTSC: 120 VAC or 230 VAC / 50 Hz (± 10%).
automatically (standard value: “64”).
– AP-PAL-multi: 120 - 230 VAC / 50 Hz (± 10%).
Store settings and exit SAM.
– EU: 230 VAC / 50 Hz (± 10%).
– LATAM-NTSC: 120 - 230 VAC / 50 Hz (± 10%).
– US: 120 VAC / 60 Hz (± 10%). 6.3.2 White Point
• Connect the set to the mains via an isolation transformer
with low internal resistance. • Set “Active control” to “Off”.
• Allow the set to warm up for approximately 15 minutes. • Choose “TV menu”, “TV Settings” and then “Picture” and
• Measure voltages and waveforms in relation to correct set picture settings as follows:
ground (e.g. measure audio signals in relation to Picture Setting
AUDIO_GND). Dynamic backlight Off
Caution: It is not allowed to use heat sinks as ground. Dynamic Contrast Off
• Test probe: Ri > 10 MΩ, Ci < 20 pF. Colour Enhancement Off
• Use an isolated trimmer/screwdriver to perform Picture Format Un scaled
alignments. Light Sensor Off
Brightness 50
6.1.1 Alignment Sequence Colour 0
Contrast 100

• First, set the correct options:


– In SAM, select “Options”, and then “Option numbers”. • Go to the SAM and select “Alignments”-> “White point”.
– Fill in the option settings for “Group 1” and “Group 2”
according to the set sticker (see also section Option White point alignment LCD screens:
Settings). • Use a 100% white screen as input signal and set the
– Press OK on the remote control before the cursor is following values:
moved to the left. – “Colour temperature”: “Normal”.
– In submenu “Option numbers” select “Store” and press – All “White point” values to: “127”.
OK on the RC. – “Red BL offset” values to “7”.
• OR: – “Green BL offset” values to “7”.
– In main menu, select “Store” again and press OK on
the RC. In case you have a colour analyser:
– Switch the set to Stand-by. • Measure with a calibrated contactless colour analyser in
• Warming up (>15 minutes). the centre of the screen. Consequently, the measurement
needs to be done in a dark environment.
• Adjust the correct x, y coordinates (while holding one of the
6.2 Hardware Alignments White point registers R, G or B on 127) by means of
decreasing the value of one or two other white points to the
Not applicable. correct x, y coordinates (see Table 6-1). Tolerance: dx: ±
0.004, dy: ± 0.004.
• Repeat this step for the other colour temperatures that
6.3 Software Alignments need to be aligned.
• When finished press OK on the RC and then press STORE
Put the set in SAM mode (see chapter 5. Service Modes, Error (in the SAM root menu) to store the aligned values to the
Codes, and Fault Finding). The SAM menu will now appear on NVM.
the screen. Select ALIGNMENTS and go to one of the sub • Restore the initial picture settings after the alignments.
menus. The alignments are explained below.
The following items can be aligned: Table 6-1 White D alignment values
• Tuner AGC.
• White point. Value Cool (11000K) Normal (9000K) Warm (6500K)
x 0.278 0.289 0.314
To store the data: y 0.278 0.291 0.319
• Press OK on the RC before the cursor is moved to the
left.
• In main menu select “Store” and press OK on the RC.
• Press MENU on the RC to switch back to the main menu. If you do not have a colour analyser, you can use the default
• Switch the set to stand-by mode. values. This is the next best solution. The default values are
average values coming from production.
For the next alignments, supply the following test signals via a • Select a COLOUR TEMPERATURE (e.g. COOL,
video generator to the RF input: NORMAL, or WARM).

2009-Apr-03
Alignments Q548.1E LA 6. EN 35

• Set the RED, GREEN and BLUE default values according 6.4.4 Opt. No. (Option numbers)
to the values in Table 6-1.
• When finished press OK on the RC, then press STORE (in Select this sub menu to set all options at once (expressed in
the SAM root menu) to store the aligned values to the NVM. two long strings of numbers).
• Restore the initial picture settings after the alignments. An option number (or “option byte”) represents a number of
different options. When you change these numbers directly,
Table 6-2 White tone default settings Frame sets you can set all options very quickly. All options are controlled
(7000 series) via eight option numbers.
When the NVM is replaced, all options will require resetting. To
White Tone 32" 42" Black level be certain that the factory settings are reproduced exactly, you
offset must set both option number lines. You can find the correct
Colour Temp R G B R G B R G option numbers on a sticker inside the TV set and in Table 6-4.
Normal 127 93 100 127 116 112 8 8 Example: The options sticker gives the following option
Cool 127 98 122 125 114 124 8 8 numbers:
Warm 127 83 61 127 108 73 8 8 • 08192 00133 01387 45160
• 12232 04256 00164 00000
The first line (group 1) indicates hardware options 1 to 4, the
Table 6-3 White tone default settings Roadrunner sets
second line (group 2) indicate software options 5 to 8.
(8000 series) Every 5-digit number represents 16 bits (so the maximum value
will be 65536 if all options are set).
White Tone 32" 42" Black level When all the correct options are set, the sum of the decimal
offset
values of each Option Byte (OB) will give the option number.
Colour Temp R G B R G B R G
SeeTable 6-4 for the options.
Normal 127 93 97 127 103 99 8 8
Cool 127 100 120 127 109 118 8 8
Warm 127 83 59 127 94 61 8 8 Diversity
Not all sets with the same Commercial Type Number (CTN)
necessarily have the same option code!
Note: tint settings Frame sets (7000 series) 47" and 52", as Use of Alternative BOM An alternative BOM number usually
well as Roadrunner sets (8000 series) 37" and 47", were not indicates the use of an alternative display or power supply. This
available at time of publishing. results in another display code thus in another Option code. For
the power supply there is no difference.
6.3.3 LCD Panel Flicker Alignment Refer to Chapter 3. Precautions, Notes, and Abbreviation List.

Note: This is only necessary for Forward Integration models 6.4.5 Option Code Overview
(sets that have the LCD Timing Controller (TCON) located on
the SSB) - not applicable to sets in this chassis. Table 6-4 Option and display code overview

See ComPair for further instructions. CTN Options Group 1 Options Group 2 Disp.
(Alt. BOM#) code
32PFL7404H/12 08193 00649 01391 45288 10165 28832 00162 00000 181
6.4 Option Settings 42PFL7404H/12 08193 00651 01391 45288 10167 28832 00178 00000 183
47PFL7404H/12 08193 00651 01391 45288 10170 28832 00162 00000 186
6.4.1 Introduction 52PFL7404H/12 08193 00651 01391 45288 10192 28832 00186 00000 208
32PFL8404H/12 08209 00656 02031 45288 26549 28834 00162 00000 181

The microprocessor communicates with a large number of I2C 37PFL8404H/12 08209 00656 02031 45288 26549 28834 00170 00000 161

ICs in the set. To ensure good communication and to make 42PFL8404H/12 08209 00657 02031 45288 26551 28834 00178 00000 183

digital diagnosis possible, the microprocessor has to know 47PFL8404H/12 08209 00657 02031 45288 26554 28834 00162 00000 186

which ICs to address. The presence / absence of these


PNX5120 ICs (back-end advanced video picture improvement Important: after having edited the option numbers as
IC which offers motion estimation and compensation features described above, you must press OK on the remote control
(commercially called HDNM) plus integrated Ambilight control) before the cursor is moved to the left!
is made known by the option codes.

Notes: 6.5 Reset of Repaired SSB


• After changing the option(s), save them by pressing the OK
button on the RC before the cursor is moved to the left, A very important issue towards a repaired SSB from a service
select STORE in the SAM root menu and press OK on the repair shop implies the reset of the NVM on the SSB.
RC. A repaired SSB in service should get the service Set type
• The new option setting is only active after the TV is “00PF0000000000” and Production code “00000000000000”.
switched “off” / “stand-by” and “on” again with the mains Also the virgin bit is to be set. To set all this, you can use the
switch (the NVM is then read again). ComPair tool.
In case of a display replacement, reset the “Operation hours” to
6.4.2 Dealer Options “0”, or to the operation hours of the replacement display.

For dealer options, in SAM select “Dealer options”.


See Table 6-5.

6.4.3 (Service) Options

Select the sub menu's to set the initialisation codes (options) of


the model number via text menus. See Table 6-5.

2009-Apr-03
EN 36 6. Q548.1E LA Alignments

6.5.1 SSB identification

Whenever ordering a new SSB, it should ne noted that the


correct ordering number (12nc) of a SSB is located on a sticker
on the SSB. The format is <12nc SSB><serial number>. The
ordering number of a “Service” SSB is the same as the ordering
number of an initial “factory” SSB.

18310_221_090318.eps
090319

Figure 6-1 SSB identification

6.6 Total Overview SAM modes

Table 6-5 SAM mode overview

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description


Hardware Information A. SW VERSION e.g. “Q5431_0.26.10.0” Display TV & Stand-by SW version and CTN serial
number.
B. Stand-by processor version e.g. “STDBY_84.69.0.0”
C. Production code e.g. “See type plate”
Operation hours Displays the accumulated total of operation hours.TV
switched “on/off” & every 0.5 hours is increase one
Error Displayed the most recent error.
Reset error buffer Clears all content in the error buffer.
Alignment Tuner AGC RF-AGC Take over point adjustment (AGC default
value is 64)
White point Colour temperature Normal 3 difference modes of colour temperature can be se-
lected
Warn
Cool
White point red LCD White Point Alignment. For values,
see Table 6-1.
White point green
White point blue
Red black level offset
Green black level offset
Dealer options Picture mute Off/On Select Picture mute On/Off. Picture is muted / not
muted in case no input signal is detected at input con-
nectors.
Virgin mode Off/On Select Virgin mode On/Off. TV starts up / does not
start up (once) with a language selection menu after
the mains switch is turned “on” for the first time (virgin
mode)
E-sticker Off/On Select E-sticker On/Off (USP’s on-screen)
Auto store mode None Autostore mode disabled (not in installation menu)
PDC/VPS Autostore mode via ATS (PDC/VPS) enabled
TXT page Autostore mode via ACI enabled
PDC/VPS/TXT Autostore mode via ACI or ATS enabled

2009-Apr-03
Alignments Q548.1E LA 6. EN 37

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description


Options Digital broadcast DVB Off/On Select DVB On/Off
DVB - T installation Off/On or Country dependent Select DVB T installation On/Off or by country
DVB - T light Off/On Select DVB T light On/Off
DVB - C Off/On Select DVB C On/Off
DVB - C installation Off/On or Country dependent Select DVB C installation On/Off or by country
Over the air download Off/On or Country dependent Select Over the air download On/Off or by country
8 days EPG Off/On Select 8 day EPG On/Off
Digital features USB Off/On Select USB On/Off
Ethernet Off/On Select Ethernet On/Off
Wi-Fi Off/On Select Wi-Fi On/Off
DLNA Off/On Select DLNA On/Off
On-line service Off On-line service is Off
PTP (Picture Transfer Protocol) Off/On Select PTP On/Off
Update assistant Off/On Select Update assistant On/Off
Internet software update Off Internet software update is Off
Display Screen 201 / LCD LGD WUE SBA1 37" Displayed the panel code & type model.
LightGuide Off/On Select LightGuide On/Off
Display fans Not present/Present Select Display fans Present/Not present.
Temperature sensor No sensor N.A
Temperature LUT 0 N.A
E-box & monitor Off/On Select E-box & monitor On/Off
Video reproduction Picture processing None/PNX5120 Select Picture processing None/PNX5120 (Q543.xE
chassis).
MOP local contrast Off/On Select MOP local contrast On/Off
Light sensor Off/On Select Light sensor On/Off
Light sensor type 0/1/2/3 Select Light sensor type form 0 to 3 (for difference
styling).
Pixel Plus type Pixel Plus HD Select type of picture improvement.
Perfect Pixel HD
Pixel Precise HD
Pixel Plus HD (used in Q543.xE)
Pixel Precise HD (used in Q548.1E)
Ambilight None, Select type of Ambilight modules use.
2 sided 2/2 For 8400 series only
2 sided 4/4
3 sided 2/3/2
3 sided 4/3/4
3 sided 4/5/4
4 sided 4/3/4/3
Ambilight technology LED/Future use Ambilight technology LED is in use.
MOP ambilight Off/On Select MOP ambilight On/Off
Audio reproduction Acoustic system Cabinet design used for setting dynamic audio pa-
rameters.
Source selection EXT1/AV1 type SCART CBVS RGB LR Select input source when connected with external
equipment.
CVBS Y/C YPbPr LR
CVBS Y/C YPbPr HV LR
(CVBS) YPbPr LR
EXT2/AV2 type SCART CBVS RGB LR Select input source when connected with external
equipment.
CVBS Y/C LR
(CVBS) YPbPr LR
CVBS Y/C LR
EXT3/AV3 type None Select input source when connected with external
equipment.
CVBS
CVBS LR
YPbPr
YPbPr LR
YPbPr HV LR
VGA Off/On Select VGA On/Off
SIDE I/O Off/On Select SIDE I/O On/Off
HDMI 1 Off/On Select HDMI 1 On/Off
HDMI 2 Off/On Select HDMI 2 On/Off
HDMI 3 Off/On Select HDMI 3 On/Off
HDMI 4 Off/On Select HDMI 4 On/Off
HDMI side Off/On Select HDMI side On/Off
HDMI CEC Off/On Select HDMI CEC On/Off
HDMI CEC RC pass through Off/On Select HDMI CEC RC pass through On/Off
HDMI CEC Pixel Plus link Off/On Select Pixel Plus link On/Off

2009-Apr-03
EN 38 6. Q548.1E LA Alignments

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description


Miscellaneous Region Europe/AP-PAL-MULTI/Australia Select Region/country.
Tuner type HD1816-MK1/TD1716-MK4/ Select type of Tuner used.
TD1716-MK3/HD1816-MK2
System RC support Off/On Select System RC support On/Off.
Embedded user manual Off/On Select Embedded user manual On/Off.
Start-up screen Off/On Select Start-up screen On/Off.
Wallpaper Off/On Select Wallpaper On/Off.
Hotel mode Off Hotel mode is Off.
Option number Group 1 e.g. “08192.02181.01387.45160” The first line (group 1) indicates hardware options 1
to 4.
Group 2 e.g. “10185.12448.00164.00000” The second line (group 2) indicates software options
5 to 8.
Store Store after changing.
Initialise NVM N.A
Store Select Store in the SAM root menu after making any
changes.
Software maintenance Software events Display Display information is for development purposes.
Clear
Test reboot
Test reboot is to restart the TV.
Hardware events Display Display information is for development purposes.
Clear
Operation hours display 0003 In case the display must be swapped for repair, you
can reset the “Display operation hours” to “0”. So, this
one does keeps up the lifetime of the display itself
(mainly to compensate the degeneration behaviour).
Test setting Digital information QAM modulation: 64-QAM Display information is for development purposes.
Symbol rate: 23:29
Original network ID: 12817
Network ID:12817
Transport stream ID: 2
Service ID: 3
Hierarchical modulation: 0
Selected video PID: 35
Selected main audio PID: 99
Selected 2nd audio PID: -1
Install start frequency 000 Install start frequency from 0 MHz
Install end frequency 999 Install end frequency as 999 MHz
Default install frequency
Installation Digital only Select Digital only or Digital + Analogue before instal-
lation.
Digital + Analogue
Development file ver- Development 1 file version Display parameters DISPT 4.0.8.11 Display information is for development purposes.
sions Acoustics parameters ACSTS 3.0.6.1
PQF - Fixed settings 1
“4.54.34.32.34”
PQS - Profile set 1 “4.57.34.32.34”
PQU - User styles 1 “4.56.34.32.34”
Development 2 file version 12NC one zip software Display information is for development purposes.
Initial main software
NVM version Q5431_0.4.3.0
Flash units SW Q5431_0.16.48.24
Upload to USB Channel list To upload several settings from the TV to an USB
stick
Personal settings
Option codes
Display-related alignment
History list
Download from USB Channel list To download several settings from the USB stick to
the TV.
Personal settings
Option codes
Display-related alignment

2009-Apr-03
Circuit Descriptions Q548.1E LA 7. EN 39

7. Circuit Descriptions
Index of this chapter: Main difference with the previous chassis is the addition of the
7.1 Introduction PNX5120 Video Back-End Processor.
7.2 Power Supply
7.3 DC-DC Converter Roadrunner sets (8000 series) are equipped with AmbiLight.
7.4 Front-End
7.5 HDMI
7.1.1 Implementation
7.6 Video and Audio Processing - PNX8543
7.7 Common Interface CI+
Key components of this chassis are:
• PNX8543 Digital Colour Decoder
Notes:
• HD1816AF Hybrid Tuner
• Only new circuits (circuits that are not published recently)
• DRX3926K Demodulator
are described. • TDA9996 HDMI Switch
• Figures can deviate slightly from the actual situation, due
• TPA3123D2PWP Class D Power Amplifier
to different set executions.
• PNX5120 Video Back-End Processor.
• For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter
7.1.2 TV543 Architecture Overview
9. Block Diagrams) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB Layouts).Where necessary,
you will find a separate drawing for clarification. • For details about the chassis block diagrams refer to
chapter 9. Block Diagrams. An overview of the TV543
architecture can be found in Figure 7-1.
7.1 Introduction

The Q548.1E LA chassis (platform name TV543/82) is a


derivative from the Q543.1E LA chassis.

Optional for
Q548 chassis

18540_200_090327.eps
090402

Figure 7-1 Architecture of TV543/82 platform

2009-Apr-03
EN 40 7. Q548.1E LA Circuit Descriptions

7.1.3 SSB Cell Layout

18540_201_090327.eps
090327

Figure 7-2 SSB layout cells (top view)

2009-Apr-03
Circuit Descriptions Q548.1E LA 7. EN 41

7.2 Power Supply


Min 20 msec
All power supplies described below are a black box for Service. Max 1.0sec Max 0.5 sec Max 5.0 sec

When defective, a new board must be ordered and the


defective one must be returned, unless the main fuse of the Vin AC
board is broken. Always replace a defective fuse with one with
the correct specifications! This part is available in the regular STANDBY
market.
Consult the Service Spare Parts website for the order codes of +3V3-STANDBY

the boards.
+12V, +Vsnd, +24V

7.2.1 Specifications
18440_209_090226.eps
090227
Most sets in the TV543 platform use the Integrated Power
Board (IPB) - incl. inverter. The 52" sets in this chassis have a
conventional PSU - with separate inverter. Figure 7-4 PSU Timing Diagram

In this Service Manual, no detailed information is available 7.2.5 Power Supply Protection
because of design protection issues.
Power supply protection is implemented via the stand-by
7.2.2 Diversity controller of the PNX8543 via the following signals:
• POWER-OK: signal from PSU to indicate if the supply
Below find an overview of the different PSUs that are used: output from the IPB is normal
• DETECT1: signal to indicate if the +5V, +3V3 and +1V2
voltages on the chassis are present
Table 7-1 Supply diversity
• DETECT2: signal to indicate if the +12V voltage on the
chassis is present.
Supplier PSU Model Input Voltage Range
LGIT PLHL-T826B 32PFL7404H/12 High Mains (198 to 265 VAC)
Delta DPS-298CP-4 A 42PFL7404H/12 High Mains (198 to 265 VAC) 7.3 DC-DC Converter
Delta DPS-298CP-2 A 47PFL7404H/12 High Mains (198 to 265 VAC)
Delta DPS-411AP-3 A 52PFL7404H/12 High Mains (198 to 265 VAC) Input power is obtained from the IPB module via the following
LGIT PLHL-T826B 32PFL8404H/12 High Mains (198 to 265 VAC) voltages:
Delta DPS-298CP A 37PFL8404H/12 High Mains (198 to 265 VAC) • +3V3-STANDBY (stand-by-mode only)
Delta DPS-298CP-4 A 42PFL8404H/12 High Mains (198 to 265 VAC) • +12V (on-mode)
Delta DPS-298CP-2 A 47PFL8404H/12 High Mains (198 to 265 VAC) • +Vsnd (audio power) (on-mode)
• +24V (bolt-on power) (on-mode).
7.2.3 Application Control is achieved by the PNX8543 controller via the
STANDBY signal.
An application diagram can be found below:
Audio power is specifically for audio supply usage only and
does not go through any DC conversion.

Inverter
Below find a block diagram of the on-board DC-DC converters.
To Lamps

+12V NCP5422 + 2x
AC Input Vo=400V Si4936 +1V2-PNX8543
RELAY
PFC Audio Supply (+12V) (Sync Dual
+12V Controller +3V3
+24V + Dual FETs)

LD1117 +1V8-PNX8543
STANDBY (Linear Regulator)
Flyback (HIIGH=OFF, LOW=ON)

LD1117
(Linear Regulator) +1V8-PNX5100
+3V3_STANDBY

ENABLE-3V3

Non- Isolated/Hot Isolated/Cold ST1S10


(Sync Power IC) +5V_+5V5-TUN
18440_208_090226.eps
090327
ST1S10 +1V2-PNX5100
(Sync Power IC)

Figure 7-3 Application Integrated Power Board


LD3985M
+3V3-STANDBY +1V2-STANDBY
(Linear Regulator)

7.2.4 Power Supply Timing


18440_210_090227.eps
090227
The STANDBY signal controls the on-mode voltages +12V,
+Vsnd and +24V. During chassis cold start from AC mains, Figure 7-5 DC-DC converters
+12V can be expected to be stable within 1.0 seconds, while for
a warm start, i.e. wake up from stand-by power state, this
timing becomes 0.5 seconds maximum. During AC switch off,
stand-by power +3V3-STANDBY decay is at least 20 ms but
not more than 5.0 seconds compared to +12V. Refer to
Figure 7-4:

2009-Apr-03
EN 42 7. Q548.1E LA Circuit Descriptions

7.4 Front-End
P la tfo rm w ith e m b e d d e d E D ID
The Front-End consist of the following key components:

• Tuner HD1816AF
E D ID : 2 5 3 B IIC
• IF demodulator DRX3926K CPU
• AGC amplifier UPC3221GV TDA 9996
• SAW filter 36M125. 3B 3B 3B 3B

2 5 3 co m m o n B yte s
Below find a block diagram of the front-end application.
+ 1 B su b a d d re s o f
S o u rce P h ysica l A d d re ss
+3 B fo r inp u t A
I2C-SSB +3 B fo r inp u t B
NXP Hybrid SAW
CVBS 4 * HDMI +3 B fo r in p u t C
IF Amplifier DRX3926K 2nd SIF PNX8543
Tuner Filter
TS
inputs +3 B fo r in p u t D

IF-AGC 18440_214_090227.eps
I2C-TUNER 090227

18440_211_090227.eps
090227 Figure 7-8 EDID control (embedded EDID)

Some delta’s w.r.t. TDA9996 compared to earlier chassis/


Figure 7-6 Front-End block diagram
platforms are:
• +5V detection mechanism
The DRX3926K is a multi-standard demodulator supporting
• stable clock detection mechanism
DVB-C, DVB-T and analogue standards. The demodulated
• integrated EDID
digital stream is fed into the parallel transport stream data ports
• RT control
of the PNX8543. The demodulated analogue signal in the form
• HPD control
of CVBS is connected to the analogue video CVBS/Y input
• TMDS output control
channel, while the SIF is connected via the SSIF2 positive input
• CEC control
port.
• new hot-plug control for PNX8543 for 5th HDMI input
• new EDID structure: EDID stored in TDA9996, therefore
7.5 HDMI there are no EDID pins on the SSB. Only in the event of a
5th HDMI input, an additional EEPROM is foreseen, as
In this platform, the TDA9996 HDMI multiplexer is was implemented in previous platforms.
implemented. The EDID contents are no longer stored in a
separate EEPROM, but directly in the multiplexer. Each input Some delta’s with respect to PNX8543 compared to earlier
has its own physical sub address: the first 253 bytes are chassis/platforms are:
common, where the last 3 bytes define the specific input. The • 2 HDMI inputs (A & B)
EDID contents are, at +5V power-up, downloaded to RAM. The • HDMI deep colour RGB/YCbCr 4:4:1 10/12 bit detection.
following figures show the HDMI input configuration and EDID
control. After replacement of the TDA9996 HDMI multiplexer, the
default I2C address should be reprogrammed from C0 to CE,
and the HDMI EDIDs should be reprogrammed as well. Both
actions should be executed via ComPair.

PNX8543

A B

H D M IB-R X
1P 05

DRX
H D M IA-R X D
Out

H D M I Side
C

TDA9996 (optional)

CRX
A

AR X
E d id B

BR X

HDMI 4
1P06

1P04

1P03

1P02

(optional)

HDMI 3
HDMI 2 HDMI 1
1M 96 (optional)

18440_213_090227.eps
090227

Figure 7-7 HDMI input configuration

2009-Apr-03
Circuit Descriptions Q548.1E LA 7. EN 43

7.6 Video and Audio Processing - PNX8543 The PNX8543 handles the digital and analogue audio- and
video decoding and processing. The processor is a MIPS32
The PNX8543 is the main audio and video processor (or general purpose CPU and a 8051-based TV controller for
power management and user event handling.
System-on-Chip) for this platform. It is a member of the
PNX85xx SoC family (described in earlier chassis) with the
addition of the MPEG4 functionality; the separate STi710x • For a functional diagram of the PNX8543, refer
MPEG4 decoder is no longer implemented in this platform. to Figure 7-9.

PNX8543x
MEMORY
CONTROLLER

TS in from
channel decoder MPEG
CI/CA SYSTEM LVDS for
TS out/in for PROCESSOR PRIMARY flat panel display
PCMCIA VIDEO LVDS (single or dual
OUTPUT channel)
DV-ITU-656 DV INPUT

AV-PIP
SUB-PICTURE
VIDEO
CVBS, Y/C, 3D COMB
DECODER
RGB
SECONDARY VIDEO
VIDEO ENCODER analog CVBS
OUTPUT

Low-IF DIGITAL IF MPEG/H.264


VIDEO SCALER,
DECODER DE-INTERLACE
AND NOISE
REDUCTION
AUDIO DEMOD
SSIF, LR
AND DECODE AUDIO DACS analog audio

AUDIO DSP
Dual SPDIF I2S
AUDIO IN AUDIO OUT
I2S SPDIF
300 MHz
AV-DSP
HDMI
Dual HDMI
RECEIVER DRAWING
ENGINE

SYSTEM 300 MHz


CONTROLLER MIPS32 4KEc
(8051) CPU DMA BLOCK

I 2C PWM GPIO IR ADC SPI UART I2C GPIO Flash USB 2.0 CA PCI 2.2
x 22 x 10
18440_202_090226.eps
090226

Figure 7-9 PNX8543 functional diagram

2009-Apr-03
EN 44 7. Q548.1E LA Circuit Descriptions

7.6.1 Video Subsystem

Refer to Figure 7-10 for the main video interfaces for the
PNX8543 and the video signal flow between blocks and
memory.

DDR2-SDRAM

PNX8543x
MCU-DDR

VCP/PC 2D_DE
VCP_
UIP
LOW IF VCP_RX GFX1
CVBS VCP_ LCD panel
WIFD GFX2
RGB AFE CPIPE_ LVDS_BUF FPD-LVDS1
(ADC) PIP L2QTV LVDS_TX
YPbPr LCD panel
PC_
VGA PC_RX FPD-LVDS2
UIP
DMA BUS

main

HDMI
MBVP_
L2QTV
Dual HDMI HDMI_ HDMI_UIP
RX
MBVP_
L2VO1

monitor
CVBS/Y DAC
CPIPE_ CVBS1/Y
MBVP_ DENC
L2VO C
DV (including L2VO2
VIP
ITU-656) (ITU-656)

monitor
MUX DAC CVBS2/C
A
TS
TSI
PCMCIA
CAI MSVD
TSDO
TSDI VMSP
CMD

18440_203_090226.eps
090226

Figure 7-10 PNX8543 video flow diagram

The Video Subsystem consist of the following blocks:


• Analogue Front-End (AFE) block
• Video and PC Capture (VPC/PC) pipe
• HDMI Receiver interface
• Memory-Based Video Processor MBVP)
• Video Composition Pipe (CPIPE)
• Memory Based Video Processor (MBVP) VO-1
• Memory Based Video Processor (MBVP) VO-2
• Video Composition Pipe (CPIPE)
• Dual Flat Panel Display-LVDS (FPD-LVDS)
• Digital Encoder (DENC)
• Digital Video VIP
• 2D graphics block.

2009-Apr-03
Circuit Descriptions Q548.1E LA 7. EN 45

7.6.2 Audio Subsystem

Refer to Figure 7-11 for the main audio interfaces for the
PNX8543 and the audio signal flow between blocks and
memory.

DDR2-SDRAM

PNX8543x
MCU

TM2270
TS-IN CAI VMSP (MPEG, AC-3, MP3
DECODER)
XB4
XB1

SPDIF-IN1 SPDIF-IN SPDIF-OUT SPDIF-Out


SPDIF-IN2
DMA BUS

fast SPDIF
I2S-IN-SD1
I2S-IN-SD2
XB2
I2S-IN-SD3
I2S-IN-SD4
AI AO
I2S-IN-WS
I2S-IN-SCK
I2S-IN-OSC
4 × I2S

SPDIF
4 × I2S
HDMI HDMI_RX XB3
4
I 2S
4 × I2S

I2S-OUT-SD1
4 I2S-OUT-SD2
IF ADC I2S-OUT-SD3
SSIF ASDEC APP - AUDIO DSP I2S-OUT-SD4
DigIF (DEMODULATION (POST PROCESSING)
from AND DECODING)
SPDIF I2S-OUT-WS
XB4 I2S-OUT-SCK
I2S-OUT-OSC

L, R ADC
2 Main L, R
DAC
2
HP L, R
DAC
2
SCART2 L, R
DAC

2
SCART1 L, R
DAC

18440_204_090226.eps
090226

Figure 7-11 PNX8543 audio flow diagram

The Audio Subsystem consist of the following blocks:


• Analogue Audio Front End (AAFE) used to capture
Baseband Audio Inputs and to sample Secondary Sound
IF (SSIF) directly or via Low-IF input
• HDMI Receiver interface block
• SPDIF input block
• Audio Input (AI) block
• Audio Output (AO) block
• Demodulation & Decoding (ASDEC) DSP for decoding all
analogue terrestrial TV sound standards
• Audio Post-Processing (APP) block
• Digital Audio decoder.

2009-Apr-03
EN 46 7. Q548.1E LA Circuit Descriptions

7.6.3 Connectivity and Compute Subsystem

Refer to Figure 7-12 for the connectivity and compute


subsystem.

DDR2-SDRAM

PNX8543x
MCU_DDR

I2C-1 IIC4_DMA

I2C-2 IIC2_DMA MIPS


4KEc
EJTAG
DCS-NETWORK

I2C-3 IIC3_DMA
AVDSP
DMA BUS

UART-1 UART1
PCI_XIO

PCI/XIO
UART-2 UART2
CAI
CI/CA

USB USB2.0
I2C-MC
SYSTEM UART-3
CONTROLLER
JTAG_MMIO 80C51 PWMs
EJTAG
GPIOs

18440_205_090226.eps
090226

Figure 7-12 PNX8543 connectivity and compute subsystem

The Connectivity Subsystem consists of: 7.6.4 Service Notice - FLASH RAM / PNX8543 exchange
• PCI/XIO interface
• USB2.0 interface The FLASH RAM (item 7M00) and/or PNX8543 (item 7600)
• Three 2-wire UARTs can only be exchanged by an authorised central workshop with
• Four Master/Slave I2C interfaces dedicated programming tools. Due to the presence of (CI+)
• Common Interface/Conditional Access Interface. keys in the components, unauthorised exchange of these
components will always result in a defective board.
The Computing Subsystem consists of:
• 32-bit MIPS RISC core
• Enhanced JTAG (EJTAG) block inside the MIPS 7.7 Common Interface CI+
• JTAG_MMIO blocks
• TV controller Together with this platform, an extension to the Common
• Audio/Video DSP (AV_DSP) Interface (CI) Conditional Access system is added, called CI+.
• Memory Control Unit (MCU).
CI+ or Common Interface Plus is a specification that extends
the Common Interface (DVB-CI) as described in the digital
broadcasting standard DVB.

2009-Apr-03
Circuit Descriptions Q548.1E LA 7. EN 47

The weakness of the conventional CI module used in a


Conditional Access system was the absence of a Copy
channel TS -IN P U T D E S /AE S d eco d er M
Matrix
atrix
Protection mechanism, as decrypted content could be sent tuner d em u x
d escram b ler
decoder
over the PCMCIA interface unscrambled. With the CI+
M H E G C I+
extension, a form of copy protection is established between the
Conditional Access Module (CAM) and the Integrated Digital P N X 8543
Television (IDTV). The security mechanisms in CI+ are T ransport stream C om m and

C A-C TR L
C A-M D I

C A-M D O

P C I/X IO
derived/copied from POD (with the exception of Out Of Band interface interface
(OOB) used in US CA systems). For more information about

MHEG MMI
ap p licatio n
scram b ler
C A clien t

D E S /AE S
conventional CA systems using a CI module, refer to the Tran sp o rt S tream s

BJ3.0E L/PA or BL2.xU Service Manual. C A-C o n tro l

CAM P ro p rietary C A
scram b ling

The CI+ standard is downwards compatible with the existing CI (S C ) C I + S tan d ard ised C C S

standard. scram b ling

18440_221_090227.eps
090227

The following figure shows the implementation of the CI+


Conditional Access system in the TV543 platform. Figure 7-13 CI+ Conditional Access implementation

7.8 Ambi Light

The Ambi Light architecture in this platform has been entirely The use of the DC/DC board is optional. In case no DC/DC
renewed. The characteristics are: board is implemented, the ARM processor is located on one of
• Additional DC/DC board generating 12/16/24 V (optional) the AL boards.
• ARM processor (on DC/DC panel or AL board)
• Low-power LEDs Refer to Figure 7-14 for the Ambi Light architecture.
• SPI interface from ARM to LED drivers
• I2C upgradeable via USB
• Each AL module has a temperature sensor.

18310_203_090317.eps
090317

Figure 7-14 Interface between Ambi Light and SSB

7.8.1 ARM controller

Refer to Figure 7-15 below for signal interfacing to and from the SD A SPI C LO C K
S da1 Sck
ARM controller. The ARM controller is located on the DC/DC
SC L
board (item no. 7302) or AL panel (item no. 7102). S c l1
P 0. 7
SPI LATC H
S E L1 SPI LATC H 2
t bd (only on dc/dc for aurea)
P 0. 8
S E L2
t bd
SPI D ATA O U T
M OSI

PW M C LO C K
M A T0.0

AR M M ISO
SPI D ATA R ETU R N

BLAN K
M A T1.0

PR O G
t bd
Tx D
Tx d0 C S EEPR O M
t bd
RxD
R x d0 TEM P
P 0. 10

18310_204_090318.eps
090318

Figure 7-15 ARM controller interface

Data transfer between ARM processor and LED drivers is


executed by a Serial Peripheral Interface (SPI) bus interface.

2009-Apr-03
EN 48 7. Q548.1E LA Circuit Descriptions

The SPI bus is a synchronous serial data link standard that Also PWM clock and BLANK signals are generated by the
operates in full duplex mode. controller. The controller can be reprogrammed via I2C (via
USB). The controller can receive matrix values via I2C, which
For debugging purposes, the working principle is given below: will be stored in the EEPROM of each AL module via the SPI
• At startup the controller will read-out matrix data from the bus. The temperature sensor in each AL module controls the
EEPROM devices (via SPI DATA RETURN) TEMP line; in case of a too high temperature the controller will
• Before operation, the driver current is set via SPI, with reduce the overall brightness.
driver in DC mode
• During normal operation the controller receives RGB-, 7.8.2 LED driver communication (via SPI bus)
configuration-, operation mode- and topology data via I2C
• The controller converts the I2C RGB data via the matrixes Refer to Figure 7-16 below for signal interfacing between the
to SPI LED data ARM controller and the LED drivers on the AL boards, and the
• Via data return the controller receives error data (if LED drivers and the EEPROMs on the AL boards.
applicable).

Am b ilig h t m o d u le 1 A m b ilig h t m o d u le 2 A m b ilig h t m o d u le N


o ut16

o ut16

o ut16
S o ut S in S o ut S in S o ut
LED LED LED
D R IV E R D R IV E R D R IV E R
1 2 N
S P I d ata in

SPI d ata return

SPI c lo c k (SC LK)


SPI latc h (XLAT )
PR O G (VPR G )
ARM BLAN K
PW M C LO C K ( G SC LK)

18310_205_090318.eps
090318

Figure 7-16 SPI communication between ARM controller and LED drivers

The ARM controller communicates with the LED drivers (on Each AL board is equipped with a temperature sensor. If one of
each AL module) via an SPI bus. For debugging purposes, the the sensors detects a temperature over the threshold, the
working principle is given below: TEMP line is pulled LOW which results in brightness reduction.
• Data from the ARM controller is linked through the drivers,
which are connected in cascade
• SPI CLK, SPI LATCH, PROG, BLANK and PWM CLOCK
are going directly from the controller to each driver
• SPI DATA RETURN is linked from the last driver to the
controller: controller decides which driver returns data.

7.8.3 Temperature Control

Refer to Figure 7-17 for signal interfacing between the ARM


controller and the temperature sensor on the AL boards.

Am bilight m odule 1 Am bilight m odule 2 Am bilight m odule N


Vcc Vcc Vcc

Pull-up Pull-up Pull-up


TEMP TEMP TEMP
SENSOR SENSOR SENSOR

ARM

18310_206_090318.eps
090318

Figure 7-17 Communication between ARM controller and


temperature sensor

2009-Apr-03
IC Data Sheets Q548.1E LA 8. EN 49

8. IC Data Sheets
This chapter shows the internal block diagrams and pin electrical diagrams (with the exception of “memory” and “logic”
configurations of ICs that are drawn as “black boxes” in the ICs).

8.1 Diagram SSB: DC/DC +3V3 +1V2 B01A, NCP5422AD (IC 7103)

Block Diagram VCC ROSC

BIAS CURRENT
+ SOURCE
GEN RAMP1 RAMP2

+ VCC
8.6 V BST

7.8 V
IS+1
CLK1
+ BST
OSC GATE(H)1
IS−1
− + − CLK2 S
Reset non−overlap
IS+2 70 mV Dominant VCC
PWM FAULT GATE(L)1
+ Comparator 1 R
IS−2
− + − FAULT

70 mV S Q FAULT
Set RAMP1
Dominant
− 0.425 V BST
R GATE(H)2
+ − S
+ + non−overlap
− 0.25 V Reset
FAULT Dominant VCC
PWM GATE(L)2
Comparator 2 R
RAMP2 FAULT
E/A OFF
GND
+ E/A OFF
− 0.425 V 1.2 mA FAULT
5.0 A + E/A1 −
1.0 V −
− +
+

E/A2
1.0 V

VFB1 COMP1 VFB2 COMP2

Pin Configuration

SO−16
1 16
GATE(H)1 GATE(H)2
GATE(L)1 GATE(L)2
NCP5422A

GND VCC
AWLYWW

BST ROSC
IS+1 IS+2
IS−1 IS−2
VFB1 VFB2
COMP1 COMP2

A = Assembly Location
WL = Wafer Lot
Y = Year
WW = Work Week
F_15400_129.eps
240505

Figure 8-1 Internal block diagram and pin configuration

2009-Apr-03
EN 50 8. Q548.1E LA IC Data Sheets

8.2 Diagram SSB: DC/DC +3V3 +1V2 Standby B01B, ST1S10PH (IC 7202/7222)

Block Diagram

Pin Configuration

DFN8 (4x4) PowerSO-8


I_18010_083.eps
130608

Figure 8-2 Internal block diagram and pin configuration

2009-Apr-03
IC Data Sheets Q548.1E LA 8. EN 51

8.3 Diagram SSB: DC/DC +3V3 +1V2 Standby B01B, LD3985M (IC 7201)

Block Diagram

Pin Configuration

TSOT23-5L/SOT23-5L Flip-Chip

G_16290_084.eps
020206

Figure 8-3 Internal block diagram and pin configuration

2009-Apr-03
EN 52 8. Q548.1E LA IC Data Sheets

8.4 Diagram SSB: Front End B02A, DRX3926K (IC 7303)

Block Diagram

RF AGC MPEG-2
DVB-T/QAM TS
IF AGC FEC
SAW
Main
IF AMP ADC CVBS
Tuner
DVB-T/QAM/ATV DAC
Demodulator

Stereo Decoder
Integrated Tuner SIF
DAC
I2S Audio

Presaw
Sense

I2 C
I2C
System Controller
GPIO

Pin Configuration
VSSAH_CVBS INP
VDDAH_CVBS INN
CVBS VSSAH_AFE1
SIF VDDAH_AFE1
VSSAL_AFE2 VDDAL_AFE1
VDDAL_AFE2 VSSAL_AFE1
PDP IF_AGC
PDN RF_AGC

48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
XI 49 32 RSTN
XO 50 31 SAW_SW
VSSAH_OSC 51 30 GPIO2
VDDAH_OSC 52 29 VSYNC
VDDH 53 28 VSSL
VSSH 54 27 VDDL
VSSL 55 26 VDDH
VDDL 56 25 VSSH
TDO 57
DRXK 24 I2C_SDA1
TMS 58 23 I2C_SCL1
TCK 59 22 MD7
TDI 60 21 MD6
I2C_SDA2 61 20 MD5
I2C_SCL2 62 19 MD4
I2S_CL 63 18 VDDH
I2S_DA 64 17 VSSH
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

I2S_WS VDDL
VDDL VSSL
VSSL MD3
GPIO1 MD2
MSTRT MD1
MERR MD0
VSSH MVAL
18440_300_090303.eps
VDDH MCLK 090303

Figure 8-4 Pin configuration

2009-Apr-03
IC Data Sheets Q548.1E LA 8. EN 53

8.5 Diagram SSB: PNX8543 - Power B03A-B03H, PNX8543 (IC7600)

Block Diagram
PNX8543x
MEMORY
CONTROLLER

TS in from
channel decoder MPEG
CI/CA SYSTEM LVDS for
TS out/in for PROCESSOR PRIMARY flat panel display
PCMCIA VIDEO LVDS (single or dual
OUTPUT channel)

DV-ITU-656 DV INPUT

AV-PIP
SUB-PICTURE
VIDEO
CVBS, Y/C, 3D COMB
DECODER
RGB
SECONDARY VIDEO
VIDEO ENCODER analog CVBS
OUTPUT

Low-IF DIGITAL IF MPEG/H.264


VIDEO SCALER,
DECODER DE-INTERLACE
AND NOISE
REDUCTION
AUDIO DEMOD
SSIF, LR
AND DECODE AUDIO DACS analog audio

AUDIO DSP
Dual SPDIF I2S
AUDIO IN AUDIO OUT
I2S SPDIF
300 MHz
AV-DSP
HDMI
Dual HDMI
RECEIVER DRAWING
ENGINE

SYSTEM 300 MHz


CONTROLLER MIPS32 4KEc
(8051) CPU DMA BLOCK

I2C PWM GPIO IR ADC SPI UART I2C GPIO Flash USB 2.0 CA PCI 2.2
x 22 x 10

Pin Configuration
ball A1
index area 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33

A
B
C
D
E
F
G
H
J
K PNX8543xEH
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
AG
AH
AJ
AK
AL
AM
AN
AP
Transparent top view
18440_301_090303.eps
090303

Figure 8-5 Internal block diagram and pin configuration

2009-Apr-03
EN 54 8. Q548.1E LA IC Data Sheets

8.6 Diagram SSB: Ethernet B05B, DP83816 (IC7N04)

Block Diagram Pin Configuration

RXDV/MA11
RXER/MA10

MA4/EECLK
TXD3/MA15
TXD2/MA14
TXD1/MA13
TXD0/MA12

RXD3/MA9
RXD2/MA8
RXD1/MA7

RXD0/MA6
COL/MA16

MA3/EEDI
AUXVDD

AUXVDD

AUXVDD

AUXVDD

RXCLK
TXCLK

RXOE
TXEN

MDIO
M DC
C RS

M A5
VSS

VSS

VSS

VSS

VSS

VSS
NC

NC

C1
X2
X1
TPRDP/M TPTDP/M
3V DSP Physical Layer

33
32
31
30
29
28
36
35
34

27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
NC 37 144 MA2/LED100N
38 143 MA1/LED10N
VSS
IAUXVDD 39 142 MA0/LEDACTN
VREF 40 141 MD7
RESERVED 41 Pin1 140 MD6
Test data out
MII Mgt

139 MD5
MII RX

42
MII TX

Identification
Test data in

NC
NC 43 138 MD4/EEDO
VSS 44 137 AUXVDD
25 MHz Clk TPRDM 45 136 VSS
TPRDP 46 135 MD3
SRAM IAUXVDD 47 134 MD2
48 133 MD1/CFGDISN
RX-2 KB REGEN
132 MD0
VSS 49
RAM MII RX RESERVED
VSS
50
51
131
130
MWRN
MRDN
SRAM MII TX 129 MCSN
RXFilter BIST Interface MII Mgt
VSS
TPTDM
52
53 128 EESEL
.5 KB
SRAM
TX-2 KB
Logic Logic BIOS ROM Cntl
BIOS ROM Data
EEPROM/LEDs
TPTDP
VSS
AUXVDD
VSS
AUXVDD
54
55
56
57
58
DP83816 127
126
125
124
123
RESERVED
NC
NC
NC
PWRGOOD
PMEN/CLKRUNN 59 122 3VAUX
PCICLK 60 121 AD0
INTAN 120 AD1
Rx rd data

61
Tx rd data

BROM/EE

AD2
Rx wr data

119
Tx wr data

RSTN 62
MII Mgt
R x A ddr

MII RX
Tx Addr

MII TX

GNTN 63 118 AD3


REQN 64 117 PCIVDD
VSS 116 AD4
65
AD31 115 AD5
66
AD30 114 VSS
67
AD29 113 AD6
68 AD7
PCIVDD 69 112
PCI CLK AD28 70 111 CBEN0
AD27 110 AD8
71 AD9
PCI CNTL AD26 109
MAC/BIU 72

100
101
102
103
104
105
106
107
108
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
PCI AD

PCIVDD
VSS
VSS

PCIVDD
AD25
AD24
C B EN 3
IDSEL

AD23
AD22

AD21
AD20
AD19

AD18
AD17
AD16
CBEN2

IRDYN

CBEN1
AD15
AD14

AD13
AD12
AD11

AD10
FRAMEN

TRDYN

DEVSELN
STOPN
PERRN
SERRN
PAR
PCIVDD

VSS
NC
DP83816 NC

F_15710_167.eps
230905

Figure 8-6 Internal block diagram and pin configuration

2009-Apr-03
IC Data Sheets Q548.1E LA 8. EN 55

8.7 Diagram SSB: Class-D B06A, TPA3123D (IC 7L10)

Block Diagram
1 F
0.22 F
LIN BSR
22 H 470 F
RIN ROUT
1 F 0.68 F
PGNDR

PGNDL 0.68 F
1 F
BYPASS LOUT
22 H 470 F
AGND BSL
0.22 F

PVCCL
AVCC
PVCCR

VCLAMP
Shutdown
SD 1 F
Control

MUTE
GAIN0

GAIN1
} Control

Pin Configuration
PVCCL 1 24 PGNDL
SD 2 23 PGNDL
PVCCL 3 22 LOUT
MUTE 4 21 BSL
LIN 5 20 AVCC
RIN 6 19 AVCC
BYPASS 7 18 GAIN0
AGND 8 17 GAIN1
AGND 9 16 BSR
PVCCR 10 15 ROUT
VCLAMP 11 14 PGNDR
PVCCR 12 13 PGNDR

TERMINAL
24-PIN I/O/P DESCRIPTION
NAME
(PWP)
Shutdown signal for IC (low = disabled, high = operational). TTL logic levels with compliance to
SD 2 I
AVCC
RIN 6 I Audio input for right channel
LIN 5 I Audio input for left channel
GAIN0 18 I Gain select least-significant bit. TTL logic levels with compliance to AVCC
GAIN1 17 I Gain select most-significant bit. TTL logic levels with compliance to AVCC
Mute signal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low =
MUTE 4 I
outputs enabled). TTL logic levels with compliance to AVCC
BSL 21 I/O Bootstrap I/O for left channel
PVCCL 1, 3 P Power supply for left-channel H-bridge, not internally connected to PVCCR or AVCC
LOUT 22 O Class-D 1/2-H-bridge positive output for left channel
PGNDL 23, 24 P Power ground for left-channel H-bridge
VCLAMP 11 P Internally generated voltage supply for bootstrap capacitors
BSR 16 I/O Bootstrap I/O for right channel
ROUT 15 O Class-D 1/2-H-bridge negative output for right channel
PGNDR 13, 14 P Power ground for right-channel H-bridge.
PVCCR 10, 12 P Power supply for right-channel H-bridge, not connected to PVCCL or AVCC
AGND 9 P Analog ground for digital/analog cells in core
AGND 8 P Analog ground for analog cells in core
Reference for preamplifier inputs. Nominally equal to AVCC/8. Also controls start-up time via
BYPASS 7 O
external capacitor sizing.
AVCC 19, 20 P High-voltage analog power supply. Not internally connected to PVCCR or PVCCL
Connect to ground. Thermal pad should be soldered down on all applications to properly
Thermal pad Die pad P
secure device to printed wiring board.

18440_302_090303.eps
090303

Figure 8-7 Internal block diagram and pin configuration

2009-Apr-03
EN 56 8. Q548.1E LA IC Data Sheets

8.8 Diagram SSB: Ethernet B08D, PNX51xx (IC7C00)

Block Diagram
PNX51xx
MEMORY
CONTROLLER

TM327x 1
LVDS RX 1 GIC 1
Video
UIP L3K7
TM327x 2
GIC 2
LVDS RX 2

TM327x 3
GIC 3
PCI/XIO

LVDS TX 1
I2C Video
LVDS TX 2
I2C-DMA
CPIPE L3K7
I2C
GFX LVDS TX 3

LVDS TX 4

UART UART

16 X GPIO

EJTAG

CLOCK CAB
AUDIO IN
AUDIO OUT

Pin Configuration

ball A1
index area 2 4 6 8 10 12 14 16 18 20 22 24 26
1 3 5 7 9 11 13 15 17 19 21 23 25
A
B
C
D
E
F
G
H PNX51xx
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF

Transparent top view


18560_300_090403.eps
090403

Figure 8-8 Internal block diagram and pin configuration

2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 57

9. Block Diagrams
Wiring Diagram 32" (Frame)
WIRING DIAGRAM 32" (FRAME / ROADRUNNER)

8M85

1M83 (AL1) 1M85 (AL4)


1. SCL 14. GND
2. SPI-DATA-IN 13. VLED2
3. SDA 12. GND
4. CONTROL-1 11. VLED1
5. CONTROL-2 10. PROG
6. +3V3 9. TEMP-SENSOR
7. BLANK 8319 8. EEPROM-CS
8. EEPROM-CS 7. BLANK-BUF
9. TEMP-SENSOR 6. +3V3
TO
10. PROG
11. VLED1
LCD DISPLAY (1004) BACKLIGHT
5. PWM-CLOCK-BUF
4. SPI-LATCH
12. GND 3. SPI-DATA-RETURN
13. VLED2 2. SPI-DATA-OUT
14. GND 8M85 1. SPI-CLOCK-BUF

1G50 (B07B) 1M59 (B08E)


1. N.C 1. SCL-AMBI-3V3
TO 2. N.C 2. GND
... 3. SDA-AMBI-3V3
BACKLIGHT 8G50 ... 4. GND
... 5. GND
+ - SUBWOOFER (5214) 39. N.C 6. +3V3
40. N.C 7. GND
41. N.C

1G51 (B07B)
1. +VDISP-OUT
SSB
8G51
2. +VDISP-OUT
3. +VDISP-OUT
4. +VDISP-OUT
...
B (1150)

8316
8M85 ...
...
51. GND

1M20 (B03G)
8. +5V
7. KEYBOARD
6. LED1
DANGEROUS DANGEROUS 8M20 5. +3V3-STANDBY

5. +24V

3. +24V

1. +24V
6. GND

4. GND

2. GND
HIGH VOLTAGE HIGH VOLTAGE

CN7
4. LED2
3. RC
2. N.C.
1. HV1

3. HV1

2. N.C.
1. HV2

3. HV2

2. GND
CN2

CN3

1. LIGHT-SENSOR

CN4 1M95 (B01B)


11. FAN_PWM 11. N.C
10. GND_SND 10. GNDSND
9. +VSND 9. +AUDIO-POWER
KEYBOARD CONTROL

8. +12V 8. +12V
7. +12V 8M95 7. +12V
6. +12V 6. +12V
5. GND1 5. GND

(OPTIONAL)
4. GND1 4. GND
MAIN POWER SUPPLY 3. GND1 3. GND
2. STANDBY 2. STANDBY
IPB PLHL-T826B 1. 3V3_ST 1. +3V3-STANDBY
(1005)
1M99 (B01B)

AMBI-LIGHT MODULE
CN5 12. GND
12. GND1 11. SDA-SET
(1114)

11. I2C_DATA 10. SCL-SET


10. I2C_SCL 9. POWER-OK
9. INV_OK 8. GND
8. A/P_DIM 8M99 7. BACKLIGHT-BOOST
7. BOOST 6. BACKLIGHT-OUT
6. DIM 5. LAMP-ON-OUT
5. BL_ON_OFF 4. GND
4. GND1 3. GND
3. GND1 2. +12VD
2. +12V 1. +12VD

(1175)
1. +12V
1735 (B06A)
4. RIGHT-SPEAKER
(OPTIONAL)

3. GNDSND

AL
2. GNDSND
T3.15A 1. LEFT-SPEAKER
CN1
1. N
2. L

1736 (B06A)
AMBI-LIGHT MODULE

3. RIGHT-SPEAKER
2. GNDSND
1. LEFT-SPEAKER

1M83 (AL1)
14. GND
8736 13. VLED2
12. GND
11. VLED1
10. PROG
(1176)

9. TEMP-SENSOR
8. EEPROM-CS
7. GND
6. +3V3
5. CONTROL-2
AL

4. CONTROL-1
3. SDA
Board Level Repair
INLET

2. GND
8308 1. SCL

RIGHT SPEAKER Component Level Repair IR LED PANEL


(1112) P2 P1 LEFT SPEAKER
(5213) (5213)
Only For Authorized Workshop 3P 8P

18560_400_090326.eps
090401

2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 58

Wiring Diagram 37" (Roadrunner)


WIRING DIAGRAM 37" (ROADRUNNER)

8M85

1M83 (AL1) 1M85 (AL4)


1. SCL 14. GND
2. SPI-DATA-IN 13. VLED2
3. SDA 12. GND
4. CONTROL-1 11. VLED1
5. CONTROL-2 10. PROG
6. +3V3 9. TEMP-SENSOR
7. BLANK 8319 8. EEPROM-CS
8. EEPROM-CS 7. BLANK-BUF
9. TEMP-SENSOR 6. +3V3
TO
10. PROG
11. VLED1
LCD DISPLAY (1004) BACKLIGHT
5. PWM-CLOCK-BUF
4. SPI-LATCH
12. GND 3. SPI-DATA-RETURN
13. VLED2 2. SPI-DATA-OUT
14. GND 8M85 1. SPI-CLOCK-BUF

1G50 (B07B) 1M59 (B08E)


1. N.C 1. SCL-AMBI-3V3
TO 2. N.C 2. GND
... 3. SDA-AMBI-3V3
BACKLIGHT 8G50 ... 4. GND
... 5. GND
39. N.C 6. +3V3
40. N.C 7. GND
41. N.C

1G51 (B07B)
1. +VDISP-OUT
SSB
8G51
2. +VDISP-OUT
3. +VDISP-OUT
4. +VDISP-OUT
...
B (1150)

8316
8M85 ...
...
51. GND

1M20 (B03G)
8. +5V
7. KEYBOARD
6. LED1
8M20 5. +3V3-STANDBY
2. N.C.
1. HV1

3. HV1

2. N.C.
1. HV2

3. HV2

5. +24V

3. +24V

1. +24V
6. GND

4. GND

2. GND
CN2

CN3

CN7
4. LED2
3. RC
2. GND
1. LIGHT-SENSOR

CN4 1M95 (B01B)


11. FAN_PWM 11. N.C
10. GND_SND 10. GNDSND
9. +VSND 9. +AUDIO-POWER
KEYBOARD CONTROL

8. +12V 8. +12V
7. +12V 8M95 7. +12V
6. +12V 6. +12V
5. GND1 5. GND
4. GND1 4. GND
MAIN POWER SUPPLY 3. GND1 3. GND
2. STANDBY 2. STANDBY
IPB DPS-298CPA B 1. 3V3_ST 1. +3V3-STANDBY
(1005)
1M99 (B01B)

AMBI-LIGHT MODULE
CN5 12. GND
12. GND1 11. SDA-SET
(1114)

11. I2C_DATA 10. SCL-SET


10. I2C_SCL 9. POWER-OK
9. INV_OK 8. GND
8. A/P_DIM 8M99 7. BACKLIGHT-BOOST
7. BOOST 6. BACKLIGHT-OUT
6. DIM 5. LAMP-ON-OUT
5. BL_ON_OFF 4. GND
4. GND1 3. GND
3. GND1 2. +12VD
2. +12V 1. +12VD

(1175)
1. +12V
1735 (B06A)
4. RIGHT-SPEAKER
3. GNDSND

AL
2. GNDSND
FUSE 1. LEFT-SPEAKER
CN1
1. N
2. L

1736 (B06A)
AMBI-LIGHT MODULE

3. RIGHT-SPEAKER
2. GNDSND
1. LEFT-SPEAKER

1M83 (AL1)
14. GND
13. VLED2
12. GND
11. VLED1
10. PROG
(1176)

9. TEMP-SENSOR

8736
8. EEPROM-CS
7. GND
6. +3V3
5. CONTROL-2
AL

4. CONTROL-1
3. SDA
Board Level Repair
INLET

2. GND
8308 1. SCL

RIGHT SPEAKER Component Level Repair IR LED PANEL SUBWOOFER (5214) LEFT SPEAKER
P2 P1
(5213) (1112) + - (5213)

Only For Authorized Workshop 3P 8P

18560_410_090331.eps
090403

2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 59

Wiring Diagram 42" (Frame/Roadrunner)


WIRING DIAGRAM 42" (FRAME / ROADRUNNER)

8M85

1M83 (AL1) 8319 1M85 (AL4)


1. SCL 14. GND
2. SPI-DATA-IN 13. VLED2
3. SDA 12. GND
4. CONTROL-1
5. CONTROL-2
LCD DISPLAY (1004) 11. VLED1
10. PROG
6. +3V3 9. TEMP-SENSOR
7. BLANK 8. EEPROM-CS
8. EEPROM-CS TO 7. BLANK-BUF
9. TEMP-SENSOR 6. +3V3
10. PROG BACKLIGHT 5. PWM-CLOCK-BUF
11. VLED1 4. SPI-LATCH
12. GND TO 3. SPI-DATA-RETURN
13. VLED2 BACKLIGHT 2. SPI-DATA-OUT
14. GND 8M85 1. SPI-CLOCK-BUF

1G50 (B07B) 1M59 (B08E)


1. N.C 1. SCL-AMBI-3V3
2. N.C 2. GND
... 3. SDA-AMBI-3V3
8G50 ... 4. GND
... 5. GND
39. N.C 6. +3V3
40. N.C 7. GND
41. N.C

1G51 (B07B)
1. +VDISP-OUT
2. +VDISP-OUT
3. +VDISP-OUT
8G51 4. +VDISP-OUT
...
8316
...
...
8M85
51. GND

1M20 (B03G)
8. +5V
CN4
7. KEYBOARD
11. FAN_PWM
6. LED1
10. GND_SND
8M20 5. +3V3-STANDBY
9. +VSND
2. N.C.
1. HV1

3. HV1

2. N.C.
1. HV2

3. HV2

5. +24V

3. +24V

1. +24V
4. LED2

6. GND

4. GND

2. GND
CN2

8. +12V
CN3

CN7
3. RC SSB
7. +12V
6. +12V
5. GND1
2.
1.
GND
LIGHT-SENSOR
B (1150)
4. GND1
3. GND1 1M95 (B01B)
2. STANDBY 11. N.C
1. 3V3_ST 10. GNDSND
9. +AUDIO-POWER
KEYBOARD CONTROL

8. +12V
8M95 7. +12V
CN5 6. +12V

(OPTIONAL)
12. GND1 5. GND
11. I2C_DATA 4. GND
MAIN POWER SUPPLY 10. I2C_SCL 3. GND
9. INV_OK 2. STANDBY
IPB DPS-298CP-4A 8. A/P_DIM 1. +3V3-STANDBY
(1005) 7. BOOST

AMBI-LIGHT MODULE
6. DIM 1M99 (B01B)
5. BL_ON_OFF 12. GND
4. GND1 11. SDA-SET
3. GND1
(1114)

10. SCL-SET
2. +12V 9. POWER-OK
1. +12V 8. GND
8M99 7. BACKLIGHT-BOOST
6. BACKLIGHT-OUT
5. LAMP-ON-OUT
4. GND
3. GND
2. +12VD

(1175)
1. +12VD

1735 (B06A)
(OPTIONAL)

4. RIGHT-SPEAKER
3. GNDSND

AL
2. GNDSND
1. LEFT-SPEAKER
CN1

8308
1. N

FUSE
2. L

8735
1736 (B06A)
AMBI-LIGHT MODULE

3. RIGHT-SPEAKER
INLET 2. GNDSND
1. LEFT-SPEAKER

1M83 (AL1)
14. GND
13. VLED2
12. GND
11. VLED1
10. PROG
(1176)

9. TEMP-SENSOR
8. EEPROM-CS
7. GND
6. +3V3
5. CONTROL-2
AL

4. CONTROL-1
3. SDA
2. GND
Board Level Repair 1. SCL
+ -

+ -
Component Level Repair IR LED PANEL
P2 P1
(1112)
SPEAKER RIGHT (5212) Only For Authorized Workshop 3P 8P SPEAKER LEFT (5211)

18560_412_090331.eps
090403

2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 60

Wiring Diagram 47" (Frame)


WIRING DIAGRAM 47" (FRAME)

Board Level Repair


8319

Component Level Repair


Only For Authorized Workshop LCD DISPLAY (1004)

TO TO
BACKLIGHT BACKLIGHT

1G50 (B07B)
1. N.C
2. N.C
...
8G50 ...
...
39. N.C
40. N.C
41. N.C

1G51 (B07B)
1. +VDISP-OUT
2. +VDISP-OUT
3. +VDISP-OUT
8G51 4. +VDISP-OUT
...
8316
...
...
51. GND

1M20 (B03G)
8. +5V
CN4
7. KEYBOARD
11. FAN_PWM
6. LED1
10. GND_SND
8M20 5. +3V3-STANDBY
9. +VSND
2. N.C.
1. HV1

3. HV1

2. N.C.
1. HV2

3. HV2

4. LED2
CN2

8. +12V
CN3

3. RC SSB
7. +12V
6. +12V
5. GND1
2.
1.
GND
LIGHT-SENSOR
B (1150)
4. GND1
3. GND1 1M95 (B01B)
2. STANDBY 11. N.C
1. 3V3_ST 10. GNDSND
9. +AUDIO-POWER
KEYBOARD CONTROL

8. +12V
8M95 7. +12V
CN5 6. +12V
12. GND1 5. GND
11. I2C_DATA 4. GND
MAIN POWER SUPPLY 10. I2C_SCL 3. GND
9. INV_OK 2. STANDBY
IPB DPS-298CP-2A 8. A/P_DIM 1. +3V3-STANDBY
(1005) 7. BOOST
6. DIM 1M99 (B01B)
5. BL_ON_OFF 12. GND
4. GND1 11. SDA-SET
3. GND1
(1114)

10. SCL-SET
2. +12V 9. POWER-OK
1. +12V 8. GND
8M99 7. BACKLIGHT-BOOST
6. BACKLIGHT-OUT
5. LAMP-ON-OUT
4. GND
3. GND
2. +12VD
1. +12VD

1735 (B06A)
4. RIGHT-SPEAKER
3. GNDSND
2. GNDSND
1. LEFT-SPEAKER
CN1

8308
1. N

FUSE
2. L

8735
1736 (B06A)
3. RIGHT-SPEAKER
INLET 2. GNDSND
1. LEFT-SPEAKER
+ -

+ -
IR LED PANEL
(1112) P2 P1
SPEAKER RIGHT (5212) 3P 8P SPEAKER LEFT (5211)

18560_401_090326.eps
090331

2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 61

Wiring Diagram 47" (Roadrunner)


WIRING DIAGRAM 47" (ROADRUNNER)

1M83 (AL1) 1M85 (AL4)


1. SCL 8M85 14. GND
2. SPI-DATA-IN 13. VLED2
3. SDA 12. GND
4. CONTROL-1 11. VLED1
5. CONTROL-2 10. PROG
6. +3V3 8319 9. TEMP-SENSOR
7. BLANK 8. EEPROM-CS
8. EEPROM-CS 7. BLANK-BUF
9. TEMP-SENSOR 6. +3V3
10. PROG
11. VLED1
LCD DISPLAY (1004) 5. PWM-CLOCK-BUF
4. SPI-LATCH
12. GND TO 3. SPI-DATA-RETURN
13. VLED2 2. SPI-DATA-OUT
14. GND BACKLIGHT 1. SPI-CLOCK-BUF
TO
BACKLIGHT
AMBI-LIGHT MODULE

AMBI-LIGHT MODULE
8316

8M59
(1178)

(1178)
1G50 (B07B) 1M59 (B08E)
1. N.C 1. SCL-AMBI-3V3
2. N.C 2. GND
... 3. SDA-AMBI-3V3
AL

AL
8G50 ... 4. GND
... 5. GND
39. N.C 6. +3V3
40. N.C 7. GND
41. N.C

1G51 (B07B)
1. +VDISP-OUT
2. +VDISP-OUT
1M85 (AL4) 3. +VDISP-OUT
8G51 4. +VDISP-OUT
1M83 (AL1)
1. SPI-CLOCK-BUF 14. GND
2. SPI-DATA-OUT ...
13. VLED2
3. SPI-DATA-RETURN ...
12. GND
4. SPI-LATCH ...
8M90 11. VLED1
5. PWM-CLOCK-BUF 51. GND
10. PROG
6. +3V3 9. TEMP-SENSOR
1M20 (B03G)
KEYBOARD CONTROL

7. BLANK-BU 8. EEPROM-CS
8. EEPROM-CS 8. +5V 7. BLANK
9. TEMP-SENSOR 7. KEYBOARD 6. +3V3
10. PROG 6. LED1 5. CONTROL-2
11. VLED1 5. +3V3-STANDBY 4. CONTROL-1
CN4

5. +24V

3. +24V

1. +24V
6. GND

4. GND

2. GND
2. N.C.
1. HV2

3. HV2

4. LED2
2. N.C.
1. HV1

3. HV1

12. GND
CN7
3. SDA
CN3
CN2

13. VLED2
11. FAN_PWM 3. RC SSB 2. SPI-DATA-IN
14. GND
10. GND_SND
9. +VSND
2.
1.
GND
LIGHT-SENSOR
B (1150) 1. SCL
8. +12V
7. +12V
1M95 (B01B)
8M82

8M95
6. +12V
11. N.C

8M81
5. GND1
10. GNDSND
4. GND1
(1114)

9. +AUDIO-POWER
3. GND1
8. +12V
2. STANDBY
1M83 (AL1) 1. 3V3_ST
7. +12V
1M84 (AL1)
1. SCL 6. +12V
5. GND 14. GND
2. SPI-DATA-IN
4. GND 13. VLED2
3. SDA

5. CONTROL2
4. CONTROL1
12. GND

1M90 (AB1)

1M59 (AB1)
4. CONTROL-1 CN5 3. GND
12. GND1 2. STANDBY 11. VLED1
5. CONTROL-2
10. PROG

7. GND
11. I2C_DATA 1. +3V3-STANDBY

5. +24V

3. +24V

1. +24V

6. +3V3
6. +3V3

6. GND

4. GND

2. GND

2. GND
3. SDA

1. SCL
7. BLANK MAIN POWER SUPPLY 10. I2C_SCL 9. TEMP-SENSOR
8. EEPROM-CS
8. EEPROM-CS 9. INV_OK 1M99 (B01B)
9. TEMP-SENSOR IPB DPS-298CP-2A 8. A/P_DIM 8M99 12. GND
7. BLANK-BUF
6. +3V3
10. PROG (1005) 7. BOOST 11. SDA-SET
DC-DC 5. PWM-CLOCK-BUF
11. VLED1
12. GND
13. VLED2
6. DIM
5. BL_ON_OFF
4. GND1
AB INTERFACE (1179)
10. SCL-SET
9. POWER-OK
8. GND
4. SPI-LATCH
3. SPI-DATA-RETURN
3. GND1 2. SPI-DATA-OUT
14. GND 7. BACKLIGHT-BOOST
2. +12V 1. SPI-CLOCK-BUF
6. BACKLIGHT-OUT
1. +12V 5. LAMP-ON-OUT
1M84 (AB1)
14. GND 4. GND
3. GND
AMBI-LIGHT MODULE

8M20
13. VLED2
12. GND 2. +12VD
1. +12VD

AMBI-LIGHT MODULE
11. VLED1
10. PROG
9. TEMP-SENSOR 1735 (B06A)
8. EEPROM-CS 4. RIGHT-SPEAKER
7. BLANK-BUF 3. GNDSND
6. +3V3 2. GNDSND
5. PWM-CLOCK-BUF 1. LEFT-SPEAKER
8308 4. SPI-LATCH1CONN

8735
3. SPI-DATA-RETURN
2. SPI-CLOCK-BUF 1736 (B06A)
3. RIGHT-SPEAKER
INLET
CN1

1. SPI-LATCH2CONN
(1177)

1. N

FUSE 2. GNDSND
2. L

1. LEFT-SPEAKER

(1177)
AL

8M84

AL
1M84 (AL1) 1M83 (AL1)
1. SPI-CLOCK-BUF
14. GND
2. SPI-DATA-OUT
13. VLED2
3. SPI-DATA-RETURN
12. GND
4. SPI-LATCH
11. VLED1
5. PWM-CLOCK-BUF
10. PROG
6. +3V3
7. BLANK-BUF Board Level Repair 9. TEMP-SENSOR
8. EEPROM-CS
8. EEPROM-CS
7. BLANK
9. TEMP-SENSOR
6. +3V3
10. PROG
5. CONTROL-2
11. VLED1
Component Level Repair 4. CONTROL-1
+ -

+ -
12. GND
3. SDA
13. VLED2
14. GND Only For Authorized Workshop IR LED PANEL
2. SPI-DATA-IN
1. SCL
(1112) P2 P1
SPEAKER RIGHT (5212) 3P 8P SPEAKER LEFT (5211)

18560_411_090331.eps
090401

2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 62

Wiring Diagram 52" (Frame)


WIRING DIAGRAM 52" (FRAME)

Board Level Repair

Component Level Repair


Only For Authorized Workshop LCD DISPLAY (1004)
CONNECTOR

1G50 (B07B)
INVERTER

1. N.C
2. N.C
...
CN2/1319 ...
14. PDIM_Select 8G50
CN6/1M95 ...
8316

13. PWM
11. FAN_PWM 39. N.C
12. On/Off
10. GND_SND 40. N.C
11. Vbri
9. +VSND 41. N.C
10. GND3
9. GND3 8. +12V
8. GND3 7. +12V 1G51 (B07B)
7. GND3 6. +12V 1. +VDISP-OUT
5. GND1 2. +VDISP-OUT
INVERTER 6. GND3
5. 24Vinv 4. GND1
8G51
3. +VDISP-OUT
4. 24Vinv 3. GND1 4. +VDISP-OUT
3. 24Vinv 2. STANDBY ...
2. 24Vinv 1. 3V3_ST ...
1. 24Vinv ...
51. GND

CN3/1316 CN7/1M99
12. N.C. 12. GND1 1M20 (B03G)
11. I2C_DATA 8. +5V
11. N.C.
10. GND3 MAIN POWER SUPPLY 10. I2C_SCL 7.
6.
KEYBOARD
LED1
9. GND3 9. INV_OK
8. GND3 PSU DPS-411AP3A B 8. A/P_DIM 8M20 5.
4.
+3V3-STANDBY
LED2
7. GND3 (1005) 7. BOOST
6. DIM 3. RC SSB
6. GND3
5. 24Vinv
4. 24Vinv
5. BL_ON_OFF
4. GND1
2.
1.
GND
LIGHT-SENSOR
B (1150)
3. 24Vinv 3. GND1
2. 24Vinv 2. +12V 1M95 (B01B)
1. 24Vinv 1. +12V 11. N.C
10. GNDSND
9. +AUDIO-POWER
KEYBOARD CONTROL

8. +12V
7. +12V
8319

8M95
6. +12V
5. GND
4. GND
3. GND
2. STANDBY
1. +3V3-STANDBY

1M99 (B01B)
12. GND
11. SDA-SET
CONNECTOR
(1114)

10. SCL-SET
INVERTER

9. POWER-OK
8. GND
8M99 7. BACKLIGHT-BOOST
6. BACKLIGHT-OUT
5. LAMP-ON-OUT
4. GND
3. GND
2. +12VD
1. +12VD
FUSE

1735 (B06A)
4. RIGHT-SPEAKER
CN1/1308

3. GNDSND
2. GNDSND
1. LEFT-SPEAKER
8308
1. N
2. L

1736 (B06A)
3. RIGHT-SPEAKER
INLET 2. GNDSND
1. LEFT-SPEAKER
+ -

+ -
IR LED PANEL
(1112) P2 P1
SPEAKER RIGHT (5212) 3P 8P SPEAKER LEFT (5211)

18560_402_090326.eps
090401

2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 63

Block Diagram Video


VIDEO
B02A FRONT END B05C PCMCIA 7K04-7K05 B03 PNX8543 B08D PNX5100 - LVDS IN/OUT B07B DISPLAY INTERFACE
74LVC245APW 1G50
1K00 7600
20 1
+3V3 PNX85433EH/M2A 7C00 I2C 2
B03B TUN_CA B03B LVDS PNX5100EH/M2
B08D LVDS TX1 3
B08D LVDS
MDO(0-7) BUFFER CA-MDO(0-7) CA_MD0 AP18 RX51001A+ AE20 RX TX
A_P
AN18 RX51001A- AF20

68P
A_N TO DISPLAY
PCMCIA AL18 RX51001B+ AC20
B_P TX2 1080p 50/60Hz
CA-MDI(0-7) CA_MDI AK18 RX51001B- AD20
17 B_N 37
AP19 RX51001C+ AC19
PCMCIA-VCC-VPP C_P
CONDITIONAL 18 AN19 RX51001C- AD19 38
C_N
ACCESS 33 AP20 RX51001D+ AE19
D_P 39
RX51001D-
51
52
D_N
E_P
AN20
AM20
AL20
RX51001E+
RX51001E-
AF19
AE18
AF18
PNX5100 N.C.
40
41
E_N
7303 AM19 RX51001CLK+ AC18 E17
1301 CLK_P +3V3
DRX3926K AL19 RX51001CLK- AD18 QUAD LVDS
HD1816AF/BHXP
4302 3306 2364 33AA 2365
CLK_N
HD-NM E14
+3V3
1920x1080
1G51
51
10 PDP 47 AP22 RX51002A+ AE17
FE-DATA(0-7) TNR_TSDI
IF-OUT1 PD_P LOUT2_A_P
RX51002A- FHD 100Hz 100/120HZ 50

5311
AN22 AF17
4303 2367 33AC 2368 LOUT2_A_N I2C 49
11 PDN 48 AL22 RX51002B+ AC17
IF-OUT2 PD_N LOUT2_B_P TX3
B03E ANALOG VIDEO AK22 RX51002B- AD17 40
7302 3311 LOUT2_B_N
44 SIF F2 AP23 RX51002C+ AC16
UPC3221GV SIF AI51 LOUT2_C_P
+5V-TUNER AN23 RX5100C- AD16
DEMODULATOR 7345 LOUT2_C_N
1 AGC AMPLIFIER 43 3348 4314 CVBS H3 AP24 RX51002D+ AE16 TX4
CVBS AI44 LOUT2_D_P TO DISPLAY
MAIN HYBRID VCC AN24 RX51002D- AF16 11
LOUT2_D_N 1080p 100/120Hz
TUNER 1
1303
5 2306 2 7 3303 IF-N 39 4315 CVBS-TER-OUT LOUT2_E_P
AM24 RX51002E+ AE15
AL24 RX51002E- AF15 5
LOUT2_E_N 4
2307 3304 8,18,26,53 AM23 RX51002CLK+ AC15
2 4 3 6 IF-P 40 VDDH +3V3B LOUT2_CLK_P
2,16,27,56 AL23 RX51002CLK- AD15 3
IN OUT VDDL +1V2 LOUT2_CLK_N
SAW 36M125 37 2
4 49 VDDAH_AFE1 +3V3A
AGC CONTROL XI 42 B08A 1
VDDAH_CVBS +3V3E AK19 +VDISP-OUT
1304 52 IREF_LVDS VDDA-LVDS SUPPLY
VDDAH_OSC +3V3D AB20
+3V3A 27M +3V3
36,46 AA5
50 VDDAL_AFE +1V2A +1V2-PNX5100
XO L16
3305
+5V-TUNER +1V8-PNX5100
P22
IF-AGC 34 +1V2-PNX5100-DDR-PLL1
IF_AGC AB18
3301

+3V3-PNX5100-LVDS-IN
3 33 J5
RF-AGC +1V2-PNX-TRI-PLL1

PNX8543
RF-AGC RF_AGC L5
+1V2-PNX-TRI-PLL2
T5
+1V2-PNX-TRI-PLL3
M22
+1V2-PNX5100-DLL
B05A HDMI 1H03
B04B ANALOG IO - SCART 1&2 AE25
7F02 +3V3-PNX5100-DDR-PLL0
1 74HC4053PW E15
DRX2+ +1V2-PNX5100-LVDS-PLL
16 B15
3 DRX2- MDX +5V +3V3-PNX5100-LVDS-PLL

H264 AE14
1

4
2

DRX1+ +1V2-PNX5100-CLOCK
5 CVBS-TER-OUT AD14
6 DRX1- 14 +3V3-PNX5100-CLOCK
7F07-7F08
7
9
DRX0+
DRX0-
1F01
7F03
1 Y_CVBS-MON-OUT-SC Y-CVBS-MON-OUT A3
CVBS1Y_P USB 2.0
18

B08B DDR2 B08B PNX5100 - SDRAM


19

10 19
DRXC+ 9,10,11 7F01
HDMI SIDE 12 DRXC- REGIMBEAU_CVBS-SWITCH P24
1 B03H VREF PNX5100-DDR2-VREF-CTRL
CONNECTOR
CONTROL 7C01
1H01 8 AV1_STATUS
EXT 1 B03H B03A VDD EDE5116AJBG
7 7F06
1 CRX2+ CONTROL
16 AV1_BLK AJ6
3 CRX2- 11 B03H VDDA_3V3_AADC VDDA-DAC DDR2
(0-12)
SDRAM
1

4 CRX1+ 15 SC1-R J2 AK12


2

15
16 AI32 VDDA_3V3_ADAC VDDA-ADC
6 CRX1-
7 SC1-B L2 AK20 J1
7 CRX0+ 20
21 AI22 VDD_3V3_LVDS VDDA-LVDS D PNX5100-DDR2-D(0-15) VDDL +1V8-PNX5100
J2
9 CRX0- SCART1 11 SC1-G N2 F16 VREF PNX5100-DDR2-VREF-DDR
RREF-PNX85XX
18

AI12 VDDA_HDMI_3V3_BIAS
19

10 CRXC+
20 CVBS1 G4 AC6 7C02
HDMI 1 12 CRXC- AI41 VDD_3V3_SBPER +3V3-STANDBY
EDE5116AJBG
CONNECTOR 1F02 AJ12
7F04 VDD_1V2_CORE +1V2-PNX85XX
1H00 19 AF5 DDR2
VDD_1V2_SBCORE 1V2-STANDBY A PNX5100-DDR2-A(0-12)
1 BRX2+ SDRAM
7 AV2-PB_SC2-B L3 AI23 AJ21
3 BRX2- 1
VDD_3V3_PER +3V3-PER
1

J1
2

4 BRX1+ 15 AV2-PR_SC2-R J3 (16-31)


AI33 AG30 VDDL +1V8-PNX5100
6 BRX1- 7 VDD_1V8_DDR 1V8-PMNX85XX J2
11 AV2-Y_SC2-G N3 VREF PNX5100-DDR2-VREF-DDR
7 BRX0+ EXT 2 AI13
11
9 BRX0- 20 CVBS2 H1
18

AI42
19

10 BRXC+ 16
15
7F05 B03G PNX8543 - CONTROL MIPS/FLASH/PCI
HDMI 2 12 BRXC- 16 AV2-BLK_LCD-SDA B03G CONROL +5V
20
21
B03H
CONNECTOR
SCART2 CONTROL
8 AV2-STATUS
1H02 B03H

3M31
1 ARX2+ CONTROL 1M09

+T
3 ARX2- AL16 USB-OC 1
USB_FAULT USB 2.0
B04C YPBR / SIDE IO / S-VIDEO

1
AN16 USB20-DM 2
1

4 ARX1+ CONNECTOR SIDE


2

3 2
USB_DM
6 ARX1- AP16 USB20-DP 3 SW UPLOAD
1G30 USB_DP
4 JPEG

4
7 ARX0+ 1 R-VGA K4 PC3_AI3 AM17 3M21 MP3
9 ARX0- USB_RPU +3V3-PER
2 G-VGA P4
18

10
19

15

10 ARXC+ PC1_AI3 AN17 3M23


5

3 B-VGA M4 USB_VBUS +3V3-PER


12 ARXC- PC2_AI3
HDMI 3 13 H-SYNC-VGA T1
HSYNCIN
1

CONNECTOR
11

14 V-SYNC-VGA T2
VSYNCIN 7M00
B03G PCI NAND01GW3B2BN6F
7H11 VGA
TDA9996 CONNECTOR NAND
CRX2+ 72 90 DRX2+ 1G22 FLASH
PCI PCI-AD<->NAND-AD
CRX2- 71 89 DRX2- 7 AV3-PR K1 1G
DRX1+ PR PC3_AI1
CRX1+ 69 87
12,37
68 86 DRX1- 12 AV3-Y P1 VCC +3V3-NAND
CRX1- EXT 3
RXC RXD 84 DRX0+ Y PC1_AI1
CRX0+ 66
65 83 DRX0- 9 AV3-PB M1
CRX0-
81 DRXC+ PB PC2_AI1
63 B03F MEMORY
CRXC+
HDMI 80 DRXC-
B03F PNX8543 - SDRAM
CRXC- 62

BRX2+ 42
SWITCH 1G20
AA31 3B03
M_IREF +1V8-PNX85XX
BRX2- 41 8,45,91,24, AB32
2 FRONT-Y_CVBS H2 M_VREF DDR2-VREF-CTRL
BRX1+ 39 75,95 CVBS AI43
VDDx_1V8 VDD_1V8
BRX1- 39 4 SIDE 7B01
RXB VDDO_3V3 VDDO_3V3 FRONT-C G1
36 46,55 I/O 1G37 AI54 EDE1116AEBG
BRX0+ VDDx_3V3 VDDS_3V3 1
BRX0- 35 3
15,21,34,40,
BRXC+ 33 64,70,85,88 SVHS IN 5 SDRAM
VDDH_3V3 VDDH_3V3 4 (0-12)
BRXC- 32 2

ARX2+ 23 B05A HDMI_DV J1


M_DQ DDR2-D(0-15) VDDL +1V8-PNX85XX
ARX2- 22 2 RXC+ A14 J2
C_+ HDMI_RXC_B_N VREF DDR2-VREF-DDR
ARX1+ 20 3 RXC- A15
C_- HDMI_RXC_B_P
ARX1- 19 RXA 99 RX0+ B13 7B00
D0_+ HDMI_RX0_B_N
RX0- B14 EDE1116AEBG
ARX0+ 17 100 HDMI_RX0_B_P
D0_-
ARX0- 16 96 RX1+ A12
D1_+ HDMI_RX1_B_N SDRAM
ARXC+ 14 97 RX1- A13 M_A DDR2-A(0-12)
D1_- HDMI_RX1_B_P
ARXC- 13 93 RX2+ B11
D2_+ HDMI_RX2_B_N
94 RX2- B12 J1
D2_- HDMI_RX2_B_P (16-31) VDDL +1V8-PNX85XX
3H64 C16 J2
HDMI_RREF VREF DDR2-VREF-DDR
RREF-PNX85XX

18560_403_090326.eps
090326

2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 64

Block Diagram Audio


AUDIO
B02A FRONT END B05C PCMCIA 7K04-7K05 B03 PNX8543 B06A CLASS-D
74LVC245APW
1K00
20 7H00
+3V3
PNX85439EH/M2

B03B TUNER_CA B03D AUDIO AN8 5902


AADC VDDA-AUDIO 7L10
MDO(0-7) BUFFER CA-MDO(0-7) CA_MD0 AM9 5900 TPA3123D2PWP
VREF_POS
AK9 1,3 5L07

68P
PCMCIA VDDA_3V3_DAC VDDA-DAC PVCC_L +AUDIO-POWER
CA-MDI(0-7) 10,12 5L08
CA_MDI PVCC_R
17 1735
PCMCIA-VCC-VPP
CONDITIONAL 18 ADAC(1) 5 22 LEFT-SPEAKER 1
AN14 OUT-L
ACCESS ADAC1 IN-L
33
51
CLASS D 5L09 2
POWER
52 SPEAKER L
AMPLIFIER
3
AP13 ADAC(2) 6
7303 ADAC2 IN-R
1301 DRX3926K
HD1816AF/BHXP 15 RIGHT-SPEAKER 4
OUT-R
10 4302 3306 2364 33AA 2365 PDP 47 A-STBY 2 SPEAKER R
FE-DATA(0-7) TNR_TSDI B03H STANDBY SD
IF-OUT1 PD_P

5311
1736
11 4303 2367 33AC 2368 PDN AC5 3L17
48 AUDIO-MUTE MUTE 4 1
IF-OUT2 PD_N PO_7 MUTE
B03E ANALOG VIDEO 5L10
7302 3311 2
44 SIF F2
UPC3221GV SIF AI51 7L03
+5V-TUN 3
DEMODULATOR 7345 A-STBY STANDBY &
1 AGC AMPLIFIER 43 3348 4314 CVBS H3 PROTECTION SUBWOOFER
MAIN HYBRID VCC CVBS AI44
(OPTIONAL)
TUNER 1
1303
5 2306 2 7 3303 IF-N 39
B03C PNX8543 - AUDIO AMPLIFIER B04C YPBR / SIDE IO / S-VIDEO
2307 3304 8,18,26,53
2 4 3 6 IF-P 40 VDDH +3V3B
2,16,27,56 7807-1 7807-2
SAW 36M125 IN OUT VDDL +1V2
37 AD1 AUDIO-RESET A-PLOP B04B
4 49 VDDAH_AFE1 +3V3A PO_6
AGC CONTROL XI 42 B04C
VDDAH_CVBS +3V3E
1304 52
+3V3A 27M VDDAH_OSC +3V3D
36,46

PNX8543
50 VDDAL_AFE +1V2A
XO 7830

3305
+3V3A
TPA6111A2DGN
IF-AGC 34
IF_AGC
3305

HEADPHONE
3 RF-AGC 33
RF-AGC RF_AGC AMPLIFIER
AUDIO-RESET 5
SHUTDOWN 1G21

B05A HDMI 1H03 B04B ANALOG - SCART 1&2 B03C PNX8543 - AUDIO B03D AUDIO H264 AM12 ADAC(3) 2
VO_1
1 HP_LOUT 2

ADAC3 IN-1 7 HP_ROUT 3


1
3
DRX2+
DRX2- 1
1F01
3 AP-SCART-OUT-L 3F00 AUDIO-CL-L 1
AMPLIFIER
7803-1/2
3 ADAC(7) AL9
ADAC7
USB 2.0 AM11 ADAC(4) 6
VO_2

8
1 HEADPHONE
OUT 3.5mm
ADAC4 IN-2 VDD +3V3
1

4
2

DRX1+ 3F02
6 1 AP-SCART-OUT-R AUDIO-CL-R 7 5 ADAC(8) AL8 ADAC8
DRX1- 7

7 DRX0+ EXT 1
11
6 AUDIO-IN1-L AN7 AIN_1_L
9 DRX0-
18
19

10 DRXC+ 16
15
B03G PNX8543 - CONTROL MIPS/FLASH/PCI
12 2 AUDIO-IN1-R AP7
HDMI SIDE DRXC- 20
AIN_1_R
21
CONNECTOR
1H01 SCART1
1F02
1 CRX2+
1 3 AP-SCART-OUT-L 7F00
3 CRX2- A-PLOP
A-PLOP B03C
1

4 CRX1+
2

7 1 AP-SCART-OUT-R
6 CRX1- B03G CONROL +5V
7 EXT 2 11
CRX0+
6 AUDIO-IN2-L AK6
9 CRX0- 15 AIN_2_L

3M31
18

16
19

10 CRXC+ 1M09
2 AUDIO-IN2-R AL6

+T
HDMI 1 12 CRXC- 20
21 AIN_2_R AL16 USB-OC 1
USB_FAULT USB 2.0

1
CONNECTOR SCART2 AN16 USB20-DM 2 CONNECTOR SIDE

3 2
USB_DM
1H00 AP16 USB20-DP 3 SW UPLOAD
USB_DP JPEG
1 4

4
BRX2+
3 BRX2- B04C YPBR / SIDE IO / S-VIDEO USB_RPU
AM17 3M21
+3V3-PER
MP3
1

AN17 3M23
2

4 BRX1+
6 USB_VBUS +3V3-PER
BRX1-
7 BRX0+ 1G25 7M00
9 BRX0- 7G01 B03G PCI
18

DIGITAL EF NAND01GW3B2BN6F
19

2 SPDIF-OUT-1 V1
10 BRXC+ SPDIF_OUT
AUDIO
HDMI 2 12 BRXC- OUT NAND
CONNECTOR 4 AUDIO-OUT-L 8 7803-3/4 10 ADAC(5) AN11 FLASH
ADAC5 PCI PCI-AD24<->NAND-AD
1H02 AUDIO OUT 1G
L+R 6 AUDIO-OUT-R 14 12 ADAC(6) AP10
1 ARX2+ ADAC6
3 ARX2- 12,37
1

7G00 +3V3-NAND
2

4 ARX1+ A-PLOP
1G22 A-PLOP B03C
6 ARX1-
5 AUDIO-IN3-L AM6
7 ARX0+ AIN_3_L
9
18

ARX0- EXT 3 AUDIO IN


19

10 L+R 3 AUDIO-IN3-R AN6


ARXC+ AIN_3_R B03F MEMORY
HDMI 3 12 ARXC-
B03F PNX8543 - SDRAM
CONNECTOR
1G20 AA31 3B03
RES FOR /32 +1V8-PNX85XX
M_IREF
5 AUDIO-IN5-L AN5 AB32
AIN_5_L M_VREF DDR2-VREF-CTRL
7H11 AUDIO IN
SIDE
TDA9996 L+R 8 AUDIO-IN5-R AP5 7B01
I/O AIN_5_R
90 DRX2+ EDE1116AEBG
CRX2+ 72
71 89 DRX2-
CRX2-
87 DRX1+ SDRAM
CRX1+ 69 1G18 (0-12)
68 86 DRX1-
CRX1- 2 AUDIO-IN4-L AP6
RXC RXD 84 DRX0+ AIN_4_L J1
CRX0+ 66 AUDIO IN +1V8-PNX85XX
DRX0- AUDIO-IN4-R M_DQ DDR2-D(0-15) J2
CRX0- 65 83 DVI -> HDMI 3 AM5
AIN_4_R DDR2-VREF-DDR
63 81 DRXC+
CRXC+ 1
CRXC- 62
HDMI 80 DRXC- 7B00

BRX2+ 42
SWITCH EDE1116AEBG

BRX2- 41 8,45,91,24, SDRAM


75,95 M_A DDR2-A(0-12)
BRX1+ 39 VDDx_1V8 VDD_1V8
BRX1- 39 4
RXB VDDO_3V3 VDDO_3V3
BRX0+ 36 46,55 (16-31) J1
VDDx_3V3 VDDS_3V3 +1V8-PNX85XX
BRX0- 35 15,21,34,40, J2
B04H DIGITAL VIDEO IN DDR2-VREF-DDR
BRXC+ 33 64,70,85,88
VDDH_3V3 VDDH_3V3
BRXC- 32
2 HDMIB-RXC+ A14
C_+ HDMI_RXC_B_N
ARX2+ 23 3 HDMIB-RXC- A15
C_- HDMI_RXC_B_P
ARX2- 22 99 HDMIB-RX0+ B13
D0_+ HDMI_RX0_B_N
ARX1+ 20 100 HDMIB-RX0- B14
D0_- HDMI_RX0_B_P
ARX1- 19 RXA 96 HDMIB-RX1+ A12
D1_+ HDMI_RX1_B_N
ARX0+ 17 97 HDMIB-RX1- A13
D1_- HDMI_RX1_B_P
ARX0- 16 93 HDMIB-RX2+ B11
D2_+ HDMI_RX2_B_N
ARXC+ 14 94 HDMIB-RX2- B12
D2_- HDMI_RX2_B_P
ARXC- 13 3H64 C16
RREF-PNX85XX HDMI_RREF
18540_404_090311.eps
090326

2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 65

Block Diagram Control & Clock Signals


CONTROL + CLOCK SIGNALS
B05B ETHERNET B02A FRONT END B03 PNX8543 B8D PNX5100 - LVDS IN/OUT B07B DISPLAY INTERFACE
7303
DRX3926K-XK-A3 7600
PNX85433EH/M2A/ 7C00
PNX5100EH/M2 1G50
7N04 49 B03B TUN_CA
1N00 E18 TX1CLK- 25
DP83816AVNGNOPB FE-DATA(0-7) TNR_TSDI B08B DDR2

1304

27M
DEMODULATOR
17 E19 TX1CLK+ 24
50 TO
9 FE-CLK B10 9

1N02
TNR_MICLK E20 TX2CLK- DISPLAY
PNX5100

25M
MAC 10 FE-VALID C10
PHYTER II TNR_MIVAL AL23 RX51002CLK- AE16
5 FE-SOP B9 TNR_MISTRT LOUT2_CLK_N E21 TX2CLK+ 8
ETHERNET 18 32
10/100 Mb/S B03G
RESET-SYSTEM
AM23 RX51002CLK+ AD16
CONNECTOR LOUT2_CLK_P
PCI-CLK-ETHERNET 60 AL19 RX51001CLK- AD19
B03G CLK_N 1G51
RESET-ETHERNET 62 PCI-AD(0-31) B05C PCMCIA 1K00
RX51001CLK+ AC19 33
B03H AM19 E10 TX3CLK-
1 CLK_P
CA-MICLK H32
CA_MICLK PNX8543 E11 TX3CLK+ 32
TO
CA-MDI(0-7) CA_MDI
E12 TX4CLK- 17 DISPLAY
61 IRQ-PCI 7K04-7K05 A34

COMMON INTERFACE
CA_VSN_0 16
MOCLKA CA-MOCLK_VS2 H31 E13 TX4CLK+
CA_MOCLK
MDO(0-7) CA-MDO(0-7) CA_MDO
OPTIONAL
B08 PNX5100 7K03 CA-DATADIR D31
CA_DATA_DIR B03F MEMORY B03F PNX8543 - SDRAM
PCMCIA CA-DATAEN A31
CA_DATA_EN 7B00
7C00
PNX5100EH/M2 EDE1116AEBG
PCMCIA-D(0-7) PCI-AD(24-31)
M_DQ DDR2-D(0-31)(0-15) 7B01
B08C CONTROL CONDITIONAL
7K00 EDE1116AEBG
AF24 RESET-PNX5100 ACCESS
B03H 7K01
CA-ADDEN B31
CA_ADD_EN
M_A DDR2-A(0-12)
PNX5100 AE13 PCMCIA-A(0-14) PCI-AD(0-14)
SDRAM
AB34 DDR2-CLK_P J8
1CD0

27M

IRQ-CA J34 CA_RDY M_CLK_P


IRQ-PCI AB33 DDR2-CLK_N K8
AF13 68 M_CLK_N

B03G PNX8543 - CONTROL MIPS/FLASH/PCI B03G PCI


B08C PCI_XIO

PCI-AD(0-31) PCI-AD(0-31) PCI-AD(0-31) PCI_AD B03G PNX8543 - CONTROL MIPS/FLASH/PCI

7M00
L3 PCI-CLK-PNX5100 NAND01GW3B2BN6F
B03G PCI-CLK-OUT 3M30 PCI-CLK-PNX5100
AP28
PLL_OUT B08C

3M46
NAND-AD(0-7) <-- PCI-AD(24-31)
NAND A30 PCI-CLK-PNX8543
TRDY_CLK
FLASH 7 XIO-ACK A20
XIO_ACK
WP-NANDFLASH 19
(1G) 9 XIO-SEL-NAND B20
XIO_SEL_0

B03G CONTROL
B08B DDR2 B08B PNX5100 - SDRAM AN28 RESET-SYSTEM
IRQ-CA L34 RESET_SYS B02A B03H
GPIO_3
IRQ-PC1 U4 U3 WC-EEPROM-PNX5100_SPI-DI
7C01 GPIO_2 GPIO_2 B04C
1M09
EDE5116AJBG V2 PNX8543-LCD-PWR-ON_SPI-DI
1 USB-OC AL16 GPIO_6 B07B 1M04
PNX5100-DDR2-D(0-31) 7C02 USB_FAULT
1

EDE5116AJBG USB 2.0 2 USB20-DM AN16 RXD-MIPS 2


USB_DM GPIO_4 L32
3 2

CONNECTOR 3 USB20-DP AP16 UART


USB_DP TXD-MIPS 3
SIDE 4 GPIO_5 L31 SERVICE
4

DDR2-A(0-12) 1 CONNECTOR
STANDBY
AD2 B03H
SDRAM P0_5
P26 PNX5100-DDR2-CLK_P J8 1M20 B03H PNX8543 - STANDBY-CONTROL / DEBUG
1 LIGHT-SENSOR AN2
P25 PNX5100-DDR2-CLK_N K8 CADC_1
2 B03H
3 RC 4D00 RC_uP AF2 P1_0 1M01
AG1 RXD-UP 3
UA_RX_0
TO IR/LED PANEL 4 LED2 AJ2
PWM_1 TXD-UP 1
AND KEYBOARD CONTROL AH5
5 UA_TX_1 FOR
B08C GPIO +3V3-STANDBY 7M81 2 FACTORY USE
6 LED1 AJ3 PWM_0 2D08 ONLY
B23 PNX5100-BL-CTRL AG2 SDM
P1_7 4
7 KEYBOARD AN3 SDM
CADC_0
RES
8 2D07
+5V P6_4 AK2 SPI-PROG
SPI-PROG

B07B DISPLAY INTERFACE B07A DISPLAY INTERFACE (COMMON) B03H PNX8543 - STANDBY-CONTROL / DEBUG
DETECT-12V 4D09 DETECT2 AD3 7D06
B01B P2_5 M24C64-WDW6P
7D07
DETECT1 AD4
B01A P2_4 RESET-NVM
P0_1 AC1 8
EEPROM
RESET-SYSTEM AH3 P3_3
B03G
W1
(8Kx8)
AV1-BLK AH1 XTAL_I
B04B P3_5

1D00
AV2-BLK_LCD-SDA AH2

27M
B04B P3_4
AV1-STATUS AP2 7D09
B04B CADC_2 W2
XTAL_O M25P05-AVMN6P
3P24 BACKLIGHT-IN BACKLIGHT-OUT AV2-STATUS AP1
B04B CADC_3
CONTROL B01B
AJ1 SPI-CLK 6
+3V3-STANDBY 7D05 SPI_CLK 512K
NCP303LSN30G AK4 SPI-WP 3
P6_5 FLASH
AK3 SPI-CSB 1 B01B DC / DC +3V3-STANDBY_+1V2-STANDBY
SPI_CSB
SPI-SDO 5
OUTP 1 RESET-STBY AF3
RESET_IN SPI_SDO
AJ4
2 AK1 SPI-SDI 2
INP SPI_SDI
1M99
3 LAMP-ON-OUT 5
GND P2_2 AE1
ENABLE-3V3 6 TO
AE4 BACKLIGHT-OUT
P2_7 B01A B01B B07A POWER
B05A HDMI 7H09 AF1 REGIMBEAU_CVBS-SWITCH BACKLIGHT-BOOST 7 SUPPLY
CEC-HDMI AG4 P1_1 B04B N.C.
CONTROL P1_2
POWER-OK 9
7H11 P2_6 AE5
TO PIN:
TDA9996 AD1 AUDIO-RESET
1H02-13 B05A HDMI_DV P0_6 B03C
1H00-13 CEC 57
1H01-13 AC5 AUDIO-MUTE
1
2

1H03-13 HDMI P0_7 B06A 1M95


TO
SWITCH P2_3
AD5 STANDBY 2 POWER
ARX-DDC-CLK 12 RX HDMI_RX