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ECE 450:DIGITAL SIGNAL

PROCESSORS AND APPLICATIONS

Lecture 10:
DSP Arithmetic
Last Session
Amrita School of Engineering, Bangalore

• Floating Point Arithmetic


– Addition
• Block Floating Point format
• Dynamic Range and Precision

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 2


Today’s Session
Amrita School of Engineering, Bangalore

• Guard Bits
• Sources of Error in DSP Implementations
• DSP Architectures

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 3


Block Floating Point format
• Increases the range & precision of fixed point format
Amrita School of Engineering, Bangalore

• A group or block of fixed point numbers are


represented as though they were floating point
numbers with same exponent and different mantissa
• Mantissa are stored and handled similar to fixed point
numbers
• The common exponent of the block is stored
separately and is used to multiply the numbers as they
are read off the memory
• The exponent is decided by the smallest number of
leading zeros in the fixed point representation of the
given block of numbers
03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 4
Block Floating Point format
Amrita School of Engineering, Bangalore

• The numbers are then shifted by this value to


accommodate the maximum number of non zero bits
using the given fixed point format
• Increases the range & precision of a given fixed point
format by retaining as many lower bits as possible
• Does not require any extra hardware resources except
an extra memory to store th eblock exponent
• Increases the complexity of the programs
• Also works on block of integers if there are zeros to
the right

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 5


Example
Amrita School of Engineering, Bangalore

• Following 14 bit binary fractions are to be


stored in an 8-bit memory.
(a) Represent using 8 bit fixed point format
(b) Represent using block floating point format
(c) Show how the precision is increased using
block floating point format
000000001011010
000000011011101
000000000101110
000000010100001
03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 6
Dynamic Range & Precision
Amrita School of Engineering, Bangalore

• Dynamic Range: Ratio of maximum value to the


minimum value that the signal can take in the given
number representation scheme
Dynamic Range ∝ Number of bits
• It increases by 6 dB for every additional bit
• Resolution: Minimum value that can be represented
using a number representation format
• Resolution/Precision ∝ Number of bits
• If N bits are used to represent a number between 0
−N
and 1 the smallest value is resolution = 2

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 7


Amrita School of Engineering, Bangalore

• Normally expressed as number of bits used.


• Precision affects speed
Precision ∝ 1
Speed
In floating point format:
• Exponent determines range
– Since exponent in floating point is a power, dynamic range
is very large
• Resolution is determined by Mantissa
• Since speed is affected the precision is to be chosen
carefully

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 8


Range of fractional numbers
Amrita School of Engineering, Bangalore

• With N bits for mantissa M, the range of fractional


numbers that can be represented in the mantissa is
– (2-2-N ) to +(2-2-N )
Ex1: Using 16 bits for the mantissa & 8 bits for the
exponent,what is the range of numbers that can be
represented using the floating point format similar to
IEEE 754?
Ex2: Compute the dynamic range & % resolution for a
block floating point format with 4 bit exponent and 16
bit fixed point processor.

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 9


Amrita School of Engineering, Bangalore

Guard Bits(Improve accuracy &


range)

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 10


Example
Amrita School of Engineering, Bangalore

• Consider the subtraction(floating point data) X-Y


where :
X=1.00000000000000000000000*21
Y=1.11111111111111111111111*20
•Equalize Exponent & Subtract
X=1.00000000000000000000000*21
Y=0.11111111111111111111111*21
Z=0.00000000000000000000001*21
•Normalize
Z=1.00000000000000000000000*2-22

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 11


Example Cont..
Amrita School of Engineering, Bangalore

• Now add few bits extra to mantissa


X=1.00000000000000000000000000*21
Y=1.11111111111111111111111000*20
• Equalize Exponent & Subtract
X=1.00000000000000000000000000*21
Y=0.11111111111111111111111100*21
Z=0.00000000000000000000000100*21
• Normalize
Z=1.00000000000000000000000*2-23
Thus Guard bits have increased the precision of data
03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 12
Floating Point Processor
Amrita School of Engineering, Bangalore

• Guard Bits
– Capture the bits at LSB
– Guard the accuracy in intermittent results
– Improve the accuracy (precision)

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 13


Fixed Point Processors
Amrita School of Engineering, Bangalore

• Guard Bits
– Capture the bits at MSB
– Guard bits before MSB
– Improves the range

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 14


Comparison
Amrita School of Engineering, Bangalore

• Since Fixed Point DS processor operates using


integer format, range of numbers get limited
leading to overflow problems. More coding
effort is needed to deal with such a problem
– Choice for ASIC DSP (performance & small slice
area)
• Floating point offers wide range of data, but
requires complex circuitry hence more
expensive and slower than fixed point.
– Choice for prototyping or proof-of-concept
development

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 15


Amrita School of Engineering, Bangalore

• Most floating point numbers perform automatic


normalization so that numbers are properly
shifted & aligned. The programmer just needs
to take care of overflow problem.
• But due to enormous dynamic range,scaling is
rarely needed.
• Floating point processors are easier to use than
fixed point processors but are more expensive

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 16


Comparison between fixed & floating point
processors
Amrita School of Engineering, Bangalore

• 16 or 24 bit devices • 32 bit devices


• Limited dynamic range • Large dynamic range
• Overflow & quantization errors • Easier to program since no scaling
must be resolved is required
• Poorer C compiler efficiency. • Better C compiler efficiency. Can
Normally programed in assmbely be developed in C
• Long product developement time • Quick time to market
• Faster clock rate • Slower clock rate
• Less silicon area is required • More silicon area is required as
• Cheaper functional units are complex
• Low power consumption • More expensive
• High power consumption
• Bursty in nature
• High speed

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 17


Applications of fixed & floating point
Processors
Amrita School of Engineering, Bangalore

• Drive disc and motor • In radar,sonar & seismic


control applications
• Consumer audio • Highend audio applications
applications such as MP3
players,multimedia gaming
and digital cameras
• Speech coding/decoding and • Sound synthesis in
channel coding professional audio vedio
• Communication devices coding/decoding
such as modems & cellular
phones.

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 18


Sources of Error in DSPs
Amrita School of Engineering, Bangalore

• DSP System: ADC, DSP device, DAC


• Accuracy depends on number of factors
contributed by ADC & DAC and how the
calculations are done in DSP device
• Errors in ADC & DAC : Quantization errors
(Limited by number of bits)
• Errors in DSP calculations: Finite word length
(Can be reduced by using larger word length &
by rounding instead of truncation)

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 19


Comparison between DSP and GPP
Amrita School of Engineering, Bangalore

• Used for embedded • Desk top computing/Servers


applications
• Low power requirement • High Power consumption
• Have features required for
DSP applications (FFT,
Convolution, Correlation
etc.)
• Real time I/O
• High speed on chip
memories
• Deals with infinite • Bursty in nature
continuous stream of data.
• Slow
• High speed
• Has a typical MAC unit.
11/ 02/ 12 © Dr.Shikha Tripathi,ASE, Bangalore 20
Digital Signal Processors
Amrita School of Engineering, Bangalore

• Application Specific • Programmable


– Designed to perform one – Can be programmed for
function more accurately, different applications
faster and is more cost – Cost effective than GPP
effective – Architecture is designed
– Ex.: Digital filters, FFT for repetitive nature of
chips signal processing by
pipelining & parallelism
– Performs certain
operations like MAC
faster than GPP

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 21


Next Session
Amrita School of Engineering, Bangalore

• DSP Architectures Cont..

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 22


Amrita School of Engineering, Bangalore

Thank You

03/ 02/ 14 © Dr.Shikha Tripathi,ASE, Bangalore 23

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