Beruflich Dokumente
Kultur Dokumente
Presented by,
R.SENTHILNATHAN
K.SATHISH KUMAR
FINAL ECE
Phone No:
9994108625
9003416631
E-mail:
Senthil13mar@gmail.com
ksathish59@gmail.com
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Ultra High Density Storage using Nanotechnology
Abstract
I. Introduction
The existing magnetic storage technology, within few years, will arrive at a stage
of its exciting and successful evolution at which fundamental changes are likely to occur
when current storage technology hits the well-known super paramagnetic limit. In
general, if an existing technology reaches its limits, new alternatives emerge in parallel.
At time when the possibilities for improvements of the technology have been exhausted
the technology may still survive for certain niche applications, but the emerging
technology will take over, opening up new perspectives and new directions.
The “Millipede” concept presented here is a new approach for storing data at high
speed and with an ultrahigh density. The ultimate locality is given by a tip and high data
rates are a result of massive parallel operation of such tips.
For storage, it has a cantilever tip for reading and writing purpose. The hard Si
substrate prevents the tip from penetrating farther than the film thickness allows, and it
enables more rapid transport of heat away from the heated region because Si is a much
better conductor of heat than the polymer. We have coated Si substrates with a 40nm
film of polymethylmethacrylate (PMMA).
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Ultra High Density Storage using Nanotechnology
The tip height should be as small as possible because the heater platform
sensitivity depends strongly on the distance between the platform and the medium. This
contradicts the requirement of a large gap between the chip surface and the storage
medium to ensure that only the tips, and not the chip surface, are making contact with
the medium. Instead of making the tips longer, we purposely bent the cantilevers a few
micrometers out of the chip plane by depositing stress-controlled plasma enhanced
chemical vapor deposition (PECVD) silicon nitride layer at the base of the cantilever.
This bending as well as the tip height must be well controlled in order to maintain
an equal loading force for all cantilevers of an array. Cantilevers are released from the
crystalline Si substrate by surface micromachining using either plasma or wet chemical
etching to form a cavity underneath the cantilever. Compared to a bulk-micro machined
through wafer cantilever-release process, the surface-micromachining technique allows
an even higher array density and yields better mechanical chip stability and chip sinking.
Because, the Millipede tracks the entire array without individual lateral cantilever
positioning, thermal expansion of the array chip must be either small or well-controlled.
Because of thermal chip expansion, the lateral tip position must be controlled with better
precision than the bit size, which requires small possible array dimension and and a well-
controlled chip temperature. For 3 mm x 3 mm silicon array area and 10-nm tip-position
accuracy, the chip temperature has to be controlled to about 18°C. This is
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Ultra High Density Storage using Nanotechnology
ensured by four temperature sensors in the corners of the array and heater elements on
each side of the array.
For reading, the heater cantilever functions as a thermal read back sensor by
exploiting its temperature-dependent resistance. The resistance increases nonlinearly
with heating power/temperature from room temperature to a peak value of 500°C–
700°C. This is determined by the doping concentration of the heater platform, which
ranges from 1x1017 to 2x1019 cm-3.
Above the peak temperature, the resistance drops as the number of intrinsic
carriers increases because of thermal excitation. For sensing, the resistor is operated at
about 350°C, a temperature that is not high enough to soften the polymer as in the case
of writing. The principle of thermal sensing is based on the fact that the thermal
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Ultra High Density Storage using Nanotechnology
conductance between the heater platform and the storage substrate changes according
to the distance between them. The medium between the
heater platform and the storage substrate, in our case air, transports heat from the
cantilever to the substrate. When the distance between cantilever and storage substrate
is reduced as the tip moves into a bit indentation, the heat transport through the air
becomes more efficient. As a result, the evolution of the heater temperature differs in
response to a pulse applied to the cantilever. In particular, the maximum value achieved
by the temperature is higher if there is no bit indentation. As the value of the variable
resistance depends on the temperature of the cantilever, the maximum value achieved
by the resistance will be lower as the tip moves into an indentation. Therefore, during
the read process, the cantilever resistance reaches different values depending on
whether the tip moves into an indentation (bit “1”) or over a region without an
indentation (bit “0”). The Thermo-mechanical cantilever sensor, which transforms
temperature into an electrical signal that carries information, is the electrical equivalent
of a variable resistance. A detection circuit must therefore sense a voltage that depends
on the value of the cantilever resistance to decide whether a “1” or a “0” is written. The
relative variation of thermal resistance is on the order of 10 nm. Hence, a written bit “1”
typically produces a relative change of the cantilever thermal resistance of about 10-5
nm. Note that the relative change of the cantilever electrical resistance is of the same
order of magnitude.
The signal carrying the information can be regarded as a small signal superimposed on a
very large offset signal. The large offset problem can be mitigated by restoring to a
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Ultra High Density Storage using Nanotechnology
As the Millipede tracks the entire array without individual lateral cantilever
positioning, thermal expansion of the array chip has to be small or well controlled. For a
3 x 3 mm2 silicon array area and tip-position accuracy of 10 nm, the chip temperature
has to be controlled to within about 1°C. This is ensured by four temperature Sensors in
the corners of the array and heater elements on each side of the array.
Thermal expansion considerations are a strong argument for a two-dimensional
(2-D) instead of a one-dimensional (1-D) array arrangement, which would make a chip
32 times longer for a 32x32 array of cantilevers. Efficient parallel operations of large 2-D
arrays can be achieved by a row/column time-multiplexed addressing scheme similar to
that implemented in DRAMs. In the case of Millipede, the multiplexing scheme is used to
address the array column by column with full parallel WRITE/READ operation within one
column. In particular, readback signal samples are obtained by applying an electrical
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Ultra High Density Storage using Nanotechnology
read pulse to the cantilevers in a column of the array, low-pass filtering the cantilever
response signals, and finally sampling the filter output signals. This process is repeated
sequentially until all columns of the array have been addressed and then restarted from
the first column. The time between two pulses applied to the cantilevers of the same
column corresponds to the time it takes for a cantilever to move from one bit position to
the next. An alternative approach is to access all or a subset of the cantilevers
simultaneously without resorting to the row/column multiplexing scheme. Clearly, the
latter scheme yields higher data rates, whereas the former leads to lower
implementation complexity of the channel electronics.
Array Characterization
The array’s independent cantilevers, which are located in the four corners of the
array and used for approaching and leveling of chip and storage medium, are used to
initially characterize the interconnected array cantilevers. Figure shows an I/V curve of
such a cantilever; note the nonlinearity of the resistance. Depending on the heater-
platform doping concentration of 1x1017 to 2x1018 at./cm3, our calculations estimate a
resistance maximum at temperatures of 500°C and 700°C, respectively.
The cantilevers within the array are electrically isolated from one another by
integrated Schottky diodes. Because every parasitic path in the array to the addressed
cantilever of interest contains a reverse-biased diode, the crosstalk current is drastically
reduced. Thus, the current response to an addressed cantilever in an array is
independent of the size of the array. Hence, the power applied to address a cantilever is
not shunted by other cantilevers, and the reading sensitivity is not degraded—not even
for very large arrays (32 x 32). The tip-apex height uniformity within an array is very
important because it determines the force of each cantilever.
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Ultra High Density Storage using Nanotechnology
No: of arrays
Track Radius
Diameter which can be
No: (r)
accommodated
1 24.5 154 51333
2 27.5 172 57333
3 30.5 191 63666
4 33.5 210 70000
Wear investigations suggest that a 5 36.5 229 76333
IV. Implementation - ‘Ultra high density hard disk’ Using Millipede concept
Consider a 1mm thick Si disk coated with a 70nm layer of Photo resist to avoid
excess melting of the polymer layer. We take a single disk and then discuss how the
information is ordered on the disk to achieve maximum storage level theoretically.
The ordinary READ/WRITE head in the conventional hard disks are replaced by
degree of parrellism, a 32x32 array the array of cantilevers. To achieve a high cantilever
is adopted. By having each cantilever measuring 92µx92µm, the whole 32x32 array
measures 3mmx3mm. By using this 3mmx3mm write head the maximum possible bit
which can be written on a 3mmx3mm area is 1.25x1013. But in order to avoid
overlapping of data bits, we accommodate only 1/100 of the total possible bits. That
comes nearly 1.25x1011.
Disk Layout
So we break this 37mm into 12 tracks each of width 3mm and the linear length of
each track is found first.
Array of
Cantilever 32 Array
(3mm x
3mm)
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Ultra High Density Storage using Nanotechnology
32 Array
Single
Cantilever
(92µx92µ
m)
Track Details
V. Conclusion
The Millipede has the potential to achieve higher peaks of storage area. The high
aerial storage density, small form factor, and low power consumption render Millipede a
very attractive candidature as the future storage technology for mobile applications, as it
offers several Tetra Bytes of capacity at data rates of several megabytes per second. If
we are gifted enough, we shall see magnetic storage taking the backseat to this new
storage technology, Millipede in the near future.
VI. Bibliography
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Ultra High Density Storage using Nanotechnology
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