Sie sind auf Seite 1von 40

1 2 3 4 5 6 7 8

BOM MARK
5VPCU
ED@ INT. VGA WITH DOCK E@ EXT VGA 要打

5V / 3.3V / 12V
Page : 35
3V_ALWAYS

+12V
CLOCK GEN
ICS
Centrino CRANE2 ( ZL3 ) ID@ INT. VGA WITH DOCK
ND@ W/O DOCKING要打
I@ INTVGA 要打
SA@ SATA 要打
ICS954201 DOTHAN F@ FIXED ODD要打
+5V Page : 2 CELEROM-M SW@ SWAPPABLE ODD 要打
3@ 3in1 要打
3V_S5 INTEL Mobile_479 CPU Page : 3 , 4
EXT_LVDS N@ NEW CARD 要打
A
ATI 4@ 4401 要打
A

PCIE SWITCH 5@ 5788M 要打


3VSUS M26P/M24P EXT_CRT
D@ DOCKING 要打
HOST BUS 533MHz 64M / CIRCUIT
5VSUS EXT_TV-OUT CRT
HOST BUS 400MHz
2.5VSUS
128M Page:17
Page : 11 ~ 14
1.8V / 0.9V +2.5V ALVISO LVDS INT_LVDS LVDS
Page : 36 400/533MHZ DDR2
+1.8V DDR2-SODIMM1
1257 BGA Page:16
Page:9~10 RGB INT_CRT
MVREF_DM TV-OUT
400/533MHZ DDR2 TVOUT INT_TV-OUT Page:16
SMDDR_VTERM DDR2-SODIMM2
Page:9~10 Page : 5 ~ 8
1.5V_S5

1.5V / 1.05V / 1.8V DVI


+1.5V
CH7307
B Page : 37 B
AGP_VCC (+1.5V) DOCKING/DVI
SATA - HDD Page:15 Page: 33
1.2VCCT
Page:21
VTT
IDE - HDD
Page:21 3 IN 1
VCC_CORE
CPU CORE DMI I/F TI Page: 24
Page : 34 IDE-ODD SATA
PCMCIA+1394 PCMCIA
Page:21 ATA 66/100 PCIE
ICH6-M NEW CARD +3 IN 1
VGA_CORE Page : 32 Page: 24
+1.2V 609 BGA PCI7411
2.5V_VGA MEDIA BAY PCI BUS Page: 23
Page : 38 1394
Page:21
AC97 Page: 23
USB 2.0
C
BATTERY Page : 18 ~ 20
MINI-PCI C

CHARGER AUDIO CODEC Wireless LAN


Page : 39
Modem/LAN
CONEXANT Page : 22
20468-31
BATTERY Page:27 LPC
SELECT BROADCOM
BOTHHAND
Page : 40 NS NS 10/100/1G LAN
MODEM RJ45
AMP KBC(97551) SIO (87383) TRANSFORMER Page:26
CONEXANT 4401 / 5705M
MAX9755 Page : 29 Page : 31 Page:26
20493-21 Page:25
Page:28 Page:27

MIC IN LINE SPEKER LINE DOCKING DOCKING DOCKING SYSTEM 3 DOCKING 2 MINI-USB
RJ11 Touchpad Keyboard IrDA USB PORT USB PORT
IN OUT PS2 Print Port COM Port
D
Page:27 Page:27 Page:28 Page:28 Page:27 Page:33 Page:30

PCI ROUTING TABLE IDSEL


Page:30

INTERUPT
Page:31 Page:33

DEVICE
Page:33 Page : 22
USB2,3,5
Page : 22
USB0,1
Page: 22
USB4 REV.C D

REQ0# / GNT0# AD24 INTA# BROADCOM LAN PROJECT : ZL3


REQ2# / GNT2# AD19 INTB# , INTD# MINI-PCI
REQ1# / GNT1# AD17 INTC#,INTD#,INTA# TI 7411 Quanta Computer Inc.
Size Document Number Rev
BLOCK DIAGRAM C

Date: Tuesday, March 29, 2005 Sheet 1 of 40


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Place these termination


to close CK410M.
R205
+3V 1 2 VDD_CKG_CPU VDDA_CKG

L50 ACB2012L-120 2.2

1
C722 C368 C361 C369 C707 C708 C355 R199 1 2 49.9/F_4
R198 1 2 49.9/F_4
10U/10V_8 .047U_4 .047U_4 .047U_4 .047U_4 C718 .047U_4 10U/10V_8 R201 *12_4

2
A 33P_4 R197 1 2 49.9/F_4 1 2 CLK_SSC_IN A
2 1 CG_XIN R196 1 2 49.9/F_4
R200 12_4

1
R195 1 2 49.9/F_4 1 2 14M_SIO
+VCCP +VCCP +3V 14M_SIO <31>
Y4 U35 R194 1 2 49.9/F_4

37

38
R202 12_4
C709 14.318MHZ/20PF 50 52 14M_REF 1 2

VDDA

VSSA
14M_ICH <19>

2
XTAL_IN REF
2

2
33P_4
R203 R468 R489 2 1 CG_XOUT 49 44 R_HCLK_CPU 4 3 RP10
XTAL_OUT CPU0 HCLK_CPU <3>
1K_4 1K_4 10K_4 43 R_HCLK_CPU# 2 1 14M_SIO
CPU0# HCLK_CPU# <3>
4P2R-S-33

1
CLK_EN# 10 41 R_HCLK_MCH 4 3 RP11
<34> CLK_EN# HCLK_MCH <5>
1

1
SELPSB2_CLK SELPSB1_CLK SELPSB0_CLK VTT_PWRGD#/PD CPU1 R_HCLK_MCH# C915
<19> STP_PCI# 55 PCI/SRC_STOP# CPU1# 40 2 1 HCLK_MCH# <5>
54 4P2R-S-33 10P_4
<19,34> STP_CPU#

2
CPU_STOP#
2

2 CPU2_ITP/SRC5 36 R_MCH_3GPLL 4 3 RP12 CLK_MCH_3GPLL <6>


R204 R470 R488 SMbus address D2 35 R_MCH_3GPLL# 2 1
CPU2#_ITP/SRC5# CLK_MCH_3GPLL# <6>
*0_4 *0_4 *10K_4 4P2R-S-33
SMBCK 46 SCLK *PERREQ1# 33 NEW_CLKREQ# <32> PEREQ1# - SRC0, 2, SATA
SMBDT 47 32 EZ_CLKREQ# <33> PEREQ2#
1

R482 1 2 33_4
SDATA *PERREQ2# - SRC1, 3, 4
<19> CLK48_USB
SELPSB0_CLK 12 31 R_PCIE_VGA 4 3 RP13
FSA/USB_48 SRC4 CLK_PCIE_VGA <11>
SELPSB1_CLK R_PCIE_VGA#
<4,6> SELPSB1_CLK 16 FSB/TEST_MODE SRC4# 30 2 1 CLK_PCIE_VGA# <11>DEFALT OFF
SELPSB2_CLK 53 E@4P2R-S-33
R463 <4,6> SELPSB2_CLK FSC/TEST_SEL
26 R_PCIE_SATA 2 1 RP20
SATACLK CLK_PCIE_SATA <18>
VDD_CKGREF 48 27 R_PCIE_SATA# 4 3 DEFALT OFF
VDD_REF SATACLK# CLK_PCIE_SATA# <18>
SA@4P2R-S-33
1 1 24 R_PCIE_EZ1 2 1 RP19
VDD_PCI_1 SRC3 CLK_PCIE_EZ1 <33>
+3V 1 2 CLKVDD 7 25 R_PCIE_EZ1# 4 3
VDD_PCI_2 SRC3# CLK_PCIE_EZ1# <33>
CK-410M D@4P2R-S-33
1

1
B L51 ACB2012L-120 C366 C371 C372 C706 VDD_CKG_CPU 42 22 R_PCIE_ICH 2 1 RP18 B
VDD_CPU SRC2 CLK_PCIE_ICH <19> +3V
R212 21 23 R_PCIE_ICH# 4 3
VDD_SRC0 SRC2# CLK_PCIE_ICH# <19>
2.2 10U/10V_8 .047U_4 .047U_4 .047U_4 28 4P2R-S-33
2

2
VDD_SRC1 R_PCIE_EZ2
34 VDD_SRC2 SRC1 19 2 1 RP17 CLK_PCIE_EZ2 <33>
20 R_PCIE_EZ2# 4 3
SRC1# CLK_PCIE_EZ2# <33>
VDD_CKG_48 11 D@4P2R-S-33
R465 475/F_4 VDD_48 R_PCIE_NEWC 2
SRC0 17 1 RP16 CLK_PCIE_NEWC <32>
1

2
C373 C370 Iref=5mA, 1 2 IREF 39 18 R_PCIE_NEWC# 4 3
Ioh=4*Iref IREF SRC0# CLK_PCIE_NEWC# <32>
N@4P2R-S-33 R615 R616
10U/10V_8 .047U_4 5 R_PCLK_591 R478 1 2 33_4 *1K_4 1K_4
PCLK_591 <29>
2

*Internal Pull-Down Resistor PCI5 R_PCLK_PCM R477 33_4


PCI4 4 1 2 PCLK_PCM <23>
I@4P2R-S-33 3 R_PCLK_LAN R476 1 2 33_4

GND_PCI_1
GND_PCI_2
PCLK_LAN <25>

1
PCI3

GND_SRC
GND_CPU
GND_REF
4 3 R_DOT96 14 56 R_PCLK_SIO R464 1 2 33_4 EZ_CLKREQ#
<6> DOT96 DOT96 PCI2 PCLK_SIO <31>

GND_48
2 1 R_DOT96# 15 9 R_PCLK_MINI R481 1 2 33_4
<6> DOT96# DOT96# PCIF1 PCLK_MINI <22>
8 R_PCLK_ICH R479 1 2 33_4 NEW_CLKREQ#
RP15 PCIF0/ITP_EN PCLK_ICH <18>

R480 10K_4

13
51
2
6
29
45
SMBUS ADDRESS: D2, D3 ICS954217 1 2 Define pin35,36 function
250mA ( MAX. )
PULL HIGH TO SET PIN35,36 TO HOST CLK
+3V DOT96 R490 1 2 I@49.9/F_4
L23 DOT96# R491 1 2 I@49.9/F_4
SSCD_VDD 1 2 +3V
*ACB2012L-120 CLK_PCIE_VGA R193 1 2 E@49.9/F_4

1
CLK_PCIE_VGA# R192 1 2 E@49.9/F_4
1

C241 C229
*10K_4 *10K_4 *10K_4 *.1U_4 *10U/10V_8 CLK_PCIE_SATA R486 2 SA@49.9/F_4
C SMBUS ADDRESS: D4, D5 1 C

2
CLK_PCIE_SATA# R487 1 2 SA@49.9/F_4
R106 R109 R111 U9
CLK_SSC_IN 1 16 CLK_PCIE_EZ2 R492 1 2 D@49.9/F_4
2

CLKIN VDDA CLK_PCIE_EZ2# R493


VDD 9 1 2 D@49.9/F_4
SSC_S3 2 RP2
SSC_S2 S3 R_DREFSSCLK
3 S2 CLKOUT 12 4 3 DREFSSCLK <6>
SSC_S1 4 11 R_DREFSSCLK# 2 1 CLK_PCIE_ICH R209 1 2 49.9/F_4
S1 CLKOUT# DREFSSCLK# <6>
CLK_PCIE_ICH# R208 1 2 49.9/F_4
SMBCK 7 14 *4P2R-S-33
SMBDT SCLK IREF CLK_PCIE_EZ1 R207
8 SDATA 1 2 D@49.9/F_4

2
13 CLK_PCIE_EZ1# R206 1 2 D@49.9/F_4
VSSIREF

2
CLK_EN# 5 10 R110 R114
+3V SSCD_VDD PWRDWN VSS R108 *49.9/F_4 *49.9/F_4 CLK_PCIE_NEWC R211 1
1 2 6 REFOUT/SELVSSA 15 2 N@49.9/F_4
R117 *10K_4 *475/F_4 CLK_PCIE_NEWC# R210 1 2 N@49.9/F_4

1
*MK1493-05GT

1
2
4

RP9
Place these termination
4P2R-S-10K
FSC FSB FSA CPU SRC PCI to close CK410M.
2

1
3

DOTHAN-A 400 1 0 1 100 100 33


3 1 SMBDT
<19,25,32,33> PDAT_SMB SMBDT <9>
DOTHAN-A 533 0 0 1 133 100 33
Q40 0 1 1 166 100 33
D D
2N7002
+3V
0 1 0 200 100 33
0 0 0 266 100 33
QUANTA
2

1 0 0 333 100 33
<19,25,32,33> PCLK_SMB 3 1 SMBCK
SMBCK <9> 1 1 0 400 100 33 Title
COMPUTER
1 1 1 RSVD 100 33 CLOCK GENERATOR
Q41 Size Document Number Rev
2N7002 ZL3 C

Date: Tuesday, March 29, 2005 Sheet 2 of 40


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3V +3V

HD#[0..63]
U31A HD#[0..63] <5>
HA#[3..31] R442
<5> HA#[3..31]
HA#3 P4 A19 HD#0 10K_4 Q38
A3# D0#

2
HA#4 U4 A25 HD#1 2N7002
HA#5
HA#6
V3
A4#
A5#
Dothan D1#
D2# A22 HD#2
HD#3
R3 A6# D3# B21 1 3MBDATA MBDATA <11,29,40>
HA#7 V2 A24 HD#4
HA#8 A7# D4# HD#5
A
HA#9
W1
T4
A8# 1 OF 3 D5# B26
A21 HD#6
A

HA#10 A9# D6# HD#7 +3V +3V


W2 A10# D7# B20
HA#11 HD#8 +3V Level shift
HA#12
Y4
Y1
A11#
A12#
D8#
D9#
C20
B24 HD#9 15 MIL
HA#13 U1 D24 HD#10 R439 47 3V_THM R435
HA#14 A13# D10# HD#11
AA3 A14# D11# E24
HA#15 Y3 C26 HD#12 C661 10K_4
HA#16 A15# D12# HD#13 Q37
AA2 A16# D13# B23

2
HA#17 AF4 E23 HD#14 .1U_4 2N7002
HA#18 A17# D14# HD#15
AC4 A18# D15# C25
HA#19 HD#16 U33
AC7 A19# D16# H23 1 3MBCLK MBCLK <11,29,40>
HA#20 AC3 G25 HD#17 1 7KBSMDAT
HA#21 A20# D17# HD#18 THERMDC VCC SMDATA
AD3 A21# D18# L23 3 DXN SMCLK 8KBSMCLK
HA#22 AE4 M26 HD#19 2 6
A22# D19# DXP -ALT MAX6648_AL# <29>
HA#23 AD2 H24 HD#20 4 5
HA#24 A23# D20# HD#21 -OVT GND
AB4 A24# D21# F25
HA#25 AC6 REQUEST DATA G24 HD#22 10 mil trace / MAX6657 +3V R448
HA#26 A25# PHASE PHASE D22# HD#23 C674 10K_4
AD5 J23
HA#27 AE2
A26# SIGNALS SIGNALS D23#
M23 HD#24 10 mil space
HA#28 A27# D24# HD#25 2200P
AD6 A28# D25# J25
HA#29 AF3 L26 HD#26 R449
HA#30 A29# D26# HD#27 *10K_4
AE1 A30# D27# N24
HA#31 AF1 M25 HD#28 +3V
A31# D28# HD#29 THERMDA
D29# H26 MAX6648_OV#
N25 HD#30
D30# HD#31
D31# K25
U3 Y26 HD#32 +VCCP +VCCP
<5> HADSTB0# ADSTB0# D32#
AE5 AA24 HD#33
<5> HADSTB1# ADSTB1# D33#
B T25 HD#34 B
D34# HD#35
D35# U23
R2 V23 HD#36 R617
<5> HREQ#0 REQ0# D36#
P3 R24 HD#37 R618 330_4
<5> HREQ#1 REQ1# D37#
T2 R26 HD#38 56_4
<5> HREQ#2 REQ2# D38#
P1 R23 HD#39
<5> HREQ#3 REQ3# D39#
T1 AA23 HD#40
<5> HREQ#4 REQ4# D40#
U26 HD#41
D41# HD#42
D42# V24

2
N2 ERROR U25 HD#43
<5> ADS# ADS# D43#
SIGNALS V26 HD#44 R619
D44# HD#45 THERMTRIP#_PWR
D45# Y23 1 3 1999_SHT# <35>
AA26 HD#46
IERR# D46# HD#47 330_4 Q53 MMBT3904
A4 IERR# D47# Y25
AB25 HD#48
D48# HD#49
<5> HBREQ0# N4 BREQ0# D49# AC23 CPU junction temp up to 125 degree C
J3 ARBITRATION AB24 HD#50
<5> BPRI# BPRI# D50#
L1 PHASE AC20 HD#51 output signal. shut down system DEPOP R425, R426, R421, C640 WHEN NO JITP
<5> BNR# BNR# D51#
J2 SIGNALS AC22 HD#52
<5> HLOCK# LOCK# D52#
AC25 HD#53 +VCCP +VCCP
D53# HD#54
<5> HIT# K3 HIT# D54# AD23
K4 SNOOP PHASE AE22 HD#55
<5> HITM# HITM# D55#
L4 SIGNALS AF23 HD#56
<5> DEFER# DEFER# D56#
AD24 HD#57
BPM0# D57# HD#58 R422 R426 R428
C8 BPM0# D58# AF20
BPM1# B8 RESPONSE AE21 HD#59 54.9/F_4 *54.9/F_4 39.2/F_4
BPM2# BPM1# PHASE D59# HD#60
A9 BPM2# D60# AD21 JITP CONN
BPM3# C9 SIGNALS AF25 HD#61 +VCCP +3V_S5
BPM3# D61# HD#62
<5> HTRDY# M3 TRDY# D62# AF22
C H1 AF26 HD#63 C
<5> RS#0 RS0# D63#
+VCCP K1 TDI T177 T171
<5> RS#1 RS1#
L2 TMS T173
<5> RS#2 RS2#

2
C640 R409
A20M# C2 C23 TDO T166
<18> A20M# A20M# DSTBN0# HDSTBN0# <5>
FERR# D3 PC C22 TRST# T176 *.1U_4 150_4
<18> FERR# HDSTBP0# <5>

1
R429 IGNNE# FERR# COMPATIBILITY DSTBP0# R425 *22.6/F_4
<18> IGNNE# A3 IGNNE# DSTBN1# K24 HDSTBN1# <5>
CPUPWRGD E4 SIGNALS L24
<18> CPUPWRGD PWRGOOD DSTBP1# HDSTBP1# <5>
150_4 SMI# B4 W25 CPURST# T162 T157 DBR#
<18> SMI# SMI# DSTBN2# HDSTBN2# <5>
W24 R421 *22.6/F_4
DSTBP2# HDSTBP2# <5>
TCK A13 AE24
TCK DSTBN3# HDSTBN3# <5>
TDO A12 DIAGNOSTIC AE25 TCK T178
TDO DSTBP3# HDSTBP3# <5>
TDI TDI C12 & TEST
TMS TDI SIGNALS
C11 TMS TCK NO STUB
TRST# B13 D25 T155 BPM0#
TRST# DINV0# HDBI0# <5>
T180 A16 J26 T156 BPM1#
ITP_CLK0 DINV1# HDBI1# <5>
T179 A15 T24 T158 BPM2#
ITP_CLK1 DINV2# HDBI2# <5>
PREQ# B10 AD20 T160 BPM3#
PREQ# DINV3# HDBI3# <5>
PRDY# A10 T163 PRDY#
DBR# PRDY# T161 PREQ#
<19> DBR# A7 DBR# DBSY# M2 DBSY# <5>
DRDY# H2 DRDY# <5>
<18> INTR D1 LINT0
D4 EXECUTION
<18> NMI LINT1
STPCLK# C6 CONTROL B14
<18> STPCLK# STPCLK# BCLK1 HCLK_CPU# <2>
CPUSLP# A6 SIGNALS B15
<5,18> CPUSLP# SLP# BCLK0 HCLK_CPU <2>
DPSLP# B7 close to ITP conn
G1: NC for Dothan and <18> DPSLP# DPSLP#
<18> DPRSLP# G1 DPRSTP#
DPRSTP# for Yonah TCK R430 27.4/F_4
THERMDA B18 B5 CPUINIT# TRST# R427 680_4
THERMDA INIT# CPUINIT# <18>
D THERMDC A18 D
THERMDC CPURST#
RESET# B11 CPURST# <5>
R441 *0_4 THERMTRIP#_PWR C17
<6,18> THERMTRIP# THERMTRIP# THERMAL DIODE C19
+VCCP
R436 56_4
CPU_PROCHOT# B17 PROCHOT#
DPWR# DPWR# <5>

close to CPU
QUANTA
+VCCP
Dothan Processor
Title
COMPUTER
IERR# R393 56_4 Dothan Processor (HOST)
CPUPWRGD R402 200/F_4
Size Document Number Rev
ZL3 C

Date: Tuesday, March 29, 2005 Sheet 3 of 40


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+VCCP
+VCCP U31C
U31B
VSS120 W23
D10 VCCP0 VSS121 W26
COMP0 Place voltage COMP0 P25 A2 D12 Y2
COMP1 COMP1 COMP0 VSS00 VCCP1 VSS122
divider within P26 COMP1 VSS01 A5 D14 VCCP2 VSS123 Y5
COMP2 R455 COMP2 AB2 A8 D16 Y21
COMP3 0.5" of GTLREF COMP3 COMP2 VSS02 VCCP3 VSS124
AB1 A11 E11 Y24
1K/F pin
COMP3 VSS03
A14 E13
VCCP4 Dothan VSS125
AA1
A
R458 R457 R132 R124 GTLREF0 AD26
Dothan VSS04
VSS05 A17 E15
VCCP5
VCCP6
VSS126
VSS127 AA4 A
GTLREF0 VSS06 A20 F10 VCCP7 3 OF 3 VSS128 AA6
27.4/F_4 54.9/F_4 27.4/F_4 54.9/F_4
2 OF 3 VSS07 A23
A26
F12
F14
VCCP8 VSS129 AA8
AA10
R456 TEST1 VSS08 VCCP9 VSS130
C5 TEST1 VSS09 B3 F16 VCCP10 VSS131 AA12
TEST2 F23 B6 K6 POWER, GROUND AND NC AA14
2K/F_4 TEST2 VSS10 VCCP11 VSS132
VSS11 B9 L5 VCCP12 VSS133 AA16
R407 R459 B12 L21 AA18
*1K_4 *1K_4 T152 VSS12 VCCP13 VSS134
B2 NC1 VSS13 B16 M6 VCCP14 VSS135 AA20
Place pulldown resistors within VSS14 B19 M22 VCCP15 VSS136 AA22
T153 C3 B22 N5 AA25
0.5" of COMP pins AF7
RSVD2 VSS15
B25 N21
VCCP16 VSS137
AB3
RSVD3 POWER, VSS16 VCCP17 VSS138
AC1 RSVD4 VSS17 C1 P6 VCCP18 VSS139 AB5
T181 E26 GROUND, C4 P22 AB7
RSVD5 RESERVED VSS18 VCCP19 VSS140
VSS19 C7 R5 VCCP20 VSS141 AB9
SIGNALS C10 R21 AB11
T182 VSS20 VCCP21 VSS142
AC26 VCCA3 VSS21 C13 T6 VCCP22 VSS143 AB13
T128 N1 C15 T22 AB15
CPU_VCCA T151 VCCA2 VSS22 VCCP23 VSS144
B1 VCCA1 VSS23 C18 U21 VCCP24 VSS145 AB17
CPU_VCCA F26 C21 AB19
VCCA0 VSS24 VSS146
2

1
C702 C24 P23 AB21
C704 R462 VCC_CORE VSS25 VCCQ0 VSS147
+1.5V VSS26 D2 W4 VCCQ1 VSS148 AB23
.01U/16V_4 10U_6.3V 0_8 D5 AB26
1

2
VSS27 VSS149
D6 VCC00 VSS28 D7 VSS150 AC2
Del. R461 cancel reserve +1.8V D8 VCC01 VSS29 D9 <34> CPU_VID0 E2 VID0 VSS151 AC5
D18 VCC02 VSS30 D11 <34> CPU_VID1 F2 VID1 VSS152 AC8
D20 VCC03 VSS31 D13 <34> CPU_VID2 F3 VID2 VSS153 AC10
D22
E5
VCC04
VCC05
VSS32
VSS33
D15
D17
<34>
<34>
CPU_VID3
CPU_VID4
G3
G4
VID3
VID4
VID VSS154
VSS155
AC12
AC14
B E7 VCC06 VSS34 D19 <34> CPU_VID5 H4 VID5 VSS156 AC16 B
E9 VCC07 VSS35 D21 VSS157 AC18
E17 VCC08 VSS36 D23 VSS158 AC21
VCC_CORE VCC_CORE E19 D26 AC24
VCC09 VSS37 VSS159
E21 VCC10 VSS38 E3 VSS160 AD1
F6 E6 T159 Z0501 AE7 AD4
VCC11 VSS39 Z0502 VCCSENSE VSS161
F8 VCC12 VSS40 E8 T154 AF6 VSSSENSE VSS162 AD7
F18 VCC13 VSS41 E10 <2,6> SELPSB2_CLK VSS163 AD9
F20 VCC14 VSS42 E12 <2,6> SELPSB1_CLK VSS164 AD11
1

1
C262 C250 C328 C286 C298 C255 C649 C656 C310 C683 F22 E14 0_4 AD13
VCC15 VSS43 SELPSB2_CLK 1 VSS165
G5 VCC16 VSS44 E16 2 R433 BSEL0 C16 BSEL0 VSS166 AD15
10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V G21 E18 SELPSB1_CLK 1 2 BSEL1 C14 AD17
2

2
VCC17 VSS45 R432 BSEL1 VSS167
H6 VCC18 VSS46 E20 VSS168 AD19
H22 E22 0_4 AD22
VCC19 VSS47 VSS169
J5 VCC20 VSS48 E25 T146 E1 PSI VSS170 AD25
J21 VCC21 VSS49 F1 VSS171 AE3
VCC_CORE VCC_CORE K22 F4 R6 AE6
VCC22 VSS50 VSS100 VSS172
U5 VCC23 VSS51 F5 DOTHAN-A NC R22 VSS101 VSS173 AE8
V6 F7 R25 AE10
V22
VCC24 VSS52
F9 DOTHAN-B POP T3
VSS102 VSS174
AE12
VCC25 VSS53 VSS103 VSS175
1

C325 C320 C281 C294 C300 C313 C322 C329 C321 C684 W5 F11 T5 AE14
VCC26 VSS54 VSS104 VSS176
10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V
W21 VCC27 VSS55 F13 Bus speed select T21 VSS105 VSS177 AE16
10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V Y6 F15 T23 AE18
2

VCC28 VSS56 VSS106 VSS178


Y22 VCC29 VSS57 F17 T26 VSS107 VSS179 AE20
AA5 VCC30 VSS58 F19 U2 VSS108 VSS180 AE23
AA7 VCC31 VSS59 F21 U6 VSS109 VSS181 AE26
AA9 VCC32 VSS60 F24 U22 VSS110 VSS182 AF2
VCC_CORE VCC_CORE AA11 G2 U24 AF5
VCC33 VSS61 VSS111 VSS183
AA13 VCC34 VSS62 G6 V1 VSS112 VSS184 AF9
C AA15 VCC35 VSS63 G22 V4 VSS113 VSS185 AF11 C
AA17 VCC36 VSS64 G23 V5 VSS114 VSS186 AF13
1

C672 C301 C309 C671 C653 C663 C668 C659 C305 C657 AA19 G26 V21 AF15
VCC37 VSS65 VSS115 VSS187
AA21 VCC38 VSS66 H3 V25 VSS116 VSS188 AF17
10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V AB6 H5 W3 AF19
2

VCC39 VSS67 VSS117 VSS189


AB8 VCC40 VSS68 H21 W6 VSS118 VSS190 AF21
AB10 VCC41 VSS69 H25 W22 VSS119 VSS191 AF24
AB12 VCC42 VSS70 J1
AB14 VCC43 VSS71 J4
VCC_CORE AB16 J6
VCC44 VSS72 Dothan Processor
AB18 VCC45 VSS73 J22
AB20 VCC46 VSS74 J24
AB22 VCC47 VSS75 K2
2

C660 C292 C666 C279 C299 AC9 K5


VCC48 VSS76
AC11 VCC49 VSS77 K21
10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V 10U_6.3V AC13 K23
1

VCC50 VSS78
AC15 VCC51 VSS79 K26
AC17 VCC52 VSS80 L3
AC19 VCC53 VSS81 L6
AD8 VCC54 VSS82 L22
AD10 VCC55 VSS83 L25
AD12 VCC56 VSS84 M1
AD14 VCC57 VSS85 M4
AD16 M5
Total caps = 2633 uF AD18
VCC58
VCC59
VSS86
VSS87 M21
AE9 M24
ESR = 15m ohm/5 // 5m ohm/25 // 5m ohm/15 AE11
VCC60
VCC61
VSS88
VSS89 N3
AE13 VCC62 VSS90 N6
AE15 VCC63 VSS91 N22
D AE17 VCC64 VSS92 N23 D
AE19 VCC65 VSS93 N26
+VCCP AF8 P2
+VCCP VCC66 VSS94
AF10 P5
AF12
AF14
VCC67
VCC68
VSS95
VSS96 P21
P24
QUANTA
VCC69 VSS97
AF16 VCC70 VSS98 R1
COMPUTER
1

C351 C304 C681 C327 C652 C651 C285 C307 C650 C678 C682 AF18 R4
+ VCC71 VSS99 Title
150U/4V .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 Dothan Processor (POWER)
2

<Type> Dothan Processor


2

CC3528 Size Document Number Rev


.1U_4 .1U_4 ZL3 C

Date: Wednesday, March 30, 2005 Sheet 4 of 40


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U34E
AF23 VSS136 VSS0 AG37
H23 VSS137 VSS1 Y37
AL22 VSS138 VSS2 V37
AH22 VSS139 VSS3 T37
J22 VSS140 VSS4 P37
E22 VSS141 VSS5 M37
D22 VSS142 VSS6 K37
A22 VSS143 VSS7 H37
AN21 VSS144 VSS8 E37
AF21 VSS145 VSS9 AN36
F21 VSS146 VSS10 AL36
C21 VSS147 VSS11 AJ36 U34A
A
AK20 VSS148 VSS12 AF36 A
V20 AE36 HXRCOMP HD#[0..63] HA#[3..31]
VSS149 VSS13 <3> HD#[0..63] HA#[3..31] <3>
G20 AD36 HD#0 E4 G9 HA#3
VSS150 VSS14 HD#1 HD0# HA3# HA#4
F20 VSS151 VSS15 AC36 E1 HD1# HA4# C9
E20 AB36 R434 HD#2 F4 E9 HA#5
VSS152 VSS16 HD#3 HD2# HA5# HA#6
D20 VSS153 VSS17 AA36 H7 HD3# HA6# B7
A20 C36 24.9/F_4 HD#4 E2 A10 HA#7
VSS154 VSS18 HD#5 HD4# HA7# HA#8
AN19 VSS155 VSS19 AE35 F1 HD5# HA8# F9
AG19 Y35 HD#6 E3 D8 HA#9
VSS156 VSS20 HD#7 HD6# HA9# HA#10
W19 VSS157 VSS21 W35 D3 HD7# HA10# B10
T19 V35 HD#8 K7 E10 HA#11
VSS158 VSS22 HD#9 HD8# HA11# HA#12
J19 VSS159 VSS23 U35 F2 HD9# HA12# G10
H19 T35 +VCCP HD#10 J7 D9 HA#13
VSS160 VSS24 HD#11 HD10# HA13# HA#14
C19 VSS161 VSS25 R35 J8 HD11# HA14# E11
AL18 P35 HD#12 H6 F10 HA#15
VSS162 VSS26 HD#13 HD12# HA15# HA#16
U18 VSS163 VSS27 N35 F3 HD13# HA16# G11
B18 M35 R150 HD#14 K8 G13 HA#17
VSS164 VSS28 HD#15 HD14# HA17# HA#18
A18 VSS165 VSS29 L35 H5 HD15# HA18# C10
AN17 K35 54.9/F_4 HD#16 H1 C11 HA#19
VSS166 VSS30 HD#17 HD16# HA19# HA#20
AJ17 VSS167 VSS31 J35 H2 HD17# HA20# D11
AF17 H35 HXSCOMP HD#18 K5 C12 HA#21
VSS168 VSS32 HD#19 HD18# HA21# HA#22
G17 VSS169 VSS33 G35 K6 HD19# HA22# B13
C17 F35 HD#20 J4 A12 HA#23
VSS170 VSS34 +VCCP HD#21 HD20# HA23# HA#24 +VCCP
AL16 VSS171 VSS35 E35 G3 HD21# HA24# F12
K16 D35 HD#22 H3 G12 HA#25
VSS172 VSS36 HD#23 HD22# HA25# HA#26
H16 VSS173 VSS37 B35 J1 HD23# HA26# E12
D16 AN34 HD#24 L5 C13 HA#27
VSS174 VSS38 HD#25 HD24# HA27# HA#28
A16 VSS175 VSS39 AH34 K4 HD25# HA28# B11
K15 AD34 R438 HD#26 J5 D13 HA#29
VSS176 VSS40 HD#27 HD26# HA29# HA#30 R178
C15 VSS177 VSS41 AC34 P7 HD27# HA30# A13
AN14 AB34 221/F_4 HD#28 L7 F13 HA#31 100/F_4
VSS178 VSS42 HD#29 HD28# HA31#
AL14 VSS179 VSS43 AA34 J3 HD29#
AJ14 C34 HXSWING HD#30 P5 F8
VSS180 VSS44 HD30# HADS# ADS# <3>
AG14 AL33 HD#31 L3 B9
VSS181 VSS45 HD31# HADSTB0# HADSTB0# <3>
K14 AF33 HD#32 U7 E13
VSS182 VSS46 HD32# HADSTB1# HADSTB1# <3>

2
J14 AD33 R437 C665 HD#33 V6 J11 HVREF
VSS183 VSS47 HD#34 HD33# HVREF
F14 VSS184 VSS48 W33 R6 HD34# HBNR# A5 BNR# <3>
B14 V33 100/F_4 .1U_4 HD#35 R5 D5 BPRI# <3>

1
VSS185 VSS49 HD#36 HD35# HBPRI#
B A14 U33 P3 E7 B

HOST
VSS186 VSS50 HD36# BREQ0# HBREQ0# <3>

2
J12 T33 HD#37 T8 H10 R173 C331
VSS187 VSS51 HD37# HCPURST# CPURST# <3>
D12 R33 HD#38 R7
VSS188 VSS52 HD#39 HD38# 200/F_4
B12 P33 R8 .1U_4

1
VSS189 VSS53 HD#40 HD39#
AN11 VSS190 VSS54 N33 U8 HD40#
AL11 M33 HYRCOMP HD#41 R4 AB1
VSS191 VSS55 HD41# HCLKINN HCLK_MCH# <2>
AJ11 L33 HD#42 T4 AB2
VSS192 VSS56 HD42# HCLKINP HCLK_MCH <2>
AG11 K33 HD#43 T5
VSS193 VSS57 HD#44 HD43#
AF11 VSS194 VSS58 J33 R1 HD44# HDBSY# C6 DBSY# <3>
AA11 H33 R454 HD#45 T3 E6
VSS195 VSS59 HD45# HDEFER# DEFER# <3>
Y11 G33 HD#46 V8 H8
VSS196 VSS60 HD46# HDINV#0 HDBI0# <3>
H11 F33 24.9/F_4 HD#47 U6 K3
VSS197 VSS61 HD47# HDINV#1 HDBI1# <3>
F11 E33 HD#48 W6 T7
VSS198 VSS62 HD48# HDINV#2 HDBI2# <3>
AA10 D33 HD#49 U3 U5
VSS199 VSS63 HD49# HDINV#3 HDBI3# <3>
Y10 AN32 HD#50 V5 G6
VSS200 VSS64 HD50# HDPWR# DPWR# <3>
L10 AJ32 HD#51 W8 F7
VSS201 VSS65 HD51# HDRDY# DRDY# <3>
D10 AD32 HD#52 W7 G4
VSS202 VSS66 HD52# HDSTBN0# HDSTBN0# <3>
AN9 AC32 HD#53 U2 K1
VSS203 VSS67 HD53# HDSTBN1# HDSTBN1# <3>
AH9 AB32 +VCCP HD#54 U1 R3
VSS204 VSS68 HD54# HDSTBN2# HDSTBN2# <3>
AE9 AA32 HD#55 Y5 V3
VSS205 VSS69 HD55# HDSTBN3# HDSTBN3# <3>
AC9 Y32 HD#56 Y2 G5
VSS

VSS206 VSS70 HD56# HDSTBP0# HDSTBP0# <3>


AA9 C32 HD#57 V4 K2
VSS207 VSS71 HD57# HDSTBP1# HDSTBP1# <3>
V9 A32 R451 HD#58 Y7 R2
VSS208 VSS72 HD58# HDSTBP2# HDSTBP2# <3>
T9 AL31 HD#59 W1 W4
VSS209 VSS73 HD59# HDSTBP3# HDSTBP3# <3>
K9 AG31 54.9/F_4 HD#60 W3 F6 T60
VSS210 VSS74 HD#61 HD60# HEDRDY# *PAD
H9 VSS211 VSS75 AD31 Y3 HD61# HHIT# D4 HIT# <3>
A9 W31 HYSCOMP HD#62 Y6 D6
VSS212 VSS76 HD62# HHITM# HITM# <3>
AL8 V31 HD#63 W2 B3
VSS213 VSS77 HD63# HLOCK# HLOCK# <3>
Y8 U31 A11 T170
VSS214 VSS78 +VCCP HXRCOMP HPCREQ# *PAD
P8 VSS215 VSS79 T31 C1 HXRCOMP HREQ0# A7 HREQ#0 <3>
L8 R31 HXSCOMP C2 D7
VSS216 VSS80 HXSCOMP HREQ1# HREQ#1 <3>
E8 P31 HXSWING D1 B8
VSS217 VSS81 HXSWING HREQ2# HREQ#2 <3>
C8 N31 HYRCOMP T1 C7
VSS218 VSS82 HYRCOMP HREQ3# HREQ#3 <3>
AN7 M31 HYSCOMP L1 A8
VSS219 VSS83 HYSCOMP HREQ4# HREQ#4 <3>
AK7 L31 R453 HYSWING P1 A4
VSS220 VSS84 HYSWING HRS0# RS#0 <3>
AG7 VSS221 VSS85 K31 HRS1# C5 RS#1 <3>
AA7 J31 221/F_4 B4 R162
VSS222 VSS86 HRS2# RS#2 <3>
V7 H31 G8 HCPUSLP#_GMCH 1 2
C VSS223 VSS87 HCPUSLP# CPUSLP# <3,18> C
G7 G31 HYSWING B5
VSS224 VSS88 HTRDY# HTRDY# <3>
AJ6 F31 0_4
VSS225 VSS89
AE6 VSS226 VSS90 E31
2

AC6 D31 R452 C690


VSS227 VSS91 @ALVISO_GM/GML
AA6 VSS228 VSS92 AP30 DO NOT INSTALL FOR DOTHAN-A AND INSTALL FOR DOTHAN-B
T6 AE30 100/F_4 .1U_4
1

VSS229 VSS93
P6 VSS230 VSS94 AC30
L6 VSS231 VSS95 AB30
J6 VSS232 VSS96 AA30
B6 VSS233 VSS97 Y30
AP5 VSS234 VSS98 C30
AL5 VSS235 VSS99 AM29
W5 VSS236 VSS100 AJ29
E5 VSS237 VSS101 AG29
AN4 VSS238 VSS102 AD29
AF4 VSS239 VSS103 AA29
Y4 VSS240 VSS104 W29
U4 VSS241 VSS105 V29
P4 VSS242 VSS106 U29
L4 VSS243 VSS107 P29
H4 VSS244 VSS108 L29
C4 VSS245 VSS109 H29
AJ3 VSS246 VSS110 G29
AC3 VSS247 VSS111 F29
AB3 VSS248 VSS112 E29
AA3 VSS249 VSS113 D29
C3 VSS250 VSS114 A29
A3 VSS251 VSS115 AC28
AN2 VSS252 VSS116 AB28
AL2 VSS253 VSS117 AA28
AH2 VSS254 VSS118 W28
AE2 VSS255 VSS119 E28
AD2 VSS256 VSS120 AN27
V2 VSS257 VSS121 AL27
T2 VSS258 VSS122 AJ27
P2 VSS259 VSS123 AG27
L2 VSS260 VSS124 AF27
D B27 VSS261 VSS125 AB27 D
J26 VSS262 VSS126 AA27
G26 VSS263 VSS127 W27
E26 VSS264 VSS128 G27
A26 VSS265 VSS129 E27
AN24 VSS266 VSS130 AJ24
AL24 VSS267 VSS131 AG24
J2 J24
G2
D2
VSS268
VSS269
VSS132
VSS133 F24
D24
QUANTA
VSS270 VSS134
Y1

B36
VSS271 VSS135 B24

Title
COMPUTER
VSSALVDS Alviso (Host)
@ALVISO_GM/GML Size Document Number Rev
C ZL3 C

Date: Tuesday, March 29, 2005 Sheet 5 of 40


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

CFG3 R168 FOR DDR533 GMCHEXP_TXP[0..15]


<11> GMCHEXP_TXP[0..15]
*1K_4
CFG[0:2]=100 FOR FSB 533 GMCHEXP_TXN[0..15]
<11> GMCHEXP_TXN[0..15]
CFG[0:2]=101 FOR FSB 400 GMCHEXP_RXP[0..15]
<11,15> GMCHEXP_RXP[0..15]
GMCHEXP_RXN[0..15] VCC3G_PCIE
<11,15> GMCHEXP_RXN[0..15]
+VCCP
U34C R174 4.7K_4 U34F R158 24.9/F_4
AA31 G16 CFG0 1 2 H24 D36 1 2
<19> DMI_TXN0 DMIRXN0 CFG0 <15> SDVO_CTRLDATA SDVOCTRL_DATA EXP_COMPI

MISC
AB35 H13 R164 1K_4 H25 D34
<19> DMI_TXN1 DMIRXN1 CFG1 SELPSB1_CLK <2,4> <15> SDVO_CTRLCLK SDVOCTRL_CLK EXP_ICOMPO
AC31 G14 R167 1K_4 AB29
<19> DMI_TXN2 DMIRXN2 CFG2 SELPSB2_CLK <2,4> <2> CLK_MCH_3GPLL# GCLKN
A AD35 F16 CFG3 T56 AC29 E30 GMCHEXP_RXN0 A
<19> DMI_TXN3 DMIRXN3 CFG3 <2> CLK_MCH_3GPLL GCLKP EXP_RXN0
F15 CFG4 F34 GMCHEXP_RXN1
CFG4 CFG5 R166 *1K_4 EXP_RXN1 GMCHEXP_RXN2
CFG5 G15 CFG5 Low=DMIx2 EXP_RXN2 G30
Y31 E16 CFG6 R157 INT_TV_COMP A15 H34 GMCHEXP_RXN3
<19> DMI_TXP0 DMIRXP0 CFG6 High=DMIx4 <16> INT_TV_COMP TVDAC_A EXP_RXN3
AA35 D17 CFG7 T50 1K_4 INT_TV_Y/G C16 J30 GMCHEXP_RXN4
<19> DMI_TXP1 DMIRXP1 CFG7 <16> INT_TV_Y/G TVDAC_B EXP_RXN4
AB31 J16 CFG8 T70 CFG6 Low=DDR2 INT_TV_C/R A17 K34 GMCHEXP_RXN5
<19> DMI_TXP2 DMIRXP2 CFG8 <16> INT_TV_C/R TVDAC_C EXP_RXN5

TV
AC35 D15 CFG9 R153 TV_REFSET J18 L30 GMCHEXP_RXN6
<19> DMI_TXP3 DMIRXP3 CFG9 High=DDR TV_REFSET EXP_RXN6
E15 CFG10 T58 *1K_4 B15 M34 GMCHEXP_RXN7
CFG10 CFG11 R161 R169 4.99K/F TV_IRTNA EXP_RXN7 GMCHEXP_RXN8
CFG11 D14 B16 TV_IRTNB EXP_RXN8 N30
AA33 E14 CFG12 T52 1K_4 CFG9 Low=REVERSE LANE B17 P34 GMCHEXP_RXN9
<19> DMI_RXN0 DMITXN0 CFG12 TV_IRTNC EXP_RXN9
AB37 H12 CFG13 T63 R30 GMCHEXP_RXN10
<19> DMI_RXN1 DMITXN1 CFG13 High=NORMAL EXP_RXN10

DMI
AC33 C14 CFG14 T49 T34 GMCHEXP_RXN11
<19> DMI_RXN2 DMITXN2 CFG14 EXP_RXN11
AD37 H15 CFG15 T72 U30 GMCHEXP_RXN12
<19> DMI_RXN3 DMITXN3 CFG15 EXP_RXN12
J15 CFG16 T69 CFG11 FOR CPU533 V34 GMCHEXP_RXN13
CFG16 CFG17 EXP_RXN13 GMCHEXP_RXN14
CFG17 H14 T67 EXP_RXN14 W30
Y33 G22 CFG18 T66 E24 Y34 GMCHEXP_RXN15
<19> DMI_RXP0 DMITXP0 CFG18 <17> INT_DDCCLK DDCCLK EXP_RXN15

CFG/RSVD
AA37 G23 CFG19 T59 E23
<19> DMI_RXP1 DMITXP1 CFG19 <17> INT_DDCDAT DDCDATA
AB33 D23 CFG20 T55 E21 D30 GMCHEXP_RXP0
<19> DMI_RXP2 DMITXP2 CFG20 <17> INT_VGA_BLU BLUE EXP_RXP0
AC37 G25 T64 D21 E34 GMCHEXP_RXP1
<19> DMI_RXP3 DMITXP3 RSVD21 BLUE# EXP_RXP1
G24 T68 C20 F30 GMCHEXP_RXP2
RSVD22 <17> INT_VGA_GRN GREEN EXP_RXP2

VGA
J17 T71 B20 G34 GMCHEXP_RXP3
RSVD23 GREEN# EXP_RXP3 GMCHEXP_RXP4
<9> CLK_SDRAM0 AM33 SM_CK0 RSVD24 A31 T169 <17> INT_VGA_RED A19 RED EXP_RXP4 H30
AL1 A30 T168 B19 J34 GMCHEXP_RXP5
<9> CLK_SDRAM1 SM_CK1 RSVD25 RED# EXP_RXP5
CLK_SDRAM2 AE11 D26 H21 K30 GMCHEXP_RXP6
T79 SM_CK2 RSVD26 T54 <17> INT_VSYNC VSYNC EXP_RXP6
AJ34 D25 G21 L34 GMCHEXP_RXP7

PCI-EXPRESS GRAPHICS
<9> CLK_SDRAM3 SM_CK3 RSVD27 T51 <17> INT_HSYNC HSYNC EXP_RXP7
AF6 REFSET J20 M30 GMCHEXP_RXP8
<9> CLK_SDRAM4 SM_CK4 REFSET EXP_RXP8
T74 CLK_SDRAM5 AC10 N34 GMCHEXP_RXP9
SM_CK5 R176 255/F_4 EXP_RXP9 GMCHEXP_RXP10
EXP_RXP10 P30
DDR MUXING

AN33 CFG[17:3] have internal pullup resistors. R34 GMCHEXP_RXP11


<9> CLK_SDRAM0# SM_CK0# EXP_RXP11
B AK1 T30 GMCHEXP_RXP12 B
<9> CLK_SDRAM1# SM_CK1# CFG[19:18] have internal pulldown resistors EXP_RXP12
T78 CLK_SDRAM2# AE10 T57 U34 GMCHEXP_RXP13
SM_CK2# EXP_RXP13 GMCHEXP_RXP14
<9> CLK_SDRAM3# AJ33 SM_CK3# E25 LBKLT_CTRL EXP_RXP14 V30
AF5 INT_BLON F25 W34 GMCHEXP_RXP15
<9> CLK_SDRAM4# SM_CK4# LBKLT_EN EXP_RXP15
CLK_SDRAM5# AD10 T47 C23
T73 SM_CK5# LCTLA_CLK
J23 T48 C22 E32 CGMCHEXP_TXN0 E@.1U_4 C626 GMCHEXP_TXN0
BM_BUSY# PM_BMBUSY# <19> LCTLB_DATA EXP_TXN0
CKE0 AP21 J21 PM_EXTTS#0 F23 F36 CGMCHEXP_TXN1 E@.1U_4 C667 GMCHEXP_TXN1
<9,10> CKE0 SM_CKE0 EXT_TS0# <16> I_EDIDCLK LDDC_CLK EXP_TXN1
CKE1 AM21 H22 PM_EXTTS#1 F22 G32 CGMCHEXP_TXN2 E@.1U_4 C619 GMCHEXP_TXN2
<9,10> CKE1 SM_CKE1 EXT_TS1# <16> I_EDIDDATA LDDC_DATA EXP_TXN2

LVDS
PM

CKE2 AH21 F5 R177 0_4 INT_DISP_ON F26 H36 CGMCHEXP_TXN3 E@.1U_4 C673 GMCHEXP_TXN3
<9,10> CKE2 SM_CKE2 THRMTRIP# THERMTRIP# <3,18> LVDD_EN EXP_TXN3
CKE3 AK21 AD30 C33 J32 CGMCHEXP_TXN4 E@.1U_4 C613 GMCHEXP_TXN4
<9,10> CKE3 SM_CKE3 PWROK IMVP_PWRGD <19,34> LIBG EXP_TXN4
AE29 1 2 T53 C31 K36 CGMCHEXP_TXN5 E@.1U_4 C685 GMCHEXP_TXN5
SM_CS0# RSTIN# R460 100 PLTRST# <11,15,18,21,29,31,32,33> R156 1.5K/F LVBG EXP_TXN5 CGMCHEXP_TXN6 E@.1U_4 C605 GMCHEXP_TXN6
<9,10> SM_CS0# AN16 SM_CS0# T62 F28 LVREFH EXP_TXN6 L32
SM_CS1# AM14 A24 DOT96# T61 F27 M36 CGMCHEXP_TXN7 E@.1U_4 C689 GMCHEXP_TXN7
<9,10> SM_CS1# SM_CS1# DREF_CLKN DOT96# <2> LVREFL EXP_TXN7
SM_CS2# AH15 A23 DOT96 N32 CGMCHEXP_TXN8 E@.1U_4 C599 GMCHEXP_TXN8
<9,10> SM_CS2# SM_CS2# DREF_CLKP DOT96 <2> EXP_TXN8
LCK

SM_CS3# AG16 C37 DREFSSCLK# INT_TXLCLKOUT- B30 P36 CGMCHEXP_TXN9 E@.1U_4 C692 GMCHEXP_TXN9
<9,10> SM_CS3# SM_CS3# DREF_SSCLKN DREFSSCLK# <2> LACLKN EXP_TXN9
D37 DREFSSCLK INT_TXLCLKOUT+ B29 R32 CGMCHEXP_TXN10 E@.1U_4 C594 GMCHEXP_TXN10
DREF_SSCLKP DREFSSCLK <2> LACLKP EXP_TXN10
M_OCDCOMP0 AF22 INT_TXUCLKOUT- C25 T36 CGMCHEXP_TXN11 E@.1U_4 C695 GMCHEXP_TXN11
M_OCDCOMP1 SM_OCDCOMP0 TP_NC1 INT_TXUCLKOUT+ LBCLKN EXP_TXN11 CGMCHEXP_TXN12 E@.1U_4 C592 GMCHEXP_TXN12
AF16 SM_OCDCOMP1 NC1 AP37 T187 C24 LBCLKP EXP_TXN12 U32
AN37 TP_NC2 T183 V36 CGMCHEXP_TXN13 E@.1U_4 C698 GMCHEXP_TXN13
NC2 EXP_TXN13
1

AP14 AP36 TP_NC3 T186 INT_TXLOUT0- B34 W32 CGMCHEXP_TXN14 E@.1U_4 C590 GMCHEXP_TXN14
<9,10> M_ODT0 SM_ODT0 NC3 LADATAN0 EXP_TXN14
R186 AL15 AP2 TP_NC4 T185 INT_TXLOUT1- B33 Y36 CGMCHEXP_TXN15 E@.1U_4 C587 GMCHEXP_TXN15
<9,10> M_ODT1 SM_ODT1 NC4 LADATAN1 EXP_TXN15
*40.2/F_4 AM11 AP1 TP_NC5 T184 R147 150/F_4 INT_TXLOUT2- B32
<9,10> M_ODT2 SM_ODT2 NC5 LADATAN2
AN10 AN1 TP_NC6 T188 1 2 INT_TV_C/R D32 CGMCHEXP_TXP0 E@.1U_4 C628 GMCHEXP_TXP0
<9,10> M_ODT3 SM_ODT3 NC6 EXP_TXP0
NC

R184 B1 TP_NC7 T175 R148 150/F_4 INT_TXLOUT0+ A34 E36 CGMCHEXP_TXP1 E@.1U_4 C664 GMCHEXP_TXP1
2

*40.2/F_4 M_RCOMPN NC7 TP_NC8 INT_TV_COMP INT_TXLOUT1+ LADATAP0 EXP_TXP1 CGMCHEXP_TXP2 E@.1U_4 C624 GMCHEXP_TXP2
AK10 SMRCOMPN NC8 A2 T167 1 2 A33 LADATAP1 EXP_TXP2 F32
M_RCOMPP AK11 B37 TP_NC9 T172 R151 150/F_4 INT_TXLOUT2+ B31 G36 CGMCHEXP_TXP3 E@.1U_4 C669 GMCHEXP_TXP3
SMRCOMPP NC9 INT_TV_Y/G LADATAP2 EXP_TXP3 CGMCHEXP_TXP4 E@.1U_4 C616 GMCHEXP_TXP4
Route as short +0.9VSUS AF37 SMVREF0 NC10 A36 1 2 EXP_TXP4 H32
as possible. AD1 A37 INT_TXUOUT0- C29 J36 CGMCHEXP_TXP5 E@.1U_4 C679 GMCHEXP_TXP5
SMXSLEW SMVREF1 NC11 INT_TXUOUT1- LBDATAN0 EXP_TXP5 CGMCHEXP_TXP6 E@.1U_4 C608 GMCHEXP_TXP6
AE27 SMXSLEWIN D28 LBDATAN1 EXP_TXP6 K32
C
It's point to point, AE28 INT_TXUOUT2- C27 L36 CGMCHEXP_TXP7 E@.1U_4 C686 GMCHEXP_TXP7 C
55ohm trace, keep as SMYSLEW SMXSLEWOUT R143 150/F_4 LBDATAN2 EXP_TXP7 CGMCHEXP_TXP8 E@.1U_4 C601 GMCHEXP_TXP8
AF9 SMYSLEWIN EXP_TXP8 M32
short as possible. INT_VGA_RED INT_TXUOUT0+ CGMCHEXP_TXP9 E@.1U_4 C691 GMCHEXP_TXP9
For DDR2 AF10 SMYSLEWOUT 1 2 C28 LBDATAP0 EXP_TXP9 N36
R152 150/F_4 INT_TXUOUT1+ D27 P32 CGMCHEXP_TXP10 E@.1U_4 C595 GMCHEXP_TXP10
INT_VGA_GRN INT_TXUOUT2+ LBDATAP1 EXP_TXP10 CGMCHEXP_TXP11 E@.1U_4 C693 GMCHEXP_TXP11
1 2 C26 LBDATAP2 EXP_TXP11 R36
@ALVISO_GM/GML R159 150/F_4 T32 CGMCHEXP_TXP12 E@.1U_4 C593 GMCHEXP_TXP12
+1.8VSUS INT_VGA_BLU EXP_TXP12 CGMCHEXP_TXP13 E@.1U_4 C697 GMCHEXP_TXP13
1 2 EXP_TXP13 U36
V32 CGMCHEXP_TXP14 E@.1U_4 C591 GMCHEXP_TXP14
EXP_TXP14 CGMCHEXP_TXP15 E@.1U_4 C588 GMCHEXP_TXP15
EXP_TXP15 W36
1

R190 +2.5V ID@.1U_4 C629


80.6/F_4 @ALVISO_GM/GML CGMCHEXP_TXP0 2 1 SDVOB_R+ SDVOB_R+ <15>
R171 10K_4 TXLCLKOUT- I@4P2R-S-0 2 1 RN110 INT_TXLCLKOUT- ID@.1U_4 C627
<11,16> TXLCLKOUT-
1 2 PM_EXTTS#0 TXLCLKOUT+ 4 3 INT_TXLCLKOUT+ CGMCHEXP_TXN0 2 1 SDVOB_R- SDVOB_R- <15>
<11,16> TXLCLKOUT+
2

M_RCOMPN TXUCLKOUT- I@4P2R-S-0 2 1 RN9 INT_TXUCLKOUT-


<11,16> TXUCLKOUT-
R170 10K_4 TXUCLKOUT+ 4 3 INT_TXUCLKOUT+ ID@.1U_4 C308
<11,16> TXUCLKOUT+
M_RCOMPP 1 2 PM_EXTTS#1 CGMCHEXP_TXP1 2 1 SDVOB_G+ SDVOB_G+ <15>
ID@.1U_4 C312
1

TXLOUT0- I@4P2R-S-0 2 1 RN107 INT_TXLOUT0- CGMCHEXP_TXN1 2 1 SDVOB_G- SDVOB_G- <15>


<11,16> TXLOUT0-
R188 TXLOUT0+ 4 3 INT_TXLOUT0+
80.6/F_4 <11,16> TXLOUT0+
TXLOUT1- I@4P2R-S-0 2 1 RN108 INT_TXLOUT1- ID@.1U_4 C625
<11,16> TXLOUT1-
TXLOUT1+ 4 3 INT_TXLOUT1+ CGMCHEXP_TXP2 2 1 SDVOB_B+ SDVOB_B+ <15>
<11,16> TXLOUT1+
TXLOUT2- I@4P2R-S-0 2 1 RN109 INT_TXLOUT2- ID@.1U_4 C620
<11,16> TXLOUT2-
2

TXLOUT2+ 4 3 INT_TXLOUT2+ CGMCHEXP_TXN2 2 1 SDVOB_B- SDVOB_B- <15>


<11,16> TXLOUT2+
ID@.1U_4 C318
TXUOUT0- I@4P2R-S-0 4 3 RN12 INT_TXUOUT0- CGMCHEXP_TXP3 2 1 SDVOB_CLK+ SDVOB_CLK+ <15>
<11,16> TXUOUT0-
TXUOUT0+ 2 1 INT_TXUOUT0+ ID@.1U_4 C323
<11,16> TXUOUT0+
TXUOUT1- I@4P2R-S-0 4 3 RN11 INT_TXUOUT1- CGMCHEXP_TXN3 2 1 SDVOB_CLK- SDVOB_CLK- <15>
<11,16> TXUOUT1-
D TXUOUT1+ 2 1 INT_TXUOUT1+ D
<11,16> TXUOUT1+
TXUOUT2- I@4P2R-S-0 4 3 RN10 INT_TXUOUT2-
<11,16> TXUOUT2-
TXUOUT2+ 2 1 INT_TXUOUT2+
<11,16> TXUOUT2+

QUANTA
<11,16> DISP_ON
DISP_ON I@0_4 R134 INT_DISP_ON
Title
COMPUTER
BLON I@0_4 R139 INT_BLON Alviso (VGA,DMI)
<11,16> BLON
Size
CustomDocument Number Rev
ZL3 C

Date: Tuesday, March 29, 2005 Sheet 6 of 40


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

A A
<9> R_A_MD[0..63] U34B <9> R_B_MD[0..63] U34G
R_A_MD0 AG35 AK15 R_A_BS0# R_B_MD0 AE31 AJ15 R_B_BS0#
SADQ0 SA_BS0# R_A_BS0# <9,10> SBDQ0 SB_BS0# R_B_BS0# <9,10>
R_A_MD1 AH35 AK16 R_A_BS1# R_B_MD1 AE32 AG17 R_B_BS1#
SADQ1 SA_BS1# R_A_BS1# <9,10> SBDQ1 SB_BS1# R_B_BS1# <9,10>
R_A_MD2 AL35 AL21 R_A_BS2# R_B_MD2 AG32 AG21 R_B_BS2#
SADQ2 SA_BS2# R_A_BS2# <9,10> SBDQ2 SB_BS2# R_B_BS2# <9,10>
R_A_MD3 AL37 R_B_MD3 AG36
SADQ3 R_A_DM[0..7] <9> SBDQ3 R_B_DM[0..7] <9>
R_A_MD4 AH36 AJ37 R_A_DM0 R_B_MD4 AE34 AF32 R_B_DM0
R_A_MD5 SADQ4 SA_DM0 R_A_DM1 R_B_MD5 SBDQ4 SB_DM0 R_B_DM1
AJ35 SADQ5 SA_DM1 AP35 AE33 SBDQ5 SB_DM1 AK34
R_A_MD6 AK37 AL29 R_A_DM2 R_B_MD6 AF31 AK27 R_B_DM2
R_A_MD7 SADQ6 SA_DM2 R_A_DM3 R_B_MD7 SBDQ6 SB_DM2 R_B_DM3
AL34 SADQ7 SA_DM3 AP24 AF30 SBDQ7 SB_DM3 AK24
R_A_MD8 AM36 AP9 R_A_DM4 R_B_MD8 AH33 AJ10 R_B_DM4
R_A_MD9 SADQ8 SA_DM4 R_A_DM5 R_B_MD9 SBDQ8 SB_DM4 R_B_DM5
AN35 SADQ9 SA_DM5 AP4 AH32 SBDQ9 SB_DM5 AK5
R_A_MD10 AP32 AJ2 R_A_DM6 R_B_MD10 AK31 AE7 R_B_DM6
R_A_MD11 SADQ10 SA_DM6 R_A_DM7 R_B_MD11 SBDQ10 SB_DM6 R_B_DM7
AM31 SADQ11 SA_DM7 AD3 AG30 SBDQ11 SB_DM7 AB7
R_A_MD12 AM34 R_B_MD12 AG34
SADQ12 R_A_DQS[0..7] <9> SBDQ12 R_B_DQS[0..7] <9>
R_A_MD13 AM35 AK36 R_A_DQS0 R_B_MD13 AG33 AF34 R_B_DQS0
R_A_MD14 SADQ13 SA_DQS0 R_A_DQS1 R_B_MD14 SBDQ13 SB_DQS0 R_B_DQS1
AL32 SADQ14 SA_DQS1 AP33 AH31 SBDQ14 SB_DQS1 AK32
R_A_MD15 AM32 AN29 R_A_DQS2 R_B_MD15 AJ31 AJ28 R_B_DQS2
R_A_MD16 SADQ15 SA_DQS2 R_A_DQS3 R_B_MD16 SBDQ15 SB_DQS2 R_B_DQS3
AN31 SADQ16 SA_DQS3 AP23 AK30 SBDQ16 SB_DQS3 AK23
R_A_MD17 AP31 AM8 R_A_DQS4 R_B_MD17 AJ30 AM10 R_B_DQS4
R_A_MD18 SADQ17 SA_DQS4 R_A_DQS5 R_B_MD18 SBDQ17 SB_DQS4 R_B_DQS5
AN28 SADQ18 SA_DQS5 AM4 AH29 SBDQ18 SB_DQS5 AH6
R_A_MD19 AP28 AJ1 R_A_DQS6 R_B_MD19 AH28 AF8 R_B_DQS6
R_A_MD20 SADQ19 SA_DQS6 R_A_DQS7 R_B_MD20 SBDQ19 SB_DQS6 R_B_DQS7
AL30 SADQ20 SA_DQS7 AE5 AK29 SBDQ20 SB_DQS7 AB4
R_A_MD21 AM30 R_B_MD21 AH30
SADQ21 R_A_DQS#[0..7] <9> SBDQ21 R_B_DQS#[0..7] <9>
R_A_MD22 AM28 AK35 R_A_DQS#0 R_B_MD22 AH27 AF35 R_B_DQS#0
R_A_MD23 SADQ22 SA_DQS0# R_A_DQS#1 R_B_MD23 SBDQ22 SB_DQS0# R_B_DQS#1
AL28 SADQ23 SA_DQS1# AP34 AG28 SBDQ23 SB_DQS1# AK33
R_A_MD24 AP27 AN30 R_A_DQS#2 R_B_MD24 AF24 AK28 R_B_DQS#2
R_A_MD25 SADQ24 SA_DQS2# R_A_DQS#3 R_B_MD25 SBDQ24 SB_DQS2# R_B_DQS#3
AM27 SADQ25 SA_DQS3# AN23 AG23 SBDQ25 SB_DQS3# AJ23
B R_A_MD26 AM23
DDR SYSTEM MEMORY A AN8 R_A_DQS#4 R_B_MD26 AJ22 AL10 R_B_DQS#4 B
R_A_MD27 SADQ26 SA_DQS4# R_A_DQS#5 R_B_MD27 SBDQ26 SB_DQS4# R_B_DQS#5

DDR SYSTEM MEMORY B


AM22 SADQ27 SA_DQS5# AM5 AK22 SBDQ27 SB_DQS5# AH7
R_A_MD28 AL23 AH1 R_A_DQS#6 R_B_MD28 AH24 AF7 R_B_DQS#6
R_A_MD29 SADQ28 SA_DQS6# R_A_DQS#7 R_B_MD29 SBDQ28 SB_DQS6# R_B_DQS#7
AM24 SADQ29 SA_DQS7# AE4 AH23 SBDQ29 SB_DQS7# AB5
R_A_MD30 AN22 R_B_MD30 AG22
SADQ30 R_A_MA[0..13] <9,10> SBDQ30 R_B_MA[0..13] <9,10>
R_A_MD31 AP22 AL17 R_A_MA0 R_B_MD31 AJ21 AH17 R_B_MA0
R_A_MD32 SADQ31 SA_MA0 R_A_MA1 R_B_MD32 SBDQ31 SB_MA0 R_B_MA1
AM9 SADQ32 SA_MA1 AP17 AG10 SBDQ32 SB_MA1 AK17
R_A_MD33 AL9 AP18 R_A_MA2 R_B_MD33 AG9 AH18 R_B_MA2
R_A_MD34 SADQ33 SA_MA2 R_A_MA3 R_B_MD34 SBDQ33 SB_MA2 R_B_MA3
AL6 SADQ34 SA_MA3 AM17 AG8 SBDQ34 SB_MA3 AJ18
R_A_MD35 AP7 AN18 R_A_MA4 R_B_MD35 AH8 AK18 R_B_MA4
R_A_MD36 SADQ35 SA_MA4 R_A_MA5 R_B_MD36 SBDQ35 SB_MA4 R_B_MA5
AP11 SADQ36 SA_MA5 AM18 AH11 SBDQ36 SB_MA5 AJ19
R_A_MD37 AP10 AL19 R_A_MA6 R_B_MD37 AH10 AK19 R_B_MA6
R_A_MD38 SADQ37 SA_MA6 R_A_MA7 R_B_MD38 SBDQ37 SB_MA6 R_B_MA7
AL7 SADQ38 SA_MA7 AP20 AJ9 SBDQ38 SB_MA7 AH19
R_A_MD39 AM7 AM19 R_A_MA8 R_B_MD39 AK9 AJ20 R_B_MA8
R_A_MD40 SADQ39 SA_MA8 R_A_MA9 R_B_MD40 SBDQ39 SB_MA8 R_B_MA9
AN5 SADQ40 SA_MA9 AL20 AJ7 SBDQ40 SB_MA9 AH20
R_A_MD41 AN6 AM16 R_A_MA10 R_B_MD41 AK6 AJ16 R_B_MA10
R_A_MD42 SADQ41 SA_MA10 R_A_MA11 R_B_MD42 SBDQ41 SB_MA10 R_B_MA11
AN3 SADQ42 SA_MA11 AN20 AJ4 SBDQ42 SB_MA11 AG18
R_A_MD43 AP3 AM20 R_A_MA12 R_B_MD43 AH5 AG20 R_B_MA12
R_A_MD44 SADQ43 SA_MA12 R_A_MA13 R_B_MD44 SBDQ43 SB_MA12 R_B_MA13
AP6 SADQ44 SA_MA13 AM15 AK8 SBDQ44 SB_MA13 AG15
R_A_MD45 AM6 R_B_MD45 AJ8
R_A_MD46 SADQ45 R_A_SCASA# R_B_MD46 SBDQ45 R_B_SCASA#
AL4 SADQ46 SA_CAS# AN15 R_A_SCASA# <9,10> AJ5 SBDQ46 SB_CAS# AH14 R_B_SCASA# <9,10>
R_A_MD47 AM3 AP16 R_A_SRASA# R_B_MD47 AK4 AK14 R_B_SRASA#
SADQ47 SA_RAS# R_A_SRASA# <9,10> SBDQ47 SB_RAS# R_B_SRASA# <9,10>
R_A_MD48 AK2 AF29 SA_RCVENIN# T77 R_B_MD48 AG5 AF15 SB_RCVENIN# T75
R_A_MD49 SADQ48 SA_RCVENIN# SA_RCVENOUT# R_B_MD49 SBDQ48 SB_RCVENIN# SB_RCVENOUT#
AK3 SADQ49 SA_RCVENOUT# AF28 T80 AG4 SBDQ49 SB_RCVENOUT# AF14 T76
R_A_MD50 AG2 AP15 R_A_BMWEA# R_B_MD50 AD8 AH16 R_B_BMWEA#
SADQ50 SA_WE# R_A_BMWEA# <9,10> SBDQ50 SB_WE# R_B_BMWEA# <9,10>
R_A_MD51 AG1 R_B_MD51 AD9
R_A_MD52 SADQ51 R_B_MD52 SBDQ51
AL3 SADQ52 AH4 SBDQ52
R_A_MD53 AM2 R_B_MD53 AG6
R_A_MD54 SADQ53 R_B_MD54 SBDQ53
AH3 SADQ54 AE8 SBDQ54
C R_A_MD55 AG3 R_B_MD55 AD7 C
R_A_MD56 SADQ55 R_B_MD56 SBDQ55
AF3 SADQ56 AC5 SBDQ56
R_A_MD57 AE3 R_B_MD57 AB8
R_A_MD58 SADQ57 R_B_MD58 SBDQ57
AD6 SADQ58 AB6 SBDQ58
R_A_MD59 AC4 R_B_MD59 AA8
R_A_MD60 SADQ59 R_B_MD60 SBDQ59
AF2 SADQ60 AC8 SBDQ60
R_A_MD61 AF1 R_B_MD61 AC7
R_A_MD62 SADQ61 R_B_MD62 SBDQ61
AD4 SADQ62 AA4 SBDQ62
R_A_MD63 AD5 R_B_MD63 AA5
SADQ63 SBDQ63

@ALVISO_GM/GML @ALVISO_GM/GML

D D

QUANTA
Title
COMPUTER
Alviso (DDR)

Size Document Number Rev


CustomZL3 C

Date: Tuesday, March 29, 2005 Sheet 7 of 40


1 2 3 4 5 6 7 8
5 4 3 2 1
NO FILTER WHEN EXT. VGA +3V

R133 D10
L33
VCC_TVDACA 2 1 V1_5VFOLLOW 1 2 +1.5V
+VCCP 3900mA @BLM18PG181SN1/0_6
U34H U34D

1
C265 10 CH551
T29 VCC0 VCCA_TVDACA0 F17 C274 VCCSM_NCTF0 AD26 +1.8VSUS
R29 E17 I@.1U_4 AC26

2
VCC1 VCCA_TVDACA1 I@.022U_4 VCCSM_NCTF1
N29 VCC2 VCCA_TVDACB0 D18 120mA VCCSM_NCTF2 AD25
1

1
M29 VCC3 VCCA_TVDACB1 C18 VCCSM_NCTF3 AC25
C687 C340 C332 C334 C330 C336 K29 F18 L32 +3V L35 AD24
.1U_4 .1U_4 .1U_4 10U_6.3V 10U_6.3V 10U_6.3V VCC4 VCCA_TVDACC0 VCC_TVDACC VCC_TVDACB VCCSM_NCTF4
J29 E18 2 1 2 1 +3V AC24
2

2
VCC5 VCCA_TVDACC1 @BLM18PG181SN1/0_6 @BLM18PG181SN1/0_6 VCCSM_NCTF5
V28 VCC6 VCCSM_NCTF6 AD23

1
U28 H18 VCC_TVBG C264 C275 AC23
VCC7 VCCA_TVBG C273 C267 VCCSM_NCTF7
T28 VCC8 VSSA_TVBG G18 VCCSM_NCTF8 AD22
R28 I@.022U_4 I@.1U_4 I@.022U_4 I@.1U_4 AC22

2
VCC9 +1.5V VCCSM_NCTF9
D
P28 VCC10 VCCD_TVDAC D19 VCCSM_NCTF10 AD21 D
N28 VCC11 VCCDQ_TVDAC H17 VCC_QTVDAC VCCSM_NCTF11 AC21
M28 VCC12 VCCSM_NCTF12 AD20
L28 VCC13 VCCD_LVDS0 B26 +1.5V VCCSM_NCTF13 AC20
K28 VCC14 VCCD_LVDS1 B25 VCCSM_NCTF14 AD19
J28 VCC15 VCCD_LVDS2 A25 60mA VCCSM_NCTF15 AC19
H28 VCC16 10mA VCCSM_NCTF16 AD18
G28 VCC17 VCCA_LVDS A35 +2.5V VCCSM_NCTF17 AC18
V27 VCC18 VCCSM_NCTF18 AD17
U27 VCC19 VCCHV0 B22 +2.5V VCCSM_NCTF19 AC17
T27 VCC20 VCCHV1 B21 +VCCP W13 VTT_NCTF0 VCCSM_NCTF20 AD16

1
R27 VCC21 VCCHV2 A21 2mA V13 VTT_NCTF1 VCCSM_NCTF21 AC16
P27 C296 C280 C290 C302 C295 C277 U13 AD15
VCC22 .1U_4 10U_6.3V .1U_4 .01U/16V_4 .1U_4 10U_6.3V VTT_NCTF2 VCCSM_NCTF22
N27 AM37 T13 AC15

2
VCC23 VCCSM0 VTT_NCTF3 VCCSM_NCTF23
M27 VCC24 VCCSM1 AH37 R13 VTT_NCTF4 VCCSM_NCTF24 AD14
L27 VCC25 VCCSM2 AP29 P13 VTT_NCTF5 VCCSM_NCTF25 AC14
K27 VCC26 VCCSM3 AD28 N13 VTT_NCTF6 VCCSM_NCTF26 AD13
J27 VCC27 VCCSM4 AD27 M13 VTT_NCTF7 VCCSM_NCTF27 AC13
H27 VCC28 VCCSM5 AC27 L13 VTT_NCTF8 VCCSM_NCTF28 AB13
K26 AP26 L34 W12 AD12
VCC29 VCCSM6 C356 .1U_4 VCC_TVBG VTT_NCTF9 VCCSM_NCTF29
H26 VCC30 VCCSM7 AN26 2 1 +3V V12 VTT_NCTF10 VCCSM_NCTF30 AC12
K25 AM26 V1.8_DDR_CAP1 1 2 @BLM18PG181SN1/0_6 U12 AB12
VCC31 VCCSM8 VTT_NCTF11 VCCSM_NCTF31

1
DEPOP C259, C248, C306, C303 WHEN NO EXT.VGA J25 VCC32 VCCSM9 AL26 C272 T12 VTT_NCTF12
K24 AK26 C705 .1U_4 C266 C918 R12 W26
VCC33 VCCSM10 I@.022U_4 VTT_NCTF13 VCC_NCTF0 +VCCP
K23 AJ26 V1.8_DDR_CAP2 1 2 I@.1U_4 I@10U_6.3V P12 V26

2
L31 VCC34 VCCSM11 VTT_NCTF14 VCC_NCTF1
K22 VCC35 VCCSM12 AH26 N12 VTT_NCTF15 VCC_NCTF2 U26
+1.5V 2 1 VCCA_DPLLA K21 AG26 C357 .1U_4 M12 T26
VCC36 VCCSM13 V1.8_DDR_CAP5 VTT_NCTF16 VCC_NCTF3
W20 VCC37 VCCSM14 AF26 1 2 L12 VTT_NCTF17 VCC_NCTF4 R26
10UH C259 U20 AE26 P26
VCC38 VCCSM15 VCC_NCTF5
1

C306 + I@470U/2.5V T20 AP25 Note: All VCCSM N26


VCC39 VCCSM16 +1.5V VCC_NCTF6

POWER
I@.1U_4 K20 AN25 pins shorted M26
VCC40 VCCSM17 VCC_NCTF7

1
60mA V19 AM25 internally. C260 L26
2

VCC41 VCCSM18 C261 VCC_NCTF8


U19 VCC42 VCCSM19 AL25
.022U_4
close to PIN D19 VCC_NCTF9 W25
K19 AK25 .1U_4 AB26 V25

2
L28 VCC43 VCCSM20 VSS_NCTF0 VCC_NCTF10
W18 VCC44 VCCSM21 AJ25
+1.8VSUS
For DDR2 24mA AA26 VSS_NCTF1 VCC_NCTF11 U25
+1.5V 2 1 VCCA_DPLLB V18 AH25 Y26 T25
VCC45 VCCSM22 VSS_NCTF2 VCC_NCTF12
T18 VCC46 VCCSM23 AG25 AB25 VSS_NCTF3 VCC_NCTF13 R25
10UH C248 K18 AF25 L30 AA25 P25
VCC47 VCCSM24 VSS_NCTF4 VCC_NCTF14
1

C C303 + I@470U/2.5V K17 AE25 VCC_QTVDAC 2 1 +1.5V Y25 N25 C


VCC48 VCCSM25 VSS_NCTF5 VCC_NCTF15

1
I@.1U_4 AE24 @BLM18PG181SN1/0_6 AB24 M25
VCCSM26 VSS_NCTF6 VCC_NCTF16

1
AC2 AE23 + AA24 L25
+1.5V
2

VCCH_MPLL1 VCCSM27 VSS_NCTF7 VCC_NCTF17

1
AC1 AE22 C346 C344 C360 C271 Y24 W24
VCCA_DPLLA VCCH_MPLL0 VCCSM28 10U_6.3V 10U_6.3V 330U/6.3V-7343 C263 VSS_NCTF8 VCC_NCTF18
B23 AE21 AB23 V24

2
L70 VCCA_DPLLB VCCA_DPLLA VCCSM29 I@.022U_4 I@.1U_4 VSS_NCTF9 VCC_NCTF19
C35 AE20 AA23 U24

2
VCCA_HPLL VCCA_DPLLB VCCSM30 VSS_NCTF10 VCC_NCTF20
+1.5V 2 1 AA1 VCCA_HPLL VCCSM31 AE19 Y23 VSS_NCTF11 VCC_NCTF21 T24
VCCA_MPLL AA2 AE18 AB22 R24
1UH C699 VCCA_MPLL VCCSM32 VSS_NCTF12 VCC_NCTF22
60mA VCCSM33 AE17 AA22 VSS_NCTF13 VCC_NCTF23 P24
1

C701 + 470U/2.5V VCCA_CRTDAC F19 AE16 Y22 N24


.1U_4 VCCA_CRTDAC0 VCCSM34 VSS_NCTF14 VCC_NCTF24
E19 VCCA_CRTDAC1 VCCSM35 AE15 NO FILTER WHEN EXT. VGA AB21 VSS_NCTF15 VCC_NCTF25 M24
G19 AE14 AA21 L24
2

VVSSA_CRTDAC VCCSM36 VSS_NCTF16 VCC_NCTF26


VCCSM37 AP13 Y21 VSS_NCTF17 VCC_NCTF27 W23
VCCSM38 AN13 R21 VSS_NCTF18 VCC_NCTF28 V23
+2.5V H20 VCC_SYNC VCCSM39 AM13 AB20 VSS_NCTF19 VCC_NCTF29 U23
L69

NCTF
VCCSM40 AL13 AA20 VSS_NCTF20 VCC_NCTF30 T23
+1.5V 2 1 K13 VTT0 VCCSM41 AK13 AB19 VSS_NCTF21 VCC_NCTF31 R23
1

J13 VTT1 VCCSM42 AJ13 AA19 VSS_NCTF22 VCC_NCTF32 P23


60mA 1UH C688 C319 C291 K12 AH13 AB18 N23
VTT2 VCCSM43 VSS_NCTF23 VCC_NCTF33
1

C696 + 470U/2.5V .1U_4 10U_6.3V W11 AG13 AA18 M23


2

.1U_4 VTT3 VCCSM44 VSS_NCTF24 VCC_NCTF34


V11 VTT4 VCCSM45 AF13 AB17 VSS_NCTF25 VCC_NCTF35 L23
U11 AE13 AA17 W22
2

VTT5 VCCSM46 VSS_NCTF26 VCC_NCTF36


T11 VTT6 VCCSM47 AP12 Y17 VSS_NCTF27 VCC_NCTF37 V22
R11 VTT7 VCCSM48 AN12 R17 VSS_NCTF28 VCC_NCTF38 U22
P11 VTT8 VCCSM49 AM12 AB16 VSS_NCTF29 VCC_NCTF39 T22
N11 VTT9 VCCSM50 AL12 AA16 VSS_NCTF30 VCC_NCTF40 R22
M11 VTT10 VCCSM51 AK12 Y16 VSS_NCTF31 VCC_NCTF41 P22
L11 VTT11 VCCSM52 AJ12 W16 VSS_NCTF32 VCC_NCTF42 N22
K11 AH12 Note: All VCCSM V16 M22
VTT12 VCCSM53 pins shorted VSS_NCTF33 VCC_NCTF43
W10 VTT13 VCCSM54 AG12 U16 VSS_NCTF34 VCC_NCTF44 L22
V10 AF12 internally. T16 W21
R142 D11 VTT14 VCCSM55 VSS_NCTF35 VCC_NCTF45
U10 VTT15 VCCSM56 AE12 R16 VSS_NCTF36 VCC_NCTF46 V21
VCCGFOLLOW 1 2 +VCCP T10 AD11 C358 .1U_4 P16 U21
VTT16 VCCSM57 VSS_NCTF37 VCC_NCTF47
R10 VTT17 VCCSM58 AC11 1 2 N16 VSS_NCTF38 VCC_NCTF48 T21
10 CH551 P10 VTT18 VCCSM59 AB11 M16 VSS_NCTF39 VCC_NCTF49 P21
N10 AB10 C354 .1U_4 L16 N21
VTT19 VCCSM60 VSS_NCTF40 VCC_NCTF50
M10 VTT20 VCCSM61 AB9 1 2 AB15 VSS_NCTF41 VCC_NCTF51 M21
V1.8_DDR_CAP6 L49
B
K10 VTT21 VCCSM62 AP8 AA15 VSS_NCTF42 VCC_NCTF52 L21 B
J10 AM1 V1.8_DDR_CAP3 C348 .1U_4 2 1 +1.5V 30mA Y15 Y20
L39 VTT22 VCCSM63 V1.8_DDR_CAP4 VSS_NCTF43 VCC_NCTF53
Y9 VTT23 VCCSM64 AE1 1 2 W15 VSS_NCTF44 VCC_NCTF54 R20
+2.5V 2 1 VCCA_CRTDAC W9 BLM18PG181SN1 V15 P20
VTT24 VSS_NCTF45 VCC_NCTF55

1
@BLM18PG181SN1/0_6 U9 B28 +2.5V + U15 N20
VTT25 VCCTX_LVDS0 C359 C349 VSS_NCTF46 VCC_NCTF56
68mA +VCCP R9 VTT26 VCCTX_LVDS1 A28 T15 VSS_NCTF47 VCC_NCTF57 M20
1

C293 P9 A27 60mA 100U/10V .1U_4 R15 L20

2
C287 VTT27 VCCTX_LVDS2 VSS_NCTF48 VCC_NCTF58
N9 VTT28 P15 VSS_NCTF49 VCC_NCTF59 Y19
I@.022U_4 I@.1U_4 810mA M9 AF20 VCC_DDRDLL N15 R19
2

VTT29 VCCA_SM0 VSS_NCTF50 VCC_NCTF60


L9 VTT30 VCCA_SM1 AP19 M15 VSS_NCTF51 VCC_NCTF61 P19
J9 VTT31 VCCA_SM2 AF19 L15 VSS_NCTF52 VCC_NCTF62 N19
N8 AF18 VCC3G_PCIE AB14 M19
VTT32 VCCA_SM3 L71 VSS_NCTF53 VCC_NCTF63
M8 VTT33 AA14 VSS_NCTF54 VCC_NCTF64 L19
N7 AE37 VCC3G_PCIE 2 1 +1.5V Y14 Y18
VTT34 VCC3G0 VSS_NCTF55 VCC_NCTF65
M7 VTT35 VCC3G1 W37 W14 VSS_NCTF56 VCC_NCTF66 R18
1

1
N6 U37 BLM18PG181SN1 V14 P18
C646 .47U/25V VTT36 VCC3G2 + C345 C703 C700 VSS_NCTF57 VCC_NCTF67
M6 VTT37 VCC3G3 R37 U14 VSS_NCTF58 VCC_NCTF68 N18
1 2 VCCP_GMCH_CAP1 A6 N37 C339 10U_6.3V 10U_6.3V .1U_4 1A T14 M18
2

2
VTT38 VCC3G4 220U/2.5V VSS_NCTF59 VCC_NCTF69
N5 VTT39 VCC3G5 L37 R14 VSS_NCTF60 VCC_NCTF70 L18
+VCCP M5 J37 P14 W17
VTT40 VCC3G6 R182 L46 VSS_NCTF61 VCC_NCTF71
N4 VTT41 N14 VSS_NCTF62 VCC_NCTF72 V17
M4 Y29 VCCA_3GPLL 1 2VCCA_3GPLL_1 2 1 +1.5V M14 U17
C658 .47U/25V VTT42 VCCA_3GPLL0 VSS_NCTF63 VCC_NCTF73
N3 VTT43 VCCA_3GPLL1 Y28 L14 VSS_NCTF64 VCC_NCTF74 T17
1

1 2 M3 Y27 0.5/F BLM18PG181SN1 AA13 P17


C341 C333 VTT44 VCCA_3GPLL2 C342 C343 VSS_NCTF65 VCC_NCTF75
N2 VTT45 Y13 VSS_NCTF66 VCC_NCTF76 N17
2.2U_6.3V 4.7U/10V_8 M2 F37 .1U_4 10U_6.3V AA12 M17
+2.5V
2

C694 .22U VCCP_GMCH_CAP2 VTT46 VCCA_3GBG VSS_NCTF67 VCC_NCTF77


B2 VTT47 VSSA_3GBG G37 Y12 VSS_NCTF68 VCC_NCTF78 L17
1

VCCP_GMCH_CAP3 V1 150mA
VTT48 C315
N1 VTT49
C670 .22U M1 .1U_4 @ALVISO_GM/GML
2

VCCP_GMCH_CAP4 VTT50
G1 VTT51
@ALVISO_GM/GML

+2.5V
A A
1

C289 C288
.1U_4 4.7U/10V_8 close to PIN B28,A28,A27
2

QUANTA
Title
COMPUTER
Alviso (Power)

Size Document Number Rev


C ZL3 C

Date: Tuesday, March 29, 2005 Sheet 8 of 40


5 4 3 2 1
1 2 3 4 5 6 7 8

R_B_DM[0..7] <7>
+1.8VSUS +1.8VSUS +1.8VSUS +1.8VSUS
R_A_DM[0..7] <7> R_B_MD[0..63] <7>
R_A_MD[0..63] <7> R_B_DQS[0..7] <7>
R_A_DQS[0..7] <7> R_B_DQS#[0..7] <7>
R_A_DQS#[0..7] <7> R_B_MA[0..13] <7,10>
+0.9VSUS R_A_MA[0..13] <7,10> +0.9VSUS
JDIM1 JDIM2
1 VREF VSS46 2 1 VREF VSS46 2
3 4 R_A_MD0 3 4 R_B_MD7 +1.8VSUS Close to JDIMM1
R_A_MD5 VSS47 DQ4 R_A_MD1 R_B_MD5 VSS47 DQ4 R_B_MD1
5 DQ0 DQ5 6 5 DQ0 DQ5 6
R_A_MD4 7 8 R_B_MD4 7 8
DQ1 VSS15 R_A_DM0 DQ1 VSS15 R_B_DM0
A 9 VSS37 DM0 10 9 VSS37 DM0 10 A
R_A_DQS#0 11 12 R_B_DQS#0 11 12
DQS#0 VSS5 DQS#0 VSS5

1
R_A_DQS0 13 14 R_A_MD3 R_B_DQS0 13 14 R_B_MD2 C922 C923 C924 C925 C926
DQS0 DQ6 R_A_MD6 DQS0 DQ6 R_B_MD0
15 VSS48 DQ7 16 15 VSS48 DQ7 16
R_A_MD2 17 18 R_B_MD6 17 18 2.2U/6.3V 2.2U/6.3V 2.2U/6.3V 2.2U/6.3V 2.2U/6.3V

2
R_A_MD7 DQ2 VSS16 R_A_MD9 R_B_MD3 DQ2 VSS16 R_B_MD13
19 DQ3 DQ12 20 19 DQ3 DQ12 20
21 22 R_A_MD8 21 22 R_B_MD12
R_A_MD13 VSS38 DQ13 R_B_MD11 VSS38 DQ13 +1.8VSUS
23 DQ8 VSS17 24 23 DQ8 VSS17 24
R_A_MD12 25 26 R_A_DM1 R_B_MD9 25 26 R_B_DM1 +3V
DQ9 DM1 DQ9 DM1
27 VSS49 VSS53 28 27 VSS49 VSS53 28
R_A_DQS#1 29 30 CLK_SDRAM0 R_B_DQS#1 29 30 CLK_SDRAM3
DQS#1 CK0 CLK_SDRAM0 <6> DQS#1 CK0 CLK_SDRAM3 <6>
R_A_DQS1 31 32 CLK_SDRAM0# R_B_DQS1 31 32 CLK_SDRAM3#
DQS1 CK0# CLK_SDRAM0# <6> DQS1 CK0# CLK_SDRAM3# <6>

1
33 34 33 34 C927 C928 C929 C930 C931 C932
R_A_MD14 VSS39 VSS41 R_A_MD11 R_B_MD14 VSS39 VSS41 R_B_MD15
35 DQ10 DQ14 36 35 DQ10 DQ14 36
R_A_MD15 37 38 R_A_MD10 R_B_MD8 37 38 R_B_MD10 .1U_4 .1U_4 .1U_4 .1U_4 2.2U/6.3V .1U_4

2
DQ11 DQ15 DQ11 DQ15
39 VSS50 VSS54 40 39 VSS50 VSS54 40

41 VSS18 VSS20 42 41 VSS18 VSS20 42


R_A_MD16 43 44 R_A_MD21 R_B_MD20 43 44 R_B_MD16
R_A_MD20 DQ16 DQ20 R_A_MD17 R_B_MD21 DQ16 DQ20 R_B_MD17
45 DQ17 DQ21 46 45 DQ17 DQ21 46
47 VSS1 VSS6 48 47 VSS1 VSS6 48
R_A_DQS#2 49 50 R_B_DQS#2 49 50
R_A_DQS2 DQS#2 NC3 R_A_DM2 R_B_DQS2 DQS#2 NC3 R_B_DM2
51 DQS2 DM2 52 51 DQS2 DM2 52
53 VSS19 VSS21 54 53 VSS19 VSS21 54
R_A_MD19 55 56 R_A_MD18 R_B_MD18 55 56 R_B_MD19 +1.8VSUS Close to JDIMM2
R_A_MD23 DQ18 DQ22 R_A_MD22 R_B_MD23 DQ18 DQ22 R_B_MD22
57 DQ19 DQ23 58 57 DQ19 DQ23 58
59 VSS22 VSS24 60 59 VSS22 VSS24 60
R_A_MD28 61 62 R_A_MD24 R_B_MD29 61 62 R_B_MD24
R_A_MD29 DQ24 DQ28 R_A_MD25 R_B_MD28 DQ24 DQ28 R_B_MD25
63 DQ25 DQ29 64 63 DQ25 DQ29 64

1
65 66 65 66 C933 C934 C935 C936 C937
R_A_DM3 VSS23 VSS25 R_A_DQS#3 R_B_DM3 VSS23 VSS25 R_B_DQS#3
67 DM3 DQS#3 68 67 DM3 DQS#3 68
B 69 70 R_A_DQS3 69 70 R_B_DQS3 2.2U/6.3V 2.2U/6.3V 2.2U/6.3V 2.2U/6.3V 2.2U/6.3V B

2
NC4 DQS3 NC4 DQS3
71 VSS9 VSS10 72 71 VSS9 VSS10 72
R_A_MD26 73 74 R_A_MD27 R_B_MD26 73 74 R_B_MD31
R_A_MD30 DQ26 DQ30 R_A_MD31 R_B_MD30 DQ26 DQ30 R_B_MD27 +1.8VSUS
75 76 75 76
PC4800 DDR2 SDRAM

PC4800 DDR2 SDRAM


DQ27 DQ31 DQ27 DQ31 +3V
77 VSS4 VSS8 78 77 VSS4 VSS8 78
CKE0 79 80 CKE1 CKE2 79 80 CKE3
<6,10> CKE0 CKE0 CKE1 CKE1 <6,10> <6,10> CKE2 CKE0 CKE1 CKE3 <6,10>
81 VDD7 VDD8 82 81 VDD7 VDD8 82
83 NC1 A15 84 83 NC1 A15 84

1
R_A_BS2# 85 86 R_B_BS2# 85 86 C938 C939 C940 C941 C942 C943
<7,10> R_A_BS2# A16_BA2 A14 <7,10> R_B_BS2# A16_BA2 A14
SO-DIMM (200P)

SO-DIMM (200P)
87 VDD9 VDD11 88 87 VDD9 VDD11 88
R_A_MA12 89 90 R_A_MA11 R_B_MA12 89 90 R_B_MA11 .1U_4 .1U_4 .1U_4 .1U_4 2.2U/6.3V .1U_4

2
R_A_MA9 A12 A11 R_A_MA7 R_B_MA9 A12 A11 R_B_MA7
91 A9 A7 92 91 A9 A7 92
R_A_MA8 93 94 R_A_MA6 R_B_MA8 93 94 R_B_MA6
A8 A6 A8 A6
95 VDD5 VDD4 96 95 VDD5 VDD4 96
R_A_MA5 97 98 R_A_MA4 R_B_MA5 97 98 R_B_MA4
R_A_MA3 A5 A4 R_A_MA2 R_B_MA3 A5 A4 R_B_MA2
99 A3 A2 100 99 A3 A2 100
R_A_MA1 101 102 R_A_MA0 R_B_MA1 101 102 R_B_MA0
A1 A0 A1 A0
103 VDD10 VDD12 104 103 VDD10 VDD12 104
R_A_MA10 105 106 R_A_BS1# R_B_MA10 105 106 R_B_BS1#
A10/AP BA1 R_A_BS1# <7,10> A10/AP BA1 R_B_BS1# <7,10>
R_A_BS0# 107 108 R_A_SRASA# R_B_BS0# 107 108 R_B_SRASA#
<7,10> R_A_BS0# BA0 RAS# R_A_SRASA# <7,10> <7,10> R_B_BS0# BA0 RAS# R_B_SRASA# <7,10>
R_A_BMWEA# 109 110 SM_CS0# R_B_BMWEA# 109 110 SM_CS2#
<7,10> R_A_BMWEA# WE# S0# SM_CS0# <6,10> <7,10> R_B_BMWEA# WE# S0# SM_CS2# <6,10>
111 VDD2 VDD1 112 111 VDD2 VDD1 112
R_A_SCASA# 113 114 M_ODT0 R_B_SCASA# 113 114 M_ODT2
<7,10> R_A_SCASA# CAS# ODT0 M_ODT0 <6,10> <7,10> R_B_SCASA# CAS# ODT0 M_ODT2 <6,10>
SM_CS1# 115 116 R_A_MA13 SM_CS3# 115 116 R_B_MA13
<6,10> SM_CS1# S1# A13 <6,10> SM_CS3# S1# A13
117 VDD3 VDD6 118 117 VDD3 VDD6 118
M_ODT1 119 120 M_ODT3 119 120
<6,10> M_ODT1 ODT1 NC2 <6,10> M_ODT3 ODT1 NC2
121 VSS11 VSS12 122 121 VSS11 VSS12 122
R_A_MD33 123 124 R_A_MD36 R_B_MD33 123 124 R_B_MD36 +0.9VSUS +0.9VSUS
R_A_MD32 DQ32 DQ36 R_A_MD37 R_B_MD37 DQ32 DQ36 R_B_MD32
125 DQ33 DQ37 126 125 DQ33 DQ37 126
127 VSS26 VSS28 128 127 VSS26 VSS28 128
R_A_DQS#4 129 130 R_A_DM4 R_B_DQS#4 129 130 R_B_DM4
C R_A_DQS4 DQS#4 DM4 R_B_DQS4 DQS#4 DM4 C
131 DQS4 VSS42 132 131 DQS4 VSS42 132

1
133 134 R_A_MD39 133 134 R_B_MD39 C944 C945 C946 C947
R_A_MD34 VSS2 DQ38 R_A_MD38 R_B_MD34 VSS2 DQ38 R_B_MD38
135 DQ34 DQ39 136 135 DQ34 DQ39 136
R_A_MD35 137 138 R_B_MD35 137 138 .1U_4 2.2U/6.3V .1U_4 2.2U/6.3V

2
DQ35 VSS55 R_A_MD44 DQ35 VSS55 R_B_MD45
139 VSS27 DQ44 140 139 VSS27 DQ44 140
R_A_MD41 141 142 R_A_MD45 R_B_MD40 141 142 R_B_MD44
R_A_MD40 DQ40 DQ45 R_B_MD41 DQ40 DQ45
143 DQ41 VSS43 144 143 DQ41 VSS43 144
145 146 R_A_DQS#5 145 146 R_B_DQS#5
R_A_DM5 VSS29 DQS#5 R_A_DQS5 R_B_DM5 VSS29 DQS#5 R_B_DQS5
147 DM5 DQS5 148 147 DM5 DQS5 148 Place Close to JDIMM1 Place Close to JDIMM2
149 VSS51 VSS56 150 149 VSS51 VSS56 150
R_A_MD46 151 152 R_A_MD42 R_B_MD46 151 152 R_B_MD43
R_A_MD47 DQ42 DQ46 R_A_MD43 R_B_MD47 DQ42 DQ46 R_B_MD42
153 DQ43 DQ47 154 153 DQ43 DQ47 154
155 VSS40 VSS44 156 155 VSS40 VSS44 156
R_A_MD48 157 158 R_A_MD52 R_B_MD48 157 158 R_B_MD53
R_A_MD49 DQ48 DQ52 R_A_MD53 R_B_MD49 DQ48 DQ52 R_B_MD52
159 DQ49 DQ53 160 159 DQ49 DQ53 160
161 VSS52 VSS57 162 161 VSS52 VSS57 162
163 164 CLK_SDRAM1 163 164 CLK_SDRAM4
NCTEST CK1 CLK_SDRAM1 <6> NCTEST CK1 CLK_SDRAM4 <6>
165 166 CLK_SDRAM1# 165 166 CLK_SDRAM4#
VSS30 CK1# CLK_SDRAM1# <6> VSS30 CK1# CLK_SDRAM4# <6>
R_A_DQS#6 167 168 R_B_DQS#6 167 168
R_A_DQS6 DQS#6 VSS45 R_A_DM6 R_B_DQS6 DQS#6 VSS45 R_B_DM6
169 DQS6 DM6 170 169 DQS6 DM6 170
171 VSS31 VSS32 172 171 VSS31 VSS32 172
R_A_MD50 173 174 R_A_MD54 R_B_MD54 173 174 R_B_MD50
R_A_MD51 DQ50 DQ54 R_A_MD55 R_B_MD55 DQ50 DQ54 R_B_MD51
175 DQ51 DQ55 176 175 DQ51 DQ55 176
177 VSS33 VSS35 178 177 VSS33 VSS35 178
R_A_MD60 179 180 R_A_MD56 R_B_MD60 179 180 R_B_MD56
R_A_MD61 DQ56 DQ60 R_A_MD57 R_B_MD57 DQ56 DQ60 R_B_MD61
181 DQ57 DQ61 182 181 DQ57 DQ61 182
183 VSS3 VSS7 184 183 VSS3 VSS7 184
R_A_DM7 185 186 R_A_DQS#7 R_B_DM7 185 186 R_B_DQS#7
DM7 DQS#7 R_A_DQS7 DM7 DQS#7 R_B_DQS7
187 VSS34 DQS7 188 187 VSS34 DQS7 188
R_A_MD63 189 190 R_B_MD63 189 190
R_A_MD62 DQ58 VSS36 R_A_MD58 R_B_MD62 DQ58 VSS36 R_B_MD59
D 191 DQ59 DQ62 192 191 DQ59 DQ62 192 D
193 194 R_A_MD59 193 194 R_B_MD58
SMBDT VSS14 DQ63 SMBDT VSS14 DQ63
195 SDA VSS13 196 <2> SMBDT 195 SDA VSS13 196
SMBCK 197 198 SMBCK 197 198
SCL SA0 <2> SMBCK SCL SA0
+3V 199 VDD(SPD) SA1 200 +3V 199 VDD(SPD) SA1 200

PC4800_DDR2_4.0MM_STD R650 R651 SMbus address A1 PC4800_DDR2_8.0MM_REV R652 R653


SMbus address A0 10K_4 10K_4 10K_4 10K_4 PROJECT : ZL3
CLOCK 0,1,2 CLOCK 3,4,5
CKE 0,1 CKE 2,3 +3V
Quanta Computer Inc.
Size Document Number Rev
DDR2 SO-DIMM ( 200P ) C

Date: Tuesday, March 29, 2005 Sheet 9 of 40


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

A +0.9V A

1
C426 C485 C377 C489 C462 C460 C384 C467 C483 C479 C461 C383 C492

.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4

2
Layout note: Place one cap close to every 2 pullup resistors terminated to +0.9V

+0.9V

1
C472 C459 C490 C385 C458 C427 C468 C388 C417 C416 C425 C487 C486
R_A_MA[0..13] <7,9>
.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4

2
R_B_MA[0..13] <7,9> Layout note: Place one cap close to every 2 pullup resistors terminated to +0.9V

B B

R_B_MA0 2 1 R_A_MA9 2 1
R_B_BS1# RP27 4 3 4P2R-S-56 R_A_MA12 RP28 4 3 4P2R-S-56
<7,9> R_B_BS1#
R_A_BS2# 2 1 M_ODT3 2 1
<7,9> R_A_BS2# <6,9> M_ODT3
CKE0 RP29 4 3 4P2R-S-56 SM_CS3# RP30 4 3 4P2R-S-56
<6,9> CKE0 <6,9> SM_CS3#
R_A_MA4 2 1 R_B_SCASA# 2 1
<7,9> R_B_SCASA#
R_A_MA2 RP31 4 3 4P2R-S-56 +0.9V R_B_BMWEA# RP32 4 3 4P2R-S-56 +0.9V
<7,9> R_B_BMWEA#

<7,9> R_B_SRASA# R_B_SRASA# 2 1 CKE3 2 1


<6,9> CKE3
SM_CS2# RP33 4 3 4P2R-S-56 R_B_MA7 RP34 4 3 4P2R-S-56
<6,9> SM_CS2#
M_ODT1 2 1 CKE2 2 1
<6,9> M_ODT1 <6,9> CKE2
SM_CS1# RP35 4 3 4P2R-S-56 R_B_BS2# RP36 4 3 4P2R-S-56
<6,9> SM_CS1# <7,9> R_B_BS2#
R_A_MA10 2 1 R_A_MA5 2 1
R_A_BS0# RP37 4 3 4P2R-S-56 R_A_MA8 RP38 4 3 4P2R-S-56
<7,9> R_A_BS0#
R_B_MA13 2 1 R_A_MA7 2 1
M_ODT2 RP39 4 3 4P2R-S-56 R_A_MA6 RP40 4 3 4P2R-S-56 +0.9V
<6,9> M_ODT2
CKE1 2 1
<6,9> CKE1
R_A_MA11 RP41 4 3 4P2R-S-56
R_B_MA11 2 1
R_B_MA2 RP42 4 3 4P2R-S-56 +0.9V

C C
R_B_MA9 2 1 R_A_BMWEA# 2 1
<7,9> R_A_BMWEA#
R_B_MA8 RP43 4 3 4P2R-S-56 R_A_SCASA# RP44 4 3 4P2R-S-56
<7,9> R_A_SCASA#
R_B_MA6 2 1 R_B_MA1 2 1
R_B_MA4 RP45 4 3 4P2R-S-56 R_B_MA5 RP46 4 3 4P2R-S-56
R_B_MA3 2 1 R_B_MA10 2 1
R_B_MA12 RP47 4 3 4P2R-S-56 +0.9V R_B_BS0# RP48 4 3 4P2R-S-56 +0.9V
<7,9> R_B_BS0#

R_A_MA3 2 1
R_A_MA1 RP49 4 3 4P2R-S-56
<7,9> R_A_SRASA# R_A_SRASA# 2 1
SM_CS0# RP50 4 3 4P2R-S-56
<6,9> SM_CS0#
R_A_MA13 2 1
M_ODT0 RP51 4 3 4P2R-S-56
<6,9> M_ODT0
R_A_BS1# 2 1
<7,9> R_A_BS1#
R_A_MA0 RP52 4 3 4P2R-S-56 +0.9V

D D

PROJECT : ZL3
Quanta Computer Inc.
Size Document Number Rev
DDR2 TERMINATION C

Date: Tuesday, March 29, 2005 Sheet 10 of 40


1 2 3 4 5 6 7 8
5 4 3 2 1

+3V
SRS= 1 DOWN -2.5%
MEMORY CLOCK SPREAD
U29A
GMCHEXP_TXP0 AH30 AJ5 R369 E@10K_4
<6> GMCHEXP_TXP[0..15] PCIE_RX0P GPIO0 +3V
GMCHEXP_TXN0 AG30 AH5 R367 *10K_4
0 DOWN -1.8%
SPECTRUM
GMCHEXP_TXP1 PCIE_RX0N GPIO1
AG29 PCIE_RX1P GPIO2 AJ4 T148
<6> GMCHEXP_TXN[0..15]
GMCHEXP_TXN1
GMCHEXP_TXP2
AF29 PCIE_RX1N GPIO3 AK4 T143
R123
M DOWN -0.6%
AE29 PCIE_RX2P GPIO4 AH4 T141 *10K_4
GMCHEXP_TXN2 AE30 AF4
PCIE_RX2N GPIO5 T33
GMCHEXP_TXP3 AD30 AJ3
PCIE_RX3P GPIO6 T130
GMCHEXP_TXN3 AD29 AK3
<6,15> GMCHEXP_RXP[0..15] PCIE_RX3N GPIO7 T136
GMCHEXP_TXP4 AC29 AH3 1726_S0 MK_PD
PCIE_RX4P GPIO8 T127
GMCHEXP_TXN4 AB29 AJ2
<6,15> GMCHEXP_RXN[0..15] PCIE_RX4N GPIO9 T129
GMCHEXP_TXP5 AB30 AH2
PCIE_RX5P GPIO10 T132
GMCHEXP_TXN5 AA30 AH1 R146
PCIE_RX5N GPIO11 ROMIDCFG0 <13>
GMCHEXP_TXP6 AA29 AG3 Hi: 1.0V R131 *10K_4
D PCIE_RX6P GPIO12 T37 D
GMCHEXP_TXN6 Y29 AG1 *10K_4
PCIE_RX6N GPIO13 T123
GMCHEXP_TXP7 W29 AG2 Lo: 1.2V
PCIE_RX7P GPIO14 T126
GMCHEXP_TXN7 W30 AF3 VGA_PWR_SW
PCIE_RX7N GPIO_PWRCNTL VGA_PWR_SW <38>
GMCHEXP_TXP8 V30 AF2 V_MEMSSIN
GMCHEXP_TXN8 PCIE_RX8P GPIO_MEMSSIN C245 E@10P_4
V29 PCIE_RX8N
GMCHEXP_TXP9 U29 AE10 DVOMODE
GMCHEXP_TXN9 PCIE_RX9P DVOMODE R102 E@0_4 U13
T29 PCIE_RX9N
GMCHEXP_TXP10 T30 AH6 XT_IN 1 8 XT_OUT L38
T139

DVO / EXT TMDS / GPIO


GMCHEXP_TXN10 PCIE_RX10P DVPDATA_0 XIN XOUT MK1726_VDD
R30 PCIE_RX10N DVPDATA_1 AJ6 T150 2 VSS VDD 7 +3V
GMCHEXP_TXP11 R29 AK6 1726_S0 3 6 MK_PD E@0
PCIE_RX11P DVPDATA_2 T147 SRS PD
GMCHEXP_TXN11 P29 AH7 R128 E@33_4 1726_CKO 4 5 MK_27M R144 E@33_4 27MOUT C278 C270
PCIE_RX11N DVPDATA_3 T138 SSCLK REF
GMCHEXP_TXP12 N29 AK7 E@.1U_4 E@22U/10V_8
PCIE_RX12P DVPDATA_4 T149
GMCHEXP_TXN12 N30 AJ7 E@CY25819 C297
PCIE_RX12N DVPDATA_5 T137
GMCHEXP_TXP13 M30 PCIE_RX13P DVPDATA_6 AH8 T140 MK1726-8 E@10P_4
GMCHEXP_TXN13 M29 AJ8 +3V
PCIE_RX13N DVPDATA_7 T131
GMCHEXP_TXP14 L29 AH9
PCIE_RX14P DVPDATA_8 T43
GMCHEXP_TXN14 K29 AJ9
PCIE_RX14N DVPDATA_9 T42
GMCHEXP_TXP15 K30 AK9
PCIE_RX15P DVPDATA_10 T45

5
GMCHEXP_TXN15 J30 AH10 1
PCIE_RX15N DVPDATA_11 T41 PLTRST# <6,15,18,21,29,31,32,33>
AE6 PLTRST#_M26 4
DVPDATA_12 T31
DVPDATA_13 AG6 T40 2
GMCHEXP_RXP0 C231 E@.1U_4 V_GMCHEXP_RXP0 AF26 AF6 U54 Add buffer for PLTRST#
T44

3
GMCHEXP_RXN0 C234 E@.1U_4 V_GMCHEXP_RXN0 AE26 PCIE_TX0P DVPDATA_14 E@TC7SH08FU +3V
PCIE_TX0N DPVDATA_15 AE7 T36
GMCHEXP_RXP1 C227 E@.1U_4 V_GMCHEXP_RXP1 AC25 DVPDATA_16

PCI EXPRESS
PCIE_TX1P DVPDATA_16 AF7 DVPDATA_16 <13>
GMCHEXP_RXN1 C224 E@.1U_4 V_GMCHEXP_RXN1 AB25 AE8 DVPDATA_17 CHANGE TO CLK_OUT FOR M26
PCIE_TX1N DVPDATA_17 DVPDATA_17 <13>
GMCHEXP_RXP2 C211 E@.1U_4 V_GMCHEXP_RXP2 AC27 AG8
PCIE_TX2P DVPDATA_18 EDIDDATA <16>
GMCHEXP_RXN2 C205 E@.1U_4 V_GMCHEXP_RXN2 AB27 AF8 *0_4 R657 M24@0_4 R378 VTHM_DAT_EC R665 E@6.8K/F
PCIE_TX2N DVPDATA_19 EDIDCLK <16>
GMCHEXP_RXP3 C212 E@.1U_4 V_GMCHEXP_RXP3 AC26 AE9 DVPDATA_20 27M_IN VGA27M VTHM_CLK_EC R666 E@6.8K/F
GMCHEXP_RXN3 C207 E@.1U_4 V_GMCHEXP_RXN3 AB26 PCIE_TX3P DVPDATA_20 DVPDATA_21 VTHM_CLK R88 E@6.8K/F
PCIE_TX3N DVPDATA_21 AF9 DVPDATA_21 <13>
GMCHEXP_RXP4 C194 E@.1U_4 V_GMCHEXP_RXP4 Y25 AG10 DVPDATA_22 27M_O M26@0_4 R379 E@121/F R397 VTHM_DAT R86 E@6.8K/F
PCIE_TX4P DVPDATA_22 DVPDATA_22 <13>
GMCHEXP_RXN4 C188 E@.1U_4 V_GMCHEXP_RXN4 W25 AF10 DVPDATA_23 DVPDATA_20 R100 *10K_4
C PCIE_TX4N DVPDATA_23 DVPDATA_23 <13> C
GMCHEXP_RXP5 C195 E@.1U_4 V_GMCHEXP_RXP5 Y27
GMCHEXP_RXN5 C191 E@.1U_4 V_GMCHEXP_RXN5 W27 PCIE_TX5P DVPCNTL0 R374 E@10K_4 R398
PCIE_TX5N DVPCNTL_0 AJ10 +3V
GMCHEXP_RXP6 C178 E@.1U_4 V_GMCHEXP_RXP6 Y26
PCIE_TX6P DVPCNTL_1 AK10 DVPCNTL1 R389 E@10K_4 PLACE CLOSE TO ASIC
GMCHEXP_RXN6 C171 E@.1U_4 V_GMCHEXP_RXN6 W26
PCIE_TX6N DVPCNTL_2 AJ11 DVPCNTL2 R401 E@10K_4 PLACE CLOSE TO ASIC E@71.5/F
GMCHEXP_RXP7 C160 E@.1U_4 V_GMCHEXP_RXP7 U25 AH11 DVPCNTL3 R392 E@10K_4 EXT_VGA_RED R375 E@150/F_4
GMCHEXP_RXN7 C154 E@.1U_4 V_GMCHEXP_RXN7 T25 PCIE_TX7P DVPCNTL_3 R116 E@100/F_4 EXT_VGA_GRN R376 E@150/F_4
PCIE_TX7N +3V
GMCHEXP_RXP8 C159 E@.1U_4 V_GMCHEXP_RXP8 U27 AG4 VREFG R115 E@100/F_4 EXT_VGA_BLU R377 E@150/F_4
GMCHEXP_RXN8 C151 E@.1U_4 V_GMCHEXP_RXN8 T27 PCIE_TX8P VREFG C236 E@.1U_4
PCIE_TX8N Change to 100ohm for ATI recommend
GMCHEXP_RXP9 C182 E@.1U_4 V_GMCHEXP_RXP9 U26
GMCHEXP_RXN9 V_GMCHEXP_RXN9 T26 PCIE_TX9P EXT_TXLOUT0- E@4P2R-S-0 2
C172 E@.1U_4
PCIE_TX9N TXOUT_L0N AH15 1 RN101 TXLOUT0- TXLOUT0- <6,16>
GMCHEXP_RXP10 C140 E@.1U_4 V_GMCHEXP_RXP10 P25 AH16 EXT_TXLOUT0+ 4 3 TXLOUT0+
PCIE_TX10P TXOUT_L0P TXLOUT0+ <6,16>
GMCHEXP_RXN10 C131 E@.1U_4 V_GMCHEXP_RXN10 N25 AJ16 EXT_TXLOUT1- E@4P2R-S-0 2 1 RN102 TXLOUT1-
PCIE_TX10N TXOUT_L1N TXLOUT1- <6,16>
GMCHEXP_RXP11 C141 E@.1U_4 V_GMCHEXP_RXP11 P27 AJ17 EXT_TXLOUT1+ 4 3 TXLOUT1+ EXT_TV_Y/G R385 E@150/F_4
PCIE_TX11P TXOUT_L1P TXLOUT1+ <6,16> <16> EXT_TV_Y/G
GMCHEXP_RXN11 C135 E@.1U_4 V_GMCHEXP_RXN11 N27 AJ18 EXT_TXLOUT2- E@4P2R-S-0 2 1 RN103 TXLOUT2-
PCIE_TX11N TXOUT_L2N TXLOUT2- <6,16>
GMCHEXP_RXP12 C116 E@.1U_4 V_GMCHEXP_RXP12 P26 AK18 EXT_TXLOUT2+ 4 3 TXLOUT2+ EXT_TV_C/R R386 E@150/F_4
PCIE_TX12P TXOUT_L2P TXLOUT2+ <6,16> <16> EXT_TV_C/R
GMCHEXP_RXN12 C112 E@.1U_4 V_GMCHEXP_RXN12 N26 AJ20
PCIE_TX12N TXOUT_L3N T135
GMCHEXP_RXP13 C117 E@.1U_4 V_GMCHEXP_RXP13 L25 AJ21 E@4P2R-S-0 RN104 EXT_TV_COMP R384 E@150/F_4
PCIE_TX13P TXOUT_L3P T144 <16> EXT_TV_COMP
GMCHEXP_RXN13 C113 E@.1U_4 V_GMCHEXP_RXN13 K25 AK19 EXT_TXLCLKOUT- 2 1 TXLCLKOUT- +3V
PCIE_TX13N TXCLK_LN TXLCLKOUT- <6,16>
GMCHEXP_RXP14 C96 E@.1U_4 V_GMCHEXP_RXP14 L27 AJ19 EXT_TXLCLKOUT+ 4 3 TXLCLKOUT+
PCIE_TX14P TXCLK_LP TXLCLKOUT+ <6,16>
GMCHEXP_RXN14 C94 E@.1U_4 V_GMCHEXP_RXN14 K27 AG16 EXT_TXUOUT0- E@4P2R-S-0 4 3 RN8 TXUOUT0-
PCIE_TX14N TXOUT_U0N TXUOUT0- <6,16>
GMCHEXP_RXP15 C98 E@.1U_4 V_GMCHEXP_RXP15 L26 EXT_TXUOUT0+ TXUOUT0+ Q61
LVDS

PCIE_TX15P TXOUT_U0P AG17 2 1 TXUOUT0+ <6,16>

2
GMCHEXP_RXN15 C95 E@.1U_4 V_GMCHEXP_RXN15 K26 AF16 EXT_TXUOUT1- E@4P2R-S-0 4 3 RN7 TXUOUT1- E@2N7002
PCIE_TX15N TXOUT_U1N TXUOUT1- <6,16>
AF17 EXT_TXUOUT1+ 2 1 TXUOUT1+
TXOUT_U1P TXUOUT1+ <6,16>
AE18 EXT_TXUOUT2- E@4P2R-S-0 4 3 RN6 TXUOUT2- VTHM_DAT_EC 1 3 MBDATA MBDATA <11,29,40>
TXOUT_U2N TXUOUT2- <6,16>
AF27 AE19 EXT_TXUOUT2+ 2 1 TXUOUT2+
<2> CLK_PCIE_VGA PCIE_REFCLKP TXOUT_U2P TXUOUT2+ <6,16>
<2> CLK_PCIE_VGA# AE27 PCIE_REFCLKN TXOUT_U3N AF19 T38
TXOUT_U3P AF20 T35
AG19 EXT_TXUCLKOUT- 2 1 TXUCLKOUT-
TXCLK_UN TXUCLKOUT- <6,16>
R101 E@150/F_4 VPCIE_CR+ AC23 AG20 EXT_TXUCLKOUT+ 4 3 TXUCLKOUT+ VTHM_CLK_EC 1 3 MBCLK
PCIE_CALRP TXCLK_UP E@4P2R-S-0 RN5 TXUCLKOUT+ <6,16> MBCLK <11,29,40>
R90 E@100/F_4 VPCIE_CR- AB24
VGA1.2V PCIE_CALRN
R89 E@10K/F VPCIE_CAL AB23 AE12 DISP_ON
PCIE_CALI DIGON DISP_ON <6,16> E@2N7002
B R77 *10K_4 VPCIE_TIN AG12 BLON B
+3V BLON <6,16>

2
R76 E@10K_4 BLON Q62
AE25 PCIE_TESTIN
AK13 TMDS_TX0M
PLTRST#_M26 TX0M TMDS_TX0P R664
AD25 PERSTb TX0P AJ13
-VPCIE_RSTM AD24 AJ14 TMDS_TX1M
+3V PERSTb_MASK TX1M +3V
R74 *10K_4 AJ15 TMDS_TX1P E@1K_4 B: New add +3V +3V
V_R2SET TX1P TMDS_TX2M
AH21 R2SET TX2M AK15
TMDS_TX2P
TMDS

TX2P AK16 B: FOR EC CONTROL FAN


EXT_TV_Y/G AK21 AJ12 TMDS_TXCM R423
R72 R127 EXT_TV_C/R Y_G TXCM TMDS_TXCP R420
AJ22 C_R_PR TXCP AK12
E@1K_4 EXT_TV_COMP AK22 E@10K_4
DAC2

E@715/F COMP_B_PB
AE13 TMDS_DDCCLK +3V E@10K_4
T134 AJ24 H2SYNC
DDC2CLK
DDC2DATA AE14 TMDS_DDCDATA
TMDS_DDCCLK <15,33>
TMDS_DDCDATA <15,33>
15 MIL
T142 AK24 R440 3V_THM1
V2SYNC
HPD1 AF12 TMDS_HPD <15,33>
VTHM_CLK AG22 E@BLM18PG121SN C662 R419 -VGA_ALERT
VTHM_DAT DDC3CLK EXT_VGA_RED E@0_4
AG23 DDC3DATA R AK27 EXT_VGA_RED <17>

3
AJ27 EXT_VGA_GRN E@.1U_4
G EXT_VGA_GRN <17>
AJ26 EXT_VGA_BLU
B EXT_VGA_BLU <17> U32
R654 E@1K_4 AJ23 SSIN
SS

AH24 AJ25 EXT_HSYNC 1 6 2


SSOUT HSYNC EXT_HSYNC <17> VCC /ALERT
T145 AK25 EXT_VSYNC VGATHRM- 3 7 VTHM_DAT_EC Q36
VSYNC EXT_VSYNC <17> DXN SDA
DAC1

2 8 VTHM_CLK_EC E@2N7002
C258 E@22P_4 XT_IN R121 *33_4 27M_IN AH28 V_RST R112 E@499/F C638 DXP SCLK
XTALIN RSET AH26 10 mil trace / 5 GND PWM 4 VGA_FAN2 <30>

1
R119 *33_4 27M_O AJ29 AG25 EXT_DDCDAT 10 mil space E@2200P_4 E@G781-1
CLK

XTALOUT DDC1DATA EXT_DDCDAT <17>


E@TXC=27MHz AF24 EXT_DDCCLK VGATHRM+
DDC1CLK EXT_DDCCLK <17>
Y2 R122 E@1K_4
XT_OUT

R120 Z_V0101 AH27 AG24 -VGA_ALERT SLAVE ADDRESS: 9A


*1M_4 R57 E@0_4 Z_V0102 E8 TESTEN GPIO_AUXWIN
R347 E@0_4 Z_V0103 B6 TEST_YCLK Close to pin ASIC R424 *0_4
MEMVMODE0 <13>
TEST_MCLK VGATHRM+ R113
A AF25 PLLTEST DPLUS AF11 A
THERM

R126 T39 AE11 VGATHRM- *10K_4 R381 ED@330_4


C242 E@22P_4 Z_V0104 AH25 DMINUS TMDS_TX0M R93
STEREOSYNC 1 2 ED@0_4 TX0- <15,33>
E@10K_4 TMDS_TX0P R94 1 2 ED@0_4 TX0+ <15,33>
R382 ED@330_4
R125 *10K_4 TMDS_TX1M R95 1 2 ED@0_4
+3V TX1- <15,33>
E@M24/M22/M26 TMDS_TX1P R96 1 2 ED@0_4 TX1+ <15,33>
PROJECT : ZL3
R383 ED@330_4
TMDS_TX2M R97 1 2 ED@0_4 TX2- <15,33>
Quanta Computer Inc.
TMDS_TX2P R98 1 2 ED@0_4 TX2+ <15,33>
R380 ED@330_4
TMDS_TXCM R91 1 2 ED@0_4 CLK- <15,33>
TMDS_TXCP R92 1 2 ED@0_4 Size Document Number Rev
CLK+ <15,33>
Custom VGA HOST(ATI M26) C

Date: Wednesday, March 30, 2005 Sheet 11 of 40


5 4 3 2 1
5 4 3 2 1

U29D
U29E
+1.8V T7 VDDR1_T7 VDDC_AC13 AC13 +1.2V
R4 VDDR1_R4 VDDC_AD13 AD13 A2 VSS_A2 VSS_U4 U4
C580 C581 C578 C589 C597 R1 AD15 C173 C183 C187 C118 C122 C123 A10 U8
VDDR1_R1 VDDC_AD15 VSS_A10 VSS_U8
N8 VDDR1_N8 VDDC_AC15 AC15 A16 VSS_A16 VSS_W7 W7
N7 AC17 E@1000P_4 E@1000P_4 E@1000P_4 E@1000P_4 A22 W8
E@1000P_4 E@1000P_4 VDDR1_N7 VDDC_AC17 VSS_A22 VSS_W8
M4 VDDR1_M4 A29 VSS_A29 VSS_Y4 Y4
E@10U/10V_8 E@1000P_4 E@1000P_4 L8 P8 E@1000P_4 E@10U/10V_8 C1 AB8
VDDR1_L8 VDD15_P8 VSS_C1 VSS_AB8
K23 VDDR1_K23 VDD15_Y8 Y8 +1.5V C3 VSS_C3 VSS_AB7 AB7
(350mA) K24 VDDR1_K24 VDD15_AC11 AC11
C111 C107 C189 C190 C148
(40mA) C28 VSS_C28 VSS_AB1 AB1
N4 VDDR1_N4 VDD15_AC20 AC20 C30 VSS_C30 VSS_ AC4 AC4
D
J8 VDDR1_J8 VDD15_H20 H20 D27 VSS_D27 VSS_AC12 AC12 D
J7 H11 E@1000P_4 E@1000P_4 E@10U/10V_8 D24 AC14
VDDR1_J7 VDD15_H11 VSS_D24 VSS_AC14
J4 VDDR1_J4 VDD15_M23 M23 D21 VSS_D21 VSS_AD16 AD16
J1 Y23 E@1000P_4 E@1000P_4 D18 AC16
+1.8V VDDR1_J1 VDD15_Y23 VSS_D18 VSS_AC16
H10 VDDR1_H10 D15 VSS_D15 VSS_AC18 AC18
C585 C164 C119 C109 C110 H13 AD7 D12 AD18
VDDR1_H13 VDDR3_AD7 +3V VSS_D12 VSS_AD18
H15 AD19 (2.7mA) D10 AK2

CORE GND
VDDR1_H15 VDDR3_AD19 VSS_D10 VSS_AK2
E@10U/10V_8 E@.1U_4 E@.1U_4 E@.1U_4 E@.1U_4 H17 VDDR1_H17 VDDR3_AD21 AD21 C192 C215 C208 C201 C196 (IO.POWER) D6 VSS_D6 VSS_AJ1 AJ1
T8 VDDR1_T8 VDDR3_AC22 AC22 D4 VSS_D4
V4 AC8 E@.1U_4 E@.1U_4 E@.1U_4 E@.1U_4 E@10U/10V_8 K28
VDDR1_V4 VDDR3_AC8 PCIE_VSS_K28
V7 VDDR1_V7 VDDR3_AC21 AC21 PCIE_VSS_L28 L28
V8 VDDR1_V8 VDDR3_AC19 AC19 PCIE_VSS_M27 M27
AA1 VDDR1_AA1 F27 VSS_F27 PCIE_VSS_M26 M26
AA4 VDDR1_AA4 VDDR4_AG7 AG7 +3V G9 VSS_G9 PCIE_VSS_M24 M24
AA7 VDDR1_AA7 VDDR4_AD9 AD9 (2mA) G12 VSS_G12 PCIE_VSS_M25 M25
AA8 VDDR1_AA8 VDDR4_AC9 AC9 C199 C206 C198 C200 C197 (EXT.TMDS) G16 VSS_G16 PCIE_VSS_M28 M28
+1.8V A3 VDDR1_A3 VDDR4_AC10 AC10 G18 VSS_G18 PCIE_VSS_P28 P28
A9 AD10 E@.1U_4 E@.1U_4 E@.1U_4 E@.1U_4 E@10U/10V_8 G21 N28
C105 C156 C177 C99 C106 VDDR1_A9 VDDR4_AD10 VSS_G21 PCIE_VSS_N28
A15 VDDR1_A15 G24 VSS_G24 PCIE_VSS_R25 R25
A21 VDDR1_A21 PCIE_VDDR_12_AG26 AG26 H27 VSS_H27 PCIE_VSS_R23 R23
VGA1.2V (1034mA)
E@.1U_4 E@.1U_4 E@.1U_4 E@.1U_4 E@.1U_4 A28 AK29 H23 R24
VDDR1_A28 PCIE_VDDR_12_AK29 C635 E@.1U_4 C636 E@10U/10V_8 VSS_H23 PCIE_VSS_R24
B1 VDDR1_B1 PCIE_VDDR_12_AJ30 AJ30 H21 VSS_H21 PCIE_VSS_R26 R26
B30 AG28 C209 E@.1U_4 C633 E@.1U_4 (PCIE 1.2V) H18 R27
VDDR1_B30 PCIE_VDDR_12_AG28 C634 E@.1U_4 VSS_H18 PCIE_VSS_R27
D26 VDDR1_D26 PCIE_VDDR_12_AG27 AG27 H16 VSS_H16 PCIE_VSS_R28 R28
D23 L18 H14 T28
VDDR1_D23 VGA_PCIE12 VSS_H14 PCIE_VSS_T28
D20 VDDR1_D20 PCIE_PVDD_12_N24 N24 2 1 VGA1.2V H12 VSS_H12 PCIE_VSS_T24 T24
+2.5V
L24 *0_8 D17 VDDR1_D17 PCIE_PVDD_12_N23 N23 C143 E@.1U_4 E@BLM18PG121SN
(85mA) H9 VSS_H9 PCIE_VSS_U28 U28
(125mA) D9
LVDR25
D14 VDDR1_D14 PCIE_PVDD_12_P23 P23 C157
C158
E@.1U_4
E@.1U_4
(QUIET PCIE 1.2V)
L82
H8 VSS_H8 PCIE_VSS_V24 V24
+3V 2 1 D11 VDDR1_D11 H4 VSS_H4 PCIE_VSS_V26 V26
D8 U23 PCIE_PVDD18 2 1 E@BLM18PG121SN J23 V27
VDDR1_D8 PCIE_PVDD_18_U23 +1.8V VSS_J23 PCIE_VSS_V27
C C225 E@RB500 C202 C216 D5 T23 C168 E@.1U_4 J24 V25 C
VDDR1_D5 PCIE_PVDD_18_T23 VSS_J24 PCIE_VSS_V25
E@10U/10V_8 E@.1U_4 E@.1U_4
E27 VDDR1_E27 PCIE_PVDD_18_V23 V23 C174
C185
E@.1U_4
E@.1U_4 C950
(350mA) PCIE_VSS_V28 V28
F4 VDDR1_F4 PCIE_PVDD_18_W23 W23 PCIE_VSS_Y28 Y28
G7 VDDR1_G7 (PCIE PLL/IO 1.8V) E@10U/10V_8 AD12 VSS_AD12 PCIE_VSS_W24 W24
C203 G10 D9 AG5 W28
VDDR1_G10 NC_D9 T14 VSS_AG5 PCIE_VSS_W28
E@10U/10V_8 G13 D13 AG9 AA26
VDDR1_G13 NC_D13 T19 VSS_AG9 PCIE_VSS_AA26
L22 G15 D19 AG11 AA27
VDDR1_G15 NC_D19 T16 VGA1.2V VSS_AG11 PCIE_VSS_AA27
(30mA) +1.8V 2 1 E@BLM18PG121SN LVDDR18 G19 VDDR1_G19 NC_D25 D25 T18 PCIE_VSS_A23 AA23
G22 VDDR1_G22 NC_E4 E4 T17 PCIE_VSS_AA24 AA24
C186 C217 C218 G27 T4 R7 AA25
VDDR1_G27 NC_T4 T25 VSS_R7 PCIE_VSS_AA25
H22 VDDR1_H22 NC_AB4 AB4 T29 P4 VSS_P4 PCIE_VSS_AA28 AA28
E@10U/10V_8 E@.1U_4 E@.1U_4 H19 M7 AB28
VDDR1_H19 + VSS_M7 PCIE_VSS_AB28
AD4 VDDR1_AD4 M8 VSS_M8 PCIE_VSS_AC28 AC28
L23 C914 L4 AD28
VDDR1_L23 E@220U/2.5V VSS_L4 PCIE_VSS_AD28
K1 VSS_K1 PCIE_VSS_AD26 AD26
K7 VSS_K7 PCIE_VSS_AD27 AD27
L66 E@BLM18PG121SN K8 AE28
LPVDD VSS_K8 PCIE_VSS_AE28
+1.8V 2 1 AVSSQ AD22 R8 VSS_R8 PCIE_VSS_AF28 AF28
T1 VSS_T1 PCIE_VSS_AH29 AH29
(6mA) C632 C233 C228

E@10U/10V_8 E@.1U_4 E@.1U_4


AE16 LVDDR_25_AE16 LVSSR_AF18 AF18 (15A) (VGA CORE=1.2 OR 1.0V)
AE17 LVDDR_25_AE17 LVSSR_AH17 AH17 +1.2V P17 VDDC_P17 VSS_M16 M16
AF15 LVDDR_18_AF15 LVSSR_AG15 AG15 P18 VDDC_P18 VSS_N16 N16
AE15 LVDDR_18_AE15 LVSSR_AG18 AG18 P19 VDDC_P19 VSS_N15 N15
U12 VDDC_U12 VSS_P15 P15
U13 VDDC_U13 VSS_P16 P16
AH19 LPVDD LPVSS AH18 U14 VDDC_U14 VSS_R18 R18
+1.8V AH13 AH12 U17 R17
L20 TPVDD TPVSS VDDC_U17 VSS_R17
U18 VDDC_U18 VSS_R16 R16
2 1 E@BLM18PG121SN TXVDDR18
AF13 AH14 U19 R15
I/O POWER

B
L16 TXVDDR_AF13 TXVSSR_AH14 VDDC_U19 VSS_R15 B
AF14 TXVDDR_AF14 TXVSSR_AG13 AG13 V19 VDDC_V19 VSS_R14 R14
C161 C220 C219 2 1 E@BLM18PG121SN AG14 V18 R13
+1.8V TXVSSR_AG14 VDDC_V18 VSS_R13
E@.1U_4 V17 R12
E@10U/10V_8 E@.1U_4 E@.1U_4 C100 VDDRH VDDC_V17 VSS_R12
F18 VDDRH0 VSSRH0 F19 V14 VDDC_V14 VSS_T13 T13
C142 E@.1U_4 N6 M6 V13 T14

CENTER ARRAY
+2.5V VDDRH1 VSSRH1 VDDC_V13 VSS_T14
V12 VDDC_V12 VSS_T15 T15
L27 V_AVDD V_A2VDDQ N18 W15
A2VDD25 VDDC_N18 VSS_W15
2 1 AF21 A2VDD_AF21 A2VSSN_AH20 AH20 N17 VDDC_N17 VSS_V16 V16
E@BLM18PG121SN L25 E@BLM18PG121SN AE20 AG21 N14 V15
A2VDD_AE20 A2VSSN_AG21 VDDC_N14 VSS_V15
C244 C243 C214
+1.8V 2 1V_A2VDDQ C919 C920 W17 VDDC_W17 VSS_U15 U15
C240 E@.1U_4 AF23 AF22 W18 U16
A2VDDQ A2VSSQ VDDC_W18 VSS_U16
E@10U/10V_8 E@.1U_4 E@.1U_4
(67mA) C637 E@.1U_4 V_AVDD AH23
E@10U/10V_8 E@10U/10V_8 W12 VDDC_W12 VSS_T19 T19
AVDD AVSSN AH22 W13 VDDC_W13 VSS_T18 T18
(80mA) +1.8V 2 1 L67
E@BLM18PG121SN
W14 VDDC_W14 VSS_T17 T17
N13 VDDC_N13 VSS_T16 T16
L21 E@0_8 VDD1 AE23 AE24 N19
+1.8V VDD1DI VSS1DI VDDC_N19
AE22 VDD2DI VSS2DI AE21 E: Add bulk cap. for acer CRT M19 VDDC_M19
(7mA) L68
M18 VDDC_M18
M12 VDDC_M12
(28mA) +1.8V 2 1
E@BLM18PG121SN
PVDD AK28 PVDD PVSS AJ28 N12 VDDC_N12
M13 VDDC_M13
C642 C641 A7 A6 M14 +1.2V
MPVDD MPVSS VDDC_M14
P12 VDDC_P12
E@10U/10V_8 E@.1U_4 E@M24/M22/M26 +1.2V P13 W16 L19 E@0_8
VDDC_P13 VDDC1_W16 C163 E@1U/10V
P14 VDDC_P14 VDDC1_M15 M15
M17 R19 C165 E@1U/10V
VDDC_M17 VDDC1_R19 C145 E@1U/10V
W19 VDDC_W19 VDDC1_T12 T12
C121 C129 C221 C146 C126 C124 C166 C162 C127 C193 C125 E@1U/10V
L13 E@M24/M22/M26
A
(5.8mA) +1.8V 2 1
E@BLM18PG121SN
MPVDD
VDD1
E@1U/10V E@1000P_4 E@1000P_4 E@1000P_4 E@1U/10V
VGA_VDDC
A

C70 C71 E@1U/10V E@1000P_4 E@1000P_4 E@1000P_4 E@1U/10V


C204 C222 C213
E@10U/10V_8 E@.1U_4 +1.2V
E@10U/10V_8 E@.1U_4 E@.1U_4

PROJECT : ZL3
Quanta Computer Inc.
C176 C179 C175 C169 C153 C152 C139 C138 C149 C155

E@.1U_4 E@.1U_4 E@.1U_4 E@.1U_4 E@.1U_4 E@.1U_4 E@.1U_4 E@.1U_4 E@.1U_4 E@.1U_4
Size Document Number Rev
Custom C
ATI M26(POWER)
Date: Tuesday, March 29, 2005 Sheet 12 of 40
5 4 3 2 1
5 4 3 2 1

<14> MDB[0..63]
<14> MDA[0..63] MAB[0..13] <14>
MAA[0..13] <14> U29C
U29B MDB0 MAB0
D7 DQB0 MAB0 N5
MDA0 H28 E22 MAA0 MDB1 F7 M1 MAB1
MDA1 DQA0 MAA0 MAA1 MDB2 DQB1 MAB1 MAB2
H29 DQA1 MAA1 B22 E7 DQB2 MAB2 M3
MDA2 J28 B23 MAA2 MDB3 G6 L3 MAB3
MDA3 DQA2 MAA2 MAA3 MDB4 DQB3 MAB3 MAB4
J29 DQA3 MAA3 B24 G5 DQB4 MAB4 L2
MDA4 J26 C23 MAA4 MDB5 F5 M2 MAB5
MDA5 DQA4 MAA4 MAA5 MDB6 DQB5 MAB5 MAB6
H25 DQA5 MAA5 C22 E5 DQB6 MAB6 M5
MDA6 H26 F22 MAA6 MDB7 C4 P6 MAB7
MDA7 DQA6 MAA6 MAA7 MDB8 DQB7 MAB7 MAB8
D
G26 DQA7 MAA7 F21 B5 DQB8 MAB8 N3 D
MDA8 G30 C21 MAA8 MDB9 C5 K2 MAB9
MDA9 DQA8 MAA8 MAA9 MDB10 DQB9 MAB9 MAB10
D29 DQA9 MAA9 A24 A4 DQB10 MAB10 K3
MDA10 D28 C24 MAA10 MDB11 B4 J2 MAB11
MDA11 DQA10 MAA10 MAA11 MDB12 DQB11 MAB11 MAB12
E28 DQA11 MAA11 A25 C2 DQB12 MAB12 P5
MDA12 E29 E21 MAA12 MDB13 D3 P3 MAB13
DQA12 MAA12 DQB13 MAB13 -DQMB[0..7] <14>
MDA13 G29 B20 MAA13 MDB14 D1 P2
DQA13 MAA13 -DQMA[0..7] <14> DQB14 MAB14
MDA14 G28 C19 MDB15 D2
MDA15 DQA14 MAA14 MDB16 DQB15 -DQMB0
F28 DQA15 G4 DQB16 DQMB#0 E6
MDA16 G25 J25 -DQMA0 MDB17 H6 B2 -DQMB1
MDA17 DQA16 DQMA#0 -DQMA1 MDB18 DQB17 DQMB#1 -DQMB2
F26 DQA17 DQMA#1 F29 H5 DQB18 DQMB#2 J5
MDA18 E26 E25 -DQMA2 MDB19 J6 G3 -DQMB3
MDA19 DQA18 DQMA#2 -DQMA3 MDB20 DQB19 DQMB#3 -DQMB4
F25 DQA19 DQMA#3 A27 K5 DQB20 DQMB#4 W6
MDA20 E24 F15 -DQMA4 MDB21 K4 W2 -DQMB5
MDA21 DQA20 DQMA#4 -DQMA5 MDB22 DQB21 DQMB#5 -DQMB6
F23 DQA21 DQMA#5 C15 L6 DQB22 DQMB#6 AC6 QSB[0..7] <14>
MDA22 E23 C11 -DQMA6 MDB23 L5 AD2 -DQMB7
DQA22 DQMA#6 QSA[0..7] <14> DQB23 DQMB#7
MDA23 D22 E11 -DQMA7 MDB24 G2
MDA24 DQA23 DQMA#7 MDB25 DQB24 QSB0
B29 DQA24 F3 DQB25 QSB0 F6
MDA25 C29 J27 QSA0 MDB26 H2 B3 QSB1

MEMORY INTERFACE B
MDA26 DQA25 QSA0 QSA1 MDB27 DQB26 QSB1 QSB2
C25 F30 E2 K6

MEMORY INTERFACE A
MDA27 DQA26 QSA1 QSA2 MDB28 DQB27 QSB2 QSB3
C27 DQA27 QSA2 F24 F2 DQB28 QSB3 G1
MDA28 B28 B27 QSA3 MDB29 J3 V5 QSB4
MDA29 DQA28 QSA3 QSA4 MDB30 DQB29 QSB4 QSB5
B25 DQA29 QSA4 E16 F1 DQB30 QSB5 W1
MDA30 C26 B16 QSA5 MDB31 H3 AC5 QSB6
MDA31 DQA30 QSA5 QSA6 MDB32 DQB31 QSB6 QSB7
B26 DQA31 QSA6 B11 U6 DQB32 QSB7 AD1
MDA32 F17 F10 QSA7 MDB33 U5
MDA33 DQA32 QSA7 MDB34 DQB33 -RASB
E17 DQA33 U3 DQB34 RASB# R2 -RASB <14>
MDA34 D16 A19 -RASA MDB35 V6
DQA34 RASA# -RASA <14> DQB35
MDA35 F16 MDB36 W5 T5 -CASB
DQA35 DQB36 CASB# -CASB <14>
MDA36 E15 E18 -CASA MDB37 W4
DQA36 CASA# -CASA <14> DQB37
C MDA37 F14 MDB38 Y6 T6 -WEB C
DQA37 DQB38 WEB# -WEB <14>
MDA38 E14 E19 -WEA MDB39 Y5
DQA38 WEA# -WEA <14> DQB39
MDA39 F13 MDB40 U2 R5 -CSB0
DQA39 DQB40 CSB0# -CSB0 <14>
MDA40 C17 E20 -CSA0 MDB41 V2
DQA40 CSA0# -CSA0 <14> DQB41
MDA41 B18 MDB42 V1 R6 -CSB1
DQA41 DQB42 CSB1# -CSB1 <14>
MDA42 B17 F20 -CSA1 MDB43 V3
DQA42 CSA1# -CSA1 <14> DQB43 CKEB
MDA43 B15 MDB44 W3 R3
DQA43 DQB44 CKEB CKEB <14>
MDA44 C13 B19 CKEA MDB45 Y2 R355 E@10K_4
DQA44 CKEA CKEA <14> +1.8V +1.8V DQB45
MDA45 B14 R348 E@10K_4 MDB46 Y3 N1 CLKB0 R353 E@10
DQA45 DQB46 CLKB0 M_CLKB0 <14>
MDA46 C14 MDB47 AA2 N2 -CLKB0 R354 E@10
DQA46 DQB47 CLKB0# -M_CLKB0 <14>
MDA47 C16 B21 CLKA0 R346 E@10 MDB48 AA6
DQA47 CLKA0 M_CLKA0 <14> DQB48
MDA48 A13 C20 -CLKA0 R345 E@10 MDB49 AA5 T2 CLKB1 R356 E@10
DQA48 CLKA0# -M_CLKA0 <14> DQB49 CLKB1 M_CLKB1 <14>
MDA49 A12 MDB50 AB6 T3 -CLKB1 R357 E@10
DQA49 DQB50 CLKB1# -M_CLKB1 <14>
MDA50 C12 C18 CLKA1 R343 E@10 R54 R342 MDB51 AB5
DQA50 CLKA1 M_CLKA1 <14> DQB51
MDA51 B12 A18 -CLKA1 R344 E@10 E@100 E@100 MDB52 AD6
DQA51 CLKA1# -M_CLKA1 <14> DQB52
MDA52 C10 MDB53 AD5 E3 DIMB0
DQA52 DQB53 DIMB_0 T21
MDA53 C9 MDB54 AE5 AA3 DIMB1
DQA53 DQB54 DIMB_1 T27
MDA54 B9 MDB55 AE4
MDA55 DQA54 MVREFD MDB56 DQB55
B10 DQA55 MVREFD B7 AB2 DQB56 B: RESERVE FOR M24
MDA56 E13 MDB57 AB3 AF5
MDA57 DQA56 MVREFS MDB58 DQB57 ROMCS#
E12 DQA57 MVREFS B8 AC2 DQB58
MDA58 E10 MDB59 AC3 C6 MEMVMODE0
DQA58 DQB59 MEMVMODE_0 MEMVMODE0 <11>
MDA59 F12 MDB60 AD3 C7 R661 M24@4.7K_4
MDA60 DQA59 DIMA0 R51 R341 MDB61 DQB60 MEMVMODE_1
F11 DQA60 DIMA_0 D30 T112 AE1 DQB61 +1.8V
MDA61 E9 B13 DIMA1 C72 E@100 C570 E@100 MDB62 AE2 C8 MBMTEST
DQA61 DIMA_1 T13 DQB62 MEMTEST
MDA62 F9 E@.1U_4 E@.1U_4 MDB63 AE3
MDA63 DQA62 DQB63 R352
F8 DQA63
E@M24/M22/M26 E@10K_4
E@M24/M22/M26 R53
E@240
B B
VDDR1 MEMVMODE_0 MEMVMODE_1
1.8V GND +VDDC_CT
2.5V +VDDC_CT GND
Place close to ASIC For M24: 47ohm
CS04703J906

DVPDATA_16
DVPDATA_16 <11>
ROMIDCFG0 DVPDATA_17
ROMIDCFG0 <11> DVPDATA_17 <11>
STRAPS PIN +3V
DVPDATA_21
DVPDATA_22
DVPDATA_21 <11>
DVPDATA_22 <11>
DVPDATA_23
DVPDATA_23 <11>
PCI-Express Current Calibration Bandgap Backup PCI-Express transmitter current compensation
GPIO_0 0: use reference voltage from Bandgap GPIO_6 0: Normal
1: use reference voltage from resistor divider 1: Inject extra current for output buffer switching R107
*10K_4
R406
E@10K_4
R390
*10K_4
R391
E@10K_4
R372
*10K_4
R373
*10K_4
PCI-Express PLL Calibration force enable
GPIO_8 Strap to set the debug muxes to bting out DEBUG signals
GPIO_1 0: Disable PLL force calibration even if registers are inaccessible ROMIDCFG0 DVPDATA_23 DVPDATA_22 DVPDATA_21 DVPDATA_17 DVPDATA_16
1: Enable PLL force calibration
ROMIDCFG
00: PCI Express 1.0 mode
GPIO(9,13:11) R105 R410 R399 R400 R387 R388
01: RESERVED 0x0x: No ROM, CHG_ID=0 E@10K_4 *10K_4 E@10K_4 *10K_4 E@10K_4 E@10K_4
GPIO_(3,2) INT P/D
A
10: PCI Express 1.0 mode 0x1x: No Rom, CHG_ID=1 A

11: RESERVED 1000: Parallel ROM, Chip ID'S from ROM


C: FOR HYNIX MEMORY
Turn off PCI-Express impedance / strength calibration 1000: Parallel ROM, Chip ID'S from ROM FOR M26P ONLY
0: 128M
GPIO_4 0: enable
DVPDATA_21~23 DVPDATA_21: 0=4Mx32 1=8Mx32 1: 256M PROJECT :ZL3
1: disable
MEM TYPE DVPDATA_22: 0=128M 1=64M Quanta Computer Inc.
GPIO_5 Bypass PCI-Express PLL Size Document Number Rev
DVPDATA_23: 0=Hynix 1=Samsung Custom C
ATI M26 MEM/STRAPS PIN
Date: Tuesday, March 29, 2005 Sheet 13 of 40
5 4 3 2 1
5 4 3 2 1

U4 U25 U28 U8

MAA0 M4 A6 MDA3 MAA0 M4 A6 MDA44 MAB0 M4 A6 MDB3 MAB0 M4 A6 MDB49


MAA1 A0 DQ0 MDA0 MAA1 A0 DQ0 MDA43 MAB1 A0 DQ0 MDB1 MAB1 A0 DQ0 MDB48
M5 A1 DQ1 B5 M5 A1 DQ1 B5 M5 A1 DQ1 B5 M5 A1 DQ1 B5
MAA2 L5 A5 MDA1 MAA2 L5 A5 MDA46 MAB2 L5 A5 MDB4 MAB2 L5 A5 MDB51
MAA3 A2 DQ2 MDA2 MAA3 A2 DQ2 MDA45 MAB3 A2 DQ2 MDB5 MAB3 A2 DQ2 MDB50
M6 A3 DQ3 A4 M6 A3 DQ3 A4 M6 A3 DQ3 A4 M6 A3 DQ3 A4
MAA4 M7 B1 MDA7 MAA4 M7 B1 MDA40 MAB4 M7 B1 MDB6 MAB4 M7 B1 MDB53
MAA5 A4 DQ4 MDA6 MAA5 A4 DQ4 MDA47 MAB5 A4 DQ4 MDB2 MAB5 A4 DQ4 MDB52
L8 A5 DQ5 C2 L8 A5 DQ5 C2 L8 A5 DQ5 C2 L8 A5 DQ5 C2
MAA6 M8 C1 MDA4 MAA6 M8 C1 MDA42 MAB6 M8 C1 MDB7 MAB6 M8 C1 MDB54
MAA7 A6 DQ6 MDA5 MAA7 A6 DQ6 MDA41 MAB7 A6 DQ6 MDB0 MAB7 A6 DQ6 MDB55
M9 A7 DQ7 D1 M9 A7 DQ7 D1 M9 A7 DQ7 D1 M9 A7 DQ7 D1
MAA8 M10 J12 MDA14 MAA8 M10 J12 MDA54 MAB8 M10 J12 MDB31 MAB8 M10 J12 MDB42
MAA12 A8(AP) DQ8 MDA8 MAA12 A8(AP) DQ8 MDA53 MAB12 A8(AP) DQ8 MDB29 MAB12 A8(AP) DQ8 MDB40
M3 BA0 DQ9 J11 M3 BA0 DQ9 J11 M3 BA0 DQ9 J11 M3 BA0 DQ9 J11
MAA13 L4 H12 MDA15 MAA13 L4 H12 MDA55 MAB13 L4 H12 MDB24 MAB13 L4 H12 MDB41
MAA9 BA1 DQ10 MDA13 MAA9 BA1 DQ10 MDA52 MAB9 BA1 DQ10 MDB26 MAB9 BA1 DQ10 MDB43
L7 A9 DQ11 H11 L7 A9 DQ11 H11 L7 A9 DQ11 H11 L7 A9 DQ11 H11
MAA10 K5 F12 MDA12 MAA10 K5 F12 MDA50 MAB10 K5 F12 MDB28 MAB10 K5 F12 MDB44
MAA11 A10 DQ12 MDA9 MAA11 A10 DQ12 MDA49 MAB11 A10 DQ12 MDB30 MAB11 A10 DQ12 MDB45
D
L6 A11 DQ13 F11 L6 A11 DQ13 F11 L6 A11 DQ13 F11 L6 A11 DQ13 F11 D
-DQMA0 A2 E12 MDA11 -DQMA5 A2 E12 MDA51 -DQMB0 A2 E12 MDB25 -DQMB6 A2 E12 MDB46
-DQMA1 DQM0 DQ14 MDA10 -DQMA6 DQM0 DQ14 MDA48 -DQMB3 DQM0 DQ14 MDB27 -DQMB5 DQM0 DQ14 MDB47
G11 DQM1 DQ15 E11 G11 DQM1 DQ15 E11 G11 DQM1 DQ15 E11 G11 DQM1 DQ15 E11
-DQMA2 G2 E2 MDA17 -DQMA4 G2 E2 MDA38 -DQMB1 G2 E2 MDB15 -DQMB7 G2 E2 MDB58
-DQMA3 DQM2 DQ16 MDA18 -DQMA7 DQM2 DQ16 MDA39 -DQMB2 DQM2 DQ16 MDB14 -DQMB4 DQM2 DQ16 MDB59
A11 DQM3 DQ17 E1 A11 DQM3 DQ17 E1 A11 DQM3 DQ17 E1 A11 DQM3 DQ17 E1
-RASA L1 F2 MDA16 -RASA L1 F2 MDA34 -RASB L1 F2 MDB13 -RASB L1 F2 MDB57
RAS DQ18 <13> -RASA RAS DQ18 RAS DQ18 <13> -RASB RAS DQ18
-CASA K1 F1 MDA19 -CASA K1 F1 MDA37 -CASB K1 F1 MDB12 -CASB K1 F1 MDB56
CAS DQ19 <13> -CASA CAS DQ19 CAS DQ19 <13> -CASB CAS DQ19
-WEA K2 H2 MDA20 -WEA K2 H2 MDA36 -WEB K2 H2 MDB11 -WEB K2 H2 MDB60
WE DQ20 <13> -WEA WE DQ20 WE DQ20 <13> -WEB WE DQ20
-CSA0 M1 H1 MDA22 -CSA0 M1 H1 MDA33 -CSB0 M1 H1 MDB10 -CSB0 M1 H1 MDB61
CS DQ21 <13> -CSA0 CS DQ21 CS DQ21 <13> -CSB0 CS DQ21
M_CLKA0 L10 J1 MDA23 M_CLKA1 L10 J1 MDA32 M_CLKB0 L10 J1 MDB8 M_CLKB1 L10 J1 MDB63
-M_CLKA0 CLK DQ22 MDA21 -M_CLKA1 CLK DQ22 MDA35 -M_CLKB0 CLK DQ22 MDB9 -M_CLKB1 CLK DQ22 MDB62
L11 CLK# DQ23 J2 L11 CLK# DQ23 J2 L11 CLK# DQ23 J2 L11 CLK# DQ23 J2
CKEA M11 D12 MDA25 CKEA M11 D12 MDA63 CKEB M11 D12 MDB21 CKEB M11 D12 MDB32
CKE DQ24 <13> CKEA CKE DQ24 CKE DQ24 <13> CKEB CKE DQ24
L12 C12 MDA24 L12 C12 MDA61 L12 C12 MDB23 L12 C12 MDB35
MAVREF0_A MCL DQ25 MDA27 MAVREF1_A MCL DQ25 MDA62 MBVREF0_B MCL DQ25 MDB22 MBVREF1_B MCL DQ25 MDB34
M12 VREF DQ26 C11 M12 VREF DQ26 C11 M12 VREF DQ26 C11 M12 VREF DQ26 C11
B12 MDA28 B12 MDA58 B12 MDB20 B12 MDB33
T111 DQ27 MDA31 T10 DQ27 MDA60 T115 DQ27 MDB16 T26 DQ27 MDB37
M2 NC1 DQ28 A9 M2 NC1 DQ28 A9 M2 NC1 DQ28 A9 M2 NC1 DQ28 A9
T8 B3 A8 MDA29 T11 B3 A8 MDA59 T20 B3 A8 MDB18 T124 B3 A8 MDB39
T6 NC2 DQ29 MDA30 T5 NC2 DQ29 MDA57 T15 NC2 DQ29 MDB17 T125 NC2 DQ29 MDB36
B10 NC3 DQ30 B8 B10 NC3 DQ30 B8 B10 NC3 DQ30 B8 B10 NC3 DQ30 B8
T12 G3 A7 MDA26 T7 G3 A7 MDA56 T23 G3 A7 MDB19 T121 G3 A7 MDB38
T109 NC4 DQ31 QSA0 T4 NC4 DQ31 QSA5 T22 NC4 DQ31 QSB0 T122 NC4 DQ31 QSB6
G10 NC5 DQS0 A1 G10 NC5 DQS0 A1 G10 NC5 DQS0 A1 G10 NC5 DQS0 A1
T2 K11 G12 QSA1 T107 K11 G12 QSA6 T113 K11 G12 QSB3 T32 K11 G12 QSB5
T3 NC6 DQS1 QSA2 T108 NC6 DQS1 QSA4 T114 NC6 DQS1 QSB1 T28 NC6 DQS1 QSB7
K12 NC7 DQS2 G1 K12 NC7 DQS2 G1 K12 NC7 DQS2 G1 K12 NC7 DQS2 G1
T110 L2 A12 QSA3 T9 L2 A12 QSA7 T116 L2 A12 QSB2 T24 L2 A12 QSB4
-CSA1 NC8 DQS3 -CSA1 NC8 DQS3 -CSB1 NC8 DQS3 -CSB1 NC8 DQS3
L3 NC9 <13> -CSA1 L3 NC9 L3 NC9 <13> -CSB1 L3 NC9
C6 C571 E@.022U_4 C6 C50 E@.022U_4 C6 C86 E@.022U_4 C6 C621 E@.022U_4
VDD_0 C574 E@.022U_4 VDD_0 C44 E@.022U_4 VDD_0 C89 E@.022U_4 VDD_0 C604 E@.022U_4
G7 NC/TH1 VDD_1 C7 G7 NC/TH1 VDD_1 C7 G7 NC/TH1 VDD_1 C7 G7 NC/TH1 VDD_1 C7
G8 D3 C573 E@.022U_4 G8 D3 C62 E@.022U_4 G8 D3 C101 E@.022U_4 G8 D3 C623 E@.022U_4
NC/TH2 VDD_2 C572 E@.022U_4 NC/TH2 VDD_2 C60 E@.022U_4 NC/TH2 VDD_2 C114 E@.022U_4 NC/TH2 VDD_2 C612 E@.022U_4
H5 NC/TH3 VDD_3 D10 H5 NC/TH3 VDD_3 D10 H5 NC/TH3 VDD_3 D10 H5 NC/TH3 VDD_3 D10
H6 K3 C565 E@.022U_4 H6 K3 C51 E@.022U_4 H6 K3 C90 E@.022U_4 H6 K3 C618 E@.022U_4
NC/TH4 VDD_4 C568 E@.022U_4 NC/TH4 VDD_4 C52 E@.022U_4 NC/TH4 VDD_4 C102 E@.022U_4 NC/TH4 VDD_4 C622 E@.022U_4
H7 NC/TH5 VDD_5 K6 H7 NC/TH5 VDD_5 K6 H7 NC/TH5 VDD_5 K6 H7 NC/TH5 VDD_5 K6
H8 K7 C567 E@.022U_4 H8 K7 C56 E@.022U_4 H8 K7 C128 E@.022U_4 H8 K7 C609 E@.022U_4
NC/TH6 VDD_6 C569 E@.022U_4 NC/TH6 VDD_6 C55 E@.022U_4 NC/TH6 VDD_6 C120 E@.022U_4 NC/TH6 VDD_6 C611 E@.022U_4
G5 NC/TH7 VDD_7 K10 G5 NC/TH7 VDD_7 K10 G5 NC/TH7 VDD_7 K10 G5 NC/TH7 VDD_7 K10
G6 C566 E@.022U_4 G6 C61 E@.022U_4 G6 C81 E@.022U_4 G6 C617 E@.022U_4
NC/TH8 NC/TH8 NC/TH8 NC/TH8
E5 NC/TH9 E5 NC/TH9 E5 NC/TH9 E5 NC/TH9
E6 C560 E@10U/10V_8 E6 C54 E@10U/10V_8 E6 C108 E@10U/10V_8 E6 C251 E@10U/10V_8
NC/TH10 C561 E@22U/10V_8 NC/TH10 C58 E@22U/10V_8 NC/TH10 C92 E@22U/10V_8 NC/TH10 C252 E@22U/10V_8
E7 NC/TH11 E7 NC/TH11 E7 NC/TH11 E7 NC/TH11
E8 NC/TH12 E8 NC/TH12 E8 NC/TH12 E8 NC/TH12
F5 +1.8V F5 +1.8V F5 +1.8V F5 +1.8V
NC/TH13 NC/TH13 NC/TH13 NC/TH13
C F6 NC/TH14 F6 NC/TH14 More Memory F6 NC/TH14 More Memory F6 NC/TH14
C
F7 NC/TH15 More Memory F7 NC/TH15 decoupling
F7 NC/TH15 decoupling
F7 NC/TH15 More Memory
F8 F8 F8 F8
NC/TH16 decoupling NC/TH16 NC/TH16 NC/TH16 decoupling
D6 VSS_0 D6 VSS_0 D6 VSS_0 D6 VSS_0
D7 VSS_1 D7 VSS_1 D7 VSS_1 D7 VSS_1
D9 B2 C559 E@220P D9 B2 C43 E@220P D9 B2 C132 E@220P D9 B2 C600 E@220P
VSS_2 VDDQ_0 VSS_2 VDDQ_0 VSS_2 VDDQ_0 VSS_2 VDDQ_0
J5 VSS_3 VDDQ_1 B4 J5 VSS_3 VDDQ_1 B4 J5 VSS_3 VDDQ_1 B4 J5 VSS_3 VDDQ_1 B4
J6 B6 C579 E@4700P J6 B6 C49 E@4700P J6 B6 C80 E@4700P J6 B6 C607 E@4700P
VSS_4 VDDQ_2 VSS_4 VDDQ_2 VSS_4 VDDQ_2 VSS_4 VDDQ_2
J7 VSS_5 VDDQ_3 B7 J7 VSS_5 VDDQ_3 B7 J7 VSS_5 VDDQ_3 B7 J7 VSS_5 VDDQ_3 B7
J8 B9 C586 E@.1U_4 J8 B9 C63 E@.1U_4 J8 B9 C85 E@.1U_4 J8 B9 C606 E@.1U_4
VSS_6 VDDQ_4 VSS_6 VDDQ_4 VSS_6 VDDQ_4 VSS_6 VDDQ_4
K4 VSS_7 VDDQ_5 B11 K4 VSS_7 VDDQ_5 B11 K4 VSS_7 VDDQ_5 B11 K4 VSS_7 VDDQ_5 B11
K9 VSS_8 VDDQ_6 D2 K9 VSS_8 VDDQ_6 D2 K9 VSS_8 VDDQ_6 D2 K9 VSS_8 VDDQ_6 D2
D4 D11 C577 E@10U/10V_8 D4 D11 C53 E@10U/10V_8 D4 D11 C97 E@10U/10V_8 D4 D11 C79 E@10U/10V_8
VSS_9 VDDQ_7 VSS_9 VDDQ_7 VSS_9 VDDQ_7 VSS_9 VDDQ_7
C8 VSSQ_0 VDDQ_8 E3 C8 VSSQ_0 VDDQ_8 E3 C8 VSSQ_0 VDDQ_8 E3 C8 VSSQ_0 VDDQ_8 E3
C9 E10 C576 E@22U/10V_8 C9 E10 C57 E@22U/10V_8 C9 E10 C88 E@22U/10V_8 C9 E10 C78 E@22U/10V_8
VSSQ_1 VDDQ_9 VSSQ_1 VDDQ_9 VSSQ_1 VDDQ_9 VSSQ_1 VDDQ_9
C10 VSSQ_2 VDDQ_10 F3 C10 VSSQ_2 VDDQ_10 F3 C10 VSSQ_2 VDDQ_10 F3 C10 VSSQ_2 VDDQ_10 F3
D5 VSSQ_3 VDDQ_11 F10 D5 VSSQ_3 VDDQ_11 F10 D5 VSSQ_3 VDDQ_11 F10 D5 VSSQ_3 VDDQ_11 F10
D8 VSSQ_4 VDDQ_12 H3 Memory D8 VSSQ_4 VDDQ_12 H3 D8 VSSQ_4 VDDQ_12 H3 D8 VSSQ_4 VDDQ_12 H3
E4 VSSQ_5 VDDQ_13 H10
decoupling
E4 VSSQ_5 VDDQ_13 H10 E4 VSSQ_5 VDDQ_13 H10 E4 VSSQ_5 VDDQ_13 H10 Memory
E9 VSSQ_6 VDDQ_14 J3 E9 VSSQ_6 VDDQ_14 J3 E9 VSSQ_6 VDDQ_14 J3 Memory E9 VSSQ_6 VDDQ_14 J3
decoupling
F4 J10 F4 J10 +1.8V F4 J10 F4 J10
F9
VSSQ_7 VDDQ_15 +1.8V
F9
VSSQ_7 VDDQ_15
F9
VSSQ_7 VDDQ_15 +1.8V decoupling F9
VSSQ_7 VDDQ_15 +1.8V
VSSQ_8 VSSQ_8 VSSQ_8 VSSQ_8
G4 VSSQ_9 G4 VSSQ_9 G4 VSSQ_9 G4 VSSQ_9
G9 VSSQ_10 G9 VSSQ_10 G9 VSSQ_10 G9 VSSQ_10
H4 VSSQ_11 H4 VSSQ_11 H4 VSSQ_11 H4 VSSQ_11
H9 VSSQ_12 H9 VSSQ_12 H9 VSSQ_12 H9 VSSQ_12
J4 VSSQ_13 J4 VSSQ_13 J4 VSSQ_13 J4 VSSQ_13
J9 VSSQ_14 J9 VSSQ_14 J9 VSSQ_14 J9 VSSQ_14
A3 VSSQ_15 A3 VSSQ_15 A3 VSSQ_15 A3 VSSQ_15
C3 VSSQ_16 C3 VSSQ_16 C3 VSSQ_16 C3 VSSQ_16
C4 VSSQ_17 C4 VSSQ_17 C4 VSSQ_17 C4 VSSQ_17
C5 VSSQ_18 C5 VSSQ_18 C5 VSSQ_18 C5 VSSQ_18
A10 VSSQ_19 A10 VSSQ_19 A10 VSSQ_19 A10 VSSQ_19
E@VRAM_8MX32-2A E@VRAM_8MX32-2A E@VRAM_8MX32-2A E@VRAM_8MX32-2A
PBGA144-VRAM PBGA144-VRAM PBGA144-VRAM PBGA144-VRAM
B B

+1.8V VGA DDR MEMORY A +1.8V +1.8V +1.8V


@64/128MBytes DDR 128Mbit 1MX32X4 uBGA VGA DDR MEMORY B
8Mx32 AKD56WCT503 K4D55323QF-GC33 1.8V @64/128MBytes DDR 128Mbit 1MX32X4 uBGA

MAA[0..13] <13> 4Mx32 AKD35W-T506 K4D263238E-GC33 2.5V


C563 C45 C137 C603
E@1U/10V R336 E@1U/10V R36 E@1U/10V R67 E@1U/10V R362
MDA[0..63] <13> MAB[0..13] <13>
E@4.99K/F E@4.99K/F E@4.99K/F E@4.99K/F
MDB[0..63] <13>
MAVREF0_A MAVREF1_A MBVREF0_B MBVREF1_B
-DQMA[0..7] <13>

QSA[0..7] <13> -DQMB[0..7] <13>


C562 R337 C42 R38 C136 R66 C610 R363
E@1U/10V E@4.99K/F E@1U/10V E@4.99K/F E@1U/10V E@4.99K/F E@1U/10V E@4.99K/F
QSB[0..7] <13>

Place close to memory


Place close to memory

R340 E@56_4 R62 E@56_4


<13> M_CLKA0 <13> M_CLKB0
M_CLKA0-1 C564 E@.01U/16V_4 M_CLKB0-1 C115 E@.01U/16V_4

R339 E@56_4 R59 E@56_4


<13> -M_CLKA0 <13> -M_CLKB0
R43 E@56_4 R360 E@56_4
<13> M_CLKA1 <13> M_CLKB1
A M_CLKA1-1 C47 E@.01U/16V_4 M_CLKB1-1 C602 E@.01U/16V_4 A

R41 E@56_4 R361 E@56_4


<13> -M_CLKA1 <13> -M_CLKB1

At least a 2.5:1 spacing between the pair At least a 2.5:1 spacing between the pair
These resistors and caps must be placed to minimize These resistors and caps must be placed to minimize
any stubs. These must also be placed after the any stubs. These must also be placed after the PROJECT : ZL3
memory memory
Quanta Computer Inc.
Size Document Number Rev
C C
VGA DDR VRAM-A CANNEL
Date: Tuesday, March 29, 2005 Sheet 14 of 40
5 4 3 2 1
5 4 3 2 1

D D

SDVOB_R+
<6> SDVOB_R+
SDVOB_R-
<6> SDVOB_R-
SDVOB_G+
<6> SDVOB_G+
SDVOB_G-
<6> SDVOB_G-
DVI_AVDD
C223
SDVOB_B+
<6> SDVOB_B+
SDVOB_B- INT- 1 2
<6> SDVOB_B-
R60 ID@1K_4
+2.5V 1 2 SDVO_CTRLCLK SDVOB_CLK+
<6> SDVOB_CLK+ ID@.01U/16V_4 GMCHEXP_RXN1 <6,11>
SDVOB_CLK-
<6> SDVOB_CLK- C226 GMCHEXP_RXP1 <6,11>
R63 ID@1K_4
+2.5V 1 2 SDVO_CTRLDATA INT+ 1 2

DVI_AVDD
ID@.01U/16V_4
PULL LOW FOR DVO NOT PRESENT(INTERNAL PULLLOW IN 915GM)

+2.5V 250mA

48
47
46
45
44
43
42
41
40
39
38
37
R58 R56 U5
+3V 190mA ID@10K_4 *100K_4

AVDD3

SDVOB_CLK+
AGND3

SDVOB_B+

SDVOB_G+
AVDD2

AGND2

SDVOB_R+
SDVOB_CLK-

SDVOB_B-

SDVOB_G-

SDVOB_R-
+2.5V 1 2 1 2

L14 L15
ID@BLM11A601S ID@BLM11A601S
C +3V 1 2 DVI_AVDD_PLL 1 36 DVI_AVDD 1 2 +2.5V C
AVDD_PLL AVDD1
<6,11,18,21,29,31,32,33> PLTRST# 2 RESET* SDVOB_STALL- 35
1

1
C91 3 34 C83 C84 C103
C87 AS SDVOB_STALL+ INT- C93
<6> SDVO_CTRLCLK 4 SPC SDVOB_INT- 33
ID@.1U_4 ID@10U/10V_8 5 32 INT+ ID@.1U_4 ID@.1U_4 ID@.1U_4 ID@10U/10V_8
<6> SDVO_CTRLDATA
2

2
SPD SDVOB_INT+
6 AGND_PLL AGND1 31
7 DGND1 DGND2 30
DVODATA 8 29
SD_PROM HPDET TMDS_HPD <11,33>
DVOCLK 9 28 DVI_DVDD
L17 SC_PROM DVDD2 R65
<11,33> TMDS_DDCDATA 10 SD_DDC ATPG 27 2 1 ID@10K_4
ID@BLM11A601S 11 26 R69 2 1 ID@10K_4
<11,33> TMDS_DDCCLK SC_DDC SCEN
+2.5V 1 2 DVI_DVDD 12 25
DVDD1 VSWING

2
TGND1

TGND2
TVDD1

TVDD2
TDC0*

TDC1*

TDC2*
1

TDC0

TDC1

TDC2
C150 C130 R71

TLC*
TLC
C147 ID@1.2K_4
ID@.1U_4 ID@.1U_4 ID@10U/10V_8
2

ID@CH7307C-DE

13
14
15
16
17
18
19
20
21
22
23
24

1
L65
ID@BLM11A601S
DVI_TVDD 1 2 +3V

1
C181 C180
C596
ID@.1U_4 ID@.1U_4 ID@10U/10V_8

2
DVI_CLK-
DVI_CLK+

DVI_TX0-
DVI_TX0+
B B
DVI_TX1-
DVI_TX1+

DVI_TX2-
DVI_TX2+

ALWAYS NOT ON, TEST ONLY

+3V +3V DVI_CLK- R78 1 2 ID@0_4 CLK-


U7 CLK- <11,33>
DVI_CLK+ R79 1 2 ID@0_4 CLK+
CLK+ <11,33>
DVOCLK 6 1
DVODATA SCL A0 DVI_TX0- R80
5 SDA A1 2 1 2 ID@0_4 TX0-
TX0- <11,33>
3 C170 DVI_TX0+ R81 1 2 ID@0_4 TX0+
A2 TX0+ <11,33>
*.1U_4
7 8 DVI_TX1- R82 1 2 ID@0_4 TX1-
WP VCC TX1- <11,33>
4 DVI_TX1+ R83 1 2 ID@0_4 TX1+
GND TX1+ <11,33>
*AT24C16 DVI_TX2- R84 1 2 ID@0_4 TX2-
TX2- <11,33>
DVI_TX2+ R85 1 2 ID@0_4 TX2+
TX2+ <11,33>

A A

R359 *1K_4
+3V 1 2 DVOCLK QUANTA
R358 *1K_4
+3V 1 2 DVODATA
Title
COMPUTER
CH7306/7

Size Document Number Rev


CustomZL3 C

Date: Tuesday, March 29, 2005 Sheet 15 of 40


5 4 3 2 1
5 4 3 2 1

+3V

+3VSUS
TRACE
R10
I@10K_4 PULL HIGH TO +3V_S5 AT PAGE19 80MIL
C551 U23
D15 R334 0_8
DISPON 2 1 LID591# .1U_4 6 1 LCDVCC_1 LCDVCC
LID591# <19,29> IN OUT
D D
BAS316 4 2 C552 C553 C555 C556 C554
IN GND
DISP_ON 3 5 .1U_4 10U/10V_8 .1U_4 .01U/16V_4 10U/10V_8
<6,11> DISP_ON ON/OFF GND

AAT4280_3
SW2
D16
2 1 BLON <6,11> 1 3
2 4
I@BAS316
MISAKI_LID

R667 E@1K_4

Lid Switch
3

2 TXUCLKOUT- TXUOUT2-
EC_FPBACK# <29> <6,11> TXUCLKOUT- 1 21 TXUOUT2- <6,11>
Q2 TXUCLKOUT+ TXUOUT2+
<6,11> TXUCLKOUT+ 2 22 TXUOUT2+ <6,11>
DTC144EU +2.5V +2.5V +3V
TXUOUT0- 3 23 TXUOUT1-
<6,11> TXUOUT0- TXUOUT1- <6,11>
1

TXUOUT0+ 4 24 TXUOUT1+
<6,11> TXUOUT0+ 5 25 TXUOUT1+ <6,11>
R328 TXLOUT2- 6 26 INVCC0 R335 0_8 VIN
<6,11> TXLOUT2- 7 27
R322 2.2K_4 TXLOUT2+
<6,11> TXLOUT2+ 8 28
2.2K_4 VADJ L64 BK1608LL121
9 29 CONTRAST <29>

2
Q55 TXLOUT1- DISPON
<6,11> TXLOUT1- 10 30
TXLOUT1+
<6,11> TXLOUT1+ 11 31
C 1 3 EDIDCLK C34 .1U_4 C
<6> I_EDIDCLK 12 32
TXLOUT0-
<6,11> TXLOUT0- 13 33
I@FDV301N TXLOUT0+ LCDVCC
<6,11> TXLOUT0+ 14 34
TXLCLKOUT- 15 35
<11> EDIDCLK <6,11> TXLCLKOUT- 16 36 +5V
TXLCLKOUT+
<6,11> TXLCLKOUT+ 17 37 VIN
+2.5V +2.5V +3V EDIDCLK 18 38
EDIDDATA 19 39
20 40 +3VSUS
41 43

1
C558 C557

45

46
R332 R331 42 44
+
2.2K_4 2.2K_4 CN2 1000P_4
2

Q56 FOXCONN_LVDS *10U/25V-T

2
1 3 EDIDDATA
<6> I_EDIDDATA
I@FDV301N

<11> EDIDDATA ADD LEVEL SHIFT FOR EDID


C: Change to FDV301 for Vgs issue
U12
PR_INSERT_5V 6 5 +5V
<17,33> PR_INSERT_5V SEL VCC
TV_Y/G 4 1 TV_Y/G_PR
COM IN_B1 TV_Y/G_PR <33>
3 TV_Y/G_SYS
B IN_B0 B
2 GND CN23

5
+5V L26 L36
TV_C/R_SYS TV-CHROMA 6 4 TV-LUMA TV_Y/G_SYS

5
D@SN74LVC1G3157DCKR 6 4
FBM-10-160808-151T FBM-10-160808-151T
C256 U10
PR_INSERT_5V +5V R129 C246 C239 C268 C257 R136
.1U_4 6 SEL VCC 5 S-VIDEO 9 9 8 8

TV_C/R 4 1 TV_C/R_PR 150/F_4 6P_4 6P_4 6P_4 6P_4 150/F_4


COM IN_B1 TV_C/R_PR <33>
3 TV_C/R_SYS
IN_B0
2 GND 3 3 1
+5V

2
7

2
D@SN74LVC1G3157DCKR

C247
U11 L29
.1U_4
PR_INSERT_5V 6 5 +5V TV-COMP TV_COMP_SYS
SEL VCC
TV_COMP 4 1 TV_COMP_PR FBM-10-160808-151T
COM IN_B1 TV_COMP_PR <33>
R135
3 TV_COMP_SYS C249 C253
IN_B0 150/F_4
2 GND
+5V 6P_4 6P_4

D@SN74LVC1G3157DCKR

C254 R416 I@0_4 TV_Y/G


<6> INT_TV_Y/G
.1U_4
R620 ND@0_4 R417 I@0_4 TV_C/R
A <6> INT_TV_C/R A
TV_Y/G 1 2 TV_Y/G_SYS
R415 I@0_4 TV_COMP
<6> INT_TV_COMP
R621 ND@0_4
TV_C/R 1 2 TV_C/R_SYS
R404 E@0_4 TV_Y/G
<11> EXT_TV_Y/G
R622 ND@0_4
TV_COMP 1 2 TV_COMP_SYS
<11> EXT_TV_C/R
R405 E@0_4 TV_C/R PROJECT : ZL3
R403 E@0_4 TV_COMP
<11> EXT_TV_COMP Quanta Computer Inc.
ADD CIRCUITS WHEN NO DOCKING
Size Document Number Rev
DVO CH7011A & RJ45-11 CON C

Date: Friday, April 15, 2005 Sheet 16 of 40


5 4 3 2 1
1 2 3 4 5 6 7 8

U20 +5V
R412 I@0_4 VGA_RED PR_INSERT_5V 6 5 +5V CRTVDD3
<6> INT_VGA_RED <16,33> PR_INSERT_5V SEL VCC
R413 I@0_4 VGA_GRN +3V R316 E@0_4 CRTDDCPU
<6> INT_VGA_GRN
R414 I@0_4 VGA_BLU VGA_RED 4 1 VGA_RED_PR
<6> INT_VGA_BLU COM IN_B1 VGA_RED_PR <33>
C31 +2.5V R317 I@0_4
3 VGA_RED_SYS .1U_4
IN_B0
SEL FUNCTION 2 GND R318 R315
RN111 1 2 I@4P2R-S-0 VSYNC LOW IN_B0 2.2K_4 2.2K_4
<6> INT_VSYNC
3 4 HSYNC D@SN74LVC1G3157DCKR
<6> INT_HSYNC
HIGH IN_B1

2
U19 +5V
A RN112 3 4 I@4P2R-S-0 CRTDCLK PR_INSERT_5V 6 5 +5V A
<6> INT_DDCCLK CRTDDAT SEL VCC CRTDDAT DDCDAT_1
<6> INT_DDCDAT 1 2 1 3
VGA_GRN 4 1 VGA_GRN_PR
COM IN_B1 VGA_GRN_PR <33>
C30 Q29
3 VGA_GRN_SYS .1U_4 FDV301N
IN_B0 DDCDAT_1 <33>
2 GND

D@SN74LVC1G3157DCKR CRTDDCPU CRTVDD3


R394 E@0_4 VGA_RED +5V
<11> EXT_VGA_RED U18
R395 E@0_4 VGA_GRN
<11> EXT_VGA_GRN
R396 E@0_4 VGA_BLU PR_INSERT_5V 6 5 +5V
<11> EXT_VGA_BLU SEL VCC
VGA_BLU 4 1 VGA_BLU_PR C29 R314
COM IN_B1 VGA_BLU_PR <33>
.1U_4 R319 2.2K_4
3 VGA_BLU_SYS 2.2K_4
RN105 3 IN_B0
<11> EXT_VSYNC 4 E@4P2R-S-0VSYNC 2 GND

2
1 2 HSYNC
<11> EXT_HSYNC
D@SN74LVC1G3157DCKR CRTDCLK 1 3 DDCCLK_1
RN106 1 2 E@4P2R-S-0CRTDCLK
<11> EXT_DDCCLK CRTDDAT Q30
<11> EXT_DDCDAT 3 4
R623 ND@0_4 FDV301N
DDCCLK_1 <33>
VGA_RED 1 2 VGA_RED_SYS

R624 ND@0_4 C: Change to FDV301N for Vgs issue.


VGA_GRN 1 2 VGA_GRN_SYS

R625 ND@0_4
VGA_BLU 1 2 VGA_BLU_SYS

B CN15 B

16
CRT_CONN
6
VGA_RED_SYS L5 0 CRT_R_1 CRT_R_2 1 11
L2 BLM18BA220SN1D 7
VGA_GRN_SYS L6 0 CRT_G_1 CRT_G_2 2 12 DDCDAT_1
L3 BLM18BA220SN1D 8
VGA_BLU_SYS L7 0 CRT_B_1 CRT_B_2 3 13 CRT_HS_1
L4 BLM18BA220SN1D CRTVDD3 9
TO CRT 4 14 CRT_VS_1
R5 R4 R3 C12 C11 C10 C7 C6 C5 C4 C3 C2 10
5 15 DDCCLK_1

150/F_4 150/F_4 150/F_4


10P_4 10P_4 10P_4 *22P_4 *22P_4 *22P_4 10P_4 10P_4 10P_4

17
+2.5V +3V

+5V

R2 R6
I@0_8 E@0_8 AHCT1G125DCH
C534 .1U_4 C33 .1U_4
D2
CRTVSYNC <33>
5

DA204U D8
U21 CH551
C 1 F2 C
VGA_RED_SYS VSYNC 2 4 R8 1 2 0_4 CRTVSYNC L8 0 CRT_VS_1 2 1 CRTVDD2 2 1 CRTVDD3
3 +5V
C8
.1U_4 POLY_SWITCH_1.1A
2
3

D7 +5V R323
DA204U
1K_4
1 C535 .1U_4
1

VGA_BLU_SYS
3
CRTHSYNC <33>
5

2 U22

D3 HSYNC 2 4 R9 1 2 0_4 CRTHSYNC L12 0 CRT_HS_1


DA204U
C9 C32
1
3

VGA_GRN_SYS AHCT1G125DCH CLOSE TO U41, U42 *22P_4 *22P_4


3

CHANGE TO 0ohm for Acer LCD

D D

PROJECT : ZL3
Quanta Computer Inc.
Size Document Number Rev
CRT & S-VIDEO C

Date: Tuesday, March 29, 2005 Sheet 17 of 40


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
C803 15P_4
2 1 CLK_32KX1 PCI Pullups
VCCRTC +3V

2
RP22
Y7 R539 REQ1# 6 5
RBAYID0 7 4 REQ4#
R543 32.768KHZ 10M_4 RBAYID1 8 3 IRDY#
*330K U38A REQ3# 9 2 DEVSEL#

1
10 1 PLOCK#
VCCRTC C804 15P_4 +3V
Y1 RTCX1 LAD0 P2 LAD0/FWH0 <29,31>
INTVRMEN 2 1 CLK_32KX2 Y2 N3
RTCX2 LAD1/FB1 LAD1/FWH1 <29,31> +VCCP 10P8R-8.2K

RTC
R541 N5
LAD2/FB2 LAD2/FWH2 <29,31>
2

RTC_RST# AA2 N4 +3V


RTCRST# LAD3/FB3 LAD3/FWH3 <29,31> RP23
R540 N6 LPC_DRQ0#
LDRQ0# LPC_DRQ0# <31>
0_4 180K_4 SM_INTRUDER# AA3 P4 LPC_DRQ1# PERR# 6 5

LPC
A VCCRTC INTRUDER# LDRQ1#/GPI41 A

1
R546 1M INTVRMEN AA5 P3 1 2 SERR# 7 4 PIRQD#
INTVRMEN LFRAME# LFRAME#/FWH4 <29,31>
C795 R608 10_4 R484 FRAME# 8 3 REQ2#
1

.1U_4 B: SUPRESS AUDIO NOISE 75/F_4 REQ0# 9 2 TRDY#

2
10 1 STOP#
+3V
<3> NMI AF25 NMI CPUPWRGD/GPO49 AG25 CPUPWRGD <3>
<3> A20M# AF23 A20M# INIT3_3V# AE22 T84 10P8R-8.2K
R_FERR# AF24 AE23 THERMTRIP#_ICH R483 56_4
3V_ALWAYS <3> FERR# FERR# THRMTRIP# THERMTRIP# <3,6>
R474 56_4 AG26 AG27
D30
RTC_RST#
<3> IGNNE#
<3> INTR AG24
IGNNE#
INTR
CPU SMI#
STPCLK# AE26
R_CPUSLP#
SMI# <3>
STPCLK# <3>
2 1 <3> CPUINIT# AF27 INIT# CPUSLP# AE27 1 2 CPUSLP# <3,5> B: DEPOP R467
RCIN# AD23 AD27 *0_4 R467
<29> RCIN# RCIN# DPSLP#/TP[2] DPSLP# <3> INSTALL FOR DOTHAN-A AND NOT INSTALL FOR DOTHAN-B
RB500 GATEA20 AF22 AE24 1 2
<29> GATEA20 A20GATE DPRSLP#/TP[4] DPRSLP# <3>
0_4 R469
Depop for Dothan. Populate for Yonah B: POP R469
AD0 E2 J6
AD0 C/BE0# CBE0# <22,23,25>
D29 AD1 E5 H6 +3V
AD1 C/BE1# CBE1# <22,23,25>
1
R_3VRTC 2 1 AD2 C2 G4 RP24
AD2 C/BE2# CBE2# <22,23,25>
G2 AD3 F5 G2 LPC_DRQ1# 8 7
AD3 C/BE3# CBE3# <22,23,25>
RB500 C801 *SHORT_ PAD1 AD4 F3 PIRQA# 6 5
2.2U_6.3V AD5 AD4 PIRQC#
E9 J3 FRAME# <22,23,25> 4 3
2

AD6 AD5 FRAME# PIRQB#


F2 AD6 IRDY# A3 IRDY# <22,23,25> 2 1
AD7 D6 J2
AD7 TRDY# TRDY# <22,23,25>
AD8 E6 C3 8P4R-10K
AD8 DEVSEL# DEVSEL# <22,23,25>
R561 AD9 D3 J1
AD9 STOP# STOP# <22,23,25>
AD10 A2 E1 +3V
1K_4 R572
3K
5VPCU AD11
AD12
D2
AD10
AD11
PCI PAR
SERR# G5
PAR <22,23,25>
SERR# <22,23,25> 8P4R-10K
D5 AD12 PERR# E3 PERR# <22,23,25>
B 3VRTC 1 3 RTC_N01 AD13 H3 C5 PLOCK# GATEA20 1 2 B
AD13 PLOCK# PLOCK# <23>
AD14 B4 SERIRQ 3 4
AD14 <19,22,23,29,31> SERIRQ
Q47 AD15 J5 L5 REQ0# 5 6
AD15 REQ0# REQ0# <25> REQ1 : 1394/CARDBUS <19,33> LUSB2#
MMBT3904 AD16 K2 B5 REQ1# IRQ14 7 8
REQ1# <23>
2

R569 AD17 AD16 REQ1# REQ2# REQ2 : MINI PCI


K5 AD17 REQ2# M5 REQ2# <22>
1

47K AD18 D4 B8 REQ3# RP21


BT2 AD19 AD18 REQ3# REQ4#
L6 AD19 REQ4#/GPI40 F7
BATCON RTC_N02 AD20 G3 E8 RBAYID1
AD20 REQ5#/GPI1 RBAYID1 <21>
AD21 H4 B7 RBAYID0 FERR# 1 2 +VCCP
RBAYID0 <21>
2

AD22 AD21 REQ6#/GPI0


H2 AD22
AD23 H5 C1 GNT0# R473 56_4
RTC R567
150K
AD24
AD25
B3
M6
AD23
AD24
GNT0#
GNT1# B6
F1
GNT1#
GNT2#
GNT0# <25>
GNT1# <23>
GNT2# <22>
AD26 AD25 GNT2# DPRSLP#
B2 AD26 GNT3# C8 T192 1 2 +VCCP
AD27 K6 E7 T98
AD28 AD27 GNT4#/GPO48 R471 *56_4
K3 AD28 GNT5#/GPO17 F6 T100
AD29 A5 D8 Depop for Dothan. Populate for Yonah
AD29 GNT6#/GPO16 RBAYON# <21>
AD30 L1
AD31 AD30
<22,23,25> AD[0..31] K4 AD31 PIRQA# N2 PIRQA# <23,25>
L2 RCIN# R475 2 1 10K_4 +3V
PIRQB# PIRQB# <22>
PME# INTERNAL 20K PULLUP PIRQC# M1 PIRQC# <23>
<22,23,25> PME# P6 PME# PIRQD# L3 PIRQD# <22,23>
G6 D9 LUSB1# LUSB1# R645 2 1 10K_4
<2> PCLK_ICH PCICLK PIRQE#/GPI2 LUSB1# <33>
R2 C7 MB_ID0
<22,23,24,25> PCIRST# PCIRST# PIRQF#/GPI3 MB_ID0 <19>
R234 2 1 0_4 R5 C6 MB_ID1 LUSB1#/2# NEW ADD FOR EZ4
<6,11,15,21,29,31,32,33> PLTRST# PLTRST# PIRQG#/GPI4 MB_ID1 <19>
2

AF19 M3 MB_ID2 Distance between the ICH-6 M and


<22,23,25,29,31> CLKRUN# CLKRUN#/GPIO32 PIRQH#/GPI5 MB_ID2 <19> LEGACY USB cap on the "P" signal should be
R249
2 1 identical distance between the
*33_4 +3V ICH-6 M and cap on the "N" signal
R501 10K_4 PDD0 for same pair.
C AD14 AC19 -HDD0_LED <30> C
2 1

PDD1 DD0 SATALED#


AF15 DD1
PDD2 AF14 AE3 SATA_RXN0_C
C450 PDD3 DD2 SATA0_RXN SATA_RXP0_C C774 SA@3900PF_4
AD12 DD3 SATA0_RXP AD3
*18P_4 PDD4 AE14 AG2 SATA_TXN0_C SATA_RXN0_C 1 2 SATA_RXN0 <21>
1

PDD5 DD4 SATA0_TXN SATA_TXP0_C


AC11 DD5 SATA0_TXP AF2
IDE

PDD6 AD11 C777 SA@3900PF_4


PDD7 DD6 SATA_RXP0_C
B: NOT INSTALL AB11 DD7 SATA2_RXN AD7 1 2 SATA_RXP0 <21>
PDD8 AE13 AC7
PDD9 DD8 SATA2_RXP C779 SA@3900PF_4
AF13 AF6 T194
SATA
PDD[0..15] PDD10 DD9 SATA2_TXN SATA_TXN0_C
<21> PDD[0..15] AB12 DD10 SATA2_TXP AG6 T195 1 2 SATA_TXN0 <21>
PDD11 AB13
PDDREQ PDD12 DD11 C781 SA@3900PF_4
<21> PDDREQ AC13 DD12 SATA_CLKN AC2 CLK_PCIE_SATA# <2>
PDIOW# PDD13 AE15 AC1 SATA_TXP0_C 1 2
<21> PDIOW# DD13 SATA_CLKP CLK_PCIE_SATA <2> SATA_TXP0 <21>
PDIOR# PDD14 AG15
<21> PDIOR# DD14
PIORDY PDD15 AD13 AG11 R516 24.9/F_4
<21> PIORDY DD15 SATARBIAS#
PDDACK# AF11 SATARBIAS Place within 500mils
<21> PDDACK# SATARBIAS
IRQ14 PDCS1# AD16 B: NOT STUFF WHEN NO SATA
<21> IRQ14
PDA1 PDCS3# AE17
DCS1# of ICH6 ball
<21> PDA1 DCS3#
PDA0 PDA0 AC16
<21> PDA0 DA0
PDCS1# PDA1 AB17 C10
<21> PDCS1# DA1 ACZ_BIT_CLK CD_BITCLKA <27>
PDA2 PDA2 AC17 B9 R229 39_4
<21> PDA2 DA2 ACZ_SYNC CD_SYNC <27>
PDCS3# PDIOR# AE16 A10
<21> PDCS3# DIOR# ACZ_RST# CD_RESET# <27>
PDIOW# AC14 DIOW#

2
AC-97/
AZALIA

PIORDY AF16 F11 C414


IORDY ACZ_SDIN0 CD_SDIN0 <27>
IRQ14 AB16 F10 T96
PDDREQ IDEIRQ ACZ_SDIN1 *10P_4
AB14 B10 T190

1
PIORDY PDDACK# DDREQ ACZ_SDIN2
+3V 2 1 AB15 DDACK# ACZ_SDO C9
CD_BITCLKA
D R513 4.7K_4 D
2

ICH6-M
R226

*47_4 R231 39_4


CD_SDOUTA <27>
QUANTA
1
2 1

C419
COMPUTER
2

C409 *10P_4 Title


*22P_4 ICH6-M (CPU,PCI,IDE,SATA,AC97)
1

Size Document Number Rev


ZL3 C

Date: Tuesday, March 29, 2005 Sheet 18 of 40


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U38B
CLK48_USB RP14
A A
D21 B20 NEWCARD OC4# 6 5 +3V_S5
<22> USBP0+ USBP0P USBP1P USBP1+ <32>
1

R472 BT C21 A20 OC0# 7 4


<22> USBP0- USBP0N USBP1N USBP1- <32>
OC0# C27 B27 OC1# OC5# 8 3 OC1#
10_4 OC0# OC1# OC6# OC2#
C19 USBP2P USBP3P B18 USBP3+ <22> M/B USB 9 2
T90 D19 A18 10 1
T87 OC2# B26
USBP2N USB USBP3N
C26 OC3#
USBP3- <22>
OC3# <22>
+3V_S5
1 2

C719 OC2# OC3#


D17 USBP4P USBP5P A16 USBP5+ <22> M/B USB 10P8R-10K
T91 E17 B16
USBP4N USBP5N USBP5- <22>
T88 OC4# C23 D23 OC5#
10P_4 OC4#/GPI9 OC5#/GPI10
D15 B14 USBP7+ <22> M/B USB
2

T93 USBP6P USBP7P


C15 USBP6N USBP7N A14 USBP7- <22>
T92 OC6# C25 C24 OC7# Place within 500mils of ICH-6
OC6#/GPI14 OC7#/GPI15 OC7# <22>
B22 R485 22.6/F_4
CLK48_USB USBRBIAS USBRBIAS
<2> CLK48_USB A27 CLK48 USBRBIAS# A22 2 1
+3V_S5 T25 Y25
<6> DMI_RXN0 DMI0_RXN DMI2_RXN DMI_RXN2 <6>
<6> DMI_RXP0 T24 DMI0_RXP DMI2_RXP Y24 DMI_RXP2 <6>
R27 W27
R248
R232
10K_4
10K_4
SMLINK0
SMLINK1
<6>
<6>
DMI_TXN0
DMI_TXP0 R26
DMI0_TXN
DMI0_TXP
DMI DMI2_TXN
DMI2_TXP W26
DMI_TXN2 <6>
DMI_TXP2 <6>

<6> DMI_RXN1 V25 DMI1_RXN DMI3_RXN AB24 DMI_RXN3 <6>


<6> DMI_RXP1 V24 DMI1_RXP DMI3_RXP AB23 DMI_RXP3 <6>
+3V_S5 U27 AA27
<6> DMI_TXN1 DMI1_TXN DMI3_TXN DMI_TXN3 <6>
<6> DMI_TXP1 U26 DMI1_TXP DMI3_TXP AA26 DMI_TXP3 <6>
RP25
7 8 BATLOW# <2> CLK_PCIE_ICH# AD25 DMI_CLKN DMI_ZCOMP F24 R213 24.9/F_4
5 6 RING# AC25 F23 DMICOMP 2 1 Place within 500mils of ICH-6
<2> CLK_PCIE_ICH DMI_CLKP DMI_IRCOMP +1.5V
3 4 SCI#
B 1 2 <32> PCIE_RXN0 H25 HSIN0 HSIN2 M25 PCIE_RXN2 <33> B
H24 M24
8P4R-10K
<32> PCIE_RXP0
<32> PCIE_TXN0 1 2 HSON0
HSOP0
G27
HSIP0
HSON0
PCI-EXPRESS HSIP2
HSON2 L27 HSON2
HSOP2
2 1
PCIE_RXP2 <33>
PCIE_TXN2 <33>
<32> PCIE_TXP0 1 2 G26 HSOP0 HSOP2 L26 2 1 PCIE_TXP2 <33>
+3V_S5 C721 N@.1U_4 C720 N@.1U_4 C712 C713
<33> PCIE_RXN1 K25 HSIN1 HSIN3 P24 T83 D@.1U_4 D@.1U_4
RP26 K24 P23 T85 B: BOM CHANGE
<33> PCIE_RXP1 HSIP1 HSIP3
7 8 PCLK_SMB 1 2 HSON1 J27 N27 T81
<33> PCIE_TXN1 HSON1 HSON3
5 6 SMB_LINK_ALERT# 1 2 HSOP1 J26 N26 T82
<33> PCIE_TXP1 HSOP1 HSOP3
3 4 LID591# C711 D@.1U_4 C710 D@.1U_4
1 2 PDAT_SMB Y4 W4 SMLINK0
<2,25,32,33> PCLK_SMB SMBCLK SMLINK0
W5 U6 SMLINK1
8P4R-10K <2,25,32,33> PDAT_SMB
<16,29> LID591#
LID591# W6
SMBDATA
SMBALERT#/GPI11
SM&SMI SMLINK1
LINKALERET# Y5 SMB_LINK_ALERT#

B: REMOVE RING FUNCTION


RING# T2 T4
RI# SLP_S3# SUSB# <29>
THRM# THRM# AC20 T5
+3V THRM# SLP_S4# SUSC# <29>
ICH_PWROK AA1 T6
<29> ICH_PWROK PWROK SLP_S5# T99
R496 8.2K_4 DPRSLPVR AE20 V5 RSMRST#
<34> DPRSLPVR
BATLOW# V2
DPRSLPVR/TP1
BATLOW#/TP0
PM LAN_RST#
SYS_RESET# U2
PCIE_WAKE#
DBR# <3>
PWRBTN# HAS INTERNAL PULLUP <29> DNBSWON# U1 PWRBTN# WAKE# U5
RSMRST# Y3 AG21 MCH_SYNC#
<29> RSMRST# RSMRST# MCH_SYNC#
R538 10K_4 ICH_PWROK IMVP_PWRGD AF21
<6,34> IMVP_PWRGD VRMPWRGD
R250 10K_4 RSMRST# AD19 AC21 MCH_SYNC# R494 10K_4
<6> PM_BMBUSY# BM_BUSY#/GPIO6 STP_PCI#/GPO18 STP_PCI# <2> +3V
<23,31> LPC_PD# W3 SUS_STAT#/LPCPD# STP_CPU#/GPO20 AD22 STP_CPU# <2,34>
<32> SUSCLK V6 SUSCLK SERIRQ AB20 SERIRQ <18,22,23,29,31>

<2> 14M_ICH E10 CLK14 GPIO25 P5 T102


F8 AF17 PCIE_WAKE# R233 1K_4 +3V_S5
<27> PCSPK SPKR SATA0GP/GPIO26
2

C <18,33> LUSB2# AE19 GPI7 GPIO27 R3 T200 C


R262 10K_4 KBSMI# R243 KBSMI# R1 T3
+3V_S5
33_4
<29> KBSMI#
<29,33> PR_STS
PR_STS
SCI#
M2
GPI8
GPI12
MISC&GPIO GPIO28
SATA1GP/GPIO29 AE18
T105

<29> SCI# R6 GPI13 SATA2GP/GPIO30 AF18


R545 10K_4 PR_STS AB21 AG18
<30> EMAIL_LED#
2 1

GPO19 SATA3GP/GPIO31
<21> RST_HDD# AD20 GPO21
C428 AD21 AF20 MPCIACT#
<21> RST_RBAY# GPO23 GPIO33 T189
V3 AC18 MB_ID3
6P_4 T201 GPIO24 GPIO34
1

2
+3V
CHANGE EMAIL_LED# FROM
E12 R503 needs to be pulled down if
GPIO24 D12
LAN_RXD0
E11
B12
EE_CS LAN_RXD1
C13
33_4 programmed as SATA
EE_SHCLK LAN LAN_RXD2
1

R246 R244 D11 C12

1
R227 R550 EE_DOUT LAN_TXD0
F13 EE_DIN LAN_TXD1 C11
10K_4 10K_4 10K_4 E13
10K_4 LAN_TXD2
MB_ID0 F12
MB_ID0 <18>
2

MB_ID1 LAN_CLK
MB_ID1 <18> LAN_RSTSYNC B11
MB_ID2
MB_ID2 <18>
MB_ID3 AC5 AD9
RSVD1 RSVD6 T95
T103 AD5 AF8
T101
T197
AF4
RSVD2
RSVD3
RESERVED RSVD7
RSVD8 AG8
T193
T191
AG4 RSVD4 RSVD9 U3 T104
R635 R544 R247 R245 T198 AC9
T97 RSVD5
RSVD9=TP3
*10K_4 *10K_4 *10K_4 *10K_4 ICH6-M
ID3 ID2 ID1 ID0
D D
ZL3/TM4600 0 0 0 0 DPRSLPVR

ZL3B/TM4100 0 0 1 0 QUANTA
ZL3D/AS1690 0 1 0 0 R640
100K_4 Title
COMPUTER
ICH6-M (USB,DMI,LPC)
ZL3F/AS3510 0 1 1 0 Size Document Number Rev
ZL3C/EX4100 ADD PULLLOW ZL3 C
1 0 1 1
Date: Tuesday, March 29, 2005 Sheet 19 of 40
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

L52 578mA
+1_5V_PCIE U38C U38D
+1.5V 1 2 +1.5V
1.77A

2
BLM41P600SPG + C375 C364 C374 AA22 AA19 C423 C376 C771 C389 C386 A1 G1
C379 VCC1_5_1 VCC1_5_79 VSS001 VSS087
AA23 VCC1_5_2 VCC1_5_80 AA20 A12 VSS002 VSS088 G12
220U/2.5V .1U_4 .1U_4 .1U_4 AA24 AA21 .01U/16V_4 A15 G21

1
VCC1_5_3 VCC1_5_81 VSS003 VSS089
AA25 VCC1_5_4 VCC1_5_82 L11 A19 VSS004 VSS090 G7
AB25 L12 .1U_4 .1U_4 .1U_4 .1U_4 A21 G9
VCC1_5_5 VCC1_5_83 VSS005 VSS091
AB26 VCC1_5_6 VCC1_5_84 L14 A23 VSS006 VSS092 H23
R514 10 AB27 L16 A26 H26
VCC1_5_7 VCC1_5_85 VSS007 VSS093
+5V F25 VCC1_5_8 VCC1_5_86 L17 A4 VSS008 VSS094 H27
F26 M11 A7 J23

CORE
VCC1_5_9 VCC1_5_87 VSS009 VSS095
F27 VCC1_5_10 VCC1_5_88 M17 A9 VSS010 VSS096 J24
A G22 VCC1_5_11 VCC1_5_89 P11 AA11 VSS011 VSS097 J25 A
D27
G23 VCC1_5_12 VCC1_5_90 P17 AA13 VSS012 VSS098 J4
2 1 V5REF 1mA G24 T11 AA16 K1
+3V VCC1_5_13 VCC1_5_91 VSS013 VSS099
G25 VCC1_5_14 VCC1_5_92 T17 AA4 VSS014 VSS100 K23
RB751V H21 VCC1_5_15 VCC1_5_93 U11 AB1 VSS015 VSS101 K26
1

2
C759 C382 H22 U12 AB10 K27
VCC1_5_16 VCC1_5_94 VSS016 VSS102
J21 VCC1_5_17 VCC1_5_95 U14 AB19 VSS017 VSS103 K7
1U/10V .1U_4 J22 U16 AB2 L13
2

1
CC0603 VCC1_5_18 VCC1_5_96 VSS018 VSS104
K21 U17 AB7 L15

PCIE
VCC1_5_19 VCC1_5_97 +3_3V_PCI VSS019 VSS105
K22 VCC1_5_20 VCC1_5_98 F9 AB9 VSS020 VSS106 L23
L21 VCC1_5_21 +3V AC10 VSS021 VSS107 L24
D25
L22 VCC1_5_22 VCC3_3_2 A6 AC12 VSS022 VSS108 L25

2
2 1 M21 B1 C422 C455 C392 AC22 M12
+5VSUS VCC1_5_23 VCC3_3_3 VSS023 VSS109
E: CHANGED FROM RB751V M22 VCC1_5_24 VCC3_3_4 E4 AC23 VSS024 VSS110 M13
N21 H1 AC24 M14
CH551 .1U_4 .1U_4 .1U_4
GND

1
VCC1_5_25 VCC3_3_5 VSS025 VSS111
N22 VCC1_5_26 VCC3_3_6 H7 AC26 VSS026 VSS112 M15
D26

IDE
10mA N23 VCC1_5_27 VCC3_3_7 J7 204mA AC3 VSS027 VSS113 M16
2 1 V5REF_SUS N24 L4 AC6 M23
+3V_S5 VCC1_5_28 VCC3_3_8 VSS028 VSS114
N25 VCC1_5_29 VCC3_3_9 L7 AD1 VSS029 VSS115 M26
RB751V P21 VCC1_5_30 VCC3_3_10 M7 AD10 VSS030 VSS116 M27
1

C733 C734 P25 P1 AD15 M4


VCC1_5_31 VCC3_3_11 +3_3V_ICH VSS031 VSS117
P26 VCC1_5_32 AD18 VSS032 VSS118 N1
1U/10V .1U_4 P27 AA12 AD2 N11
+3V
2

CC0603 VCC1_5_33 VCC3_3_12 VSS033 VSS119


R21 VCC1_5_34 VCC3_3_13 AA14 AD24 VSS034 VSS120 N12

2
R22 AA15 C469 C761 AD6 N13
VCC1_5_35 VCC3_3_14 VSS035 VSS121
T21 VCC1_5_36 VCC3_3_15 AA17 AE10 VSS036 VSS122 N14

PCI
T22 AC15 .1U_4 .1U_4 AE11 N15

1
VCC1_5_37 VCC3_3_16 VSS037 VSS123
U21 VCC1_5_38 VCC3_3_17 AD17 AE12 VSS038 VSS124 N16
U22 VCC1_5_39 VCC3_3_18 AG13 AE2 VSS039 VSS125 N17
B V21 VCC1_5_40 VCC3_3_19 AG16 AE21 VSS040 VSS126 N7 B
V22 VCC1_5_41 VCC3_3_20 AG19 +1.5V_S5 AE25 VSS041 VSS127 P12
W21 VCC1_5_42 VCC3_3_21 AA10 AE6 VSS042 VSS128 P13

2
W22 C381 AE7 P14
VCC1_5_43 VSS043 VSS129
Y21 VCC1_5_44 170mA AF1 VSS044 VSS130 P15
Y22 USB G19 .1U_4 AF10 P16

1
VCC1_5_45 VCCSUS1_5_1 VSS045 VSS131
AF12 VSS046 VSS132 P22
+1.5V AA6 VCC1_5_46 VCCSUS1_5_2 R7 +1.5V_S5 AF26 VSS047 VSS133 R11
AB4 VCC1_5_47 VCCSUS1_5_3 U7 AF3 VSS048 VSS134 R12
2

2
C420 AB5 C421 C430 AF7 R13
VCC1_5_48 VSS049 VSS135
AB6 VCC1_5_49 VCC1_5_67 G8 +1.5V AG1 VSS050 VSS136 R14
.1U_4 AC4 .1U_4 .1U_4 AG12 R15
1

1
VCC1_5_50 VSS051 VSS137
AD4 D24 AG14 R16
AE4
VCC1_5_51
VCC1_5_52
USB CORE VCC1_5_68
VCC1_5_69 D25 AG17
VSS052
VSS053
VSS138
VSS139 R17
AE5 VCC1_5_53 VCC1_5_70 D26 AG20 VSS054 VSS140 R23
AF5 VCC1_5_54 VCC1_5_71 D27 AG22 VSS055 VSS141 R24
+1.5V AG5 E20 AG3 R25
SATA

VCC1_5_55 VCC1_5_72 +1.5V VSS056 VSS142


VCC1_5_73 E21 AG7 VSS057 VSS143 R4

2
R466 L72 C390 C768
+1.5V AA7 VCC1_5_56 VCC1_5_74 E22 B13 VSS058 VSS144 T1
1 2VDMIPLL2 1 AA8 VCC1_5_57 VCC1_5_75 E23 B15 VSS059 VSS145 T12
2

C413 AA9 E24 .1U_4 .1U_4 B19 T13

1
1/F_4 1UH VCC1_5_58 VCC1_5_76 VSS060 VSS146
AB8 VCC1_5_59 VCC1_5_77 F20 B21 VSS061 VSS147 T14
2

C715 C714 .1U_4 AC8 G20 B23 T15


1

VCC1_5_60 VCC1_5_78 VSS062 VSS148


AD8 B24 T16
PCE/IDE

10U_6.3V VCC1_5_61 VSS063 VSS149


.01U/16V_4 AE8 P7 +2.5V B25 T23
1

VCC1_5_62 VCC2_5_2 VSS064 VSS150


AE9 VCC1_5_63 VCC2_5_4 AB18 25mA C14 VSS065 VSS151 T26

2
AF9 C380 C18 T27
REF

VCC1_5_64 VSS066 VSS152


AG9 VCC1_5_65 C20 VSS067 VSS153 T7
+3V A8 .1U_4 C22 U13

1
VCCDMIPLL V5REF1 V5REF VSS068 VSS154
C AC27 VCCDMIPLL V5REF2 AA18 C4 VSS069 VSS155 U15 C
E26 VCC3_3_1 D1 VSS070 VSS156 U23
+1.5V F21 V5REF_SUS D10 U24
V5REF_SUS VSS071 VSS157
2

C362 AE1 D13 U25


VCCSATAPLL VSS072 VSS158
+3V AG10 VCC3_3_22 VCCUSBPLL A25 +1.5V D14 VSS073 VSS159 V23
2

.1U_4 C792 A24 +3V_S5 D18 V26


1

VCCSUS3_3_20 VSS074 VSS160


2

2
C766 A13 C365 D20 V27
VCCLAN3_3/VCCSUS3_3_1 VSS075 VSS161
.1U_4 F14 AB3 VCCRTC 5uA 2 C367 D22 V4
1

VCCLAN3_3/VCCSUS3_3_2 VCCRTC VSS076 VSS162


.1U_4 G13 .01U/16V_4 D7 W1
1

1
VCCLAN3_3/VCCSUS3_3_3 VSS077 VSS163
G14 +1.5V_S5 .1U_4 E14 W23
1

VCCLAN3_3/VCCSUS3_3_4 VSS078 VSS164


VCCLAN1_5/VCCSUS1_5_1 G10 E15 VSS079 VSS165 W24
2

A11 G11 C418 6mA E18 W25


+3V_S5 VCCSUS3_3_1 VCCLAN1_5/VCCSUS1_5_2 VSS080 VSS166
U4 VCCSUS3_3_2 E19 VSS081 VSS167 W7
2

39mA C391 C387 V1 AB22 .1U_4 E25 Y23


1

VCCSUS3_3_3 V_CPU_IO1 VSS082 VSS168


V7 VCCSUS3_3_4 V_CPU_IO2 AD26 F17 VSS083 VSS169 Y26
.1U_4 .1U_4 W2 AG23 +VCCP F19 Y27
1

VCCSUS3_3_5 V_CPU_IO3 VSS084 VSS170


Y7 VCCSUS3_3_6 14mA F22 VSS085 VSS171 Y6
2

C16 C363 F4 E27


VCCSUS3_3_13 VSS086 VSS172
A17 VCCSUS3_3_7 VCCSUS3_3_14 D16
B17 E16 .1U_4
+3V_S5
1

VCCSUS3_3_8 VCCSUS3_3_15
C17 VCCSUS3_3_9 VCCSUS3_3_16 F15
2

C740 F18 F16 VCCRTC ICH6-M


VCCSUS3_3_10 VCCSUS3_3_17
G17 VCCSUS3_3_11 VCCSUS3_3_18 G15
.1U_4 G18 G16
1

VCCSUS3_3_12 VCCSUS3_3_19
23mA
2

2
C470 C473 C451
ICH6-M
1U/10V
1

1
+3V_S5
D .1U_4 .1U_4 D
2

C393 C453

.1U_4 .1U_4
QUANTA
1

Title
COMPUTER
ICH6-M (POWER&GND)

Size Document Number Rev


ZL3 C

Date: Tuesday, March 29, 2005 Sheet 20 of 40


1 2 3 4 5 6 7 8
1 2 3 4

CN31
<18> PDD[0..15] PDD8 HDD_CON CN30
GND23 23
PDD9 -IDERST
PDD10 PDD7 1 2 PDD8
3 4 GND1 1
PDD11 PDD6 PDD9 2
5 6 RXP SATA_TXP0 <18>
PDD12 PDD5 PDD10 3
7 8 RXN SATA_TXN0 <18>
PDD13 PDD4 PDD11 4
PDD14 PDD3 9 10 PDD12 GND2
5 SATA_RXN0 <18>
PDD15 PDD2 11 12 PDD13 TXN
6 SATA_RXP0 <18>
1 2
PDD0 PDD1 13 14 PDD14 TXP
15 16 GND3 7 2 1
PDD1 PDD0 PDD15

RST
GND
PDD2 17 18
19 20 CSEL:
PDD3 8 +3.3VSATA R273 +3V
<18> PDDREQ 21 22 0 DRIVE0 3.3V
A PDD4 9 SA@0_8 A
<18> PDIOW# 23 24 3.3V
PDD5 1 DRIVE1 10
<18> PDIOR# 25 26 3.3V
PDD6 PIORDY PSEL R563 470_4 11
PDD7 <18> PIORDY 27 28 GND
<18> PDDACK# 29 30 GND 12
IRQ14 13
<18> IRQ14 31 32 GND
20
-PDIAG R571 10K_4 +5V 14 HDD_VDD R286 +5V
<18> PDA1 33 34 5V
15 0_8
<18> PDA0 35 36 PDA2 <18> 5V
<18> 37 38 5V 16
R580 0_4PDCS1# HDLED# PDCS3# <18>
17
<30> IDELED# 39 40 GND
HDD_VDD 41 42 HDD_VDD RSVD 18
19

45

46

GND
43 44 GND
12V 20
HDD_VDD +3.3VSATA +3.3VSATA +3.3VSATA

X
12V 21
12V 22
43 44 44 43
24 C495 C497 C475
C510 C501 C508 C872 C509 C503 GND24 SA@4.7U/10V_8 SA@4.7U/10V_8 SA@.1U_4

.1U_4 1000P_4 .1U_4 150U/6.3V_7 .1U_4 .1U_4 SA@Serial_ATA

B
Media Bay Connector BAY ID STATUS B

S : DFHS60FR311
+3V +3V +5V
RBAYID0/ RBAYID1/
U27 CN21
36 48 1 2
F : DFHS50FR156 LBAYID0 LBAYID1 STATUS
+5V VCC_1 VCC_2 +5V +5V 1 2
LBAYRST# 3 4
PDD0 2 A0 B0 46 LPDD0 LPDD7 5
3
5
4
6 6 LPDD8 0 0 FDD
PDD1 3 45 LPDD1 LPDD6 7 8 LPDD9
A1 B1 7 8 0 1 HDD

2
PDD2 4 44 LPDD2 R70 LPDD5 9 10 LPDD10 R230
PDD3 A2 B2 LPDD3 LPDD4 9 10 LPDD11 R511 0_4
5 43 11 12 10K_4
PDD4 6
A3
A4
B3
B4 42 LPDD4 C582 10K_4 13
11
13
12
14 14
<19> RST_HDD# 1 0 CD/DVD
1 LPDD3 15 16 LPDD12
NC_1 SW@.1U_4 LPDD2 15 16 LPDD13 R222 *0_4 -IDERST
17 17 18 18 <6,11,15,18,29,31,32,33> PLTRST# 1 3
PDD5 7 41 LPDD5 LPDD1 19 20 LPDD14
PDD6 A5 B5 LPDD6 LPDD0 19 20 LPDD15
8 A6 B6 40 21 21 22 22 Q23
PDD7 9 39 LPDD7 LPDIOW# 23 24 LPDDREQ
PDD8 A7 B7 LPDD8 LPIORDY 23 24 LPDIOR# DTC144EU
10 A8 B8 38 25 25 26 26
PDD9 11 37 LPDD9 27 28
A9 B9 LIRQ14 27 28 LPDDACK#
13 NC_2 29 29 30 30
LPDA1 31 32 LPDA2
PDD10 LPDD10 LPDA0 31 32 LPDCS3#
14 A10 B10 34 33 33 34 34
PDD11 15 33 LPDD11 LPDCS1# 35 36 RBAYID0
PDD12 A11 B11 LPDD12 LIDE_LED_1# 35 36 RBAYID1 RBAYID0 <18>
16 A12 B12 32 37 37 38 38 RBAYID1 <18>
PDD13 17 31 LPDD13 -RBAYINS 39 40 RCSEL
PDD14 A13 B13 LPDD14 <29> -RBAYINS 39 40
18 A14 B14 30 41 41 42 42 RBAYVCC
LBAYON_HDD# 35 43 44
BE2 43 44 RBAYVCC
45 45 46 46
PDD15 19 29 LPDD15 47 48 -LPDIAG R68 R73 +5V
PDCS1# A15 B15 LPDCS1# 47 48
20 A16 B16 28 49 49 50 50 F@0_4
PDCS3# 21 27 LPDCS3# *470_4
PDA0 A17 B17 LPDA0 51 53 NC FOR SLAVE C65 C66 C134 C104
22 A18 B18 26 52 54
C PDA1 LPDA1 C67 C69 C74 C76 C
23 A19 B19 25
LBAYON_HDD# 47 SW@BAYCON_50P 1000P_4 .1U_4 .1U_4 .1U_4
BE1 .1U_4 .1U_4 .1U_4 .1U_4
12 GND_1GND_2 24

SW@PI5C16861
+5V

ODD Connector
R39 U3 CN18
SW@10K_4 24 +5V
VCC +5V 1 2
PDA2 LPDA2 -IDERST 3 4 PDD8
2 A0 B0 23 5 6
PDIOR# 3 22 LPDIOR# PDD7 PDD9
PDIOW# A1 B1 LPDIOW# C46 PDD6 7 8 PDD10
4 A2 B2 21 9 10
PIORDY 5 20 LPIORDY PDD5 PDD11 RBAYVCC
IRQ14 A3 B3 LIRQ14 SW@.1U_4 PDD4 11 12 PDD12
6 A4 B4 19 13 14 B:ADD DISCHARGE CIRCUIT
PDD3 PDD13
PDDREQ LPDDREQ PDD2 15 16 PDD14 +5V
7 A5 B5 18 17 18
PDDACK# 8 17 LPDDACK# PDD1 PDD15
-IDERST A6 B6 19 20
9 A7 B7 16 2 1 LBAYRST# PDD0
21 22
PDDREQ R663 SW@22-0805
IDELED# 10 15 LIDE_LED_1# PDIOR# R48 F@0_8
A8 B8 23 24

3
-PDIAG 11 14 -LPDIAG R40 *33_4 PDIOW# R46 F@0_8
A9 B9 PIORDY 25 26 PDDACK# Q60
LBAYON_HDD# 1 IRQ14 27 28 Q14
/ON GND 12 29 30
-LVBIAS 13 PDA1 -PDIAG SW@AO4414 2 RBAYON#
/VBIAS PDA0 31 32 PDA2
33 34 8 1
SW@TI6800 PDCS1# PDCS3# 7 2
R42 SW@0_4 IDELED# 35 36 SW@2N7002
<19> RST_RBAY# 37 38 6 3
R37 RBAYVCC 5

1
D 39 40 D
SW@22K 41 42 RBAYVCC
R55
4

R35 43 44 Z1422
45 46 +12V
+5V LBAYON_HDD# DEPOP R40 AND POP RCSEL
47 48
3

SW@10K_4
51
52

R42 FOR SWAP BAY 49 50


3

SW@10K_4 Q15 C82 C68 C64 C73 C75 C77


Q12 PROJECT : ZL3
51
52

RBAYVCC 2 2 SW@.1U/25V_8 1000P_4 150U/6.3V_7 .1U_4 .1U_4 .1U_4


SW@PDTC143TT <18> RBAYON#
Quanta Computer Inc.
SW@2N7002
1

CHANGE FROM PDTC143TT Size Document Number Rev


1

F@ODD_CONN HDD & CDROM & MEDIA BAY C


REMOVE PULLDOWN R50 C82 CHANGED FROM .1U/12V
Date: Tuesday, March 29, 2005 Sheet 21 of 40
1 2 3 4
1 2 3 4 5 6 7 8

+5VSUS
MINI-PCI +5VSUS U15
1 8 USBPWR3
GND OUT
2 IN OUT 7
3 6 R180 470K_4
IN OUT OC3# <19>
C338
.1U_4 4 5 R181 560K
EN# OUTNC
MAX1930
C352
.1U_4

A A
CN22
1 TIP RING 2
+3V 3 4 +3V
LAN1 LAN2
5 LAN3 LAN4 6
7 8 +5VSUS U47
LAN5 LAN6 +5VSUS USBPWR7
9 LAN7 LAN8 10 5 IN OUT 1
<30> WIRELESS_LED 11 LED_GP LED_YP 12 4 ON#
D21 1 2 13 14 R590 470K_4
<29> RF_EN LED_GN LED_YN
BAS316 15 16 2 3 R582 6.34K/F R588 560K
NC1 NC2 GND SET OC7# <19>
17 18 C871
<18,23> PIRQD# -INTB +5V +5V
19 20 .1U_4 AAT4610AIGV-T1
+3V -INTA PIRQB# <18>
21 R(IRQ3) R(IRQ4) 22
23 GND +3VAUX 24 +3V_S5
PCLK_MINI 25 26
<2> PCLK_MINI PCICLK -RST PCIRST# <18,23,24,25>
27 GND +3V 28
<18> REQ2# 29 -REQ -GNT 30 GNT2# <18>
31 +3V GND 32
33 34 PME#
<18,23,25> AD31 AD31 -PME PME# <18,23,25>
<18,23,25> AD29 35 AD29 (V) 36
37 GND AD30 38 AD30 <18,23,25>
<18,23,25> AD27 39 AD27 +3V 40
<18,23,25> AD25 41 AD25 AD28 42 AD28 <18,23,25>
43 (V) AD26 44 AD26 <18,23,25>
<18,23,25> CBE3# 45 -CBE3 AD24 46 AD24 <18,23,25>
47 48 R366 150_4 AD19
<18,23,25> AD23 AD23 IDSEL
49 GND GND 50
<18,23,25> AD21 51 AD21 AD22 52 AD22 <18,23,25>
53 54 AD20
<18,23,25> AD19 AD19 AD20 AD20 <18,23,25>
55 GND PAR 56 PAR <18,23,25>
<18,23,25> AD17 57 AD17 AD18 58 AD18 <18,23,25>
<18,23,25> CBE2# 59 -CBE2 AD16 60 AD16 <18,23,25>
<18,23,25> IRDY# 61 -IRDY GND 62
63 +3V -FRAME 64 FRAME# <18,23,25> L45
<18,23,25,29,31> CLKRUN# 65 -CLKRUN -TRDY 66 TRDY# <18,23,25>
67 68 USBPWR3 USB3POWER
<18,23,25> SERR# -SERR -STOP STOP# <18,23,25>
69 GND +3V 70
71 72 BK2125HS330
<18,23,25> PERR# -PERR -DEVSEL DEVSEL# <18,23,25>
B
<18,23,25> CBE1# 73 -CBE1 GND 74 B
75 76 C335 +
<18,23,25> AD14 AD14 AD15 AD15 <18,23,25>
77 GND AD13 78 AD13 <18,23,25>
79 80 100U/6.3V-3528
<18,23,25> AD12 AD12 AD11 AD11 <18,23,25>
<18,23,25> AD10 81 AD10 GND 82
83 GND AD9 84 AD9 <18,23,25> BOT
85 86 CN25
<18,23,25> AD8 AD8 -CBE0 CBE0# <18,23,25>
<18,23,25> AD7 87 AD7 +3V 88 1 5
89 90 R165 0 BUSBP3-
+3V AD6 AD6 <18,23,25> <19> USBP3- 2 6
91 92 R163 0 BUSBP3+
<18,23,25> AD5 AD5 AD4 AD4 <18,23,25> <19> USBP3+ 3 7
93 (V) AD2 94 AD2 <18,23,25> 4 8 G4 4G
95 96 C311 C324 + +
<18,23,25> AD3 AD3 AD0 AD0 <18,23,25>
97 98 SYUIN_USB - -
+5V +5V (V) *22P_4 *22P_4
<18,23,25> AD1 99 AD1 SERIRQ 100 SERIRQ <18,19,23,29,31> P1 1P
101 GND GND 102
103 SYNC M66EN 104
105 SDIN0 SDOUT 106
107 BITCLK SDIN1 108
109 -AC_PRIMARY -RESET 110
111 BEEP -MPCICACK 112
L48
113 AGND AGND 114
115 116 USBPWR3 USB5POWER
+MIC +SPK
117 -MIC -SPK 118
119 120 BK2125HS330
AGND AGND C353 +
121 -RI NC4 122
+5V 123 +5VA +3VAUX 124 +3V_S5
100U/6.3V-3528
GND

GND

CN26
125

126

QTC_MINIPCI_H7.95 R185 0 BUSBP5- 1 5


<19> USBP5- 2 6
R183 0 BUSBP5+
<19> USBP5+ 3 7
C347 C350 4 8
SYUIN_USB
*22P_4 *22P_4

C C

PCLK_MINI R408 *22_4 C645 *10P_4 L80


USBPWR7 USB7POWER

BK2125HS330
C876 +

100U/6.3V-3528

+3V +5V CN33

R584 0 BUSBP7- 1 5
<19> USBP7- 2 6
R583 0 BUSBP7+
<19> USBP7+ 3 7
C644 C615 C639 C598 C144 C655
C882 C883 4 8
.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 SYUIN_USB
*22P_4 *22P_4

+3VSUS Q21
AO3403
CN6 L40
BT_POWER 1 3 BT_POWER
1
R137 0 BUSBP0+ 2 BK2125HS330 C269 10U/10V_8
D D
<19> USBP0+ 3
R138 0 BUSBP0-
<19> USBP0-

2
4
<30> BT_LED 5
6 BT_POWERON# <29>
7
8
PTWO_MINIUSB
C283 C282 C284

*22P_4 *22P_4 .01U/16V_4 PROJECT : ZL3


Quanta Computer Inc.
Size Document Number Rev
MINI PCI,USB C

Date: Thursday, March 31, 2005 Sheet 22 of 40


1 2 3 4 5 6 7 8
5 4 3 2 1

L77

+3V 2 1

U45-7 BK2125HS330
AVDD R13
+3V +3V R14 1394_AVDD
AVDD
AVDD V17
U45-1 AVDD V19
T18 C848 .1U_4 C853 C846 C845 C851
R527 VDPLL
W3 VCCP
W10 U18 R0 1000P_4 .01U/16V_4 .1U_4 1U/10V
VCCP 10K_4 R0
<18,22,25> AD[31..0]
AD31 U2 R578
AD30 AD31 D28 *BAS316
D V1 AD30
D

AD29 V2 R2 2 1 6.34K/F
AD29 SUSPEND LPC_PD# <19,31>
AD28 U3 U19 R1
AD27 AD28 R1 TPBIAS0
W2 AD27 TPBIAS0 U15
AD26 V3 N1 TPS_DATA
AD26 DATA TPS_DATA <24>
AD25 U4 L6 TPS_CLOCK V15 TPA0P
AD25 CLOCK TPS_CLOCK <24> TPA0+
AD24 V4 N2 TPS_LATCH W15 TPA0N
AD24 LATCH TPS_LATCH <24> TPA0-
AD23 V5
AD22 AD23 TPB0P
U5 AD22 TPB0+ V14
AD21 R6 L7 PCMSPK W14 TPB0N
AD21 SPKROUT PCMSPK <27> TPB0-
AD20 P6 R576
AD19 AD20 PHY_TEST_MA 1394_AVDD
W6 AD19 PHY_TEST_MA R17
AD18 V6 N3
AD18 MFUNC0 PIRQC# <18>
AD17 U6 M5 4.7K_4
AD17 MFUNC1 PIRQD# <18,22>
AD16 R7 P1
AD16 MFUNC2 PIRQA# <18,25>
AD15 V9 P2
AD14 AD15 MFUNC3 SERIRQ <18,19,22,29,31>
U9 AD14 MFUNC4 P3 PLOCK# <18>
AD13 R9 N5 T202 M11 CPS R574 390K_4
AD12 AD13 MFUNC5 CPS
N9 AD12 MFUNC6 R1 CLKRUN# <18,22,25,29,31>
AD11 V10 P15 CNA T106
AD10 AD11 CNA
U10 AD10
AD9 R10 AD9 48MHz Clock +3V
AD8 N10
AD7 AD8 Y5 PCMSPK C864 12P_4
V11 AD7
AD6 U11 AD6 CLK_48 M1 CLK48M 3 OUT VDD 4 XO R19 1394_XOUT
AD5 R11
AD4 AD5 C756
W12 AD4 2 GND OE 1

2
AD3 V12 R639
AD2 AD3 TXC-48MHz-30PPM-15Pf .01U/16V_4 Y8
U12 AD2 100K_4
AD1 N11 24.576MHZ
AD0 AD1
W13

1
C
AD0 C

<18,22,25> CBE3# W4 C/BE3 XI R18 1394_XIN


<18,22,25> CBE2# W7 C/BE2
W9 R12 C865 12P_4
<18,22,25> CBE1# C/BE1 PC0 (TEST1)
<18,22,25> CBE0# W11 C/BE0 PC1 (TEST2) U13
PC2 (TEST3) V13
<18,22,25> PAR P9 PAR
VSPLL T17
<18,22,25> FRAME# V7 FRAME AGND N12
<18,22,25> TRDY# R8 TRDY AGND P14
<18,22,25> IRDY# U7 IRDY AGND U14
<18,22,25> STOP# W8 STOP AGND U16
N8 U17 C852 1U/10V
<18,22,25> DEVSEL# DEVSEL TPBIAS1
AD17 R552 100/F_4 W5
IDSEL
TPA1+ V18
V8 +3V W18
<18,22,25> PERR# PERR TPA1-
<18,22,25> SERR# U8 SERR
TPB1+ V16
<18> REQ1# U1 REQ TPB1- W16
T2 R532
<18> GNT1# GNT PCI7411GHK
P5 22K
<2> PCLK_PCM PCLK
R3 CN32
<18,22,24,25> PCIRST# PRST
GRST#_7411 T1 GRST#_7411 TPBIAS0 5
GRST L1394_TPB0- 1
R534 0_4 PCM_PME# T3 C775 L1394_TPA0- 3 6
<18,22,25> PME# RI_OUT/PME C839 C837 L1394_TPA0+ 4
PCI7411GHK .1U/50V L1394_TPB0+ 2
R570 R568 1U/10V 270P_4

56.2/F_4 56.2/F_4 SUYIN_1394


B PCLK_PCM R536 *22_4 C791 *10P_4 B

+3V +3V
U45-4
H8 R600 0_4
VCC R593 0_4
H9 VCC
H10 U45-6
VCC +3V R528 R529
H11 VCC
H12 U45-10 W17 TPA0P L1394_TPA0+
VCC *10K_4 *10K_4 NC TPA0N L1394_TPA0-
J8 VCC
M7 VCC A_USB_EN E2 TEST0 P12
J12 TPB0P L1394_TPB0+
VCC C784 C805 C806 C815 TPB0N L1394_TPB0-
M9 VCC T19 VCO_LF
M10 VCC B_USB_EN E1
M12 1000P_4 .01U/16V_4 .1U_4 1U/10V
VCC PCI7411GHK
K8 VCC
K12 PCI7411GHK +3V R566 R565 R602 0_4
VCC R603 0_4
N7 VCC 1.5V M19
H1 56.2/F_4 56.2/F_4
1.5V
G7 GND
G8 C776 C854 IF EEPROM NOT USE ,
GND R518 R515
G13 GND VR_EN H2 CLK & DAT PULL DOWN
H13 1U/10V 1U/10V +3V
GND 2.2K_4 2.2K_4 R564 C836
J9 GND
J10 GND
J11 U45-5 +3V 5.1K/F 270P_4
GND U41
K9 GND
K10 C800 C786 C849 C855 M3 8 1
GND SCL VCC A0
K11 GND 7 NC A1 2
A L8 1000P_4 .01U/16V_4 .1U_4 1U/10V SCL_CARD 6 3 C773 A
GND SDA_CARD SCL A3
L9 GND SDA M2 5 SDA GND 4 .1U_4
L10 GND
L11 GND
L12 PCI7411GHK 24LC02BT
GND
M8 GND
PCI7411GHK R526 R525
PROJECT : ZL3
*220_4 *220_4

Quanta Computer Inc.


Size Document Number Rev
PCMCIA CONTROLLER C
Date: Tuesday, March 29, 2005 Sheet 23 of 40
5 4 3 2 1
5 4 3 2 1

U45-8
MC_PWR_CTRL_0# F1
A_VCC MC_PWR_CTRL_0 SD_CDZ
F2 MC_PWR_CTRL_1 SD_CD E3
F5 MS_CDZ
U45-3 U45-2 CN28 MS_CD
SM_CD F6
D19 A5 R547
VCCB VCCA MS_CLK_SD_CLK_SM_ELWPZ_R MS_CLK_SD_CLK_SM_ELWPZ
VCCB K19 VCCA A11 MS_CLK/SD_CLK/SM_EL_WP G5
1 17 A_VCC F3 MS_BS_SD_CMD_SM_WEZ 3@33/F_4
A_CAD31 A_CAD0 GND1 SKTA/VCC1 MS_BS/SD_CMD/SM_WE MS_DATA3_SD_DAT3_SM_D3
B_CAD31/B_D10 B15 A_CAD31/A_D10 D1 2 SKTAAD0/D3 SKTA/VCC2 51 MS_DATA3/SD_DAT3/SM_D3 H5
A16 C1 A_CAD30 A_CAD1 3 G3 MS_DATA2_SD_DAT2_SM_D2
B_CAD30/B_D9 A_CAD30/A_D9 A_CAD29 A_CAD3 SKTAAD1/D4 AVPP MS_DATA2/SD_DAT2/SM_D2 MS_DATA1_SD_DAT1_SM_D1
B_CAD29/B_D1 B16 A_CAD29/A_D1 D3 4 SKTAD3/D5 SKTA/VPP1 18 MS_DATA1/SD_DAT1/SM_D1 G2
A17 C2 A_CAD28 A_CAD5 5 52 G1 MS_DATA0_SD_DAT0_SM_D0
B_CAD28/B_D8 A_CAD28/A_D8 A_CAD27 A_CAD7 SKTAD5/D6 SKTA/VPP2 MS_SDIO(DATA0)/SD_DAT0/SM_D0
B_CAD27/B_D0 C16 A_CAD27/A_D0 B1 6 SKTAAD7/D7
D17 B4 A_CAD26 A_CC/BE0# 7 J5
B_CAD26/B_A0 A_CAD26/A_A0 A_CAD25 A_CAD9 -SKTACBE0/CE1# SD_CLK/SM_RE/SC_GPIO1
D
B_CAD25/B_A1 C19 A_CAD25/A_A1 A4 8 SKTAAD9/A10 SD_CMD/SM_ALE/SC_GPIO2 J3 D

D18 E6 A_CAD24 A_CAD11 9 H3


B_CAD24/B_A2 A_CAD24/A_A2 A_CAD23 A_CAD12 SKTABAD11/OE# SD_DAT0/SM_D4/SC_GPIO6
B_CAD23/B_A3 E17 A_CAD23/A_A3 B5 10 SKTAAD12/A11 GND5 69 SD_DAT1/SM_D5/SC_GPIO5 J6
E19 C6 A_CAD22 A_CAD14 11 70 J1
B_CAD22/B_A4 A_CAD22/A_A4 A_CAD21 A_CC/BE1# SKTAAD14/A9 GND6 SD_DAT2/SM_D6/SC_GPIO4
B_CAD21/B_A5 G15 A_CAD21/A_A5 B6 12 -SKTACBE1/A8 GND7 71 SD_DAT3/SM_D7/SC_GPIO3 J2
F18 G9 A_CAD20 A_CPAR 13 72 H7 SD_WP_SM_CEZ
B_CAD20/B_A6 A_CAD20/A_A6 A_CAD19 A_CPERR# SKTAPAR/A13 GND8 SD_WP/SM_CE
B_CAD19/B_A25 H14 A_CAD19/A_A25 C7 14 -SKTAPERR/A14 GND9 73
H15 B7 A_CAD18 A_CGNT# 15 74 J7
B_CAD18/B_A7 A_CAD18/A_A7 A_CAD17 A_CINT# -SKTAGNT/WE# GND10 SM_CLE/SC_GPIO0
B_CAD17/B_A24 G17 A_CAD17/A_A24 A7 16 -SKTAINT/RDY GND11 75 SM_R/B/SC_RFU K1
K17 A10 A_CAD16 76 K2
B_CAD16/B_A17 A_CAD16/A_A17 A_CAD15 GND12 SM_PHYS_WP/SC_FCB
B_CAD15/B_IOWR L13 A_CAD15/A_IOWR E11 UPPER PIN GND13 77
K18 G11 A_CAD14 A_CCLK1 19 78
B_CAD14/B_A9 A_CAD14/A_A9 A_CAD13 A_CIRDY# SKTAPCLK/A16 GND14 PCI7411GHK
B_CAD13/B_IORD L15 A_CAD13/A_IORD C11 20 -SKTAIRDY/A15 GND15 79
L17 B11 A_CAD12 A_CC/BE2# 21 80
B_CAD12/B_A11 A_CAD12/A_A11 A_CAD11 A_CAD18 -SKTACBE2/A12 GND16
B_CAD11/B_OE L18 A_CAD11/A_OE C12 22 SKTAAD18/A7 GND17 81
L19 B12 A_CAD10 A_CAD20 23 82
B_CAD10/B_CE2 A_CAD10/A_CE2 A_CAD9 A_CAD21 SKTAAD20/A6 GND18
B_CAD9/B_A10 M17 A_CAD9/A_A10 A12 24 SKTAAD21/A5 GND19 83
M14 E12 A_CAD8 A_CAD22 25 84
B_CAD8/B_D15 A_CAD8/A_D15 A_CAD7 A_CAD23 SKTAAD22/A4 GND20
M15 C13 26
B_CAD7/B_D7
B_CAD6/B_D13 N19
A_CAD7/A_D7
A_CAD6/A_D13 F12 A_CAD6 A_CAD24 27
SKTAAD23/A3
SKTAAD24/A2
3 IN1 CARD READER
N18 A13 A_CAD5 A_CAD25 28
B_CAD5/B_D6 A_CAD5/A_D6 A_CAD4 A_CAD26 SKTAAD25/A1 VCC_XD
B_CAD4/B_D12 N15 A_CAD4/A_D12 C14 29 SKTAAD26/A0
M13 E13 A_CAD3 A_CAD27 30 VCC_XD
B_CAD3/B_D5 A_CAD3/A_D5 A_CAD2 A_CAD29 SKTAAD27/D0
B_CAD2/B_D11 P18 A_CAD2/A_D11 A14 31 SKTAAD29/D1 NC 85
P17 B14 A_CAD1 A_CRSVD/D2 32 86 CN11
B_CAD1/B_D4 A_CAD1/A_D4 A_CAD0 A_CCLKRUN# SKTARSVD/D2 NC MS_DATA3_SD_DAT3_SM_D3
B_CAD0/B_D3 P19 A_CAD0/A_D3 E14 33 -SKTACLKRUN/WP NC 87 18 SD-1(DAT3) (VSS)MS-1 5
34 88 MS_BS_SD_CMD_SM_WEZ 15 6 MS_BS_SD_CMD_SM_WEZ
A_CC/BE3# GND2 NC SD-2(CMD) (BS)MS-2 MS_DATA1_SD_DAT1_SM_D1
B_CC/BE3/B_REG F15 A_CC/BE3/A_REG C5 12 SD-3(VSS) (DAT1)MS-3 8
G18 F9 A_CC/BE2# 35 10 9 MS_DATA0_SD_DAT0_SM_D0
B_CC/BE2/B_A12 A_CC/BE2/A_A12 A_CC/BE1# A_CCD1# GND3 MS_CLK_SD_CLK_SM_ELWPZ SD-4(VCC) (DAT0)MS-4 MS_DATA2_SD_DAT2_SM_D2
B_CC/BE1/B_A8 K14 A_CC/BE1/A_A8 B10 36 -SKTACD1/CD1# 7 SD-5(CLK) (DAT2)MS-5 11
M18 G12 A_CC/BE0# A_CAD2 37 4 13 MS_CDZ
B_CC/BE0/B_CE1 A_CC/BE0/A_CE1 A_CAD4 SKTAAD2/D11 MS_DATA0_SD_DAT0_SM_D0 SD-6(VSS) (INS)MS-6 MS_DATA3_SD_DAT3_SM_D3
C
38 SKTAD4/D12 3 SD-7(DAT0) (DAT3)MS-7 14 C

K13 G10 A_CPAR A_CAD6 39 MS_DATA1_SD_DAT1_SM_D1 2 16 MS_CLK_SD_CLK_SM_ELWPZ


B_CPAR/B_A13 A_CPAR/A_A13 A_RSVD/D14 SKTAAD6/D13 MS_DATA2_SD_DAT2_SM_D2 SD-8(DAT1) (SCLK)MS-8
40 SKTARSVD/D14 20 SD-9(DAT2) (VCC)MS-9 17
G19 C8 A_CFRAME# A_CAD8 41 SD_CDZ 21 19
B_CFRAME/B_A23 A_CFRAME/A_A23 A_CTRDY# A_CAD10 SKTAAD8/D15 SD-CD1 (VSS)MS-10
B_CTRDY/B_A22 H17 A_CTRDY/A_A22 A8 42 SKTAAD10/CE2# 23 SD-CD2(G)
A_CCLK1
J13 B8 A_CIRDY# A_CVS1# 43 SD_WP_SM_CEZ 1
B_CIRDY/B_A15 A_CIRDY/A_A15 A_CSTOP# A_CAD13 -SKTAVS1/VS1# SD-WP1
B_CSTOP/B_A20 J17 A_CSTOP/A_A20 A9 44 SKTAAD13/IORD# 22 SD-WP-COM
H19 C9 A_CDEVSEL# A_CAD15 45
B_CDEVSL/B_A21 A_CDEVSL/A_A21 A_CBLOCK# A_CAD16 SKTAAD15/IOWR#
B_CBLOCK/B_A19 J19 A_CBLOCK/A_A19 E10 46 SKTAAD16/A17
A_CRSVD/A18 47 24
A_CPERR# R556 A_CBLOCK# -SKTRSVD/A18 NAIL1
B_CPERR/B_A14 J18 A_CPERR/A_A14 F10 48 -SKTALOCK/A19 25 NAIL2
B18 B3 A_CSERR# A_CSTOP# 49 26
B_CSERR/B_WAIT A_CSERR/A_WAIT 33/F_4 A_CDEVSEL# -SKTASTOP/A20 NAIL3
50 -SKTADEVSEL/A21
E18 E7 A_CREQ#
B_CREQ/B_INPACK A_CREQ/A_INPACK A_CGNT# 3@3IN1_DFHD23MS069
B_CGNT/B_WE J15 A_CGNT/A_WE B9 LOWER PIN
A_CTRDY# 53
A_CSTSCHG A_CFRAME# -SKTATRDY/A22
B_CSTSCHG/B_BVD1(STSCHG/RI) F14 A_CSTSCHG/A_BVD1(STSCHG/RI) B2 54 -SKTAFRAME/A23
A18 C3 A_CCLKRUN# A_CAD17 55
B_CCLKRUN/B_WP(IOIS16) A_CCLKRUN/A_WP(IOIS16) A_CCLK A_CAD19 SKTAAD17/A24
B_CCLK/B_A16 H18 A_CCLK/A_A16 E9 56 SKTAAD19/A25
A_CVS2# 57
A_CINT# A_CRST# -SKTAVS2VS2#
B_CINT/B_READY(IREQ) B19 A_CINT/A_READY(IREQ) C4 58 -SKTARST/RESET
A_CSERR# 59
A_CRST# A_CREQ# 0SKTASERR/WAIT#
B_CRST/B_RESET F17 A_CRST/A_RESET A6 60 -SKTAREQ/INPACK#
A_CC/BE3# 61
A_CAUDIO A_CAUDIO -SKTACBE3/REG#
B_CAUDIO/B_BVD2(SPKR) C17 A_CAUDIO/A_BVD2(SPKR) A2 62 SKTAAUDIO/BVD2
A_CSTSCHG 63
A_CCD1# A_CAD28 -SKTASTSCHG/BVD1
B_CCD1/B_CD1 N13 A_CCD1/A_CD1 C15 64 SKTAAD28/D8
B17 E5 A_CCD2# A_CAD30 65
B_CCD2/B_CD2 A_CCD2/A_CD2 A_CVS1# A_CAD31 SKTAAD30/D9
B_CVS1/B_VS1 C18 A_CVS1/A_VS1 A3 66 SKTAAD31/D10
F19 E8 A_CVS2# A_CCD2# 67 +3V
B_CVS2/B_VS2 A_CVS2/A_VS2 -SKTACD2/CD2#
68 GND4
B N17 B13 A_RSVD/D14 B
B_RSVD/B_D14 A_RSVD/A_D14 A_CRSVD/D2
B_RSVD/B_D2 A15 A_RSVD/A_D2 D2
K15 C10 A_CRSVD/A18 C951 +3V
B_RSVD/B_A18 A_RSVD/A_A18 CARDBUS SLOT
FOX_1CA4C5G2-TC 3@.1U_4
PCI7411GHK PCI7411GHK

+5V +5V
U40 R662
1 24 Q45
5V_0 5V_2 3@10K_4 VCC_XD
2 5V_1 NC_3 23 1 GND OUT 8
TPS_DATA 3 22 2 7
<23> TPS_DATA DATA NC_2 IN OUT
TPS_CLOCK TPS_CLOCK 4 21 3 6
<23> TPS_CLOCK CLOCK SHDN# IN OUT
TPS_LATCH 5 20
<23> TPS_LATCH LATCH 12V_1
6 19 MC_PWR_CTRL_0# 4 5
R523 T196 NC_0 BVPP/BVCORE EN# OUTNC
7 12V_0 BVCC1 18
AVPP 8 17 3@TPS2061
*47K AVPP/AVCORE BVCC0
A_VCC 9 AVCC0 NC_1 16
10 AVCC1 OC# 15
11 GND 3.3VIN0 14 +3V
NC

<18,22,23,25> PCIRST# 12 RESET# 3.3VIN1 13

TPS2220APWP +5V C814


25

U45-9
L5 3@10U/10V_8
SC_PWR_CTRL
SC_CD L2
R542

K5 0_4
SC_CLK
A
SC_RST K3 A

+3V +5V A_VCC A_VCC K7 +5V_SCVCC


SC_VCC_5V
CLOSE TO XD SOCKET
L1 C798
SC_DATA
SC_OC L3
.1U_4
C754 C755 C767 C760 C793 C816 C787 C817 C780 C769 C770
PCI7411GHK PROJECT : ZL3
.1U_4 10U/10V_8 .1U_4 10U/10V_8 .01U/16V_4 .01U/16V_4 .1U_4 1000P_4 10U/10V_8 .01U/16V_4 10U/10V_8

Quanta Computer Inc.


Size Document Number Rev
PCMCIA & 3 IN 1 C
Date: Tuesday, March 29, 2005 Sheet 24 of 40
5 4 3 2 1
5 4 3 2 1

FOR 10/100 +3V_S5 R533 4@0_8


R535 5@0_8 +1.8V_1.2V_LAN
FOR GIGA +3V
VDDIO_LAN

C796 C797 C809 C808 C788 C794 C807 C789

M14
N14
E12

K10

P12
P13
P14
L10
J10
G1
C5

N6

H5
H6
H7
H8
10U/6.3V .1U_4 .1U_4 .1U_4 .01U/16V_4 .01U/16V_4 .01U/16V_4 .01U/16V_4

A7
B3

E1
E4

K3

P2

K5
K6
K7
K8
K9

P8
L4

L5
J5
J6
J7
J8
J9
U42

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
10mils L74
A14 BIASVDD
BIASVDD +3V_2.5V_LAN
D
VDDIO A11 D
AD[31..0] AD0 N7 F11 C749 PBY201209T-300Y-S
<18,22,23> AD[31..0] AD0 VDDIO
AD1 M7 K12 +3V_S5
AD2 AD1 VDDIO 1000P_4
P6 AD2 VDDIO L12
AD3 P5
AD4 AD3
N5 AD4 VESD1 P1
AD5 M5 G2
AD6 AD5 VESD2 +3V_S5 C738 5@.1U_4 C737 5@.1U_4 C736 .1U_4 C735 .1U_4
P4 AD6 VESD3 A1
AD7 N4
AD8 AD7
Voltage Rail 4401 5702 5705M P3 AD8 NC/VDDP K14
AD9 N3 L13 +3V_2.5V_LAN
AD10 AD9 NC/VDDP L76 +3V_2.5V_LAN
VDDIO_PCI 3V_S5 +3V +3V N2 AD10 VDDP P11
AD11 M1 A13 LAN_AVDD R500 R508 R499 R507 R498 R506 R497 R505
AD12 AD11 NC/AVDD
+3V_2.5V_LAN 3.3V 2.5V 2.5V M2 AD12 NC/AVDD F14
AD13 M3 C757 BK1608HS330 5@49.9/F_4 5@49.9/F_4 49.9/F_4 49.9/F_4 49.9/F_4 49.9/F_4
AD14 AD13 5@49.9/F_4 5@49.9/F_4
+1.8V_1.2V_LAN 1.8V 1.2V 1.2V L1 AD14
AD15 L2 F12 .1U_4
AD16 AD15 EPHY_AVDD/AVDDL LAN_AVDDL
K1 AD16 EPHY_AVDD/AVDDL F13
AD17 E3
AD18 AD17 TX3N
D1 AD18 NC/TRD[3]- E14 TX3N <26>
AD19 D2 E13 TX3P
AD19 NC/TRD[3]+ TX3P <26>
AD20 D3
AD21 AD20 TX2N
C1 AD21 NC/TRD[2]- D14 TX2N <26>
AD22 B1 D13 TX2P
AD22 NC/TRD[2]+ TX2P <26>
AD23 B2
AD24 AD23 TX1N
B4 AD24 RDN/TRD[1]- C14 TX1N <26>
AD25 A5 C13 TX1P
AD25 RDP/TRD[1]+ TX1P <26>
AD26 B5
AD27 AD26 TX0N
B6 AD27 TDN/TRD[0]- B14 TX0N <26>
AD28 C6 B13 TX0P
AD28 TDP/TRD[0]+ TX0P <26>
AD29 C7
C AD30 AD29 10MBPS# T94 L75 +1.8V_1.2V_LAN C
A8 AD30 LINK_LED10#/LINKLEDB G13 ALWAYS USE -100MBPS
AD31 B8 H13 -100MBPS R510 0_4 LAN_AVDDL
AD31 LINK_LED100#/SPD100LEDB 100MBPS# <26,33>
G12 1GBPS# R509 *0_4
COL_LED#/SPD1000LEDB ACT# C753 BK1608HS330
ACT_LED#/TRAFFICLEDB G14 ACT# <26,33> 4401 1.27K
<18,22,23> CBE0# M4 CBE_0#
L3 @BCM4401/5788 D10 LAN_RDAC R519 @1.2K/F_1.27K .1U_4
<18,22,23> CBE1# CBE_1# RDAC
<18,22,23> CBE2# F3 CBE_2#
<18,22,23> CBE3# C4 CBE_3# GPIO0 H12
K13 EEWP# R495 1K_4 +3V_S5 U37 U39 +3V_S5
+3V_S5
<18> REQ0#
R504 4.7K_4 J12
C3
VAUXPRSNT
REQ#
15mm x 15mm GPIO1
GPIO2 J13

EECLK R512 5@1K_4


+3V_S5

EEWP# 7
8 VCC A0 1 EEDATA
EECLK
1 CS VCC 8
J3 M10 2 2 7
<18> GNT0#
<18,22,23> FRAME#
<18,22,23> IRDY#
F2
F1
GNT#
FRAME#
IRDY#
BGA196 SPROM_CLK/EECLK
SPROM_CS/EEDATA P10 EEDATA R502 5@1K_4 C742

5@.1U_4
EECLK 6
EEDATA 5
WP#
SCL
SDA
A1
A3
GND
3
4
BCM_DI
BCM_DO
3
4
SK
DI
DO
NC
ORG
GND
6
5 C743
<18,22,23> DEVSEL# H3 DEVSEL#
H1 N9 BCM_DI 5@24C128 4@93LC46 4@.1U_4
<18,22,23> STOP# STOP# SPROMDOUT/NC BCM_DO
<18,22,23> TRDY# G3 TRDY# SPROMDIN/NC P9
<18,22,23> PAR J1 PAR
<18,22,23> PERR# J2 PERR#
<18,22,23> SERR# A2 SERR#
H2 D11 BCM_TRST# R517 1K_4
<18,23> PIRQA# INTA# TRST#
<18,22,23,24> PCIRST# C2 PCI_RST# TDI D12 +3V_S5
<2> PCLK_LAN
AD24 R530 0_4
A3
A4
PCI_CLK TCK C12
A12 Q42 C732 C729 40mils
IDSEL TMS

3
LAN_PME# A6 B12 5@BCP69T1
<29> LAN_PME# PME# TDO
R524 0_4 10U/10V_8 .01U/16V_4

E
<18,22,23> PME#
REGIN33/REGSUP25 B11 1 B 1G
C8 CSTSCHG C 4

C
R554 5@0_4 H4 C11
<18,22,23,29,31> CLKRUN# R520 *0_4 CLKRUN# NC/REGCTL25
<2,19,32,33> PCLK_SMB A10

2
R522 *0_4 SMB_CLK
B <2,19,32,33> PDAT_SMB C9 SMB_DATA OUT33/REGSEN25 C10 40mils 2.5V@88mA 0.564W B
R521 5@4.7K_4 M11 LOW_PWR +3V_2.5V_LAN
Q43

3
F4 B9 5@BCP69T1 C730 C727 C728 C726
M66EN NC/REGSUP12

E
B10 1 1G 10U/10V_8 .01U/16V_4 .01U/16V_4 .01U/16V_4
+3V_2.5V_LAN NC/REGCTL12 B
J14 XTALVDD C 4

C
CLK_LAN_X1 N11 A9
C772 27P_4 XTALI REGOUT18/REGSEN12
N10

2
XTALO
2

C751 C750 C758 L7


Y6 NC
NC K11
.1U_4 .1U_4 .01U/16V_4 25MHZ R531 K4 1.2V@618mA 0.803W
0
NC
J11
40mils
+1.8V_1.2V_LAN
1

C778 27P_4 CLK_LAN_X2 NC


NC J4
H10 C731 C723 C724 C725
NC
NC M8
+1.8V_1.2V_LAN L73 T199 P7 L14 10U/10V_8 .01U/16V_4 .01U/16V_4 .01U/16V_4
10mils LAN_PLLVDD2 H14
NC/PLLVDD3 VSS/NC
L11
PLLVDD2 VSS/NC
BK1608HS330 C752 C739 H11
NC/CS#
L8 NC EECLK_PXE/SCLK E11
.1U_4 4.7U/6.3V-8 M9 E10
NC EEDATA_PXE/SI
N8 NC NC/SO G11 1.5" AWAY FROM CHIP
NC/VSS

ND/VSS

Use Philips BCP69-16, hfe=75~275


VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
B7
D4
D5
D6
D7
D8
D9
E2
E5
E6
E7
E8
E9
F5
F6
F7
F8
F9
F10
G4
G5
G6
G7
G8
G9
G10
H9
K2
L6
L9
M6
M12
M13
N1
N12
N13

BCM4401 is for 10/100(1.8)


BCM5702 is for giga
BCM5705M is for giga cost-down(12)
A A

+3V_2.5V_LAN +1.8V_1.2V_LAN
PROJECT : ZL3
R549 C799 C741 C748 C763 C762 C765 C764 C747 C746 C782 C744 C785 C745 Quanta Computer Inc.
PCLK_LAN
10U/6.3V .1U_4 .1U_4 .1U_4 10U/10V_8 .1U_4 .1U_4 .1U_4 .01U/16V_4 .01U/16V_4 .01U/16V_4 .01U/16V_4 Size Document Number Rev
*22_4 *10P_4 BCM4401/5705M LAN C

Date: Tuesday, March 29, 2005 Sheet 25 of 40


5 4 3 2 1
5 4 3 2 1

D D

+3V_S5

C716 C717 +3V_2.5V_LAN


D@.1U_4 D@.1U_4
U6 CN20
12
19
36

46
43
40
37
33
1
6

U36 +3V_2.5V_LAN 1 24
X-TX0P-PR TX0P_SYS TCT1 MCT1 X-TX0P +3V_S5 R61 220_4
48 2 23 12
VDD
VDD
VDD
VDD
VDD

GND
GND
GND
GND
GND
0B1 X-TX0P-PR <33> TD1+ MX1+ LED1_YELP_Y
2 47 X-TX0N-PR TX0N_SYS 3 22 X-TX0N
<25> TX0P A0 1B1 X-TX0N-PR <33> TD1- MX1- ACT# 18
<25,33> ACT# LED1_YELN_Y
4 42 X-TX1P-PR +3V_2.5V_LAN 4 21
<25> TX0N A1 2B1 X-TX1P-PR <33> TCT2 MCT2
41 X-TX1N-PR TX1P_SYS 5 20 X-TX1P
3B1 X-TX1N-PR <33> TD2+ MX2+
10/100 TX1N_SYS 6 19 X-TX1N
X-TX2P-PR TD2- MX2- X-TX3N
<25> TX1P 8 A2 4B1 35 X-TX2P-PR <33> 3 RX2-
34 X-TX2N-PR +3V_2.5V_LAN 7 18
5B1 X-TX2N-PR <33> TCT3 MCT3
10 TX2P_SYS 8 17 X-TX2P X-TX3P 4
<25> TX1N A3 TD3+ MX3+ RX2+
29 X-TX3P-PR TX2N_SYS 9 16 X-TX2N
6B1 X-TX3P-PR <33> TD3- MX3-
28 X-TX3N-PR X-TX1N 5 11
7B1 X-TX3N-PR <33> RX1- NC
C 15 +3V_2.5V_LAN 10 15 C
<25> TX2P A4 TCT4 MCT4
TX3P_SYS 11 14 X-TX3P X-TX2N 6 17
TX3N_SYS TD4+ MX4+ X-TX3N TX2- GND17
<25> TX2N 17 A5 12 TD4- MX4- 13
45 TX0P_SYS X-TX2P 7 16 C238 .1U_4
0B2 TX0N_SYS @24ST1285A-3B/24HST1041A-3B TX2+ GND16
1B2 44
21 X-TX1P 8 C237 .01U/16V_4
<25> TX3P A6 RX1+
39 TX1P_SYS 10/100 DB0ZL1LAN04 R64 R75 R87 R99
2B2 TX1N_SYS X-TX0N C235 1500P/2KV
<25> TX3N 23 A7 3B2 38 9 TX1-

75/F_4

75/F_4

5@75/F_4

5@75/F_4
1G DB0ZL2LAN09
32 TX2P_SYS X-TX0P 10
4B2 TX2N_SYS TX1+
5B2 31
24 +3V_2.5V_LAN 2
<33> DOCKIN# SEL LED2_AMBER_A1
26 TX3P_SYS
6B2 TX3N_SYS C210 C184 C167 C133 C232 +3V_S5 R103 220_4 MGND
0: A to B1 25 15
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

7B2 1500P/2KV LED2_P_A2


NC

1: A to B2

.1U_4

.1U_4
5@.1U_4

5@.1U_4
100MBPS# 1
<25,33> 100MBPS# LED2_GRNN_A3
3
5
7
9
11
13
16
18
20
22
27
30

14

D@PI3L301DA MGND
RINGL 13 RING
TIPL 14 TIP

FOXCONN_JM34F23-P2053

R626 ND@0_4
TX0P 1 2 TX0P_SYS

R627 ND@0_4
B TX0N TX0N_SYS TIPL B
1 2

R628 ND@0_4 C584


TX1P 1 2 TX1P_SYS
470pF/3KV_C CN4
R629 ND@0_4
TX1N TX1N_SYS 1
1 2 2
R630 ND@0_4 C583
TX2P 1 2 TX2P_SYS FI-S2P-HF(JAE)
470pF/3KV_C
R631 ND@0_4 RINGL
TX2N 1 2 TX2N_SYS

R632 ND@0_4
TX3P 1 2 TX3P_SYS

R633 ND@0_4
TX3N 1 2 TX3N_SYS

ADD CIRCUITS WHEN NO DOCKING

A A

PROJECT : ZL3
Quanta Computer Inc.
Size Document Number Rev
DVO CH7011A & RJ45-11 CON C
Date: Tuesday, March 29, 2005 Sheet 26 of 40
5 4 3 2 1
1 2 3 4 5 6 7 8

The AMC20463-004 modem is used for mother board family MBAMC20463-004.


+3VA +3V
L78

+3VSUS
+3V +3V
C843 C838 C812 C813 C811 R557 C841 C840 C860 C861 BK2125HS330 U43

.1U_4 .1U_4 .01U/16V_4 .1U_4 10U/10V_8 249K/F 10U/10V_8 .1U_4 1000P_4 .1U_4 C783 74AHCT1G86GW

5
18
10

23

33
44
U46 <23> PCMSPK 1

5
.1U_4 4 BEEP
A 2 A

VDD

VDDC
VDDC

VDD_CLK

AVDD
AVDD
<19> PCSPK
AUDGND

3
RC_OSC 1 13
RCOSC1 DSPKOUT
45 PC_BEEP C910 4700P BEEP
DIB_DATAN R274 0_4 PC_BEEP MBIAS
3 DIB_DATAN
DIB_DATAP R275 0_4 4 27 LINEINL C512 4.7U/10V_8 LINEINL_AMP
DIB_DATAP LINE_IN_L
PWRCLKP 7 28 LINEINR C511 4.7U/10V_8 LINEINR_AMP
PWRCLKN PWRCLKP LINE_IN_R
8 PWRCLKN
39 AOUTL
LINE_OUT_L AOUTL <28>
11 ID0#
12 40 AOUTR R581
ID1# LINE_OUT_R AOUTR <28>
42 3K
HP_OUT_L
14 PRIMARY_DN
HP_OUT_R 43
<18> CD_RESET# 17 AC_RESET#
R272 0_4 16 29 MIC_1 C863 10U/10V_8 MIC1
<18> CD_SYNC
<18> CD_SDOUTA 15
SYNC
SDATA_OUT
SmartAMC MIC_IN
CN9
30 CD_L C857 1000P_4
BITCLK_C 22 CD_IN_L DIB_DATAN
<18> CD_BITCLKA BITCLK 10 9
R575 33/F_4 32 CD_R C859 1000P_4 DIB_DATAP
CD_SDIN0 SDIN0_A CD_IN_R 8 7
<18> CD_SDIN0 21 SDATA_IN0 6 5
R573 33/F_4 31 CD_GND C858 1000P_4 PWRCLKP
CD_IN_GND 4 3 PWRCLKN
20 SDATA_IN1 2 1
SPDIF 46 SPDIF_OUT <28,33>
MODEM_B2B
R558 10K_4 47 GPIO_4
<28> HPS_IN 48 GPIO_5 REF_FLT 38
B 37 B
R577 33/F_4 CK26 VC_SCA
24 XTLO VREF_SCA 36

CK28 R579 *1M_4 CK27 25 34 MBIAS PWRCLKP


XTLI MBIAS/AVDD
Y9 AVSS_CLK C862 C850 C842 C847
GNDC
GNDC
GNDC

AGND
AGND
24.576MHZ PWRCLKN
GND

.1U_4 .1U_4 .1U_4 1U/10V


1 2
6

2
9
19

26

35
41

C844 C856 20468-31 C908 C909


150P_4 150P_4
22P_4 22P_4 AUDGND AUDGND

AUDGND

MIC LINE IN

CN34 CN36
R297 1 7 1 7
SYS_MIC SYS_MIC_2 L57 BK1608LL121 SYS_MIC_1 2 LINEINL_SYS 2
INT_MIC 6 6
0_4 C524 3 LINEINR_SYS 3
C R301 C
4 4
*.1U_4 5 8 5 8
*1K_4
FOXCONN_JACK_MIC FOXCONN_JACK_LINEIN

AUDGND AUDGND
AUDGND AUDGND AUDGND

CN12 R284 C: Fix Line-IN noise


INT_MIC1 INT_MIC
1 R288 L58
2 0_4 LINEINL_AMP LINEINL_AMP1 LINEINL_SYS
R285 C515
INT_MIC 0_4 BK1608LL121 C525 R293 LINEINL_PR
LINEINL_PR <33>
AUDGND *1K_4 22P_4 R294
*.1U_4 D@BK1608LL121
*0_4
AUDGND AUDGND
AUDGND AUDGND
R289 L59
AVDD LINEINR_AMP LINEINR_AMP1 LINEINR_SYS

R634 ND@0_4 0_4 BK1608LL121 C526 R295 LINEINR_PR


LINEINR_PR <33>
SYS_MIC 1 2 MIC1
C885 R296 *.1U_4 D@BK1608LL121

.1U_4 *0_4
D U49 D

AUDGND 5 6 PR_MIC_IN AUDGND AUDGND


VCC SEL PR_MIC_IN <33>
PR_MIC 1 4 MIC1
<33> PR_MIC IN_B1 COM
SYS_MIC 3 R592
IN_B0
GND 2 100K_4 PROJECT : ZL3
SEL FUNCTION
D@SN74LVC1G3157DCKR Quanta Computer Inc.
LOW IN_B0
Size Document Number Rev
AUDGND AUDGND HIGH IN_B1 AUDIO C

Date: Tuesday, April 26, 2005 Sheet 27 of 40


1 2 3 4 5 6 7 8
5 4 3 2 1

AVDD AVDD AVDD

GAIN1 SPKR HP
MODE MODE AUDGND C875 C866
R587 C874
.1U_4 .1U_4 R601
0 10.5 3 *1K_4 1U/10V
GAIN1 R282 100K

5
1 9 0 100K AUDGND AUDGND D33

25

15

10
U48

7
R283 1K_4 2 SPKPLG
C867 1U/10V 2 20 HPS 2 1 HPS_PLUGIN 4

VDD

HPVDD
C1P

C1N
CPVDD
<27> AOUTL INL HPS
R589 1
D C873 1U/10V 28 14 SPKL HPSENCE_PR <33> D
<27> AOUTR INR HPL
1K_4 BAS316 U50
R281 1K_4 1 13 SPKR SN74AHC1G32DCKR R594

3
R280 NC HPR
AUDGND AVDD 27 4 INSPKL+ 100K
100K NC OUTL+ INSPKL-
OUTL- 5
17 INSPKR-
R591 GAIN1 OUTR- INSPKR+ AVDD AUDGND AUDGND
24 GAIN_SEL OUTR+ 18
AMP POWER AUDGND
10K_4 23 6 AVDD
D32 AUDGND GND PVDDL
PGNDL 3 AUDGND
MUTE

CPGND
1 2 22 16

CPVSS
+5V +5V <29> AMP_MUTE# /SHDN PVDDR
19

GND

VSS
PGNDR C890
21 VBIAS
BAS316 C886 C884 C868 C869 .1U_4

3
+12V C888 MAX9755AETI

26

11

12
2

C513 C517 Q28 .1U_4 10U/10V_8 .1U_4 10U/10V_8


R279 D14 *2N7002 1U/10V

5
6
7
8
.1U/16V_4 10U/10V_8 HPSENCE_PR 2
8

*100K *BAS316
3 + C877 AUDGND
1

1 R277 *10 4 AUDGND AUDGND


2 - R292 R302 1U/10V

1
U17A Q27
*LM358ADR C504 *AO4414 0_8 0_8
4

R276 C505 AUDGND


*100P_4 AUDGND
*3.3M *1U/10V TO AUDIO
3
2
1
R278 *100K
AVDD SPEAKER CON.
C AUDGND C
C514 C518 C516 INSPKR+ L56 BK1608LL121 INSPKR+N C878 C879
INSPKR- L55 BK1608LL121 INSPKR-N
5 + .1U/16V_4 10U/10V_8 10U/10V_8 *.1U_4 *.1U_4
R312 0 CN13
7 REV:B MODIFY FOR EMI
6 - 4
U17B R313 0 R586 0
*LM358ADR 3 6 R585 0
AUDGND R311 0 2 5 C887 .1U_4
1 C870 1000P_4
C881 C880 R_L_SPEAKERS
INSPKL+ L54 BK1608LL121 INSPKL+N
AUDGND INSPKL- L53 BK1608LL121 INSPKL-N *.1U_4 *.1U_4

AUDGND
AUDGND AUDGND

LINE OUT&SPDIF CN35


SPKL R303 SPKL1 L61 BK1608LL121 SPKL_SYS SPKPLG- 5 6
SPKL_SYS <33>
C519 .01U/16V_4 R290 0 AUDGND 4 11
C529 1000P_4 470_4 SPKL_SYS 2
C520 .01U/16V_4 R291 0 R299 C522 SPKR_SYS 3
C528 1000P_4 1 10
C530 100P_4 R287 0 1K_4 470P_4
B C527 100P_4 B
+5V 8 LED
7 Drive
C916 9 IC
AUDGND AUDGND
AUDGND SPKR R300 SPKR1 L60 BK1608LL121 SPKR_SYS .1U_4
SPKR_SYS <33>
AUDGND 470_4 FOX=2F11381-TJ1-TR AUDGND
C523
R298
470P_4
1K_4 +3V
+5V

AUDGND AUDGND R646

10K_4 R647
AVDD
1K_4

2
SPKPLG
R637 1 3 C917 *.1U_4
<27,33> SPDIF_OUT
3

1K/F Q59 MMBT3904


Q54

3
2N7002
2 SPKPLG- Q58
2N7002 C: Change to 2N7002
SPKPLG- 2
F: NEW ADD FOR ESD
1

CLOSE TO CN35
D34
3

1
A A
DA204U
AUDGND +3V
PAD34 PAD35 PAD36 PAD37
1

1 1 1 1 R555

100K D31 PROJECT : ZL3


EMIPAD142X91 EMIPAD142X91 *EMIPAD142X91 EMIPAD142X91
HPS_IN 2 1 HPS_PLUGIN
<27> HPS_IN Quanta Computer Inc.
+5V
BAS316 Size Document Number Rev
AUDIO AMP C

Date: Wednesday, March 30, 2005 Sheet 28 of 40


5 4 3 2 1
5 4 3 2 1

LDRQ#(pin 8) internal is no use

REF3V VCCRTC 3V_ALWAYS

3V_ALWAYS

3
CN7 C680 C676 C654 C631 C614
1 R447 10U/10V_8 .1U_4 .1U_4 .1U_4 .1U_4
52 TX_551
63 <39,40> REFP 2 *0_4
4 *2N7002

*551_DEBUG 3V_ALWAYS Q39


R450 Should have a 0.1uF capacitor close to every

1
3V_ALWAYS 3V_ALWAYS GND-VCC pair + one larger cap on the supply.
U14

591_AVCC
MBCLK 6 1 C675 0_4 C630 C677
D
MBDATA SCL A0 .1U_4 .1U_4 *.1U_4 D
5 SDA A1 2
3 C276
A2
.1U_4 +3V
7 8 3V_ALWAYS
WP VCC C648
GND 4

123
136
157
166

161
.1U_4 ENV1 R443 10K_4

16

34
45

95
24LC08 U30

VBAT
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VDD

AVCC
+3V BADDR0 R444 *10K_4

3V_ALWAYS SERIRQ 7 81 TEMP_MBAT R370 BADDR1 R445 *10K_4


<18,19,22,23,31> SERIRQ SERIRQ AD0 TEMP_MBAT <40>
8 82 TEMP_ABAT
LDRQ AD1 TEMP_ABAT <40>
LFRAME#/FWH4 9 83 T120 10K_4
<18,31> LFRAME#/FWH4 LFRAME AD2
R418 LAD0/FWH0 15 84 T118 LPCPD# R140 10K_4
<18,31> LAD0/FWH0 LAD0 Host interface AD3
LAD1/FWH1 14 87 WIRELESS_SW#
<18,31> LAD1/FWH1 LAD1 IOPE0AD4 WIRELESS_SW# <30>
470K_4 LAD2/FWH2 13 88 BLUETOOTH_SW#
<18,31> LAD2/FWH2 LAD2 IOPE1/AD5 BLUETOOTH_SW# <30>
LAD3/FWH3 10 89 SUSC# SHBM R446 10K_4
<18,31> LAD3/FWH3 LAD3 IOPE2/AD6 SUSC# <19>
PCLK_591 PCLK_591 18 AD Input 90
<2> PCLK_591 LCLK IOPE3/AD7 HWPG <34,35,36,37,38> SHBM=1: Enable shared memory with host BIOS
19 LREST DP/AD8 93
KBSMI# 2 1 22 94
<19> KBSMI# SMI DN/AD9
D12 BAS316 23
R411 PWUREQ CC-SET +3V I/O Address
DA0 99 CC-SET <39>
*22_4 100 CV-SET BADDR1-0 Index Data
DA output DA1 CV-SET <39> 0 0 2E 2F
SCI# 2 1 31 101 CONTRAST
<19> SCI# IOPD3/ECSCI DA2 CONTRAST <16> 0 1 4E 4F
D13 BAS316 102 VFAN R160
DA3 VFAN <30> 1 0 (HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
GATEA20 2 1 5 32 10K_4 1 1 Reserved
<18> GATEA20 GA20/IOPB5 IOPA0/PWM0
D23 BAS316 6 33
C647 RCIN# KBRST/IOPB6 IOPA1/PWM1 MAX6648_AL
<18> RCIN# 2 1 IOPA2/PWM2 36
*10P_4 D22 BAS316 PWM 37
IOPA3/PWM3 AMP_MUTE# <28>

3
MX0 71 or PORTA 38 BT1# 3V_ALWAYS
<30> MX0 KBSIN0 IOPA4/PWM4 BT1# <30>
MX1 72 39 BT2#
<30> MX1 KBSIN1 IOPA5/PWM5 BT2# <30>
MX2 73 40 BT3# Q22 MBCLK R145 4.7K_4
<30> MX2 KBSIN2 IOPA6/PWM6 BT3# <30>
MX3 74 43 BT4# 2
<30> MX3 KBSIN3 IOPA7/PWM7 BT4# <30> MAX6648_AL# <3>
MX4 77 2N7002 MBDATA R149 4.7K_4
<30> MX4 KBSIN4
MX5 78 153
<30> MX5 KBSIN5 IOPB0/URXD PWRLED# <30>
C MX6 79 154 TX_551 +3V C
<30> MX6 KBSIN6 IOPB1/UTXD
MX7 80 Key matrix scan 162
<30> MX7 SUSLED# <30>

1
KBSIN7 IOPB2/USCLK MBCLK
IOPB3/SCL1 163 MBCLK <3,11,40>
3VH_591 MY0 49 PORTB 164 MBDATA WIRELESS_SW# R365 4.7K_4
<30> MY0 KBSOUT0 IOPB4/SDA1 MBDATA <3,11,40>
MY1 50 165 PLTRST#
<30> MY1 KBSOUT1 IOPB7/RING/PFAIL PLTRST# <6,11,15,18,21,31,32,33>
1

Q16 MY2 51 BLUETOOTH_SW# R364 4.7K_4


<30> MY2 KBSOUT2
*PDTA124EU MY3 52 168 REFON
<30> MY3 KBSOUT3 IOPC0 REFON <39>
BT1# 2 MY4 53 169 LID591#
<30> MY4 KBSOUT4 IOPC1/SCL2 LID591# <16,19>
MY5 56 170 D24
<30> MY5 KBSOUT5 IOPC2/SDA2 3V_ALWAYS
MY6 57 171 1 2
<30> MY6 KBSOUT6 PORTC IOPC3/TA1 DNBSWON# <19>
MY7 58 172 FANSIG
<30> MY7 FANSIG <30>
3

HOLD# MY8 KBSOUT7 IOPC4/TB1/EXWINT22 EC_FPBACK# BAS316


<30> MY8 59 KBSOUT8 IOPC5/TA2 175 EC_FPBACK# <16>
MY9 60 176 MAX6648_AL R141
<30> MY9 KBSOUT9 IOPC6/TB2/EXWINT23
MY10 61 1 PWROK_1 R431 0_4
<30> MY10 KBSOUT10 IOPC7/CLKOUT ICH_PWROK <19>
3VH_591 MY11 64 1K_4
<30> MY11 KBSOUT11
MY12 65 26 HOLD#
<30> MY12 KBSOUT12 IOPD0/RI1/EXWINT20
1

Q17 MY13 66 PORTD-1 29 ACIN


<30> MY13 KBSOUT13 IOPD1/RI2/EXWINT21
*PDTA124EU +5V MY14 67 30 591_PME# REV:C MODIFY
<30> MY14 KBSOUT14 IOPD2/EXWINT24

3VH_591
BT2# 2 MY15 68
<30> MY15 KBSOUT15
2 NBSWON#
IOPE4/SWIN NBSWON# <30>
105 44 SUSB#
TINT IOPE5/EXWINT40
8
6
4
2

106 PORTE 24 LPCPD# If Pin 24 is not pull-high,


3

HOLD# RN113 TCK IOPE6/LPCPD/EXWIN45 CLKRUN#


107 TDO IOPE7/CLKRUN/EXWINT46 25 CLKRUN# <18,22,23,25,31> System will not able to boot.
108 JTAG debug port
8P4R-4.7K TDI

1
109 124 ENV0
3VH_591 TMS IOPH0/A0/ENV0 ENV1
125
7
5
3
1

IOPH1/A1/ENV1 BADDR0 NBSWON#


<33> MSCLK 110 PSCLK1/IOPF0 IOPH2/A2/BADDR0 126 2
1

Q18 111 127 BADDR1 Q20


<33> MSDATA PSDAT1/IOPF1 IOPH3/A3/BADDR1
*PDTA124EU 114 128 TRIS PDTA124EU
<33> KPCLK PSCLK2/IOPF2 PORTH IOPH4/A4/TRIS
BT3# 2 115 131 SHBM
<33> KPDATA

3
TBCLK PSDAT2/IOPF3 PS2 interface IOPH5/A5/SHBM A6
<30> TBCLK 116 PSCLK3/IOPF4 IOPH6/A6 132
TBDATA 117 133 A7 D20
<30> TBDATA PSDAT3/IOPF5 IOPH7/A7
CAPSLED# 118 SUSB# 2 1 BAS316
<30> CAPSLED# <19> SUSB#
3

HOLD# NUMLED# PSCLK4/IOPF6 D0


<30> NUMLED# 119 PSDAT4/IOPF7 IOPI0/D0 138
139 D1 D19
IOPI1/D1 D2 ACIN HOLD#
IOPI2/D2 140 <39> ACIN 2 1 BAS316
3VH_591 141 D3
591_32KX1 PORTI IOPI3/D3 D4
158 32KX1/32KCLKOUT IOPI4/D4 144
1

B B
Q19 145 D5 R130
*PDTA124EU R172 20M 591_32KX2 IOPI5/D5 D6
160 32KX2 IOPI6/D6 146 100K_4
BT4# 2 147 D7
R179 IOPI7/D7
150 RD#
PORTJ-1 IOPJ0/RD WR# U24
151
3

IOPJ1/WR0
1
2

HOLD# 121K/F 12 13 D0
Y3 A0 D0 D1
SELIO 152 11 A1 D1 14
10 15 D2
32.768KHZ -RBAYINS M/A# A2 D2 D3
62 41 9 17
CHANGED FROM PR_INSERT# <21> -RBAYINS PR_STS 63
IOPJ2/BST0 IOPD4
42 CELL-SET
M/A# <40>
8
A3 D3
18 D4
<19,33> PR_STS CELL-SET <39,40>
4
3

IOPJ3/BST1 PORTD-2 IOPD5 D/C# A4 D4 D5


T119 69 IOPJ4/BST2 IOPD6 54 D/C# <39,40> 7 A5 D5 19
70 PORTJ-2 55 BL/C# 6 20 D6
T117 IOPJ5/PFS IOPD7 BL/C# <40> A6 D6
75 5 21 D7
<30> BATLED0# IOPJ6/PLI A7 D7
C326 C337 76 143 A8 27
<30> BATLED1# IOPJ7/BRKL_RSTO IOPK0/A8 A8
10P_4 10P_4 142 A9 26
IOPK1/A9 A10 A9 A18
<22> RF_EN 148 IOPM0/D8 IOPK2/A10 135 23 A10 VPP 1
BT_POWERON# 149 PORTK 134 A11 25
<22> BT_POWERON# IOPM1/D9 IOPK3/A11 A11
155 130 A12 4
<19> RSMRST# IOPM2/D10 PORTM IOPK4/A12 A12
156 129 A13 28
T65 IOPM3/D11 IOPK5/A13/BE0 A13
VRON 3 121 A14 29
<34> VRON IOPM4/D12 IOPK6/A14/BE1 A14 3V_ALWAYS
MAINON 4 120 A15 3
<33,35,36,37,38> MAINON IOPM5/D13 IOPK7/A15/CBRD A15
SUSON 27 2
<33,35,36> SUSON IOPM6/D14 A16
S5_ON 28 113 A16 30 32
<35,37> S5_ON IOPM7/D15 IOPL0/A16 A17 VCC
112 A17
CS# PORTL IOPL1/A17 A18 CS# C48
173 SEL0 IOPL2/A18 104 22 CE#
174 103 RD# 24
SEL1 IOPL3/A19 WR# OE# .1U_4
47 CLK IOPL4/WR1 48 31 WE# GND 16

PLCC32
AGND
GND1
GND2
GND3
GND4
GND5
GND6
GND7

NC10
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

BIU configuration should match flash speed used


PC97551
17
35
46
122
159
167
137

96

11
12
20
21
85
86
91
92
97
98

A A
C643
FOR 97551 ONLY
1U/10V

+3V_S5 +3V_S5 3V_ALWAYS

PROJECT : ZL3
R368 2 R371

*4.7K_4 *4.7K_4 Quanta Computer Inc.


INTERNAL PULLUP IN SB Q35
PDTC143TT Size Document Number Rev
1 3 591_PME# 97551 & FLASH C
<25> LAN_PME#
Date: Tuesday, March 29, 2005 Sheet 29 of 40
5 4 3 2 1
5 4 3 2 1

3V_ALWAYS U26B
INT K/B REVB P/N&FT CHANGE FAN CONTROL LM358ADR
CN5 RP4 CA5 220PX4 CA6 220PX4 5 +
MY15 MX7 10 1 MY3 MY1 1 2 1 2 MY7 7
<29> MY15 1 +5V
MY14 MX6 MY4 9 2 MY2 MY2 3 4 3 4 MY6 6
<29> MY14 2 -
MY13 MX5 MY5 8 3 MY1 MX4 5 6 5 6 MY5 +12V
<29> MY13 3 +5V
MY12 MY0 MY6 7 4 MY0 MY3 7 8 7 8 MY4
<29> MY12 4
MY11 MY1 MY7 +3V
<29> MY11
MY10 5 MY2
6 5 2ND FAN
<29> MY10 6
MY9 MX4 10KX8
<29> MY9 7

1
2
5
6

1
MY8 MY3 CA9 220PX4 CA7 220PX4
<29> MY8 8
MY7 MY4 RP6 MY12 1 2 1 2 MX2 3 R47 Q13 10K_4 R44 L81
<29> MY7 9 <29> VFAN +
MY6 MY5 10 1 MY11 MY13 3 4 3 4 MY9 1 +5VFAN 3 AO6402
<29> MY6 10
MY5 MY6 MY12 9 2 MY10 MY14 5 6 5 6 MX3 2 *BLM11A601S
<29> MY5 11 -
D MY4 MY7 MY13 8 3 MY9 MY15 7 8 7 8 MY8 10 D
<29> MY4 12
MY3 MY8 MY14 7 4 MY8 U26A FANSIG <29>
<29> MY3

2
MX7 13 MX3 MY15 LM358ADR
<29> MX7
MX6 14 MY9
6 5 30 MIL CN19
<29> MX6 15 3V_ALWAYS CN37
MY2 MX2 10KX8 CA8 220PX4 CA4 220PX4 +12V FAN_PWR C949
<29> MY2 16 1 4
MX5 MX1 MX1 1 2 1 2 MY0 +5VFAN2
<29> MX5 17 2 1 4
MX4 MY10 RP5 MY10 3 4 3 4 MX5 *10U/10V_8
<29> MX4 18 3 5 2
MX3 MY11 10 1 MX3 MY11 5 6 5 6 MX6 R49 3.9K/F
<29> MX3 19 3 5
MX2 MX0 MX4 9 2 MX2 MX0 7 8 7 8 MX7 C575 FAN
<29> MX2 20
MY1 MY12 MX5 8 3 MX1 .1U/25V_8 R52 *FAN2
<29> MY1 21 +5V
MY0 MY13 MX6 7 4 MX0 C59
<29> MY0 22
MX1 MY14 MX7 6 5 3K
<29> MX1 23
MX0 MY15 10U/10V_8
<29> MX0 24
10KX8
25
PTWO_KB
R655

3
*10K_4
TOUCH PAD
2 Q57
20 MIL <11> VGA_FAN2

7
5
3
1
L43 CA3 +3V
+5V_TP C314 .1U_4 *2N7002
+5V *220PX4
CN3

8
6
4
2

1
BK2125HS330
EMAIL_LED PWRLED2 R17 200
IDE_LED 14 13 BT1# R656
12 11 BT1# <29>
CAPSLED BT2# *0_4
10 9 BT2# <29>
R154 R155 NUMLED BT3#
8 7 BT3# <29>
REVB P/N&FT CHANGE NBSWON# BT4#
<29> NBSWON# 6 5 BT4# <29>
C 10K_4 10K_4 C
4 3

7
5
3
1
C40
CN8 2 1 CA2
*.1U_4 ACE_LED_14P
LZA10-2ACB104MT 1 *220PX4

8
6
4
2
L41 TP_DATA 2
<29> TBDATA L42 TP_CLK 3
<29> TBCLK 4
LZA10-2ACB104MT 5
C316 C317 6
SW3
*.1U_4 *.1U_4 PTWO_TOUCHPAD WIRELESS_SW# 2 1
<29> WIRELESS_SW#
3
MISAKI_SWITCH_WL 4

SW4
BLUETOOTH_SW# 2 1
<29> BLUETOOTH_SW#
3
MISAKI_SWITCH_BT 4 +5V +3V

R31
R23
330_4
+3V 10K_4 IDE_LED

3
R32
B IDELED# 2 2N7002 B
330_4 <21> IDELED# Q8
NUMLED
3V_ALWAYS

1
3

+3V
LED3
R609 330_4 -PWRLED
PWRLED# <29> 2N7002
NUMLED# 2
R610 330_4 -SUSLED <29> NUMLED# Q9
SUSLED# <29> <22> WIRELESS_LED
R223

LED_G/Y_LTST-C155GYKT SA@10K_4
1

R309 330_4 LED4

3
1 2

Q7
2 SA@2N7002 LED_Y_LTST-C190KFKT
<18> -HDD0_LED
LED2
R611 330_4 -BATLED0
BATLED0# <29>
+3V

1
R612 330_4 -BATLED1
BATLED1# <29> <22> BT_LED

LED_G/Y_LTST-C155GYKT +3V
R310 330_4 LED5
1 2
R33
R34
330_4 LED_B_LTST-C190TBKT
A 330_4 A
EMAIL_LED
CAPSLED
3

3
EMAIL_LED# 2 2N7002
<19> EMAIL_LED# Q11
<29> CAPSLED#
CAPSLED# 2 2N7002 PROJECT : ZL3
Q10

Quanta Computer Inc.


1

Size Document Number Rev


T/P,FAN,SWITCH,LED,K/B C

Date: Tuesday, March 29, 2005 Sheet 30 of 40


5 4 3 2 1
5 4 3 2 1

+3V

C38 C37 C39

.1U_4 .1U_4 10U/10V_8

18

17

11

32

45
U2

1
NC

NC

NC

NC

VDD

VDD

VDD
D STRAP PINS D
C35 R19
PCLK_SIO LAD0/FWH0 42 15
<18,29> LAD0/FWH0 LAD0 GPIO00 MDTR1# R22 *10K_4
*10P_4 *22_4 LAD1/FWH1 46 16
<18,29> LAD1/FWH1 LAD1 GPIO01 MRTS1# R29 *10K_4
LAD2/FWH2 51 19
<18,29> LAD2/FWH2 LAD2 GPIO02 MTXD1 R30 *10K_4
LAD3/FWH3 53 23
<18,29> LAD3/FWH3 LAD3 GPIO20
PCLK_SIO
<2> PCLK_SIO 33 LCLK NS PC87383 GPIO03 20
+3V LPC_DRQ0# 22 21
<18> LPC_DRQ0# LDRQ/XOR_OUT GPIO04
LFRAME#/FWH4 38 40
<18,29> LFRAME#/FWH4 LFRAME GPIO05
R333
PLTRST# 35 7
<6,11,15,18,21,29,32,33> PLTRST# LRESET GPIO06
10K_4
SERIRQ 36 41
D18 <18,19,22,23,29> SERIRQ SERIRQ GPIO07
LPC_PD# 1 2 SUS_STAT_3V# 29
<19,23> LPC_PD# LPCPD/GPIO21
CLKRUN# 27
<18,22,23,25,29> CLKRUN# CLKRUN/GPO22
*BAS316
58 14M_SIO
+5V CLKIN 14M_SIO <2>
RN4
3 4 PD0 INIT# 56 R20 +3V
<33> INIT# INIT U51
1 2 PD1 8 IRRX R28 T = 20mil
IRRX1 +3V
ERROR# 54 18nH_4 6
<33> ERROR# ERR VCC
4P2R_4.7K 9 IRTXOUT 10K_4 IRTXOUT 3 7
C RN3 BUSY IRTX IRRX TXD MODE C531 C532 C533 C
<33> BUSY 26 BUSY_WAIT 4 RXD
3 4 PD2 10 IRMODE IRMODE 5 2
PD4 AFD# IRRX2_IRSL0/GPIO17 C41 SD LED_C .1U_4 10U/10V_8 10U/10V_8
1 2 <33> AFD# 57 AFD_DSTRB/TRIS 8 GND LED_A 1
6P_4
4P2R_4.7K ACK# 28 VISHAY_TFDU6102_8P
<33> ACK# ACK/GPO24
RN2
3 4 PD5 STRB# 14
<33> STRB# STB_WRITE/TEST
1 2 PD6
SLIN# 55 3 +5V
<33> SLIN# SLIN_ASTRB CTS1/GPIO11 MCTS1# <33>
4P2R_4.7K T = 20mil
SLCT 24 59
<33> SLCT SLCT DCD1/GPIO16 MDCD1# <33>
R21 4.7K_4 PD3 R306 5.6_1206_5%
R12 4.7K_4 PD7 PE 25 60
<33> PE PE DSR1/GPIO15 MDSR1# <33>
R307 5.6_1206_5%
PD7 30 62
PD7/PGIO23 RTS1/GPIO13 MRTS1# <33>
R16 4.7K_4 SLCT C521
PD6 34 61
PD6 SIN1/GPIO14 MRXD1 <33>
R24 4.7K_4 ERROR# 10U/10V_8
PD5 37 63
PD5 SOUT1/GPIO12 MTXD1 <33>
R25 4.7K_4 SLIN#
PD4 39 5
PD4 RI1/GPIO10 MRI1 <33>
R15 4.7K_4 PE
PD3 6 4
PD3 DTR1_BOUT1/BADDR MDTR1# <33>
R26 4.7K_4 INIT#
PD2 43
R27 4.7K_4 AFD# PD2
PD1 50
R18 4.7K_4 STRB# PD1
PD0
VCORF
52 PD0
R13 4.7K_4 ACK#
<33> PD[0..7]
VSS

VSS

VSS

NC

NC

NC

NC
B R14 4.7K_4 BUSY B
PC87383
12

31

44

13

47

48

49

64
C36

C891 *180P_4 PD0 .1U_4


C892 *180P_4 PD1
C893 *180P_4 PD2
C894 *180P_4 PD3
C895 *180P_4 PD4
C896 *180P_4 PD5
C897 *180P_4 PD6
C898 *180P_4 PD7
C899 *180P_4 SLCT
C900 *180P_4 ERROR#
C901 *180P_4 SLIN#
C902 *180P_4 PE
C903 *180P_4 INIT#
C904 *180P_4 AFD#
C905 *180P_4 STRB#
C906 *180P_4 ACK#
C907 *180P_4 BUSY

A A

PROJECT : ZL3
Quanta Computer Inc.
Size Document Number Rev
EZ PORT & SIO (87383) C

Date: Tuesday, March 29, 2005 Sheet 31 of 40


5 4 3 2 1
5 4 3 2 1

+3V_S5

CN10

U44 26 29
N@OZ2710 GND1 GND29
<19> PCIE_TXP0 25 PETp0 GND30 30
<19> PCIE_TXN0 24 PETn0
+1.5V 11 10 +NEW_1.5V 23
1.5VIN1 1.5VOUT1 R548 R537 C429 N@.1U_4 PERP0 GND2
13 1.5VIN2 1.5VOUT2 12 <19> PCIE_RXP0 22 PERp0
N@10K_4 N@10K_4 C431 N@.1U_4 PERN0 21
D <19> PCIE_RXN0 PERn0 D
+3V 4 5 +NEW_3V 20
3.3V1 3.3VOUT1 GND3
6 3.3V2 3.3VOUT2 7 <2> CLK_PCIE_NEWC 19 REFCLK+
<2> CLK_PCIE_NEWC# 18 REFCLK-
+3V_S5 1 16 +NEW_3VAUX CPPE# 17
AUX_IN AUX_OUT CPPE#
<2> NEW_CLKREQ# 16 CLKREQ#
2 14 CPUSB# +NEW_3V 15
<6,11,15,18,21,29,31,33> PLTRST# RST# CPUSB# CPPE# +3.3V1
CPPE# 15 14 +3.3V2
3 PERST# PERST# 13
CPERST# +NEW_3VAUX PERST#
12 +3.3VAUX
+12V +3V 11
+NEW_1.5V WAKE#
8 CLK32K GND1 9 10 +1.5V1
9 +1.5V2
NEW_SMDATA 8
NEW_SMCLK SMB_DATA
7 SMB_CLK
6 RESERVED1
5 RESERVED2
R560 CPUSB# 4 CPUSB#
2

*150K 3
<19> USBP1+ USB_D+
+NEW_3V 2
<19> USBP1- USB_D-
3 1 OZ_SCLK 1
<19> SUSCLK GND4

Q46 N@331-1CX43201-ZG-X2

4
2
C N@2N7002 C
RP3 +NEW_3VAUX USBP1- USBP1+

N@4P2R-S-10K
C474 C506 C502

3
1
N@.1U_4 N@10P_4 N@10P_4
3 1 NEW_SMDATA
<2,19,25,33> PDAT_SMB
+3V_S5 +3V +1.5V
Q25 N@2N7002
+NEW_3V +NEW_1.5V
+NEW_3V
C790 C810 C802 C500 C498
N@.1U_4 N@.1U_4 N@.1U_4 N@.1U_4 N@.1U_4 C471 C454 C452 C493 C496

N@4.7U/10V_8 N@.1U_4 N@.1U_4 N@4.7U/10V_8 N@.1U_4

2
3 1 NEW_SMCLK
<2,19,25,33> PCLK_SMB

Q26 N@2N7002

B B

HOLE2 HOLE4 HOLE3 HOLE6 HOLE8 HOLE11 HOLE14 HOLE18 HOLE19 PAD3 PAD2 PAD4 PAD7 PAD8 PAD9 PAD16 PAD6 PAD18 PAD19 PAD20 PAD22
*H-C276D118P2 *H-C276D118P2 *H-C276D118P2 *H-C276D118P2 *H-C276D118P2 *H-C276D118P2 *H-C276D118P2 *H-C276D118P2 *H-C276D118P2
*EMIPAD *EMIPAD *EMIPAD *EMIPAD E@EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD E@EMIPAD *EMIPAD *EMIPAD

1
1

HOLE20 HOLE26 HOLE25 HOLE24 HOLE22


*H-C276D118P2 *H-C276D118P2 *H-C276D118P2 *H-C276D118P2 *H-C276D118P2 HOLE7 PAD10 PAD11 PAD13 PAD14 PAD15 PAD12 PAD21 PAD17 PAD23 PAD25 PAD24 PAD5
*H-C197D118P2
*EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD E@EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD
1

1
1

AUDGND AUDGND
A HOLE12 HOLE9 HOLE15 A
*H-C236D138P2 I@H-C236D138P2 I@H-C236D138P2 HOLE17 HOLE13 HOLE16 HOLE10 HOLE21 HOLE5
H-C335D157P2-BOT H-C335D157P2-BOT H-C335D157P2-BOT *H-C177D59P2-BOT H-C276D157P2-TOP H-C177D59I99P2-TOP
PROJECT : ZL3
Quanta Computer Inc.
1

Size Document Number Rev


VGA EZ PORT & SIO (87383) C
CPU HEATSINK MODEM BD SW BD
Date: Tuesday, March 29, 2005 Sheet 32 of 40
5 4 3 2 1
5 4 3 2 1

L62 L63
CN16-4 CN16-3 D@BK1608LL121 D@BK1608LL121 CN16-2 CN16-1
CRTHSYNC PR_CRTHSYNC 78
<17> CRTHSYNC CRT_HS
100MBPS# 8 100 CRTVSYNC PR_CRTVSYNC 79 64
<25,26> 100MBPS# LANLED_LINK GND100 <17> CRTVSYNC CRT_VS DVI_HPD TMDS_HPD <11,15>
ACT# 31 101 TV_COMP_PR DDCCLK_1 81 98 CLK-
<25,26> ACT# LANLED_ACT TV_COMPS TV_COMP_PR <16><17> DDCCLK_1 CRT_DDCK DVI_CLK- CLK- <11,15>
33 102 TV_Y/G_PR DDCDAT_1 80 97 CLK+
GND33 TV_LUMA TV_Y/G_PR <16> <17> DDCDAT_1 CRT_DDCDT DVI_CLK+ CLK+ <11,15>
103 TV_C/R_PR 105 99
TV_CRMA TV_C/R_PR <16> GND105 GND99
SUSON_PR 55 104 D@BK1608LL680 L11 PR_RED 106 94 TX0- R326
SUSON GND104 <17> VGA_RED_PR VGA_R DVI_D0- TX0- <11,15>
MAINON_PR 56 D@BK1608LL680 L10 PR_GRN 107 95 TX0+ 100K_4
MAINON <17> VGA_GRN_PR VGA_G DVI_D0+ TX0+ <11,15>
DOCKPRG 85 9 STRB# D@BK1608LL680 L9 PR_BLU 108 96
BRG_PWROK STRB# STRB# <31> <17> VGA_BLU_PR VGA_B GND96
11 PD0 109 91 TX1-
PD0 GND109 DVI_D1- TX1- <11,15>
KPCLK 52 13 PD1 117 92 TX1+
<29> KPCLK PS2KBCK PD1 GND117 DVI_D1+ TX1+ <11,15>
KPDATA 51 15 PD2 119 93
<29> KPDATA PS2KBDT PD2 <2> CLK_PCIE_EZ1 PCIE1_CLK+ GND93
D MSCLK 54 17 PD3 120 61 TX2- D
<29> MSCLK PS2MSCK PD3 <2> CLK_PCIE_EZ1# PCIE1_CLK- DVI_D2- TX2- <11,15>
MSDATA 53 18 PD4 118 62 TX2+
<29> MSDATA PS2MSDT PD4 PD[0..7] <31> GND118 DVI_D2+ TX2+ <11,15>
19 PD5 115 63
MDSR1# PD5 PD6 <19> PCIE_TXP1 PCIE1_TP GND63
<31> MDSR1# 48 DSR# PD6 20 <19> PCIE_TXN1 116 PCIE1_TN
MRTS1# 46 21 PD7 114 67 TMDS_DDCCLK_5V
<31> MRTS1# RTS# PD7 GND114 DVI_DDCCK
MCTS1# 44 24 PE 111 65 TMDS_DDCDATA_5V
<31> MCTS1# CTS# PE PE <31> <19> PCIE_RXP1 PCIE1_RP DVI_DDCDT
MRI1 42 10 AFD# 112 66
<31> MRI1 RI AFD# AFD# <31> <19> PCIE_RXN1 PCIE1_RN GND66
MDCD1# 49 12 ERROR# 113
<31> MDCD1# DCD# ERROR# ERROR# <31> GND113
MRXD1 47 14 INIT# 29 37 X-TX3P-PR
<31> MRXD1 RXD# INIT# INIT# <31> <2> CLK_PCIE_EZ2 PCIE2_CLK+ TX3P X-TX3P-PR <26>
MTXD1 45 16 SLIN# 30 38 X-TX3N-PR
<31> MTXD1 TXD# SLIN# SLIN# <31> <2> CLK_PCIE_EZ2# PCIE2_CLK- TX3N X-TX3N-PR <26>
MDTR1# 43 22 ACK# 27 39
<31> MDTR1# DTR# ACK# ACK# <31> GND27 GND39
50 23 BUSY 59 34 X-TX2P-PR
GND50 BUSY BUSY <31> <19> PCIE_TXP2 PCIE2_TP TX2P X-TX2P-PR <26>
25 SLCT 60 35 X-TX2N-PR
SLCT SLCT <31> <19> PCIE_TXN2 PCIE2_TN TX2N X-TX2N-PR <26>
<27,28> SPDIF_OUT 41 SPDIF_OUT 28 GND28 GND36 36
AUDGND1 72 58 89 4 X-TX1P-PR
AGND72 GND58 <19> PCIE_RXP2 PCIE2_RP TX1P X-TX1P-PR <26>
SPKR_SYS 74 77 90 5 X-TX1N-PR
<28> SPKR_SYS LINEOUT_R GND77 <19> PCIE_RXN2 PCIE2_RN TX1N X-TX1N-PR <26>
SPKL_SYS 75 110 D4 88 6
<28> SPKL_SYS LINEOUT_L GND110 <6,11,15,18,21,29,31,32> PLTRST# GND88 GND6
LINEINR_PR 70 1 2 D@BAS316 57 1 X-TX0P-PR
<27> LINEINR_PR LINEIN_R PCIERST TX0P X-TX0P-PR <26>
LINEINL_PR 71 32 26 2 X-TX0N-PR
<27> LINEINL_PR LINEIN_L RESERVE32 LUSB1# <18> <18,19> LUSB2# PCIEWAKE TX0N X-TX0N-PR <26>
PR_MIC 73 82 86 3
<27> PR_MIC MICIN RESERVE82 <2,19,25,32> PDAT_SMB PCIESMBDT GND3
AUDGND1 76 AGND76 +5V <2,19,25,32> PCLK_SMB 83 PCIESMBCK GND7 7
69 87 68 DOCKIN#
<27> PR_MIC_IN PRMIC_DET <2> EZ_CLKREQ# PCIEREQ# DOCK_IN#
40 C921 84 R321 D@1K_4
<28> HPSENCE_PR HPSENSE_PR DOCKED#
124 123 D@.1U_4
G2 G1
GND126 126 VA 122 P2
125 GND125 P1 121 VA
D@EZ4_Acer_define D@EZ4_Acer_define +3V +5V
R7 D@0_4 D@EZ4_Acer_define D@EZ4_Acer_define
C C
VA
AUDGND1
+3V_S5
+3V_S5 R330 R325 DOCKIN#
2.2K_4 D@10K_4 C536 C548

C911 D@.1U/50V D@.1U/50V

2
R613 Q3

7
D@.1U_4
1 3 TMDS_DDCDATA_5V
<11,15> TMDS_DDCDATA
5

D@10K_4 DOCKPRG 1 D@FDV301N SUSON_PR 3 5 SUSON <29,35,36>


4 PR_STS <19,29>
DOCKIN 2
U53 +3V U52B
3

D@TC7SH08FU D@7W125FU
3

+5V
B: CHANGE TO FDV301N
R614 DOCKIN#

DOCKIN# D@1M
2
+3V_S5
Q52 R324
D@2N7002 R329 D@10K_4
2.2K_4 C912
1

8
Q4 D@.1U_4

1 3 TMDS_DDCCLK_5V
B <11,15> TMDS_DDCCLK B
MAINON_PR 6 2 MAINON <29,35,36,37,38>
D@FDV301N

PR_CRTHSYNC C544 *10P_4 U52A

4
PR_CRTVSYNC C545 *10P_4 D@7W125FU
PR_BLU C24 D@10P_4 +5V
PR_GRN C25 D@10P_4
PR_RED C26 D@10P_4
CRTHSYNC C549 *10P_4
SPKL_SYS C543 D@220P_4 CRTVSYNC C550 *10P_4
<26> DOCKIN#
SPKR_SYS C542 D@220P_4
LINEINL_PR C27 D@220P_4 DDCCLK_1 C547 D@10P_4 +3V_S5
LINEINR_PR C28 D@220P_4 DDCDAT_1 C546 D@10P_4 R11
PR_MIC_IN C13 D@47P_4 X-TX1P-PR C16 D@10P_4
PR_MIC C23 D@47P_4 X-TX1N-PR C15 D@10P_4 D@10K_4
100MBPS# C14 D@1000P_4 X-TX0P-PR C18 D@10P_4
PR_INSERT_5V <16,17>
ACT# C17 D@1000P_4 X-TX0N-PR C19 D@10P_4 R320

3
TV_COMP_PR C20 D@10P_4 X-TX3P-PR C539 D@10P_4
TV_C/R_PR C22 D@10P_4 X-TX3N-PR C540 D@10P_4 D@100K_4
TV_Y/G_PR C21 D@10P_4 X-TX2P-PR C537 D@10P_4
X-TX2N-PR C538 D@10P_4 DOCKIN# 2

C541 Q6
D@2N7002
D@.1U_4

1
A A

PROJECT : ZL3
Quanta Computer Inc.
Size Document Number Rev
EZ PORT & SIO (87383) C

Date: Tuesday, March 29, 2005 Sheet 33 of 40


5 4 3 2 1
5 4 3 2 1

D D
+3V 1907VCC 5VPCU

PC52 PC135
PR37
1 2 2 1 1 2
10

1
10U/6.3V 10U/6.3V

2
PR138 PR136 PR134 VIN_1907A VIN
*10K 2.2K_4 10K PD10 PL19
VIN_1907A BAS316

10

30
2

2
PU13
36 34 N20122PS800 PC136

VCC

VDD
<29,35,36,37,38> HWPG

1
SYSPOK V+ PC67 + 10U/25V-T
37 31 1907BST 2 1 PC172 PC176
<6,19> IMVP_PWRGD IMVP_OK BST PC62 PC137

4
38 .1U/50V .1U/50V 330U/25V 10U/25V-T 10U/25V-T
<2> CLK_EN# CLK_EN PQ57
33 MAX1907DH 1 FDD6035AL
DH
<4> CPU_VID0 26

3
D0 CM+
<4> CPU_VID1 25 D1
24 PR140 25A
<4> CPU_VID2 D2
23 PL20 0.001-2512
<4> CPU_VID3 D3
22 32 MAX1907LX
<4> CPU_VID4 D4 LX VCC_CORE

1
21 0.6UH
<4> CPU_VID5 D5 PQ59 PQ58
1907VCC 6 1 FDD66881 FDD6688 + + + PC82
S2 PD24 PC60 PC61
5 29

3
S1 DL SKS30-04A .1U/50V *470U/2.5V .1U/50V
4

2
S0
C 1907B0 1 C
1907B1 B0 PC142 PC76
2 B1 GND 11
1907B2 3 28 470U/2V 470U/2V
B2 PGND

PR34 1907VCC
<19> DPRSLPVR 2 1 35 SUS PR30
0 PR139 TON 40 2 1
<2,19> STP_CPU# 2 1 20 DPSLP *10K
0
PR125
<29> VRON 2 1 7 SHDN
OPEN:300KHz PR35
0 1 2
750/F

1
PR132 OA+ 17
2 1 39 16 PC64
TIME OA- 220P
62K/F PR36

2
1
15 1907FB 1 2
FB

1
1 2 12 CC PR137 1K/F
PC133 270P 19 2 1 VCC_CORE PR133 PC58
CSN 1.5K/F 100P
200

2
1

1907REF

2
2 1 8 PC134
REF 1000P_4 PR135
PC51 .22U
2

18 2 1 CM+
CSP
9 ILIM 200
1

27 14 1907FB
POS

PR124 DD NEG
1

301K/F
MAX1907A D5 D4 D3 D2 D1 D0 Output D5 D4 D3 D2 D1 D0 Output
OCP = 28A
2

13

PR33 1 0 0 0 0 0 1.196V 0 0 0 0 0 0 1.708V


B 1.24K/F 1 0 0 0 0 1 1.180V 0 0 0 0 0 1 1.692V B
1

1 0 0 0 1 0 1.164V 0 0 0 0 1 0 1.676V
2

1 0 0 0 1 1 1.148V 0 0 0 0 1 1 1.660V
1

PR123 1 0 0 1 0 0 1.132V 0 0 0 1 0 0 1.644V


1

49.9K/F PC132 1 0 0 1 0 1 1.116V 0 0 0 1 0 1 1.628V


100P 1907VCC 1907REF 1907VCC 1907REF 1907VCC 1907REF 1 0 0 1 1 0 1.100V 0 0 0 1 1 0 1.612V
2

PR131 1 0 0 1 1 1 1.084V 0 0 0 1 1 1 1.596V


100K/F 1 0 1 0 0 0 1.068V 0 0 1 0 0 0 1.580V
1

1
1 0 1 0 0 1 1.052V 0 0 1 0 0 1 1.564V
2

1 0 1 0 1 0 1.036V 0 0 1 0 1 0 1.548V
PR31 PR126 PR128 PR29 PR129 PR28 1 0 1 0 1 1 1.020V 0 0 1 0 1 1 1.532V
*0 0 0 *0 0 *0 1 0 1 1 0 0 1.004V 0 0 1 1 0 0 1.516V
1 0 1 1 0 1 0.988V 0 0 1 1 0 1 1.500V
2

2
1907B2 1907B1 1907B0 1 0 1 1 1 0 0.972V 0 0 1 1 1 0 1.484V
1 0 1 1 1 1 0.956V 0 0 1 1 1 1 1.468V
1

1
1 1 0 0 0 0 0.940V 0 1 0 0 0 0 1.452V
1 1 0 0 0 1 0.924V 0 1 0 0 0 1 1.436V
PR32 PR127 PR130 1 1 0 0 1 0 0.908V 0 1 0 0 1 0 1.420V
*NC *NC *NC 1 1 0 0 1 1 0.892V 0 1 0 0 1 1 1.404V
1 1 0 1 0 0 0.876V 0 1 0 1 0 0 1.388V
2

2
1 1 0 1 0 1 0.860V 0 1 0 1 0 1 1.372V
1 1 0 1 1 0 0.844V 0 1 0 1 1 0 1.356V
1 1 0 1 1 1 0.828V 0 1 0 1 1 1 1.340V
1 1 1 0 0 0 0.812V 0 1 1 0 0 0 1.324V
1 1 1 0 0 1 0.796V 0 1 1 0 0 1 1.308V
1 1 1 0 1 0 0.780V 0 1 1 0 1 0 1.292V
1 1 1 0 1 1 0.764V 0 1 1 0 1 1 1.276V
1 1 1 1 0 0 0.748V 0 1 1 1 0 0 1.260V
1 1 1 1 0 1 0.732V 0 1 1 1 0 1 1.244V
1 1 1 1 1 0 0.716V 0 1 1 1 1 0 1.228V
A 1 1 1 1 1 1 0.700V 0 1 1 1 1 1 1.212V A
VCC_BOOT

SUSPEND MODE (SUS=HIGH) B2 B1 B0 Output


GND GND GND 1.708V
S2 S1 S0 Output REF REF REF 1.372V
OPEN OPEN OPEN 1.036V PROJECT : ZL2
OPEN VCC GND 0.748V VCC VCC VCC 0.700V
REF VCC VCC 1.212V
Quanta Computer Inc.
Size Document Number Rev
CPU CORE (MAX1907) C

Date: Wednesday, March 30, 2005 Sheet 34 of 40


5 4 3 2 1
A B C D E

PC77 PR55
VIN1999 VIN1999-3 VIN
*100P *6.81K/F PD25 PR38 PL7
2 1 1 2
D: CHANGE FROM 12K/F

1
4.7 PC43 N20122PS800 PC30 PC31

1
ZD5.6V PC69 + PC49 + PC42 PC29
PR56 .1U/50V 1000P .1U/50V 3V_ALWAYS

1
1U/25V-X6S *10U/25V-X6S 10U/25V-T .1U/50V

2
0

D1

D1
S2

G2
PR249 D
3.3K

5
4 4
PQ20

S1/D2
<3> 1999_SHT#
MAX6648_OV# AO4912

G1
<3> MAX6648_OV#

1999_SHT#
PL18

8
1999LX3 PQ19
3V_ALWAYS
AO4812
VL PR42 1999DH3 3R8UH

4
+ PC131 PC139
D 1999DL3
REF2V 100K/F PC130 10U/10V .1U/50V MAIND

2
330U/4V SUSD
PC72 2 1 +3VSUS

1
PR40 1U/10V PC171 .22U PC70

1
.1U/50V PC66
PR50 PR49 47

2
10K/F 3.16K/F PU14 .1U/50V
1999VCC 17 22
ILIM3 ILIM5 VCC OUT3
1 2 REF2V 8 26 VIN1999-5 VIN +3V
PC141 1U/10V REF DH3 PL8
ILIM3 5 27 PC65
PR47 PR46 ILIM3 LX3

1
100K/F 200K/F ILIM5 11 28 1999BST3 N20122PS800 .1U/50V
ILIM5 BST3 PC53 + PC57 + PC56 PC46 PC44
7 FB3 DL3 24

1
VL 2 .1U/50V 10U/25V-T 10U/25V-T .1U/50V 1000P_4

2
3V_ALWAYS VL 9 6 5VPCU
FB5 SHDN

D1

D1
S2

G2
PR144 3 PD9
0 3VON 3 20 VIN1999 DAP202U PD8 15V
ON3 V+
1

1
PR145 0 5VON 4 18 1999LX15 2 1
ON5 LDO5

1
PR142 PC138

5
PC68
C68

S1/D2
23 GND PRO 10

2P
*100K D 10U/25V-T .1U/50V EP05FA20 + PC55

G1
2

2
1999VCC 12 19 PQ54
PR147 *100K SKIP DL5 AO4912 10U/25V-T
3 3

2
PR143 0 2 14 1999BST5
<29,34,36,37,38> HWPG PGOOD BST5
del PR147 3/24

1
1 15 1999LX5
N.C. LX5 5VPCU
PL15 PQ11
25 16 1999DH5 STQ125A-7322A AO4812
PR148 0 LDO3 DH5

4
1999VCC 13 21 PC28 +
TON OUT5
C913 SKIP_SEL 1999DL5 330U/6.3V-7343 PC36 PC40 MAIND
MAX1999 10U/10V .1U/50V SUSD
3

1U/10V
+5VSUS
PR60
5VPCU 2 PR146

*0 PC25
3

100K PQ22 .1U/50V


2N7002
1

MAIND 2
+5V
PQ23
2N7002 PC24
1

.1U/50V

VIN +0.9VSUS +1.8VSUS +3VSUS +5VSUS 12VOUT


VIN +1.5V_S5 +3V_S5 12VOUT 3V_ALWAYS

PR86 PR250 PR251 PR79 PR78 PR80


PR149 PR72 PR150 PR141 PC80
2 1M 22-0805 22-0805 22-0805 22-0805 1M 2
3

1M 22-0805 22-0805 1M .1U/50V


SUSD
SUSD
PQ40

3
2 PDTC143TT

3
PQ62
3

PDTC143TT
3

PQ24 2 PR81 2 2 2 2 2
SI2304 <29,33,36> SUSON PC98
1

PR151 1M PQ38 PQ37 PQ39 2200P


<29,37> S5_ON 2 2 2 2 +3V_S5
PC78 PQ65 PQ66 2N7002 2N7002 2N7002

1
1M PQ32 PQ61 PQ60 PC81 2N7002 2N7002

1
2N7002 2N7002 2N7002 2200P
1

.1U/50V
1

VIN +0.9V VGA1.2V +VCCP +1.2V VCC_CORE +1.5V +1.8V +2.5V +5V +3V 12VOUT

15V

PR87 PR252 PR253 PR73 PR14 PR13 PR94 PR258 PR254 PR92 PR93 PR84
PC34 .1U/50V PR20 1K/F E@22-0805 E@22-0805
1M 22-0805 E@22-0805 22-0805 22-0805 22-0805 22-0805 22-0805 22-0805 1M
8

3 + MAIND <36,37>
PR23 1 2 PQ15 PQ48
3

3
REF2V 2 MMBT3906 PDTC143TT
3

- PR22 1K/F PR21 0


3

15K PU4A PR88


PC39
4

LM358ADR MAINON 2 2 2 2 2 2 2 2 2 2 2 2 PC101


1M 2200P
12VOUT
1000P_4 PQ67 PQ68 PQ33 PQ10 PQ9 PQ42 PQ71 PQ69 PQ44 PQ45 PQ46
1

1 PR24 100K/F 1 3 E@2N7002 E@2N7002 2N7002 E@2N7002 2N7002 2N7002 2N7002 2N7002 2N7002 2N7002 2N7002 1
+12V
1

1
5 PQ17
+
2
1

PR26 PC47 1000P_4 PR25 IRLML5103


7 PC48
6 + PC38
- 20K/F
PU4B 10U/25V-T .1U/50V
2

LM358ADR 220K
3

PQ18
PDTC143TT PROJECT : ZL2
<29,33,36,37,38> MAINON 2
Quanta Computer Inc.
1

Size Document Number Rev


5V/3.3V(MAX1999) C
Date: Wednesday, March 30, 2005 Sheet 35 of 40
A B C D E
1 2 3 4 5

PL4
VIN

1
PC22 PC18 N20122PS800

.1U/50V 10U/25V-T

2
5VPCU

4
PQ5

2
1 SUD50N03-09P

1
A PC41 PC32 PR120 PD6 A

3
10U/25V-T .1U/50V 22 BAS316

2
PU3

1
14 VDD V+ 17
2.2
2 1 VCC-1.8 15 19 PR16 PC20 .1U/50V-8
VCC BST +1.8VSUS
PC26 4.7U/6.3V-8
DH-1.8 PQ70
18 SKIP DH 1
PL23 SUD50N03-09P
HWPG 10 20 LX-1.8 4 3
4,35,37,38> HWPG PGOOD LX

1
SUSON 3 13 DL-1.8 3R3UH +1.8V
<29,33,35> SUSON SHDN DL PC37
+ + + PC35

1
4
6 ILIM PGND 12

1
PQ6 PC1 PC27 .1U/50V 10U/10V

2
2 9 1 *560U/4V 820U/2.5V +
PR19 34K/F N/C N/C_1 AOD436 PC177

3
1714REF-1.8 7 11 PD30 10U/10V

2
REF N/C_2 PR121 SKS30-04A
<35,37> MAIND

2
VCC-1.8 PR119 *0 16 5
PR17 TON OUT
PC33 8 4 100/F_4
100K/F AGND FB PC128
1U/10V MAX1714A 2200P
PR118

16K/F
B B

PR116

20K/F

+0.9VSUS

PU16
PR159 0 2 4 +
<29,33,35,37,38> MAINON SD VREF PC174 PC160
5 10U/10V .1U/50V
+1.8VSUS VDDQ
C C
6 AVIN VSENSE 3

TGND
8

GND
VTT +0.9V
+1.8V 7 PVIN
G2996

9
+
PC94 PC96 + +
10U/6.3V .1U/50V PC163 PC162 PC159
.1U/50V 10U/10V *100U/2V-7343

D D

PROJECT : ZL2
Quanta Computer Inc.
Size Document Number Rev
2.5VSUS / +1.25TERM C

Date: Tuesday, March 29, 2005 Sheet 36 of 40


1 2 3 4 5
5 4 3 2 1

VIN8743
VIN8743 VIN

1
PL11
PD13
DAP202U

1
D
PC99 N20122PS800 D
+ PC93 + PC91

5
6
7
8
PQ31 PC90

3
10U/25V-T 4.7U/6.3V-8 5VPCU SI4392DY .1U/50V 10U/25V-T
PQ34

2
PR156

4
SUD50N03-09P VIN8743 8743VCC 4

10

22
1

4
PC161 PU9 PC158

3
1.05V 8743BST2 19 21 4.7U/6.3V-8

V+

VCC
BST2 VDD PC95
+VCCP 20 25 8743BST1 +1.5V_S5 AO4414

3
2
1
PL22 .1U/50V-8 DL2 BST1 PQ64 +1.5V
8743LX2 17 26 8743DH1
LX2 DH1 .1U/50V-8
PQ47 8 1
3R6UH 8743DH2 18 27 8743LX1 7 2
DH2 LX1

4
AOD436 6 3
1

1
+ 16 24 8743DL1 PL21 5
CS2 DL1

1
+ 1 3R6UH +
PC155 15 28 PQ35 + + PC145

4
OUT2 CS1

1
560U/4V PC156 PC157 PD27 1 10U/10V
2

2
10U/10V .1U/50V SKS30-04A 8743FB2 14 1 PC153 PC151 PC146
2

2
FB2 OUT1 .1U/50V 10U/10V 560U/4V

1
2 8743FB1 AOD436 PD26
FB1 <35,36> MAIND
HWPG 7 SKS30-04A

2
PGOOD

1
PR158 PC102 5 PC97

2
5.23K/F *100P S5_ON TON
MAX8743EEI PR154
11 ON1 8743REF *100P 5.1K/F

2
MAINON 12
C ON2 C
REF 10
8743ILIM213 6
PR157 ILIM2 SKIP PC100
100K/F 8743ILIM1 3 1U/10V
ILIM1 PR155 8743REF
23

OVP
UVP
GND 10K/F

8
8743VCC
PR83 PR89
60.4K/F 15K/F

HWPG
<29,34,35,36,38> HWPG
8743ILIM1 8743ILIM2
S5_ON
<29,35> S5_ON
PR85 PR90
100K/F 14K/F

B B

VGA1.2V
<29,33,35,36,38> MAINON

+1.5V PU8
1 EN NC 14 2A
2 IN OUT 13
3 IN OUT 12
4 11 PR74
IN OUT E@14K/F-0603
5 IN OUT 10
<29,34,35,36,38> HWPG 6 POK FB 9
7 8
GND

NC GND
1

PC147
PC150
E@2.2U/6.3V E@10U/4V
2

15

E@MAX8527 PR77
E@10K/F-0603

A A

PROJECT : ZL2
Quanta Computer Inc.
Size Document Number Rev
+1.5 / CPUIO C

Date: Tuesday, March 29, 2005 Sheet 37 of 40


5 4 3 2 1
1 2 3 4 5

VIN-VGACORE
PL17
VIN

1
PC59 PC63 E@N20122PS800

E@.1U/50V E@10U/25V-T

2
5VPCU

4
PQ55

2
1

1
A PC75 PC73 PR45 PD11 E@SUD50N03 A

3
E@10U/25V-T E@.1U/50V E@22 E@BAS316

2
PU5

1
14 VDD V+ 17
E@2.2
2 1 VCC-VGA 15 19 PR44 PC71 E@.1U/50V-8
PC140 E@4.7U/6.3V-8 VCC BST
18 1 DH-VGA
SKIP DH PL16
HWPG 10 20 LX-VGA
<29,34,35,36,37> HWPG PGOOD LX +1.2V

1
3 13 DL-VGA E@3R3UH PC54 PC50
<29,33,35,36,37> MAINON SHDN DL + + PC129 + PC45 PC175
6 ILIM PGND 12

4
E@470U/2.5V E@470U/2.5V E@.1U/50V E@10U/10V E@10P_4

2
1
2 9 PQ56
PR57 N/C N/C_1
1
1714REF-VGA 7 11 E@AOD436

3
REF N/C_2 PR54 PD29
E@15K VCC-VGA PR59 *0 16 5 E@SKS30-04A

2
PR58 TON OUT
PC79 8 4 E@100/F_4
E@100K/F AGND FB PC74
E@1U/10V E@MAX1714A E@2200P

B PR51 B
E@2.2K/F

PR259
+5V

E@12.7K/F
PR261

3
E@3.24K/F

PR48
E@47K/F 2

PQ72
E@2N7002E PR192

1
E@100

1
HI=1.05V

2
LO=1.2V

3
2 VGA_PWR_SW <11>
PC183
E@2.2U
PU17 PQ73

1
C C
1 3 E@DTC144EUA
EN VO
GND 7
GND 6
GND 8
ADJ

2 VIN GND 5

*G965-2.5
4

1.5/3A
ADJ
PR255
0_6 PU18
1 2 1 EN VO 3 +2.5V
GND 7
GND 6
8 PC178 PC180
GND
ADJ

2 VIN GND 5
+3V .1U/50V_6 10U/10V_8
G965-2.5
4
1

PC181 PC182 PR256


4.7U/25V .1U/50V_6 30K/F
2

PC179
10U/10V_8

PR257
D ADJ 26.1K/F D
C: Change to 30K_1%

Size Document Number Rev


+1.2V/+1.8V C

Date: Tuesday, March 29, 2005 Sheet 38 of 40


1 2 3 4 5
8 7 6 5 4 3 2 1

D D
REFP
PQ63

VIN 1 6 REFP <29,40>


2 5

3 4
VL
REF3V
IMD2 PC154 PU15
1 Vin Vout 5 REF3V <29,40>
10U/10V
VA 2 GND
CN14
PF3 PL13 1 3 4
PR3 18 PC11 .1U/50V <29> REFON SD BP
1 1 2 3

1
2 N20122PS800 2 G914D PC143
3 TR/3216FF-6.5A PL12 PD4 SBM1040 PC144
4 1 2 .1U/50V 1U/10V

2
N20122PS800
PF2
6
5

*TR/3216FF-6.5A PR7
PC108 PC109 PC110 0.02-3720
.1U/50V .1U/50V .1U/50V
PR4 18 PC12 .1U/50V
2DC-S726I201-V
POWER_JACK
VA2 <40>
VAD PD15
BAS316
CSSP
CSSN

2
PL3
1772CELLS PC19 N20122PS800
C 2 PC112 2 1 C

1
PR2 1U/25V-X6S

+
10K PC4 .01U/50V 3 PD3 10U/25V-T
DA204U
1 PR111 PR109
VH
6

10K 10K PC17 .1U/50V

PR110 33.2/F
PC2
PQ49 .1U/50V PU11

27
26

2
IMZ2 MAX1772EEI

CSSP
CSSN
1

REF3V 1 16 PC122 PC14

1
DCIN CELLS 1U/25V-X6S 1U/25V-X6S
LDO 21772LDO
PD2 PQ7
PC119 22
RB500 DLOV
.1U/50V 11 ACIN 8 G1 D1 1 PR8 PC7
PD16
BST 25 1772BST 0.05-3720 10U/25V-T
PD5 BAS316 7 S1/D2 D1 2 PL2 10UH-SIL104
REFP BAT-V <40>
<29> CV-SET 15 VCTL
RB500 PC117 6 G2 3

1
14 24 .1U/50V 1772DH
PC116 <29> CC-SET ICTL DHI S2
5 4 + + +
.1U/50V 13 23 1772LX PC9
PR11 REFIN LX .01U/50V

2
47K 12 21 AO4912
PR113 47K ACOK DLO 1772DL
PC121 10 20
PC120 1000P ICHG PGND PC6
1000P 28 19 CSIP PR107 18 PC8 10U/25V-T
IINP CSIP
8

18 CSIN PR108 18 10U/25V-T


CSIN
+ 3 7 CCV
1
2 6 17 BAT-V
- PU12A CCI BATT PC15 PC13
LM393 5 4 1772REF .1U/50V .1U/50V
4

CCS REF
3

B B
PR112
10K 3 PR103 24.3K/F
PR9 D/C# 2 CLS
<29,40> D/C#
22K GND
PR106 PR105 PR104 GND
PQ50 10K 0 10K

2
OSC *2N7002
1

9
8

200KHz PR102
PC123 PC118 PC115 PC114 12K/F PC113

1
220P .1U/50V .01U/50V .01U/50V 1U/25V-X6S

FOR 120W 6.2A

12VOUT
1772LDO

PR64 10K/F
<29> ACIN PR10
3

1M
FOR 4S3P CELL-SET HIGH PQ4
2
1 2 AC
FOR 3S3P CELL-SET LOW 2N7002
VAD
PR66 PD12 ZD12V
3

6.8K/F
1

3V_ALWAYS 2
A A
PR65 PQ3
10K/F DTC144EU 1772CELLS
1

<29,40> CELL-SET

PROJECT : ZL2
Quanta Computer Inc.
Size Document Number Rev
BATTERY CHARGER C
Date: Tuesday, March 29, 2005 Sheet 39 of 40
8 7 6 5 4 3 2 1
1 2 3 4 5

1ST_BATT_CONN
CN17
TEMP_MBAT <29> PQ16
PQ13
1 MBAT PL5 N20122PS800 MBAT+
2 1 8 8 1
TEMP_MBAT 2 7 7 2
3

PC125
8 4 3 6 6 3

1
PC21

PD17
PL6 N20122PS800 4 5 5 4
9 5

1
PR27
6

1
+ AO4411 AO4411 10K
7 PC124 PC127

*ZD5.6V
A A

2
SUYIN_BATTERY 47P 47P

.1U/50V
PQ53

2
47P
PR115

3
330 PDTC143TT
PR114 2 MDISCHG
330 PC23

1
10U/25V-T
MBCLK <3,29>
PQ52

1
MBDATA_MBAT ADISCHG 2 IMD2
1

1
PQ51 VH VH
PD18 PDTC143TT
PD19

1
ZD5.6V

6
ZD5.6V PC83
PR61
2

2
.1U/50V 1M
PU6A

8
ACHG PR122 LM358ADR
10K PR53 + 3 MCHG
CLOSE TO BATTERY CON 1
- 2
470K

4
1
REF3V PD7
ZD15V
VIN
5 4 VH

2
<39> BAT-V PU6B

1
6 3 LM358ADR

3
2
1
B PR117 PR62 + 5 ACHG + PC5 B
10K/F PC10 7 2 7 PC111 PQ2 .01U/50V

2
.01U/50V - 6 10U/25V-T PR63

2
470K 10K AO4414
8 1
TEMP_MBAT

1
PR52 PC3
4
1

PQ14 AO4812 PD20 100K 1 2


PC126 ZD15V

3
.01U/50V
2

.01U/50V

5
6
7
8
2 PQ25
VA2
VA2 <39>
PU2 PDTC143TT

1
REFP
VL REFP <29,39>
VL
200mil

16
15
14
13
12
11
10
9
7
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
VDD
ADISCHG PR5
2ND_BATT_CONN PR71 160K/F
10K PR15

GND
CN24 TEMP_ABAT <29> PU12B
10K

GL

G1
G2
C
PQ29

A
B
PQ27 5 REF3V
1 ABAT PL10 SW@N20122PS800 ABAT+ +
1 8 8 1 7

1
2
3

6
5
8
2

3
TEMP_ABAT 2 7 7 2 6
3 -
8 4 3 6 6 3
1

PL9 SW@N20122PS800 4 5 5 4 2
9 5
1

LM393
6
1

C PR153 PC86 PC89 PD23 PC88 C


+ PC84 AO4411 AO4411 PQ30 PC16
7 PDTC143TT .1U/50V PR12

1
1

SW@SUYIN_BATTERY PR152 PC85 SW@330 SW@47P SW@.1U/50V *SW@ZD5.6V SW@47P SW@10U/25V-T 100K
2

74HCT237
3

SW@330 SW@47P PQ26


<29,39> CELL-SET
2

3
IMD2
MDISCHG 2
3/10 <29,39> D/C#
MBCLK PQ28 2
PDTC143TT <29> BL/C#
PQ8 PR6
1

MBDATA_ABAT 2N7002 120K/F


1

1
PD21 PD22 MCHG
SW@ZD5.6V SW@ZD5.6V PR67
10K
2

CLOSE TO BATTERY CON

REF3V 3V_ALWAYS SEL FUNCTION


REF3V <29,39>
PR161
D LOW IN_B0 D

PR69 PR68 HIGH IN_B1


PR70 *0
10K/F 10K/F 10K/F
PU7
TEMP_ABAT M/A#
1ST_BATT 5 VCC SEL 6 M/A# <29> PROJECT : ZL2
1

MBDATA_MBAT 1 4 MBDATA <3,29>


PC87 IN_B1 COM
.01U/50V MBDATA_ABAT 3 Quanta Computer Inc.
2

IN_B0
2ND_BATT GND 2
Size Document Number Rev
BATTERY SELECT C
SN74LVC1G3157DCKR
Date: Tuesday, March 29, 2005 Sheet 40 of 40
1 2 3 4 5

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