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In everyday language the answer will be either yes or no. ('Yes', in fact.) However, the question
could be rephrased to make use of the language of Boolean logic:
can be described as an example of a logic assertion or a logic proposition that can have
only one of the two alternative Boolean logic values TRUE or FALSE.
• You should take an umbrella if it is raining or if the weather forecast is for rain later.
• The air-conditioning system is set to come on in an office only during working hours but
also only if the temperature rises to above 25°C.
Each of these statements contains two logic propositions which are highlighted. In each
statement these logic propositions are combined in some way. Finally, each statement has
the addition of an outcome which is dependent on the combination of the two propositions.
Each of these is, therefore, an individual example of a problem statement.
Here, both A and B represent any logic proposition or assertion that has a value TRUE or
FALSE.
Each original problem statement has now been rep hrased as a form of logic expression
with a defined outcome. The format of each expression here does not fol low any fo rma lly
defined convention but the structu re does allow the underlying logic to be understood. In
genera l, a logic expression consists of logic propositions combi ned using Boolean operators
and the expression optionally may be stated with a defined output.
Logic expression: logic propositions combined using Boolean operators, which may be written with a
defined outcome
TASK4.0l
Convert the following problem statement into a simple logic expression:
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Any logic expression can be constructed using only the Boolean ope rators AN D, OR and NOT
bu t it is often conven ient to use other operators. Here are the definitions for t he six operators
wit h which you need to be fa mil iar:
NOT A is TRU E if A is FALSE
•
• A AND B is TRUE if A is TRU E and B is TRUE
• A ORB is TRUE if A is TRUE or B is TRUE
• A NAND Bis TRU E if A is FALSE or B is FALSE
• A NOR B is TRU E if A is FALSE and B is FALSE
• A XOR Bis TRUE if A is TRUE or B is tr ue but not both of them
TASK4.02
Without looking further on in the chapter, construct the truth table fo r the OR operator.
~
We wil l view a logic circuit as comprising component parts cal led logic gates. Each diffe rent
logic gate has an operation that matches a Boolean operator.
Logic gate: a component of a logic circu it that has an operation match ing that of a Boolean operato r
Discussion Point:
There will be no further discussion of integrated circuits in this book but you might wish
to do some research and have a look at the structure of a small-scale integration chip.
When drawing a circuit, st andard symbols are used for the logic gates. As an example,
the sy mbol shown in Figu re 4.01 represents an AND gate.
Fi gu re 4.01 The symbol fo r
The fi rst po int to note here is that the shape defines the type of gate. The second point the AND logic gate
is that the inpu ts are on t he left-han d side and the output is on the right- hand side. In
general, the number of inputs is not limited to two bu t t he discussion in t his book w ill only
co nsider circuits where the number of inputs does not exceed two.
Figure 4.02 shows t he logic gate sym bols and the associated truth tab les for each of th e six
Boolean operato rs introduced in Section 4.02.
NOT
A B X
AND =D-- 0
0
1
0
1
0
0
0
0
1 1 1
A B X
OR -D- 0
0
1
0
1
0
0
1
1
1 1 1
A B X
NAN O ==[y-- 0
0
1
0
1
0
1
1
1
1 1 0
I
I .
~
0
· 'ii·, ,i Chapter 4: Logic Gates and Logic Circuits
A B X
0 0 1
NOR 0 1 0
1 0 0
1 1 0
A B X
0 0 0
XOR 0 1 1
1 0 1
1 1 0
Figure 4.02 Logic gate symbols and their associated truth tables
There are two other points to note here. The NOT gate is a special case having only one
input. The NAND and NOR gates are each a combination of a gate and the NOT gate so they
produce complementary output to that produced by the AND and OR gates.
TASK4.03
Draw a circuit where A and Bare input to an AND gate from which the output is carried to a
NOT gate from which there is an output X. Show that this has the same outcome as having one
NANO gate.
You need to remember the symbol for each of these gates. A good start here is to remember
that AN D has the proper D symbo l and OR has the curvy one. You also need to remember the
•
definitions for the gates so that you can construct the co rresponding truth table for each gate.
Question 4.01
Can you recall from memory the symbols and definitions of the six logic gates introduced in
this chapter?
Consider th e following problem statement: A bank offers a spec ial lending rate to
customers subject to certain conditions. To qualify, a customer must satisfy certain criteria:
• The customer has been w ith the bank for two yea rs.
• Two of the following conditions must also apply:
• The customer is married.
• The customer is aged 25 years or older.
• The customer's parents are customers of the bank.
- ------
...
Cambridge International AS and A level Computer Science ··
To convert this statement to a logic expression you need to represent each condition by
a symbo l (in the same way that a prob lem might be tackled in normal algebra):
Note the use of brackets to ensure that the meaning is clear. You may think t hat not all of
the brackets are needed. In this example, an extra pair has been in~luded to guide the
construction of the circuit where only two inputs are allowed for any of the gates.
It can be seen, therefore, that the logic circuit corresponding to this logic expression
derived from the original problem statement could be constructed usin g four AND gates
and t wo OR gates as shown in Figure 4.03.
A---------------
B
X
C ---------'
Figure 4.04 A circuit with three inputs for conversion to a truth table
( - -
Tab le 4.02 shows how the truth table needs to be set up initially. There are several points
to note here. The first is that you must take care to include all of the eight different possible
com binations of the input va lues. Therefore, you present the va lu es in increasing binary
number va lue from 000 to 111. The secon d point is that for such a circuit it is not sensible to
try to work out the outputs directly from the input values. Instead a systemat ic approach
should be used. This involves identifying intermediate points in the circuit and recording
the values at each of them in the columns headed 'Workspace' in Tab le 4.02.
Figu re 4.05 shows the same circu it but w ith four intermed iate points labelled M, N, P and
•
Q identified. Each one has been inserted on the output side of a logic gate.
p
X
B -------1
C ----------'
Figu re 4.05 The circuit in Figure 4.04 with intermediate points identified
Now you need to work systematica lly through the intermed iate points. You start by
filling in the co lumns for Mand N. Then you fill in the colu mn s for P and Qw hich feed
into th e fi nal AND gate. The fina l truth tab le is shown as Table 4.03. The circuit has two
co mbi nations of input s that lead to a TRUE output from the circu it.
The columns contain ing th e intermediate va lues (the workspace) could be deleted at this stage.
One fina l point t o make here is that you may be able to check part of your fina l solution
by looking at just part of the circuit. For this example, if you look at the circuit you
w ill see that the path from input C to the output passes through two AND gates. It
follows, therefore, that for all combinations with C having value Othe output must be 0.
Therefore, in order to check your final so lution you on ly need to exam ine the other four
combinations of input values where Chas va lue 1.
TASK4.04
An oven has a number of components which should all be working properly. For each
component there is a signalling mechanism that informs a management system if all is well
or if there is a problem when the oven is being used. Table 4.04 summarises t he signa l values
that reco rd the status for each component.
If the thermometer reading is in range but either or both the fan and light are not working, the
management system has to output a signal to activate a warning light on the control panel.
Draw a logic circuit for this fault condition .
• The outcome of a logic expression or a logic circuit can be expressed as a truth table.
Exam-style Questions
1 a The followi ng are t he symbo ls fo r t hree different logic gates.
-{>-
Identify each of the logic gates . [3]
ii Draw the trut h table fo r eithe r Gate 1 or Gate 2. [2]
•
b Consider t he fo llowing circ uit:
I
I
(
Const ruct the trut h tab le fo r t he circu it using t he fo llowing tem plate:
A
0
Inputs
B
0
C
0
Workspace Output
X
0 0 l
0 l 0
t 0 l l
l 0 0
l 0 l
l l 0
l l l
[8]
ii There is an eleme nt of redun dancy in th is diagram. Explain what t he proble m is. [2]
- - --- -- - - --- -- -
In a competition, two teams play two matches aga inst each other. One of the teams is declared the winner
if one of the follow ing results occurs:
The team wins both matches.
Th e team wins one match and loses the ot her but has the hi ghest tota l sco re.
ii By assigning the symbols A, Band C to th ese three propositions express th e outcome of the competition
as a logic expression. [3]
3 A domestic heating system has a hot water tank and a number of radiato rs. Th ere is a computerised management
system which re ce ives signals dependent o n whet her or not the conditions for components are as they should be.
Th e fo llowing table summarises the signals received :
a Consider the fo llowing fault co ndition . The water level in the hot wat er tank is too low and t he temperature
in the hot wate r tank is too high . The management system must outp ut a signal to switch off the system .
Const ruct a t ru th t able for th is fault condi ti on includin g the A, Ba nd C signals. [4]
ii Construct the circuit diagram forth is fau lt co ndit ion to match this t ruth table. [5]
b Consi der the fault co ndit ion where the hot wate r tank tem perature is with in limits but t he water flow in the
radiato rs is too low and the water level in the hot wate r t an k is too low. Co nstruct the circuit diagram for this fault
condition whi ch requires t he management system to output a signal to increase wa ter pressu re. [5]