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1
There are many addressing modes, but the most
common are easy to master and represent most
instructions in most programs.
the most common addressing modes:
◦ Register addressing
◦ immediate addressing
◦ direct addressing
◦ simple forms of indirect addressing
◦ Stack addressing is also used with
the PUSH and POP instructions
as a way to link a program to its procedures or functions.
Program flow instructions are either:
◦ unconditional or conditional.
Conditional program flow instructions are the “if”
statements of assembly language.
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are presents with the MOV instruction because it is
the most common instruction in a program.
MOV really moves nothing.
MOV copies the source into the destination.
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
copies the second operand (source) to the first
operand (destination).
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
these types of operands are supported:
MOV REG, memory
MOV memory, REG
MOV REG, REG
MOV memory, immediate
MOV REG, immediate
REG: AX, BX, CX, DX, AH, AL, BL, BH, CH, CL, DH, DL,
DI, SI, BP, SP.
memory: [BX], [BX+SI+7], variable, etc...
immediate: 5, -24, 3Fh, 10001101b, etc...
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
Immediate
MOV CX,1234H
MOV BX,76AFH
Register
MOV AX,BX
MOV AH,AL
Immediate
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
to access memory we can use these four registers:
BX, SI, DI, BP.
combining these registers inside [ ] symbols, we
can get different memory locations.
these combinations are supported (addressing
modes): [SI]
[BX + SI] [BX + SI + d8]
[DI]
[BX + DI] [BX + DI + d8]
d16 (variable
D8: 8 bit signed immediate [BP + SI] [BP + SI + d8]
offset only)
displacement (ex: 22, 55h,-1, etc..) [BP + DI] [BP + DI + d8]
[BX]
d16:16 bit signed immediate
displacement (ex: 300, 5517h,-259,
etc..). [SI + d8] [BX + SI + d16]
[SI + d16]
[DI + d8] [BX + DI + d16]
[DI + d16]
[BP + d8] [BP + SI + d16]
[BP + d16]
[BX + d8] [BP + DI + d16]
[BX + d16]
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
•you can form all valid combinations by taking only one item from each column or
skipping the column by not taking anything from it.
•as you see BX and BP never go together.
•SI and DI also don't go together.
•here are an examples of a valid addressing modes:
[BX+5] , [BX+SI] , [DI+BX-4]
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
by default DS segment register is used for all
modes except those with BP register, for these SS
segment register is used.
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
the value in segment register (CS, DS, SS, ES) is
called a segment.
the value in memory addressing register (BX, SI, DI,
BP) is called an offset.
EXample
Let DS contains value 1234h
SI contains the value 7890h
it can be also recorded as 1234:7890.
The physical address will be:
◦ 1234h * 10h + 7890h = 19BD0h.
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Figure 3–5 The operation of the MOV AL,[1234H] instruction when DS=1000H .
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
.model small
org 100h
; add your code here
.data ;num offset = 102h
num dw 10,10b,10h,'A',65
arr db 1,2,3,4,5
.code
mov ax,10
mov ax,w.[10ch]
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
mov ax, word ptr ali[0]
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
org 100h
.data
array dw 4 dup(654h)
ali db 29h,4,110b,'A','0'
;mm db 3 dup(?)
ahmad db 'ahmad'
.code
mov si,3
mov ax, word ptr ali[0]
mov al, b.array[1]
mov bx, offset ali[0]
lea di, ali
mov ax, word ptr [bx] ; ali[0]
mov bl, ali[1]
mov bh,0
mov b.array[bx+si],bl
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
.data
array dw 4 dup(654h)
Define data segment and store the
ali db 29h,4,110b,'A','0'
values of array, ali, ahmad inside it
;mm db 3 dup(?)
ahmad db 'ahmad'
.code Store in stack value 16bit
mov si,3
mov ax,10
push si Store the value of BX to memory
push ax Data segment has the same address
mov [0fffch],bx of top stack
pop si
pop ax
mov bx,[0fffch] restore from stack value 16bitre
mov ax, word ptr ali[0]
mov al, b.array[1]
mov bx, offset ali[0]
As mov di, offset ali[0]
mov cx, w.ali[1]
lea di, ali
mov ax, word ptr [bx] ; ali[0]
mov bl, ali[1]
mov bh,0
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
The stack plays an important role in all
microprocessors.
◦ holds data temporarily and stores return addresses used
by procedures
Stack memory is LIFO (last-in, first-out) memory
◦ describes the way data are stored and removed from the
stack
Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
Store and restore general register:
◦ PUSH AX
◦ PUSH EAX
◦ POP AX
◦ POP EAX
Store and restore the flags
◦ PUSHF
◦ POPF
Store and restore all registers:
Pusha
Popa
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
Data are placed on the stack with a PUSH
instruction; removed with a POP instruction.
Stack memory is maintained by two registers:
◦ the stack pointer (SP or ESP)
◦ the stack segment register (SS)
Whenever a word of data is pushed onto the
stack, the high-order 8 bits are placed in the
location addressed by SP – 1.
◦ low-order 8 bits are placed in the location addressed by
SP – 2
Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
The SP is decremented by 2 so the next word is
stored in the next available stack location.
◦ the SP/ESP register always points to an area of memory
located within the stack segment.
In protected mode operation, the SS register holds
a selector that accesses a descriptor for the base
address of the stack segment.
When data are popped from the stack, the low-
order 8 bits are removed from the location
addressed by SP.
◦ high-order 8 bits are removed; the SP register is
incremented by 2
Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
The SS (stack segment) and the SP are added
to form an address in the stack.
The stack is an area of memory that
functions as a last-in, first-out (LIFO)
memory.
LIFO means if a 1 followed by a 2 are placed
on the stack the 2 comes out of the stack
first, followed by the 1.
PUSH: is used to store data on the stack
POP: is used to remove data from the stack
Push and pop for words or doubleword
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
The old value of SP
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
The new value of SP=sp+2
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
Required
instructions
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university
org 100h
;jmp start
.data
num db 12h,25h,23
n dd 12345678h
nam db 'a','b','c','ahmad’
.code
;start:
mov bx,0A10h
mov ax,11
push ax
mov cx,1011H
push cx
mov ax,0
pop ax
mov ax, w.[num+1]
MOV w.num,5
mov bh, num
mov bx, offset num
mov dx, [n+1]
mov cl, nam[3]
mov cl, nam[4]
mov cl, nam[5]
mov dl, nam[BX+6]
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Brey: The Intel Microprocessors, 7e Dr. Hanal ABUZANT, An-Najah national university