Department of Electrical Engineering

BABU BANARASI DAS

NORTHERN INDIA INSTITUTE OF TECHNOLOGY
Affiliated to Dr. A.P.J. Abdul Kalam Technical University (AKTU Code : 056)
AKTU Code : 056 Approved by All India Council for Technical Education (AICTE)
Sector II, Dr Akhilesh Das Nagar, Faizabad Road, Lucknow (UP) – India, 226028
Website : www.bbdniit.ac.in
DIGITAL ELECTRONICS (KEE-401)
Previous Year Questions (Unit-2)
2018-19
1. Write short note on priority encoders.
2. Implement the following Boolean function
F(A, B, C, D) = ∑ m(0, 1, 3, 4, 7, 8, 9, 11, 14, 15) using
i. 4:1 MUX
ii. 2:1 MUX
3. Draw a BCD adder circuit and explain its working.
2017-18
4. What is “Data Selector”?
5. Draw block diagram of digital multiplexer and explain its function.
6. Design a BCD to Excess-3 code converter.
7. What is full subtractor? Explain its basic structure with proper logic diagrams and truth tables.
8. Write the steps for combinational circuit designing and design a circuit of three input which gives a
high output whenever the sum of LSB & MSB bit is 1.
9. Implement the function F(A, B, C, D) = Σ m(0,1,3,4,7,8,9,11,14,15) using 8:1 mux.
10. Draw and explain 4-bit by 3-bit multiplier.
11. Draw and explain 4-bit magnitude comparator.
12. Draw a decimal adder to add BCD numbers.
2016-17
13. Write the logic equation and draw the internal logic diagram for a 4:1 MUX.
14. What is priority encoder?
15. Implement the following multiple output combinational logic function using 3:8 decoder:
i. f1 = Σ m(1, 2, 3, 5, 7)
ii. f2 = Σ m(0, 3, 6)
iii. f3 = Σ m(0, 2, 4, 6)
16. Implement full adder and full subtractor using decoder.
17. Design a combinational circuit that compares the magnitude of two 3 bit numbers and its output
indicates whether A>B, A<B & A=B.

BBDNIIT 2019-20(Even Semester) Page1

 18. Construct a BCD to Excess-3 code converter using 4-bit adder. What must be done to change the
circuit to an Excess-3 to BCD code converter?
19. Draw the logic diagram of half subtractor.
20. Specify the purpose of valid bit indicator in priority encoder.
21. Design a full subtractor circuit.
22. Draw logic diagram of a two to four line decoder using NOR gates only.

2015-16
23. Design full adder using two half adders.
24. Differentiate between encoders and decoders.
25. Design a 4-bit by 4-bit binary multiplier.
26. Using a decoder and external gates, design the combinational circuit defined by the following three Boolean
function:
i. F1 = (y’+x)z
ii. F2 = y’z’+yz’
iii. F3 = (x’+y)z
27. Construct 4 to 16 line decoder using five 2 to 4 line decoders with enable.
28. Implement a 2-bit magnitude comparator.
29. Define an encoder. Also describe a 3x8 Priority encoder.
30. Explain Carry Look-Ahead Generator. Also draw the logic diagram of a BCD Adder.
31. What is a multiplexer? Implement the given function with:
i. 8:1 Mux
ii. 4:1 Mux
iii. 2:1 Mux
F (A, B, C, D) = ∑ m (0, 1, 2, 3, 7, 8, 9, 11, 14, 15)
32. Design Half Adder using Multiplexer.
33. Design a 4-bit magnitude comparator using one bit comparator modules.
34. Using a decoder and external gates, design the combinational circuit defined by the following three Boolean
function:
i. F1 = x’yz’+ xz
ii. F2 = xy’z’+ x’y
iii. F3 = x’y’z’+ xy

2014-15
35. Draw suitable diagram of full adder.
36. Draw and explain the logic of 4 bit magnitude comparator.
37. Design 16:1 multiplexers using 4:1 multiplexers.
38. Explain Priority Encoder.

BBDNIIT 2019-20(Even Semester) Page2

 39. Design 4-bit combinational circuit which converts BCD to Excess-3 code
40. Design a 3-bit combinational circuit which produce logic 1 output when more than 1 input variables
are at logic 1.
53. Implement a full subtractor with two half subtractors.
54. Construct a 5x32 decoder with 3x8 decoders and 2x4 decoder.
55. Implement following Boolean function using 4:1 Multiplexer
F (x,y,z) = ∑ m (1, 2, 6, 7)
56. Design and explain logic of BCD Adder.
57. Design a BCD to 7 Segment decoder. Assume positive logic and minimize the function.
58. Design the following Boolean function using 4:1 Multiplexer
F (A, B, C, D) = ∑ m (0, 1, 3, 4, 8, 9, 15)

2013-14
59. Design a combinational circuit that converts 3-bit Gray code to 3-bit binary number. Implement the
circuit with (i) Exclusive OR gates (ii) NAND gates only.
60. Design a logic circuit diagram of a 2 to 4 line decoder with an enable input using NOR gates only
61. Design a combinational circuit that compare two 2-bit numbers A & B to check if they are equal.
Implement the design using NAND gates only or NOR gates only.
62. Design the following Boolean function using 8:1 Multiplexer
F (A, B, C, D) = ∑ m (0, 3, 5, 6, 8, 9, 14, 15)
64. Design a combinational circuit with 4 input variables which will produce logic 1 output when the
number of 1’s in the input is even.
65. Design full adder using NAND gates only.
66. Design binary to BCD converter.
67. Design the following Boolean function using 8:1 Multiplexer
F (A, B, C, D) = ∑ m (0, 1, 2, 5, 7, 8, 9, 14, 15)
2012-13
68. Design a 2-bit binary magnitude comparator.
69. Design a combinational circuit that converts 3-bit Gray code to 3-bit binary number. Implement the
circuit with (i) Exclusive OR gates (ii) NAND gates only.
70. Implement the given Boolean function using A, B and C variables to the selection lines:
F (A, B, C, D) = ∑ m (0, 1, 3, 4, 8, 9, 15)
71. Realize the expression of F using 8:1 multiplexer
F(x, y, z) = ∑ m (1, 2, 4, 5, 7)
72. Design a BCD to Excess-3 code converter.
73. Construct 4 input priority encoder using combinational gates.
74. Design a 4-bit magnitude comparator using combinational gates.

BBDNIIT 2019-20(Even Semester) Page3

 75. Design a 4x16 decoder using 3x8 decoders.
76. Implement a full subtractor with a decoder and NAND gates.
77. Design and explain the working of binary multiplier.

2011-12
78. Construct a BCD to Excess-3 code converter using 4-bit adder. What must be done to change the
circuit to an Excess-3 to BCD code converter?
79. What is magnitude comparator? Design a 3-bit magnitude comparator using logic gates.
80. Design a full subtractor circuit with a decoder and 2 OR gates.
81. Implement the given Boolean function with 4:1 multiplexer using A and B variables to the selection
lines:
F (A, B, C) = A’B’C + A’BC’ + A(BC)’ + ABC

BBDNIIT 2019-20(Even Semester) Page4