Session : 2009/2010 Supervisor: Dr J.

Corda

SCHOOL OF ELECTRICAL AND ELECTRONICS ENGINEERING

PILOT STUDY

Submitted for the Award of

Master of Science (Engineering)

In
Electrical and Electronics Engineering

“THE DYNAMIC BEHAVIOUR OF DC – AC CONVERTERS UNDER VARIOUS

CONTROL SCHEMES”

Name:
IKENNA BRUCE EFIKA
SID No:
200502876

April, 2010
 The University of Leeds
School of Electronic & Electrical Engineering

1.1.1 Declaration of Academic Integrity

IKENNA BRUCE EFIKA

2 Student Name: ………………………………

[Block Capitals if handwritten]
200502876
University ID Number: ………………………………

Modules: ELEC 5880 & 5881

Module Leader: Dr Chris Trayner

Plagiarism in University Assessments and the Presentation of

Fraudulent or Fabricated Coursework
Plagiarism is defined as presenting someone else’s work as your own. Work means any
intellectual output, and typically includes text, data, images, sound or performance. [1]

Fraudulent or fabricated coursework is defined as work, particularly reports of laboratory or

practical work that is untrue and/or made up, submitted to satisfy the requirements of a
University Assessment in whole or in part. [1]

Declaration:

 I have read the University Regulations on Cheating and Plagiarism[2]

and state that the work in this report is my own and does not contain
any unacknowledged work from other sources.

 I confirm that any mitigating circumstances or other matters which

might have affected my performance and which I wish to bring to the
attention of the examiners/markers have been submitted to the
Secretary of the Director of Learning & Teaching [Jennifer Finnigan,
School of Electronic & Electrical Engineering].

Signed ………IKENNA BRUCE EFIKA…………

Date ……10-05-2010……………

[1] http://www.leeds.ac.uk/AAandR/cpff.htm
[2] http://www.leeds.ac.uk/studenthandbook/

1
ABSTRACT

This pilot study stands in both as a feasibility study and as a feedback to the progress of
my project work with Dr J. Corda. The project involves studying the dynamic response of
inverters which have been implemented using different feedback schemes to be able
determine the one with a better response to change in load current demand.
I have included a literature review of the systems being implemented in the project.
Included within are also possible methods of implementing the different DC-AC
converters, with their different limitations. My chosen method of demonstrating the
responses have been included together with a work plan.

2
List of symbols

A - Ampere (Current)
V - Volts (Voltage)
f - Frequency
PWM - Pulse Width Modulation
SPWM - Sinusoidal Pulse Width Modulation
SVPWM - Space Vector Pulse Width Modulation
VSI - Voltage Source Inverters
CSI - Current Source Inverters
AC - Alternating Current
DC - Direct Current
HVDC - High Voltage Direct Current
R - Resistors/Resistance
L - Inductor / Inductance
t - Instantaneous time
UPS - Uninterrupted Power Supply
THD - Total Harmonic Distortion

3
TABLE OF CONTENTS

Contents
1 Introduction......................................................................................................................... 5
2 Method of approach............................................................................................................ 5
3 Literature Review................................................................................................................ 6
3.1 Basic circuit analysis (Response in RL Circuits).......................................................... 6
3.1.1 Step Response......................................................................................................... 6
3.1.2 Single Pulse Response ............................................................................................ 7
3.1.3 Multi Pulse Response............................................................................................... 9
3.2 Inverters .................................................................................................................... 10
Basic TYPES, STRUCTURE and Topologies...................................................................... 11
3.3 Gate Drive circuit – Switching Signal Generation ...................................................... 18
3.3.1 Sinusoidal Pulse Width Modulation (SPWM).......................................................... 18
4 Control Schemes for Inverter Control ............................................................................... 29
4.1 Voltage Feedback Control Scheme ........................................................................... 29
4.1.1 Single Phase Implementation................................................................................. 29
4.1.2 Three Phase Implementation ................................................................................. 30
4.2 Current Feedback Control Scheme ........................................................................... 30
4.2.1 Single Phase Implementation................................................................................. 31
4.2.2 Three Phase Implementation ................................................................................. 31
4.3 Current Tracking Using fixed hysteresis chopping..................................................... 31
4.3.1 Single Phase Implementation................................................................................. 31
4.3.2 Three Phase Implementation ................................................................................. 32
5 Dynamic System Response.............................................................................................. 33
5.1 Voltage Feedback (Response) .................................................................................. 33
5.2 Current Feedback (Expected Response) .................................................................. 34
5.3 Current Tracking using fixed hysteresis chopping (Simulations and Plots) ............... 35
Conclusions ............................................................................................................................ 36
Work Plan ............................................................................................................................... 36
References ............................................................................................................................. 37
Appendix................................................................................................................................. 39

4
3 Introduction
PROJECT OBJECTIVES
The scope of this project surrounds the investigation of the dynamic response of different
type’s inverters. This study is important, as some applications require a fast response to
changes in load demand especially in drive applications.

BACKGROUND STUDY
The first publication on inverters was made by David Prince, where he defined it as the
inverse of a rectifier which was already in common use. This publication was made during
1925 in the GE Review, titled “The Inverter”.
Inverters are used to convert Direct current to Alternating current and they were first
implemented using converters with rotary parts called “inverted rotaries”, until around
1950s when germanium diodes became available. [1]
Their importance could not be over emphasized by the time they started being applied to
variable speed drives like induction motor drives and switched reluctance motor drives.
A proof of this importance is a patent [YU44023B] obtained by Dr. J. For Variable-
reluctance electric motor with continuous speed regulation for reversible variable-speed
drives in 1990. [14]

4 Method of approach
Line (self) commutation will be used on all inverter switches being simulated and
implemented. The gate signals will be generated using a Pulse Width Modulation (PWM)
scheme.

The three systems which will be investigated are:

a. Fixed Frequency Pulse Width Modulation with Voltage Feedback - PWM-VSI
b. Fixed Frequency Pulse Width Modulation with Current Feedback - PWM-CSI
c. Current Tracking Using fixed hysteresis chopping
A sudden increase in current demand will be used to evaluate the dynamic response.

All simulations will be done using MATLab-Simulink.

The proposed microcontroller boards that match the project requirements are:
SG3524 - PWM Generator
DSPIC 30F4011 - PWM Modulator

5
5 Literature Review

5.1 Basic circuit analysis (Response in RL Circuits)

With the aid of power electronic converters, we can change the state and quality of signals
either. Some reasons why we would make these conversions are:
Conversion Converter Used Application
DC –DC: Switch Mode DC Converter Convert from one voltage level/quality to another.
AC – DC: Rectifiers Provide dc signals from our mains supply.
DC – AC: Inverters Variable speed motors, Interface renewable to the grid
This project focuses on inverters.

Inverters operate basically by applying commutation to controlled switches. This produces an

alternating output signal.
In other to understand the response of the inverters being investigated, we need to know the
response to expect when supply is switched on or off in the circuit.

5.1.1 Step Response

V = 100V
L = 1mH
i R = 10 Ω

Initial current ; I0 = 0A

Figure 5-1: Step Response Circuit

Switch S has been in the open position for t = 0- and the switch is closed at t = 0+.
[3]
After switch is closed:
Applying Kirchhoff’s Voltage law

= + Equ (1)

= = = =− −

= −

Integrating both sides with limits (i(t), t; i(0), t0)

6
 ( )
∫( )
= ∫ −

ln ( )− − ln (0) − = − ( − )

( )
ln = − ( − )
( )

Analyzing and substituting initial values

For step response: t0 = 0; i(0) = 0
( )
ln = − ( ); Taking antilogarithm of both sides

( )

( )
=
( )
( )− = −

( )
( )= + Equ (2)

For Voltage across the Inductor

= From Equ (2)

( )
= − × − Substituting this in VL above gives:
( ) ( )
= − × − = Equ (3)

Equation 2 above show that just as the switch is closed,

( ) ( )
( ) = (0) = + = 0. The component decreases exponentially with time,

thereby building up the current until its steady state value is reached.
The time constant is ( ). Theoretically, the current should have reached 63% of its steady

state value at t = .

The MATlab code for this response is contained in Appendix 1a.

5.1.2 Single Pulse Response

7
Figure 3.1.2 a: Single pulse response circuit

For this analysis, the switch has been in the closed position for a while (t = 0-)and steady state
values have been reached [2]. At the time t = 0, the switch is opened and the circuit response
is monitored.
Applying Kirchhoff’s Voltage law:

= + = +

= 0, ℎ ;0 = +

= −

= −

Integrating both sides with initial and final conditions

( )
∫( )
=∫ − ℎ = , = ; ℎ = , = ( )
( )
ln = − ( ); Taking antilogarithm of both sides
( )
( )
=
( ) ( )
=

( )
( )= Equ (4)
Points to note:
- The response shown by this will be a decay of the energy flowing in the circuit.
- The inductor in the circuit will prevent the current from changing instantly.
- The time constant (L/R) depicts the rate at which the current decays.
The MATlab code for this response is contained in Appendix 1b.

8
5.1.3 Multi Pulse Response [3]

Gate Pulses

Figure 3.1.3 a: Multi-pulse response circuit

Multiple pulses are applied to the gate of the switching device.

A diode is inserted to provide a path for the energy in the inductor to flow when the switch is
opened or else the switching device will experience large current on its terminals.
The pulses to be applied to the gate are shown in the figure below:

TON TOFF

Figure 3.1.3 b: Gate pulses for multi-pulse response circuit

The ratio (TON/T) known as the Duty ratio, has been fixed at 0.5 (i.e 50%).
The waveform will show the current in its quasi-steady state nature, until its waveform finally
reaches steady state operation.

The MATlab code for this response is contained in Appendix 1c.

9
5.2 Inverters
The output from these systems are expected to have properties such as
- Change in direction of conduction (+ve and – ve half cycles)
- Repetition of waveform after each period.
Some Applications / Uses of Inverters are:
1. UPS Back UP systems
They act as standby power systems.
They comprise of AC-DC converter, DC BUS (usually a battery) and a DC – AC converter.

B D
A C DC – AC
MAINS T || INVERTER OUTPUT
SUPPLY AC – DC T B (AC)
E U
R S
Y

Figure 3.2 a: Implementation of Inverters in UPS-BACKUPs

The basic output features to expect from inverters used in this application is constant
voltage – constant frequency.

2. VARIABLE VOLTAGE & FREQUENCY DRIVES FOR SPEED CONTROL OF

MOTORS
Induction motors have become very popular in almost all drive applications. They have
become more attractive due to their variable speed operation which operates on the
principle that the speed can be varied by adjusting the voltage and frequency of the
machine proportionally (Volts – Hertz operation). [14]
WITH UNIDIRECTIONAL POWER FLOW WITH BI DIRECTIONAL POWER
FLOW

Figure 3.2 b: Implementation of Inverters in speed control of motors [5]

10
 Basic TYPES, STRUCTURE and Topologies

BASIC TYPES AND STRUCTURE

There are two basic types of inverters:
- Current Source Inverters (CSI)
- Voltage Source Inverters (VSI)

CURRENT SOURCE INVERTERS [4]

- Input is a large variable voltage source in series with a large inductor.
- Voltage can reverse direction, but current cannot.
- Inductor prevents sudden change in current. This is an advantage over VSI’s, as it
prevents current shoot-through.
- Switches used are thyristors which are turned on using gate pulses and turned off
using forced - auto commutation.
- Anti parallel diodes cannot be used in CSI’s as they cannot block reverse voltage.

VOLTAGE SOURCE INVERTERS [8]

- Input is a voltage source (Large capacitance or Battery)
- Current can reverse but voltage cannot.
- Care is to be taken while using VSI’s because current shoot through fault may occur if
a short circuit occurs on a leg of the inverter and may damage the switches in the
circuit. This can be prevented using dead/blanking time implementation.
- Fast switching devices are needed for VSI operation to prevent current shoot through.

11
 TOPOLOGIES
VOLTAGE SOURCE TOPOLOGIES
HALF BRIDGE (SINGLE PHASE) INVERTER TOPOLOGY

Figure 5-2: Half bridge Inverter Topology [4]

Principle of Operation / Features:

- Switches S1 and S2 should not be ON at the same time or else short circuit will occur.
- Time for which S1 and S2 are turned on, determines the output frequency.
- The switches will not carry the current for their half cycle, there will be a time during
each half cycle when the parallel diode becomes forward biased to allow bi-directional
flow of current (recall that in VSI’s current can reverse).

SWITCHING S1 ON S1 OFF SWITCHING

SIGNALS S2 OFF S2 ON SIGNALS

VDC/2 VDC/2

Voltage Output Voltage Output

Vao Vao

- VDC/2 - VDC/2

Current Current
Output Output

Conducting D1 S1 D2 S2
D1 S1 D2 S2 Conducting
Devices Devices

Figure 3.2 D: Load Side / Output Characteristics

12
 RL Load (Points to Note) Purely Inductive Load (Points to note)

- Load commutation occurs, because as sectors 1 - Average Power = 0. (ideally inductive)

and 3 show in Figure 3.3 B, the load current has - The VSI will supply reactive power, while the
become zero before the gate signal is active power which is small will be dissipated as
withdrawn. heat and other losses.
- Thyristors can be used as the switching devices
especially if the load to be supplied is a
synchronous motor. They are cheap and rugged.

Harmonics Evaluation [8]

It contains all odd harmonics (3rd, 5th, 7th, 9th, ..).
The voltage components present in the different harmonics can be demonstrated below:

( ) = ∑∞ × ( )

For fundamental Component (n = 1)

4 4
( ) = × ( )=
2 2
rd
For 3 Harmonic Component (n = 3)
4 1 4
( ) = × (3 )=
2 3 3 2
These harmonics will not generate any real power, but they will cause a lot of I 2R losses.

Limitations of the Half bridge topology

- Input is VDC output is VDC/2
- It is very expensive to design a filter to eliminate all the harmonics present in this
waveform as a separate filter will needed for each harmonic component (3rd, 5th, 7th, 9th,
11, 13th, ..).
- Only frequency can be controlled.
- Total Harmonics Distortion in this system is around 48%. - [7]
This system’s simulation and output waveform is fully featured in Appendix 2a.

13
FULL BRIDGE (SINGLE PHASE) INVERTER TOPOLOGY [8]

Figure 3.2 e: Full bridge topology

This design contains an extra leg B, the principle of operation is same as the half bridge.
However, two switches are conducting at the same time to produce the pole Voltages (V ao
and Vbo).
The total voltage output is a sum of these two pole voltages to produce Vab.
Figure 3.2 f : Full Bridge Topology waveforms

SWITCHING S1 & S3 ON S1 & S3 OFF SWITCHING S1 & S3 ON S1 & S3 OFF

S2 & S4 OFF S2 & S4 ON SIGNALS S2 & S4 OFF S2 & S4 ON
SIGNALS

VDC/2 VDC/2

Voltage
Voltage
Output
Output
(Vao)
(Vao)
- VDC/2
- VDC/2
VDC/2
VDC/2

Voltage
Output Voltage
(Vbo) Output
(Vbo)
- VDC/2

VDC - VDC/2

VDC

Voltage
Output Voltage
(Vab) Output
(Vab)
- VDC

- VDC

Current
Output
Current
Output

Conducting S1 D3 S3
D1 S1 D3 S3
Devices S4 D2 S2
D4 S4 D2 S2
Conducting
D1
Devices
D4

- Only Frequency can be controlled

- The odd harmonics are present.
14
 This system’s simulation and output waveform is fully featured in Appendix 2b.

SIX STEP (THREE PHASE) TOPOLOGY

This design allows balanced poles voltages (Vao, Vbo, and Vco) with 1200 phase shift to flow.
- Switching signals for the same leg are alternatively switched.
- Switching signals for different legs (A, B, C) are 1200 apart.

Figure 3.2g: Six step (three – phase) implementation 1

- The 3rd harmonics will move for 3600 for every 1200 shift in the fundamental. Also, 3rd
order harmonics (3rd, 9th, 12th, 21th, …) will be in the same phase with their pole
voltages.
( ) + ( ) + ( ) ≠0 ℎ
+ + =0
- If the connection to ground (0) is broken, the triplan currents will not have a return path.
This gives rise to the use of the circuit in Figure 3.2 h below.

15
 Figure 3.2h: Six Step three phase topology
We now have the voltage output (VAN, VBN, VCN) and no triplan harmonics.
= + −−−−−−−−−−−−− (4 )
= + −−−−−−−−−−−−− (4 )
= + −−−−−−−−−−−−− (4 )

+ + = + + + 3 −−−−−− (5)
3 ℎ , + + =0
+ +
ℎ (4): =
3
(4 , 4 4 )

EXPECTED OUTPUT CHARACTERISTICS (600 Intervals)

SWITCHING SIGNALS

LEG A

LEG B

LEG C

2 1
= − ( + ) −−−−−−−−−−−−− (6 )
3 3

16
 2 1
= − ( + ) −−−−−−−−−−−−− (6 )
3 3
2 1
= − ( + ) −−−−−−−−−−−−− (6 )
3 3
These can be shown in the waveforms below

VAN

VBN

VCN

There will be no 3rd order harmonics (6n ∓ 1), present in the wave form above.

Limitations
- We cannot still control the amplitude of the output voltage.
- Harmonics will be overwhelming during low frequency operation.
- Total Harmonic Distortion is 29.66 %. - [4]

This system’s simulation and output waveforms are featured in Appendix 2c.

CURRENT SOURCE INVERTER TOPOLOGY [4]

Almost the same topology as the three phase VSI topology,

However, the components used here are:
6 Thyristors each connected to 6 diodes in series
6 Capacitors connected in parallel to each inverter leg.
All these components listed, aid in the forced commutation that goes on during the inverter
operation.

17
Conduction sequence for the thyristors is (T1, T2, T3, T4, T5 and T6). Each thyristor conducts
for 600.
According to Vithayathl. J [4] “During any one commutation, one capacitor is effectively in
parallel with the series combination of the other two capacitors. For example in the case of the
commutation of T1, when T3 is fired, the parallel combination is the capacitor C 13 in parallel
with the series combination of C35 and C51.”

Limitations
- The circuit is not easy to implement.
- Total harmonic distortion is around 29.68%

5.3 Gate Drive circuit – Switching Signal Generation

5.3.1 Sinusoidal Pulse Width Modulation (SPWM)

So far, we have been using pulses with equal duty ratio to control our switching devices
and this produces harmonics in our output.
Only frequency control has been obtained.
One might propose to use stiff DC link control for amplitude (i.e altering the value of the
input DC voltage each time we need to adjust the amplitude). This method cannot cope
with the dynamics involved in variable voltage – variable frequency drives.

The limitations above give rise to the use of Sinusoidal PWM schemes.
18
This technique involves the comparing a modulated waveform with a sampled waveform in
other to obtain switching pulses which will produce an output with fundamental similar to the
reference waveform.
Terms which will be used in this section are:
Carrier / Sample wave frequency:
Reference / Modulated wave frequency: ; Carrier / Sample wave Amplitude: MC
Reference / Modulated wave Amplitude: MM;

: = ;0 < <1

: = ; ≫

5.3.1.1 Sine – Triangle PWM Signals

- The purpose of this PWM technique is to control the output frequency with proportion
to the reference voltage and also to shift the high amplitude harmonics to the high
frequency side.
- High frequency triangular waveform is compared with a reference sine wave to
produce switching signals using the conditions (Sine > Triangle: Top switch ON,
Bottom Switch OFF; Sine< Triangle: Top switch OFF, Bottom switch ON).
The sine- triangle method can be implemented using:
UNIPOLAR SWITCHING: Only one switch operates at a time. This is achieved by comparing
two 1800 phase shifted reference waves to produce the switching pulses for the different legs.
Here fM is made to be an even large integer in other for even harmonics to cancel out.

BIPOLAR SWITCHING: Two alternate switches are made to operate at the same time. It is
obtained by comparing one reference waveform. The signals for the bottom switches are
supplied with the same pulses shifted by 1800.
Here fM is made to be an odd large integer in other for even harmonics to cancel out.

THREE PHASE SWITCHING: Same as above. However the switching signals for each
inverter leg (A, B and C) will be phase displaced by 1200.

19
 BIPOLAR SWITCHING UNIPOLAR SWITCHING

VDC/2

VAN

-VDC/2
VDC

VBN

-VDC

VAB = VAB -VAB

Figure 3.3.1 a: Sine Triangle Method showing Unipolar and Bipolar (Single Phase)
schemes

This system’s simulation and output waveforms are fully featured in Appendix 3a.

20
5.3.1.2 Space Vector PWM Signals [13]
This method handles all three phases as one combined vector, representing the reference
voltage as a rotating vector and mapping each switching state to a two phase orthogonal α-β
plane.

Consider our converter diagram as shown below;

Figure 3.3.1.2 a: 3 phase inverter

S1 S2 S3
A

C
S4 S5 S6

We can say the each leg will always have one of the two configurations shown below
1 – Top switch on, Bottom switch off
0 – Top switch off, Bottom switch on
Since there are three legs, we will have (23 = 8) switching states and these states are shown
below:

ACTIVE STATES

3. [100] 2. [110] 1. [010]

4. [101]
6. [011] 5. [001]

21
 ZERO STATES

8. [111] 7. [000]

For proper PWM operation, these states have to be combined in such a way that the average
voltage output traces a circle.

Assuming we are working with a Variable speed motor drive (Voltage-frequency operation)
and we have a demand to provide VS as output from the converter, we can represent the
space vector implementation of this control operation as shown below:

[010] – Phase B [110] According to the diagram shown on the left, we

are sample a rotating reference voltage space
Sector 2 vector (VS), with a high sampling frequency (fc)
Sector 1 or in other words a low sampling period.
This sampling is done for all sectors [100, 110,
Sector 3 VS 010, 001, 101, 011] using a volts-second
fC balance which will be discussed.
[011] [111] [000]
VDC [100] – Phase A If we examine this closely, it would be seen that
it is almost like the sine-triangle control
Sector 4 Sector 6 method. The sampling period (fc) can be
compared to the triangular wave, while the
Sector 5
rotating reference voltage (V S) can be
compared with the modulated sine wave.

[001] – Phase C [101]

Figure 3.3.1.2 b: Space vector implementation for demanded V S

We take the volts-second balance with reference to the α-β axis; this is then multiplied by the
sampling frequency.

22
Figure 1.2b: Analyzing Sector 1 (100)
While VS is rotating, vector [100] has a period T1, till
β vector [110] which has a period T2.
T2
Total period (T0) = Sampling Period (TS) – (T1 + T2)
V2 We need to find the value for T0, such that the α-β
should be matching

Volt-Sec along the α – axis

VS + ( 60) = | | ----- (1.2A)
where;
Φ
α V1 = V2 = VDC
V1
T1 VS = Rotating Space vector
TS is the sampling period which is fixed by us, so we
need to find out the values for T1 and T2 as it depends
on the Vs magnitude and angle(Φ).

Volt-Sec along the α – axis

0+ ( 60) = | | ----- (1.2B)

Equations (1.2 A) and (1.2 B) can be used to solve for T1 and T2 to obtain the following below
| | ( ) | | ( )
= = ----- (1.2C)
√

| | ( ) | | ( )
= = ----- (1.2D)
√

Referring back to Figure 3.3.1.2b, as we move from V1 to V2 (sub-interval), inverter switching

takes place and with each switching, losses are incurred.
In other to ensure minimum switching losses, T0 is split into two (T0 = T01+T02), where
(T01=T02= T0/2). The switching sequence is as shown in the diagram below.

TS (+ve ½ cycle) TS (-ve ½ cycle)

T1 T2 T02 T02 T2 T1 T01

T01
[000] [100] [110] [111] [111] [110] [100] [000]

VA0

−
2
VB0

VC0

Figure 1.2 c: Switching sequence to minimize losses

23
Taking the average values of pole voltages (VA0, VB0 and VC0)

( ) = − + + + = [ + ] ----- (1.2E)

( ) = − − + + = [− + ] ----- (1.2F)

( ) = − − − + = [− − ] ----- (1.2G)

Substituting the values for T1 and T2 from equations (1.2C) and (1.2D) into (1.2E), (1.2F) and
(1.2G) we obtain the following

| | ( ) | | | |
( ) = + = (60 + ) ----- (1.2 H)
√ √ √

| | | | ( )
( ) = − =| | ( − 30) ----- (1.2 I)
√ √

| |
( ) = ( ) = − (60 + ) ----- (1.2 J)
√

The values shown above are for sector one. This analysis can be done for all the six sectors
by aligning α to the beginning of each sector and evaluating.
To convert to the time domain:
Figure 1.2 d : EVALUATION OF ωt EQUATIONS
First, evaluating in Sector 5, where A minimum occurs:

For ≤ ≤ (Shaded blue)

[010] – Phase B [110] Note that this occurs in the second half of sector 5.
In sector 5 the value of VA0(avg-sector5), is the same as
Sector 2 the value of VB0(avg-sector1), i.e
Sector 1 VA0(avg-sector5)= VB0(avg-sector1)= | | ( − )
But α = ωt + 30, therefore
Sector 3

ωt = 90; VA0(avg-sector5)= | | ( + − )= | | ( )- (1.2K)

[011] [111]
α=0 Note that this is valid for only 0 ≤ ωt ≤ 30
[000] VDC
[100] – Phase A
For ≤ ≤ (Shaded grey)
Sector 4
Note that this occurs for the whole of sector 6.
In sector 6, the value of VA0(avg-sector6) is the same as
Sector 6 VA0(avg-sector1), with the origin shifted. From (1.2H);
| |
Sector 5 ωt = 60; ( ) = (60 + )
√3
α = 30 Note that ≤α≤ == ≤ ≤
[001] – Phase C [101]
0
Therefore α = ωt – 30
ωt = 0; AMIN ωt = 30; ( ) =
| |
(60 + ωt – 30) =
| |
(30 + ωt)
√ √
occurs here α=0 =
| |
( + ) -- (1.2 L)
( ) √
Note the (1.2L) is valid only for 30 ≤ ωt ≤ 90 . 24
The complete wave form from Equations (1.2K and 1.2 L), are shown in Appendix 3b:

We have achieved an almost sinusoidal waveform which peaks twice every half cycle.
This peak is caused by the triplan(3rd order harmonics) which are present in the waveforms.
These harmonics however, do not affect the average voltage variation, which is affected only
by the fundamental component.

Due to the presence of 3rd order harmonics,

VA0+VB0+ VB0≠0
VA0+VB0+ VB0 = VTRIPLAN
Therefore for a single phase leg Phase A,
VA0 - VTRIPLAN = Fundamental Sinusoidal Voltage (OR V A0 = Fundamental Sinusoidal
Voltage + VTRIPLAN) --- (1.2M)
Equation (1.2M) shows us that the triplan voltages add an extra boost in each phase.
The switching signal required for the gate drive, can then be obtained by comparing the
obtained waveform from Figure 1.2e for the three phases with a triangular wave, and using
the conditions shown below:
At every instant;
During Positive cycle During Negative cycle
If Mtri < Msvpwm Vswi= ON If Mtri > Msvpwm
If Mtri > Msvpwm Vswi= OFF If Mtri < Msvpwm

Where;
Mtri =Amplitude of triangular wave
Msvm = Amplitude of SVPWM wave
Vswi = Voltage output of switch

The output of the above is the gate drive switching signal. It is as shown in Appendix 3b

5.3.1.3 Current Hysteresis Controlled PWM Signals

This scheme is used to control VSI’s and over comes some of the limitations of the other two
schemes above.
Using either the sine – triangle method, high frequency PWM is generated and this is not
preferred for motor drive applications.

25
Also, trying to operate these switching schemes at low frequencies produces overwhelming
harmonic disturbances.

The current hysteresis controlled PWM signal is very known and used in applications with
need for fast dynamic response.
A hysteresis band, enveloped around the current is used to produce switching signals for the
gate.
Figure 3.3.1.3 a: Current Hysteresis Control [5]

When top switch is ON (Bottom switch OFF), the current rises from I to Ip, when the bottom
switch is ON (Top switch OFF), the current slowly decays.
The PWM output is controlled by the hysteresis envelope and we can determine parameters
such as the hysteresis envelope (∆i) and the switching frequency (fs).
ℎ 1 :

−
= 2
∆
= = ℎ = ℎ [11]

∆ ∆
= ; = =

∆
=
2 +

26
 ∆ ∆ 1 1
= + = + = ∆ +
− + − +
2 2 2 2

= − (3.3.1.3 )
( 2 ) −

1 ( ) − ( ) − 1
= = 2 − (3.3.1.3 ) ∆ = 2 ℎ =
∆ ∆

ℎ ℎ ,∆ ℎ .
ℎ ℎ (∆ ), ℎ ℎ , ℎ
.

ℎ ℎ .
= sin( )
ℎ , ℎ ℎ ℎ ℎ ∆
⁄4
(3.3.1.3 ) ( ℎ = 0; = =
∆
ℎ ; = 1− ⁄
(3.3.1.3 )

(3.3.1.3 ) ℎ ℎ , ℎ
.

= sin( ); ℎ =
2
( )
then = [1 − ( )] = 1− +
2

Three Phase Implementation

The same implementation will hold for a three phase system. The other two phases B and C
will be shifted by 1200 and they will track each other.
Limitations
- Wide switching variation exists and this will pose a problem when attempting to
suppress harmonics.
- The maximum frequency for each phase occurs at different points this causes a
problem called LIMIT CYCLE OPERATION. The current variation in any phase

27
 experiencing the lowest switching frequency will be decided by the other two phases.
Sometimes, this phase might experience a current overshoot of around 2∆ .
- The zero states are not properly utilized in this control method.
This method however has the fastest dynamic response as will be demonstrated in the next
section.

28
6 Control Schemes for Inverter Control [11]
Control schemes are implemented to ensure sinusoidal output over different load demands.
Response will be determined at every sampling instant by the control scheme.
Since the load for an inverter system may vary, it is difficult to design a generalized control
scheme.

Using an LC filter and assuming a nominal RL load, it can be modelled as a continuous time,
2nd order system with the state variables listed below:
- DC Line Voltage Vd, which can be 0.5VDC or zero.
- VC, iL, VO(load Voltage after filter)
- rL(Inductor equivalent series resistance) , rC(Inductor Equivalent series capacitance)

6.1 Voltage Feedback Control Scheme

iR 1

V0 iL -
1
V0(ref) +
PI Controller + + iC 1 Gate
Error Amplifier + Signals
+
(Vo)

- -

6.1.1 Single Phase Implementation

29
6.1.2 Three Phase Implementation

6.2 Current Feedback Control Scheme

iR 1

V0 iL -
1 iC Gate
iL(ref) + - + +
PI Controller 1 Signals
Error Amplifier +
- + (Vo)

30
6.2.1 Single Phase Implementation

6.2.2 Three Phase Implementation

6.3 Current Tracking Using fixed hysteresis chopping

6.3.1 Single Phase Implementation

31
6.3.2 Three Phase Implementation

32
7 Dynamic System Response
The type of dynamic response used in evaluating is a sudden change in load current demand.
The expected waveforms showing response are shown below.
The dynamic responses have not been fully simulated, but based on their principles the
expected waveforms are known and will be shown below.

7.1 Voltage Feedback (Response)

Current Demand
Changes

Response time is approximately 5 ms (microseconds). This is because the feedback being

tracked is the voltage. The current has to adjust itself slowly according to the voltage pulses
generated by the PWM generator, rising and falling in a sinusoidal curve as it adjusts to the
new level.

33
7.2 Current Feedback (Expected Response)

Current Demand
Changes

Response time is almost same as that of the Voltage feedback for the same reasons. The
control adjusts the Voltage pulses, so the current will react to these pulses.

34
7.3 Current Tracking using fixed hysteresis chopping
This will produce the quickest response.
Response is immediate as the current is tracked within a hysteresis band.
When the current demand changes, the reference current and its corresponding band limits (Ip
and Iv) will change instantly and the current will be tracked using this new level.
The diagram below explains this operation.

IP(NEW)

IP I(NEW)
IV(NEW)
I IV

Change in demand occurs at

this point.
Response occurs almost
immediately.

35
 Conclusions
This project is meant to compare the dynamic response of the different implementations of
inverters
So far, it has been discovered that the SVPWM modulation technique and the fixed hysteresis
control scheme when applied, produce the best response and output waveform.
This scheme is well suited for low power high dynamic requirements, especially drives.

Work Plan

36
 References
[1] History: Origins of the Inverter, 1996. IEEE Industry Applications Magazine. [internet]
Edinburgh : SIGN (Published 1996) Available at:
http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber-476602&userType=inst
[Accessed 05 May 2010].
[2] [William H. Hayt, Jack E. Kemmerly, Steven M. Durbin. Engineering Circuit Analysis.
7th ed. Boston, Mass. ; London: McGraw-Hill Higher Education.
[3] James W. Nillson, Susan A. Riedel. Electric Circuits. 8th ed. Upper Saddle River. ;:
Pearson Prentice Hall, 2008.
[4] Joseph Vithayathil. Power Electronics: principles and applications. New York ; London:
McGraw-Hill Higher Education. 1995
[5] Mohan, N., 2003. Power Electronics: converters, applications, and design. 3rd ed.
Hoboken, NJ: John Wiley & Sons.
[6] William Shepherd, Li Zhang. 2004. Power Converter Circuits. New York: Marcel
Dekker.
[7] Basics of DC-AC converter (Part 1-2): a joint venture by Indian Institutes of Technology
& Indian Institute of Science. 2007 [Online:
http://nptel.iitm.ac.in/showVideo.php?v=7CRexeMAXHA ] Bangalore, India: Centre for
Electronics Design and Technology, IISC. [Last Accessed: 21st April 2010].
[8] Inverter Sine Triangle PWM: a joint venture by Indian Institutes of Technology & Indian
Institute of Science. 2007 [Online:
http://nptel.iitm.ac.in/showVideo.php?v=cvBKfuFD098 ] Bangalore, India: Centre for
Electronics Design and Technology, IISC. [Last Accessed: 21st April 2010].
[9] Inverter – Current Hysteresis controlled PWM: a joint venture by Indian Institutes of
Technology & Indian Institute of Science. 2007 [Online:
http://nptel.iitm.ac.in/showVideo.php?v=jFygrb42-JQ ] Bangalore, India: Centre for
Electronics Design and Technology, IISC. [Last Accessed: 21st April 2010].
[10] Space Vector PWM (Part 1-3): a joint venture by Indian Institutes of Technology
& Indian Institute of Science. 2007 [Online:
http://nptel.iitm.ac.in/showVideo.php?v=w_go3Q85UIM ] Bangalore, India: Centre for
Electronics Design and Technology, IISC. [Last Accessed: 21st April 2010].
[11] YING-YU TZOU, SHIH-LIANG JUNG. Full Control of a PWM DC-AC Converter
for AC Voltage Regulation, [Online]. Available at: Scribd.com

37
 http://www.scribd.com/doc/Full-Control-of-a-PWM-DC-AC-Converter-for-AC-Voltage-
Regulation [Accessed 5 May 2010].
[12] B. Chitti. Babu. An improved dynamic response of voltage source inverter using novel
hysteresis dead band current controller. [Online]. Available at: docstoc.com
http://www.docstoc.com/docs/28654699/An-Improved-Dynamic-Response-of-Voltage-
Source-Inverter-using/ [Accessed 5 May 2010].
[13] Efika, I. ELEC 5510 SVPWM Assignment [2009/2010]. School of Electrical Electronics,
University of Leeds.
[14] Corda, J; Stephenson, JM Speed control of switched reluctance motors in: 5th
International Conference on Electrical Machines (ICEM'82), Budapest, vol. Pt 1,
pp.235-239. 1982.

38
 Appendix
1 Basic Circuit Analysis
1a. Step Response
MATLAB CODE
clear all % clear all previously stored values from memory
Io = 0; % Initial Current
V = 100; % Voltage Supply
R = 10; % Resistance
L = 1e-3; % Inductance
T = L / R; % Time Constant

Iarr = [Io]; % Array for storing values for current

tarr = [0]; % Array for storing time values
Varr = [0]; % Array for storing Voltage switching
Vrarr = [0]; % Array for storing voltage across resistor

for t=0:0.00001:10T
It = (V/R)-((V/R)*exp(-t/T)); % Instantaneous Current
Vl = V * exp(-t/T); % Voltage across inductor
Vr = It * R; % Voltage across resistor
Iarr = [Iarr , It]; % Append value for current to the array
Varr = [Varr, Vl]; % Append value for voltage
Vrarr = [Vrarr, Vr]; % Append value for Voltage across resistor
tarr = [tarr, t]; % Store current time
end;
subplot(3,1,1); plot(tarr, Iarr); xlabel('t - time(secs)'); ylabel('I - Current(A)');
subplot(3,1,2); plot(tarr, Varr);xlabel('t - time(secs)'); ylabel('Vl - Inductor Voltage(V)');
subplot(3,1,3); plot(tarr, Vrarr); xlabel('t - time(secs)'); ylabel('Vr - Resistor Voltage(A)');

WAVEFORMS

39
 1b. Single pulse response
MATLab Code
clear all % clear all previously stored values from memory
Io =V / sqrt((R^2) + (L^2)); % Initial Current
V = 100; % Voltage Supply
R = 10; % Resistance
L = 1e-3; % Inductance
T = L / R; % Time Constant

Iarr = [Io]; % Array for storing values for current

tarr = [0]; % Array for storing time values
Varr = [0]; % Array for storing Voltage switching

for t=0:0.00001:5T
It = (Io * exp(-t/T)); % Instantaneous Current

40
Vt = It * R; % Voltage across resistor
Iarr = [Iarr , It]; % Append value for current to the array
Varr = [Varr, Vl]; % Append value for voltage
tarr = [tarr, t]; % Store current time
end;
subplot(3,1,1); plot(tarr, Iarr); xlabel('t - time(secs)'); ylabel('I - Current(A)');
subplot(3,1,2); plot(tarr, Varr);xlabel('t - time(secs)'); ylabel('Vl - Inductor Voltage(V)');

WAVEFORMS

( )
( )=

( )
( )=

1c. Multi Pulse Response

MATLab Code:
clear all

V = 100; %Input Voltage

R = 1; %Resistance
L = 1e-3; %iNDUCTANCE
Io = 0; %Initial Current(Circuit is started off - Step
response)
It = 0; % Initializing Values for current change
T = (L/R); %Time Constant

Iarr = [0]; %Array for collecting change in values for

current
41
tarr = [0]; %Array for storing change in time
Varr = [0]; %Array for collecting change in values for
input voltage - switching function

n = 0; %Initializing Counter1 - Cycle

p = 0; %Initializing Counter - Switching

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%%%%%%%%%%%%%%%%%%%%%%%
%Loop for calculating
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%%%%%%%%%%%%%%%%%%%%%%%

for t=0:(T/200):(10*T)

Iadd = (1/L) * (V-(It*R)) * (T/200);

It = It + Iadd;
Iarr = [Iarr , It];
tarr = [tarr, t];
Varr = [Varr, V];

n = n+1;

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%%%%%%%%%%%%%%%%%%%%%
%SECTION FOR TURNING SWITCHING ON AND OFF
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%%%%%%%%%%%%%%%%%%%%%

if n == 100
p = p + 1;
if (mod(p,2) > 0)
V = 0;
42
 else
V = 100;

end;

n = 0;
Io = It;
end;

end;

plot(tarr, Iarr , tarr, Varr); xlabel('t - time(timeconstants)'); ylabel('I - Current(A) and

Voltage Input');

WAVEFORM

2 Topologies
2a. Half Bridge

43
WAVEFORMS

QUASI STEADY
STEADY STATE
STATE

44
 2b. Full Bridge

WAVEFORMS

45
2c. Six Step (Three Phase) Topology

WAVEFORMS

46
47
2 Gate Driving Signals

3a. Sine Triangle

48
 3b. SPACE VECTOR PULSE WIDTH MODULATION
MATLAB CODE
f = 50;
Vs = 230;
wt = 0:(pi/1000):(pi/6);
wt1 = (pi/6):((pi)/1000):(pi)/2;
wt2 = (pi)/2:((pi)/1000):(5*(pi)/6);
wt3 = (5*(pi)/6):((pi)/1000):((pi));
wt4 = ((pi)):((pi)/1000):(7*(pi)/6);
wt5 = (7*(pi)/6):((pi)/1000):(9*(pi)/6);
wt6 = (9*(pi)/6):((pi)/1000):(11*(pi)/6);
wt7 = (11*(pi)/6):((pi)/1000):(2*(pi));
wt8 = 0:((pi)/1000):(2*(pi));
%frequency of operation
%reference voltage
%sampling frequency 2nd ½ sector 5
%sampling frequency sector 6
%sampling frequency sector 1
%sampling frequency 1st ½ sector 2
%sampling frequency ½ sector 2
%sampling frequency ½ sector 3
%sampling frequency sector 4
%sampling frequency 1st ½ sector 5
49
Vaarr = [0];

wtaarr = [0];

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% SECOND HALF SECTOR 5 - A MINIMUM
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

Va = Vs * sin (wt);

Vaarr = [Vaarr Va];

wtaarr = [wtaarr wt];

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% SECTOR 6
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Va = (Vs/sqrt(3)) * sin (wt1 + (pi/6));

Vaarr = [Vaarr Va];

wtaarr = [wtaarr wt1];

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% SECTOR 1
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Va = (Vs/sqrt(3)) * sin (wt1 + (pi/6));

Vaarr = [Vaarr Va];

50
wtaarr = [wtaarr wt2];

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% FIRST HALF SECTOR 2
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

Va = Vs * sin (wt3);

Vaarr = [Vaarr Va];

wtaarr = [wtaarr wt3];

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% SECOND HALF SECTOR 2
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Va = Vs * sin (wt4);

Vaarr = [Vaarr Va];

wtaarr = [wtaarr wt4];

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% SECTOR 3
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Va = (Vs/sqrt(3)) * sin (wt5 + (pi/6));

Vaarr = [Vaarr Va];

wtaarr = [wtaarr wt5];

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% SECTOR 4
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Va = (Vs/sqrt(3)) * sin (wt5 + (pi/6));
Vaarr = [Vaarr Va];
51
wtaarr = [wtaarr wt6];
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% FIRST HALF SECTOR 5
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Va = Vs * sin (wt7);
Vaarr = [Vaarr Va];
wtaarr = [wtaarr wt7];
Vref = (Vs/sqrt(3))*sin(wt8);

f = 200; % sampling frequency triangular wave

t = 0:(pi/1000):(2*pi);
x1 = 180 * sawtooth(2*pi*f*t, 0.5);

n = 1;
Vswi = [0];
Mswi = Vs/2;
for p = (pi/1000):(pi/1000):(2*pi);

Vacomp = Vaarr(n);
x1comp = x1(n);
if (Vacomp > 0)

if (Vacomp < x1comp)

Vswi = [Vswi 0];
end
if (Vacomp > x1comp)
Vswi = [Vswi (Mswi)];
end

end

if (Vacomp == 0)
Vswi = [Vswi 0];
end
52
 53
1st half of Sector 5; VA0= | | ( )
| |
Sector 4; VA0= ( + )
√
| |
Sector 3; VA0= ( + )
√
Sector 2; VA0= | | ( )
| |
Sector 1; VA0= ( + )
√
if (Vacomp > x1comp)

if (Vacomp < x1comp)

Vswi = [Vswi (-Mswi)];
Vswi = [Vswi 0];
| |
if (Vacomp < 0)

Sector 6; VA0= ( + )
√

WAVE FORMS
n = n+1;
end

end
2nd half of Sector 5; VA0= | | ( )

end

end;
 3c. Current regulated Inverters
IMPLEMENTATION (SINGLE PHASE – HALF BRIDGE)

54
55