8106-IT-504E-18-K.

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CS/B.Tech./IT/Odd/SEM-5/IT-504E/2018-19

MAULANA ABUL KALAM AZAD UNIVERSITY OF

TECHNOLOGY, WEST BENGAL
Paper Code : IT-504E
MICROPROCESSOR AND MICROCONTROLLER
Time Allotted: 3 Hours Full Marks: 70
The figures in the margin indicate full marks.
Candidates are required to give their answers in their own words
as far as practicable.
Group – A
(Multiple Choice Type Questions)

1. Choose the correct alternative for any ten of the following: 1×10=10
(i) Which of the following interrupt is both level and edge sensitive?
(a) RST 5.5 (b) RST 6.5
(c) RST 7.5 (d) TRAP
(ii) If the crystal with 8085 is 2 MHz, the time required to execute and instruction of 20T-states are
(a) 20 μs (b) 10 μs
(c) 40 μs (d) 5 μs
(iii) Number of machine cycles in ‘CALL’ instruction of 8085 microprocessor are
(a) 6 (b) 5
(c) 4 (d) 3
(iv) PSW of 8085 microprocessor is a
(a) 16 bit register (b) 32 bit register
(c) 8 bit register (d) 6 bit register
(v) The number of RAM bytes in 8051 microcontroller is
(a) 256 (b) 512
(c) 128 (d) 2 K
(vi) How many flag registers are there in 8051?
(a) 9 (b) 8
(c) 6 (d) 5

8106 Turn Over

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(vii) SID and SOD lines receive and transmit characters starting from which bit of the STARI bit?
(a) D (b) D
(c) Neither D nor D (d) Both (a) and (b)
(viii) Number of M cycles in JMP is
(a) 3 (b) 6
(c) 4 (d) 5
(ix) The instruction queue length of 8086 μP is
(a) 8 byte (b) 6 byte
(c) 4 byte (d) 2 byte
(x) The number of multiplexed buses in case of 8086 is
(a) 4 (b) 8
(c) 16 (d) 20
(xi) Mode 5 of 8253 is
(a) square wave generator. (b) rate generator.
(c) software triggered strobe. (d) hardware triggered strobe.
(xii) 8051 microcontroller can support
(a) 5 interrupts (b) 4 interrupts
(c) 3 interrupts (d) 2 interrupts

Group – B
(Short Answer Type Questions)
Answer any three of the following. 5×3=15

2. (a) Explain the action of bits of the control word register of 8255 PPI.
(b) Explain the action of READY signal of 8085 microprocessor. 2+3=5

3. What is meant by nested subroutine? Briefly discuss the sequence of events that takes place while
executing CALL instruction. 2+3=5

4. Explain the following instructions with suitable examples: 1×5=5

(a) XCHG
(b) RAR
(c) MOV B, M
(d) XTHL
(e) DAD rp
5. How many addressing modes are available for 8051 microcontroller? Discuss any four with examples. 1+4=5
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6. Consider the following assembly language program supported by 8085 microprocessor:

LXI H, 2050H
INR M
MOV A, M
ADD A
STA 2051H
HLT
Find out the time required to execute the program if the crystal frequency of 8085 microprocessor is
2 MHz.

Group – C
(Long Answer Type Questions)
Answer any three of the following. 15×3=45
7. (a) Draw the timing diagram for the instruction MVI A, 3EH.
(b) Write an ALP to separate the byte of data stored at memory location 2050 into two nibbles & store
MSB nibble & LSB nibble at memory location D000 & D001 respectively.
(c) List out the similarities between CALL_RET and PUSH_POP instructions.
(d) Give two uses of the NOP instruction. 5+4+4+2=15

8. (a) What is addressing mode? What are the different addressing modes supported by 8085? Explain
each of them with example.
(b) Show the bit positions of various Flags in 8085 flag register.
(c) Draw a simple circuit using three control signals RD, WR, IO/M to produce separate read/write
control signal for memory and I/O device.
(d) What is DAD instruction and what are the flags affected by this instruction? (1+2+5)+2+3+(1+1)=15

9. (a) What is pipelined architecture? How it is implemented in 8086?

(b) Explain the physical address formation in 8086 with example.
(c) What are the main functions performed by BIU & EU unit of 8086 microprocessor? (2+3)+4+6=15

10. (a) What are the different modes of operation in 8255?

(b) Write the control word to set PC .
(c) Write the control word to set port A as input in mode 1 and load the control word into the control
register.
(d) Briefly describe the process of data transfer from input device to processor with handshaking
signals. Draw its timing diagram. 2+2+(2+3)+(3+3)=15
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11. (a) Which is the non-maskable interrupt in 8085?

(b) Which is the non-vectored interrupt in 8085?
(c) Write the accumulator bit pattern for SIM and RIM instruction.
(d) Write an ALP so that RST 5.5 is enable, RST 6.5 is masked and RST 7.5 is enable.
(e) Write an ALP to check if RST 5.5 is pending. If it is pending enable RST 5.5 without affecting any
other interrupt. 1+1+(2+2)+4+5=15

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