Beruflich Dokumente
Kultur Dokumente
OUT
HDMI VDDR3 BOTTOM 1D1V_S0(7.5A)
IN
16X16 DCBATOUT
21 1D2V_S0(4A)
57,58
16X
SYSTEM DC/DC
North Bridge M92XT
CLK GEN. 3 AMD RS880M
53,54,55,56,57,58,59
RT8209B
INPUTS
48
OUTPUTS
ICS9LPRS480BKLFT 71.09480.A03 CPU I/F LVDS, CRT I/F
RTM880N-796-VB-GRT 71.00880.A03 DCBATOUT 1D8V_S3(11A)
INTEGRATED GRAHPICS LAN
Giga LAN TXFM RJ45 RT9025 49
27 27
C
BCM5784 26 5V_S5 1D1V_M92 C
BLOCK DIAGRAM
Size Document Number Rev
A3
JV71-TR SB
Date: Monday, July 06, 2009 Sheet 1 of 61
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
USB/PCIE Routing
Size Document Number Rev
A3
JV71-TR SA
Date: Monday, July 06, 2009 Sheet 2 of 61
5 4 3 2 1
5 4 3 2 1
3D3V_S0 3D3V_CLK_VDD
3D3V_S0
1 R215 2 R221
0R0603-PAD 1 2 3D3V_48MPW R_S0
1
C500 C501 DY C502 C467 C453 C476 C462 C492 C504 Due to PLL issue on current clock chip, the SBlink clock
1
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY 2R3J-GP C511 C506
SC1U10V2KX-1GP need to come from SRC clocks for RS740 and RS780.
DY
SC4D7U6D3V3KX-GP
Future clock chip revision will fix this.
2
3000mA.80ohm
D D
Clock chip has internal serial terminations
3D3V_S0 for differencial pairs, external resistors are
reserved for debug purpose.
1 R197 2
0R0603-PAD
1D1V_CLK_VDDIO C508
SC27P50V2JN-2-GP
R218
1 DY 2 1 2
1
1
C459 C460 C454 C461 C472 C464 C495 3D3V_CLK_VDD
1
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
10MR2J-L-GP XTAL-14D31818MHZ-5-GP
U20 82.30005.B11 X5
2
2
1D1V_CLK_VDDIO 2ND = 82.30005.951 C509
26 61 GEN_XTAL_IN
2
VDDATIG X1 GEN_XTAL_OUT
25 VDDATIG_IO X2 62 1 2
CL=20pF±0.2pF
48 SC33P50V2JN-3GP
VDDCPU CLK_SMBCLK 1 R214 0R0402-PAD
47 VDDCPU_IO SMBCLK 2 2 SMBC0_SB 12,16,17
3 CLK_SMBDAT 1 R213 2 0R0402-PAD
SMBDAT SMBD0_SB 12,16,17
16 VDDSRC
17 VDDSRC_IO
11 VDDSRC_IO ATIG0T_LPRS 30 CLK_PCIE_PEG 52
3D3V_CLK_VDD 29
ATIG0C_LPRS CLK_PCIE_PEG# 52
35 VDDSB_SRC ATIG1T_LPRS 28 CLK_NB_GFX 9
34 VDDSB_SRC_IO ATIG1C_LPRS 27 CLK_NB_GFX# 9
1 R238 2 40 VDDSATA
C 0R0603-PAD 4 23 CLKREQ0# C
VDD CLKREQ0# TP153 TPAD14-GP
1
C505 55 45
SC1U10V2KX-1GP VDD_REF 56
VDDHTT CLKREQ1#
44 CLKREQ2#
LAN_CLKREQ# 26 CLKREQ# Internal
VDDREF CLKREQ2# TP159 TPAD14-GP
3D3V_48MPW R_S0 63 39 W LAN_CLKREQ# 33 pull Low
2
1
13 57 REF2 EC49
SRC3T_LPRS REF2/SEL_27
1
33 CLK_PCIE_MINI1 12 EC50 DY
SRC3C_LPRS
SC22P50V2JN-4GP
MINI1 33 CLK_PCIE_MINI1# 9 DY
2
SRC4T_LPRS
SC22P50V2JN-4GP
8
2
SRC4C_LPRS
42 SRC6T/SATAT_LPRS GNDSATA 43
41 SRC6C/SATAC_LPRS GNDATIG 24
6 SRC7T_LPRS/27MHZ_SS GND 7
2009/04/21 Pad to R By John 5 SRC7C_LPRS/27MHZ_NS GNDHTT 52
DY GNDREF 60
R209 46
CLK_SRC0T_LPRS GNDCPU
53 CLK_27M_SSIN 1
2 37 SB_SRC0T_LPRS GND48 1
0R2J-2-GP 36 SB_SRC0C_LPRS
53 CLK_27M_M92 2 R353
DY 1 CLK_SRC0C_LPRS 32 SB_SRC1T_LPRS GNDSRC 10
1KR2F-3-GP 31 18
B SB_SRC1C_LPRS GNDSRC for TR B
NB CLOCK INPUT TABLE
GNDSB_SRC 33
1
REFCLK_P
71.09480.A03 R229
14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V)
2ND = 71.00880.A03 REF1 1 2 REFCLK_N NC NC vref
33R2F-3-GP CLK_SB_14M 11
3D3V_S0 PD# GFX_REFCLK 100M DIFF 100M DIFF 100M DIFF(IN/OUT)*
RN70 R234 DY
8 1 2 1 GPP_REFCLK NC 100M DIFF NC or 100M DIFF OUTPUT
7 2 W LAN_CLKREQ#
3D3V_S5 6 3 75R2F-2-GP GPPSB_REFCLK 100M DIFF 100M DIFF 100M DIFF
3D3V_S0 5 4 RUNPW ROK_D RUNPW ROK_D 41
SRN10KJ-6-GP * RS780 can be used as clock buffer to output two PCIE referecence clocks
By deault, chip will configured as input mode, BIOS can program it to output mode.
2
REF0 REF0 2 1
REF1 SEL_SATA 1 100MHz non-spreading differential SATA clock CLK_NB_14M 9
A REF2 REF1 2 1 UMA A
0* 100MHz differential spreading SRC clock R235
2
75R2F-2-GP
DY DY SEL_HTT66 1 66MHz 3.3V single ended HTT clock
R225 R224 R223 DY REF0 Wistron Corporation
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 0* 100MHz differential HTT clock 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
OSC_14M_NB
1
CPU_CLK(200MHz) Title
RS780M 1.1V 158R/90.9R
CLKGEN_ICS9LPRS480
Size Document Number Rev
A3 JV71-TR SB
Date: Monday, July 06, 2009 Sheet 3 of 61
5 4 3 2 1
5 4 3 2 1
D D
1D2V_S0
1
C705 C704 C706 C707 C703 C174 C177
DY DY DY DY
SC4D7U6D3V3MX-2GP
SC4D7U6D3V3MX-2GP
SC4D7U6D3V3MX-2GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
2
2
ACPU1A
SKT-CPU638P-GP-U2
62.10055.111
SKT-BGA638H176
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU_HT_LINK I/F_(1/4)
Size Document Number Rev
A3 JV71-TR SA
Date: Monday, July 06, 2009 Sheet 4 of 61
5 4 3 2 1
5 4 3 2 1
ACPU1C
MEM:DATA
16 MEM_MA_DATA0 G12 MA_DATA0 MB_DATA0 C11 MEM_MB_DATA0 17
16 MEM_MA_DATA1 F12 MA_DATA1 MB_DATA1 A11 MEM_MB_DATA1 17
16 MEM_MA_DATA2 H14 MA_DATA2 MB_DATA2 A14 MEM_MB_DATA2 17
16 MEM_MA_DATA3 G14 MA_DATA3 MB_DATA3 B14 MEM_MB_DATA3 17
16 MEM_MA_DATA4 H11 MA_DATA4 MB_DATA4 G11 MEM_MB_DATA4 17
16 MEM_MA_DATA5 H12 MA_DATA5 MB_DATA5 E11 MEM_MB_DATA5 17
16 MEM_MA_DATA6 C13 MA_DATA6 MB_DATA6 D12 MEM_MB_DATA6 17
16 MEM_MA_DATA7 E13 MA_DATA7 MB_DATA7 A13 MEM_MB_DATA7 17
Place near to CPU 16 MEM_MA_DATA8 H15 MA_DATA8 MB_DATA8 A15 MEM_MB_DATA8 17
16 MEM_MA_DATA9 E15 MA_DATA9 MB_DATA9 A16 MEM_MB_DATA9 17
D 4.7u x 4 0.22u X 2 180P x 6 16 MEM_MA_DATA10 E17 MA_DATA10 MB_DATA10 A19 MEM_MB_DATA10 17 D
16 MEM_MA_DATA11 H17 MA_DATA11 MB_DATA11 A20 MEM_MB_DATA11 17
16 MEM_MA_DATA12 E14 MA_DATA12 MB_DATA12 C14 MEM_MB_DATA12 17
1
1
C262 C736 C737 C263 C258 C254 C249 C255 C250 C256
DY C251 C252 F14 D14
16 MEM_MA_DATA13 MA_DATA13 MB_DATA13 MEM_MB_DATA13 17
DY DY DY DY DY 16 MEM_MA_DATA14 C17 MA_DATA14 MB_DATA14 C18 MEM_MB_DATA14 17
SC4D7U6D3V3MX-2GP
SC4D7U6D3V3MX-2GP
SC4D7U6D3V3MX-2GP
SC4D7U6D3V3MX-2GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
16 MEM_MA_DATA15 G17 D18 MEM_MB_DATA15 17
2
2
MA_DATA15 MB_DATA15
16 MEM_MA_DATA16 G18 MA_DATA16 MB_DATA16 D20 MEM_MB_DATA16 17
16 MEM_MA_DATA17 C19 MA_DATA17 MB_DATA17 A21 MEM_MB_DATA17 17
16 MEM_MA_DATA18 D22 MA_DATA18 MB_DATA18 D24 MEM_MB_DATA18 17
16 MEM_MA_DATA19 E20 MA_DATA19 MB_DATA19 C25 MEM_MB_DATA19 17
16 MEM_MA_DATA20 E18 MA_DATA20 MB_DATA20 B20 MEM_MB_DATA20 17
16 MEM_MA_DATA21 F18 MA_DATA21 MB_DATA21 C20 MEM_MB_DATA21 17
16 MEM_MA_DATA22 B22 MA_DATA22 MB_DATA22 B24 MEM_MB_DATA22 17
16 MEM_MA_DATA23 C23 MA_DATA23 MB_DATA23 C24 MEM_MB_DATA23 17
16 MEM_MA_DATA24 F20 MA_DATA24 MB_DATA24 E23 MEM_MB_DATA24 17
16 MEM_MA_DATA25 F22 MA_DATA25 MB_DATA25 E24 MEM_MB_DATA25 17
16 MEM_MA_DATA26 H24 MA_DATA26 MB_DATA26 G25 MEM_MB_DATA26 17
16 MEM_MA_DATA27 J19 MA_DATA27 MB_DATA27 G26 MEM_MB_DATA27 17
0D9V_S3 16 MEM_MA_DATA28 E21 MA_DATA28 MB_DATA28 C26 MEM_MB_DATA28 17
E22 D26
750 mA 16 MEM_MA_DATA29
H20
MA_DATA29 MB_DATA29
G23
MEM_MB_DATA29 17
CLOSE TO CPU 16 MEM_MA_DATA30
H22
MA_DATA30 MB_DATA30
G24
MEM_MB_DATA30 17
16 MEM_MA_DATA31 MA_DATA31 MB_DATA31 MEM_MB_DATA31 17
1D8V_S3 16 MEM_MA_DATA32 Y24 MA_DATA32 MB_DATA32 AA24 MEM_MB_DATA32 17
ACPU1B AB24 AA23
16 MEM_MA_DATA33 MA_DATA33 MB_DATA33 MEM_MB_DATA33 17
16 MEM_MA_DATA34 AB22 MA_DATA34 MB_DATA34 AD24 MEM_MB_DATA34 17
D10 VTT1 W10 16 MEM_MA_DATA35 AA21 AE24 MEM_MB_DATA35 17
C10 MEM:CMD/CTRL/CLK VTT5 AC10 W22
MA_DATA35 MB_DATA35
AA26
VTT2 VTT6 16 MEM_MA_DATA36 MA_DATA36 MB_DATA36 MEM_MB_DATA36 17
1
B10 AB10 C397 W21 AA25
VTT3 VTT7 16 MEM_MA_DATA37 MA_DATA37 MB_DATA37 MEM_MB_DATA37 17
R381 AD10 AA10 SCD1U10V2KX-4GP Y22 AD26
1D8V_S3 VTT4 VTT8 16 MEM_MA_DATA38 MA_DATA38 MB_DATA38 MEM_MB_DATA38 17
C 39D2R2F-L-GP A10 AA22 AE25 C
16 MEM_MA_DATA39 MEM_MB_DATA39 17
2
MEMZP VTT9 MA_DATA39 MB_DATA39
1 2 AF10 MEMZP VREF_DDR_CLAW 16 MEM_MA_DATA40 Y20 MA_DATA40 MB_DATA40 AC22 MEM_MB_DATA40 17
1 2 MEMZN AE10 Y10 VTT_SENSE 1 TP106TPAD14-GP RN48 AA20 AD22
MEMZN VTT_SENSE 16 MEM_MA_DATA41 MA_DATA41 MB_DATA41 MEM_MB_DATA41 17
R383 1 4 AA18 AE20
16 MEM_MA_DATA42 MA_DATA42 MB_DATA42 MEM_MB_DATA42 17
39D2R2F-L-GPTP111 1 MEM_RSVD_M1 H16 W17 2 3 AB18 AF20
RSVD_M1 MEMVREF 16 MEM_MA_DATA43 MA_DATA43 MB_DATA43 MEM_MB_DATA43 17
16 MEM_MA_DATA44 AB21 MA_DATA44 MB_DATA44 AF24 MEM_MB_DATA44 17
T19 B18 MEM_RSVD_M2 1 TP112 C391 C388 SRN1KJ-7-GP AD21 AF23
16,18 MEM_MA0_ODT0 MA0_ODT0 RSVD_M2 16 MEM_MA_DATA45 MA_DATA45 MB_DATA45 MEM_MB_DATA45 17
1
16,18 MEM_MA0_ODT1 V22 MA0_ODT1 16 MEM_MA_DATA46 AD19 MA_DATA46 MB_DATA46 AC20 MEM_MB_DATA46 17
SC1KP50V2KX-1GP
SCD1U10V2KX-4GP
U21 MA1_ODT0 MB0_ODT0 W26 MEM_MB0_ODT0 17,18 16 MEM_MA_DATA47 Y18 MA_DATA47 MB_DATA47 AD20 MEM_MB_DATA47 17
V19 W23 MEM_MB0_ODT1 17,18 16 MEM_MA_DATA48 AD17 AD18 MEM_MB_DATA48 17
2
MA1_ODT1 MB0_ODT1 MA_DATA48 MB_DATA48
MB1_ODT0 Y26 16 MEM_MA_DATA49 W16 MA_DATA49 MB_DATA49 AE18 MEM_MB_DATA49 17
16,18 MEM_MA0_CS#0 T20 MA0_CS_L0 16 MEM_MA_DATA50 W14 MA_DATA50 MB_DATA50 AC14 MEM_MB_DATA50 17
16,18 MEM_MA0_CS#1 U19 MA0_CS_L1 MB0_CS_L0 V26 MEM_MB0_CS#0 17,18 16 MEM_MA_DATA51 Y14 MA_DATA51 MB_DATA51 AD14 MEM_MB_DATA51 17
U20 MA1_CS_L0 MB0_CS_L1 W25 MEM_MB0_CS#1 17,18 16 MEM_MA_DATA52 Y17 MA_DATA52 MB_DATA52 AF19 MEM_MB_DATA52 17
V20 MA1_CS_L1 MB1_CS_L0 U22 16 MEM_MA_DATA53 AB17 MA_DATA53 MB_DATA53 AC18 MEM_MB_DATA53 17
16 MEM_MA_DATA54 AB15 MA_DATA54 MB_DATA54 AF16 MEM_MB_DATA54 17
16,18 MEM_MA_CKE0 J22 MA_CKE0 MB_CKE0 J25 MEM_MB_CKE0 17,18 16 MEM_MA_DATA55 AD15 MA_DATA55 MB_DATA55 AF15 MEM_MB_DATA55 17
16,18 MEM_MA_CKE1 J20 MA_CKE1 MB_CKE1 H26 MEM_MB_CKE1 17,18 16 MEM_MA_DATA56 AB13 MA_DATA56 MB_DATA56 AF13 MEM_MB_DATA56 17
16 MEM_MA_DATA57 AD13 MA_DATA57 MB_DATA57 AC12 MEM_MB_DATA57 17
N19 MA_CLK_H5 MB_CLK_H5 P22 16 MEM_MA_DATA58 Y12 MA_DATA58 MB_DATA58 AB11 MEM_MB_DATA58 17
N20 MA_CLK_L5 MB_CLK_L5 R22 16 MEM_MA_DATA59 W11 MA_DATA59 MB_DATA59 Y11 MEM_MB_DATA59 17
16 MEM_MA_CLK0_P E16 MA_CLK_H1 MB_CLK_H1 A17 MEM_MB_CLK0_P 17 16 MEM_MA_DATA60 AB14 MA_DATA60 MB_DATA60 AE14 MEM_MB_DATA60 17
16 MEM_MA_CLK0_N F16 MA_CLK_L1 MB_CLK_L1 A18 MEM_MB_CLK0_N 17 16 MEM_MA_DATA61 AA14 MA_DATA61 MB_DATA61 AF14 MEM_MB_DATA61 17
16 MEM_MA_CLK1_P Y16 MA_CLK_H7 MB_CLK_H7 AF18 MEM_MB_CLK1_P 17 16 MEM_MA_DATA62 AB12 MA_DATA62 MB_DATA62 AF11 MEM_MB_DATA62 17
16 MEM_MA_CLK1_N AA16 MA_CLK_L7 MB_CLK_L7 AF17 MEM_MB_CLK1_N 17 16 MEM_MA_DATA63 AA12 MA_DATA63 MB_DATA63 AD11 MEM_MB_DATA63 17
P19 MA_CLK_H4 MB_CLK_H4 R26
P20 MA_CLK_L4 MB_CLK_L4 R25 16 MEM_MA_DM0 E12 MA_DM0 MB_DM0 A12 MEM_MB_DM0 17
16 MEM_MA_DM1 C15 MA_DM1 MB_DM1 B16 MEM_MB_DM1 17
16,18 MEM_MA_ADD0 N21 MA_ADD0 MB_ADD0 P24 MEM_MB_ADD0 17,18 16 MEM_MA_DM2 E19 MA_DM2 MB_DM2 A22 MEM_MB_DM2 17
B B
16,18 MEM_MA_ADD1 M20 MA_ADD1 MB_ADD1 N24 MEM_MB_ADD1 17,18 16 MEM_MA_DM3 F24 MA_DM3 MB_DM3 E25 MEM_MB_DM3 17
16,18 MEM_MA_ADD2 N22 MA_ADD2 MB_ADD2 P26 MEM_MB_ADD2 17,18 16 MEM_MA_DM4 AC24 MA_DM4 MB_DM4 AB26 MEM_MB_DM4 17
16,18 MEM_MA_ADD3 M19 MA_ADD3 MB_ADD3 N23 MEM_MB_ADD3 17,18 16 MEM_MA_DM5 Y19 MA_DM5 MB_DM5 AE22 MEM_MB_DM5 17
16,18 MEM_MA_ADD4 M22 MA_ADD4 MB_ADD4 N26 MEM_MB_ADD4 17,18 16 MEM_MA_DM6 AB16 MA_DM6 MB_DM6 AC16 MEM_MB_DM6 17
16,18 MEM_MA_ADD5 L20 MA_ADD5 MB_ADD5 L23 MEM_MB_ADD5 17,18 16 MEM_MA_DM7 Y13 MA_DM7 MB_DM7 AD12 MEM_MB_DM7 17
16,18 MEM_MA_ADD6 M24 MA_ADD6 MB_ADD6 N25 MEM_MB_ADD6 17,18
16,18 MEM_MA_ADD7 L21 MA_ADD7 MB_ADD7 L24 MEM_MB_ADD7 17,18 16 MEM_MA_DQS0_P G13 MA_DQS_H0 MB_DQS_H0 C12 MEM_MB_DQS0_P 17
16,18 MEM_MA_ADD8 L19 MA_ADD8 MB_ADD8 M26 MEM_MB_ADD8 17,18 16 MEM_MA_DQS0_N H13 MA_DQS_L0 MB_DQS_L0 B12 MEM_MB_DQS0_N 17
16,18 MEM_MA_ADD9 K22 MA_ADD9 MB_ADD9 K26 MEM_MB_ADD9 17,18 16 MEM_MA_DQS1_P G16 MA_DQS_H1 MB_DQS_H1 D16 MEM_MB_DQS1_P 17
16,18 MEM_MA_ADD10 R21 MA_ADD10 MB_ADD10 T26 MEM_MB_ADD10 17,18 16 MEM_MA_DQS1_N G15 MA_DQS_L1 MB_DQS_L1 C16 MEM_MB_DQS1_N 17
16,18 MEM_MA_ADD11 L22 MA_ADD11 MB_ADD11 L26 MEM_MB_ADD11 17,18 16 MEM_MA_DQS2_P C22 MA_DQS_H2 MB_DQS_H2 A24 MEM_MB_DQS2_P 17
16,18 MEM_MA_ADD12 K20 MA_ADD12 MB_ADD12 L25 MEM_MB_ADD12 17,18 16 MEM_MA_DQS2_N C21 MA_DQS_L2 MB_DQS_L2 A23 MEM_MB_DQS2_N 17
16,18 MEM_MA_ADD13 V24 MA_ADD13 MB_ADD13 W24 MEM_MB_ADD13 17,18 16 MEM_MA_DQS3_P G22 MA_DQS_H3 MB_DQS_H3 F26 MEM_MB_DQS3_P 17
16,18 MEM_MA_ADD14 K24 MA_ADD14 MB_ADD14 J23 MEM_MB_ADD14 17,18 16 MEM_MA_DQS3_N G21 MA_DQS_L3 MB_DQS_L3 E26 MEM_MB_DQS3_N 17
16,18 MEM_MA_ADD15 K19 MA_ADD15 MB_ADD15 J24 MEM_MB_ADD15 17,18 16 MEM_MA_DQS4_P AD23 MA_DQS_H4 MB_DQS_H4 AC25 MEM_MB_DQS4_P 17
16 MEM_MA_DQS4_N AC23 MA_DQS_L4 MB_DQS_L4 AC26 MEM_MB_DQS4_N 17
16,18 MEM_MA_BANK0 R20 MA_BANK0 MB_BANK0 R24 MEM_MB_BANK0 17,18 16 MEM_MA_DQS5_P AB19 MA_DQS_H5 MB_DQS_H5 AF21 MEM_MB_DQS5_P 17
16,18 MEM_MA_BANK1 R23 MA_BANK1 MB_BANK1 U26 MEM_MB_BANK1 17,18 16 MEM_MA_DQS5_N AB20 MA_DQS_L5 MB_DQS_L5 AF22 MEM_MB_DQS5_N 17
16,18 MEM_MA_BANK2 J21 MA_BANK2 MB_BANK2 J26 MEM_MB_BANK2 17,18 16 MEM_MA_DQS6_P Y15 MA_DQS_H6 MB_DQS_H6 AE16 MEM_MB_DQS6_P 17
16 MEM_MA_DQS6_N W15 MA_DQS_L6 MB_DQS_L6 AD16 MEM_MB_DQS6_N 17
16,18 MEM_MA_RAS# R19 MA_RAS_L MB_RAS_L U25 MEM_MB_RAS# 17,18 16 MEM_MA_DQS7_P W12 MA_DQS_H7 MB_DQS_H7 AF12 MEM_MB_DQS7_P 17
16,18 MEM_MA_CAS# T22 MA_CAS_L MB_CAS_L U24 MEM_MB_CAS# 17,18 16 MEM_MA_DQS7_N W13 MA_DQS_L7 MB_DQS_L7 AE12 MEM_MB_DQS7_N 17
16,18 MEM_MA_W E# T24 MA_WE_L MB_WE_L U23 MEM_MB_W E# 17,18
SKT-CPU638P-GP-U2
SKT-CPU638P-GP-U2 62.10055.111
62.10055.111
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU_DDR_(2/4)
Size Document Number Rev
A3 SA
JV71-TR
Date: Monday, July 06, 2009 Sheet 5 of 61
5 4 3 2 1
5 4 3 2 1
8
7
6
5
RN40
1DY 2
IF 0 ohm IS NOT GOOD ENOUGH, TRY 68.00082.491
LYAOUT:ROUTE VDDA TRACE APPROX. I=Active HTC
SRN300J-1-GP C196 50mils WIDE(USE 2X25 mil TRACES TO O=FAN
SC100P50V2JN-3GP 2D5V_S0 2D5V_VDDA_S0 EXIT BALL FIELD) AND 500 mils LONG.
1
2
3
4
D 11,51 CPU_LDT_RST# 1 R78 2 LDT_RST#_CPU 9 1 R401 2 D
0R0402-PAD 0R0603-PAD
1
11,51 CPU_PW RGD 1 R86 2 LDT_PW ROK C739 C745 C227 C752 C264
SC10U6D3V3MX-GP
SC4D7U6D3V3MX-2GP
SC3900P50V2KX-2GP
SC10U10V5ZY-1GP
SCD22U16V3ZY-GP
0R0402-PAD DY DY 1D8V_S3
1 R79 2 1D8V_S3
11 CPU_LDT_STOP#
2
0R0402-PAD LDT_STP#_CPU 9
1 2 CPU_LDT_REQ#_CPU
9 ALLOW _LDTSTOP R72 0R2J-2-GP DY
3
4
8
7
6
5
1
DY ACPU1D RN87 R366
for TR SRN1KJ-7-GP 300R2J-4-GP
1D8V_S3 RN84
DY
F8 VDDA1 KEY1 M11
Cloce To CPU F9 W18 SRN300J-1-GP
2
VDDA2 KEY2
1 2
2
1
1
2
3
4
1 2 R386 169R2F-GP CLKCPU_IN A9 A6
2 3 CPU_CLK CLKIN_H SVC CPU_SVC 44
C7341 2SC3900P50V2KX-2GP CLKCPU#_IN A8 A4
3 CPU_CLK# CLKIN_L SVD CPU_SVD 44
R364 C732 SC3900P50V2KX-2GP
390R2J-1-GP LDT_RST#_CPU B7
LDT_PW ROK RESET_L CPU_DBREQ#
A7 PWROK
LDT_STP#_CPU F10 AF6 THERMTRIP#
1
2
1 2CPU_TEST25_H TEST16 E7 CPU_TEST16 1 TP90
510R2J-1-GP TP105 1CPU_TEST25_H E9 F7 CPU_TEST15 1 TP91 R610
R615 TP103 TEST25_H TEST15
1CPU_TEST25_L E8 TEST25_L TEST14 C7 CPU_TEST14 1 TP88 300R2J-4-GP
1
TP97 CPU_TEST20 CPU_TEST20 TEST21 TEST7 CPU_TEST10
1 AF7 TEST20 TEST10 K8
TP94 1 CPU_TEST24 AE7
CPU_TEST22 TEST24
AE8 TEST22 TEST8 C4
TP95 1 CPU_TEST12 AC8
TP187 CPU_TEST27 TEST12
1 AF8 TEST27
1D8V_S3 C9 CPU_TEST29H 1 TP101
TEST29_H
8
7
6
5 1 R77 2 CPU_TEST9 C2 TEST9 TEST29_L C8 CPU_TEST29L 1 TP102
3D3V_S0 RN42 0R0402-PAD AA6 TEST6
1
B SRN300J-1-GP B
R81 A3 H18
RSVD1 RSVD10
1
R101
DY 2K2R2J-2-GP A5 RSVD2 RSVD9 H19
B3 AA7
1
2
3
4
Q8
C E LDT_PW ROK SKT-CPU638P-GP-U2
44 CPU_PW RGD_SVID_REG MMBT3904-4-GP HDT1
84.T3904.C11 62.10055.111 1 2
2ND = 84.03904.L06 DY
1
C205 DY 3 4
SCD1U16V2ZY-2GP 5 6
CPU_DBREQ# 7 8
2
2
R376 CPU_TDO 19 20
0R0402-PAD 2K2R2J-2-GP C723 R612 R611 R613 21 22
SCD1U16V2ZY-2GP 300R2J-4-GP 300R2J-4-GP 300R2J-4-GP 1D8V_S3 23 24
DY DY DY 26
2
1 2 1
1
1D8V_SUS_Q2 SMC-CONN26A-FP
B
HDT_RST#
Q24
A THERMTRIP# E C UMA A
RSMRST# 34,35
MMBT3904-4-GP
84.T3904.C11
2ND = 84.03904.L06 Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
CPU exceeds to 125℃ Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU_Control&Debug_(3/4)
Size Document Number Rev
A3 SA
JV71-TR
Date: Monday, July 06, 2009 Sheet 6 of 61
5 4 3 2 1
5 4 3 2 1
1
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
AB9 VSS9 VSS74 K7 K6 VDD0_7 VDD1_7 T2
AB23 VSS10 VSS75 K9 DY DY K10 VDD0_8 VDD1_8 T6 DY DY
AB25 K11 K12 T8
2
VSS11 VSS76 VDD0_9 VDD1_9
AC11 VSS12 VSS77 K13 K14 VDD0_10 VDD1_10 T10
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SCD22U6D3V2KX-1GP
SCD01U50V2KX-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SCD01U50V2KX-1GP
SCD22U6D3V2KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V5KX-1GP
AC13 VSS13 VSS78 K15 L4 VDD0_11 VDD1_11 T12
AC15 VSS14 VSS79 K17 L7 VDD0_12 VDD1_12 T14
AC17 VSS15 VSS80 L6 L9 VDD0_13 VDD1_13 U7
AC19 VSS16 VSS81 L8 L11 VDD0_14 VDD1_14 U9
AC21 VSS17 VSS82 L10 L13 VDD0_15 VDD1_15 U11
AD6 VSS18 VSS83 L12 L15 VDD0_16 VDD1_16 U13
AD8 VSS19 VSS84 L14 M2 VDD0_17 VDD1_17 U15
AD25 VSS20 VSS85 L16 M6 VDD0_18 VDD1_18 V6
AE11 VSS21 VSS86 L18 M8 VDD0_19 VDD1_19 V8
AE13 VSS22 VSS87 M7 M10 VDD0_20 VDD1_20 V10
AE15 VSS23 VSS88 M9 N7 VDD0_21 VDD1_21 V12
AE17 VSS24 VSS89 AC6 N9 VDD0_22 VDD1_22 V14
AE19 VSS25 VSS90 M17 N11 VDD0_23 VDD1_23 W4
AE21 N4 VDDNB Y2
AE23
VSS26 VSS91
N8 add 0.1U 3A for VDDNB K16
VDD1_24
AC4
B4
VSS27 VSS92
N10 M16
VDDNB_1 VDD1_25
AD2
3A for VDDIO
VSS28 VSS93 VDDNB_2 VDD1_26 1D8V_S3
B6 VSS29 VSS94 N16 P16 VDDNB_3 Place near to CPU
B8 N18 C316 C324 C808 T16 Y25
VSS30 VSS95 VDDNB_4 VDDIO27
1
1
B9 VSS31 VSS96 P2 V16 VDDNB_5 VDDIO26 V25
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V5KX-1GP
B11 VSS32 VSS97 P7 DY VDDIO25 V23
B13 P9 H25 V21
2
2
VSS33 VSS98 VDDIO1 VDDIO24 C351 C362 C385 C379 C375 C365 C358 C361 C347 C363 C378
B15 VSS34 VSS99 P11 J17 VDDIO2 VDDIO23 V18
C B17 P17 K18 U17 C
VSS35 VSS100 VDDIO3 VDDIO22
1
B19 VSS36 VSS101 R8 K21 VDDIO4 VDDIO21 T25 DY DY DY
B21 VSS37 VSS102 R10 K23 VDDIO5 VDDIO20 T23 DY DY DY DY
B23 R16 K25 T21
2
VSS38 VSS103 VDDIO6 VDDIO19
B25 VSS39 VSS104 R18 L17 VDDIO7 VDDIO18 T18
SC180P50V2JN-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SC4D7U6D3V3MX-2GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
D6 VSS40 VSS105 T7 M18 VDDIO8 VDDIO17 R17
D8 T9 M21 P25
D9
VSS41 VSS106
T11
3A for VDDIO M23
VDDIO9 VDDIO16
P23
VSS42 VSS107 1D8V_S3 VDDIO10 VDDIO15
D11 VSS43 VSS108 T13 M25 VDDIO11 VDDIO14 P21
D13 VSS44 VSS109 T15 Bottom Side Decoupling N17 VDDIO12 VDDIO13 P18
D15 VSS45 VSS110 T17
D17 VSS46 VSS111 U4
D19 VSS47 VSS112 U6 SKT-CPU638P-GP-U2
D21 VSS48 VSS113 U8
D23 U10 C392 C398 C381 C356 C372 C349 62.10055.111
VSS49 VSS114
1
VSS52 VSS117
F11 VSS53 VSS118 U18
SC10U6D3V5KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
62.10055.111
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU_Power_(4/4)
Size Document Number Rev
A3
JV71-TR SA
Date: Monday, July 06, 2009 Sheet 7 of 61
5 4 3 2 1
5 4 3 2 1
ANB1A
4 HT_CPU_NB_CAD_H0 Y25 HT_RXCAD0P HT_TXCAD0P D24 HT_NB_CPU_CAD_H0 4
4 HT_CPU_NB_CAD_L0 Y24 HT_RXCAD0N PART 1 OF 6 HT_TXCAD0N D25 HT_NB_CPU_CAD_L0 4
4 HT_CPU_NB_CAD_H1 V22 HT_RXCAD1P HT_TXCAD1P E24 HT_NB_CPU_CAD_H1 4
4 HT_CPU_NB_CAD_L1 V23 HT_RXCAD1N HT_TXCAD1N E25 HT_NB_CPU_CAD_L1 4
4 HT_CPU_NB_CAD_H2 V25 HT_RXCAD2P HT_TXCAD2P F24 HT_NB_CPU_CAD_H2 4
4 HT_CPU_NB_CAD_L2 V24 HT_RXCAD2N HT_TXCAD2N F25 HT_NB_CPU_CAD_L2 4
4 HT_CPU_NB_CAD_H3 U24 HT_RXCAD3P HT_TXCAD3P F23 HT_NB_CPU_CAD_H3 4
4 HT_CPU_NB_CAD_L3 U25 HT_RXCAD3N HT_TXCAD3N F22 HT_NB_CPU_CAD_L3 4
4 HT_CPU_NB_CAD_H4 T25 HT_RXCAD4P HT_TXCAD4P H23 HT_NB_CPU_CAD_H4 4
4 HT_CPU_NB_CAD_L4 T24 HT_RXCAD4N HT_TXCAD4N H22 HT_NB_CPU_CAD_L4 4
P22 J25
4
HT_CPU_NB_CAD_L15
HT_CPU_NB_CLK_H0 T22
HT_RXCAD15N
HT_RXCLK0P
HT_TXCAD15N
HT_TXCLK0P H24
HT_NB_CPU_CAD_L15
HT_NB_CPU_CLK_H0 4
4
RS780 SYMBOL
4 HT_CPU_NB_CLK_L0 T23 HT_RXCLK0N HT_TXCLK0N H25 HT_NB_CPU_CLK_L0 4
4 HT_CPU_NB_CLK_H1 AB23 HT_RXCLK1P HT_TXCLK1P L21 HT_NB_CPU_CLK_H1 4
4 HT_CPU_NB_CLK_L1 AA22 HT_RXCLK1N HT_TXCLK1N L20 HT_NB_CPU_CLK_L1 4
1
1 2 3D3V_S0_AVDD
EC962 SBK160808T-221Y-N-GP Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC#)
EMI
1
1
SC1KP50V2KX-1GP 68.00119.111 C70
*1 :Disable 0 : Enable
2
DYSCD1U10V2KX-4GP R563 R562
0408 C71 3K3R2J-3-GP 3K3R2J-3-GP
2
SC1U10V2KX-1GP RS780: Enables Side port memory ( RS780 use HSYNC#)
2
2
R21 0R2J-2-GP
1 DY 2 1D8V_S0 GMCH_VSYNC
*1 :Disable 0 : Enable
6 LDT_RST#_CPU
GMCH_HSYNC
D 1 2 SYSREST# 1 R41 2 1D8V_S0_AVDDDI D
11,26,35 PLT_RST1#
R17 0R2J-2-GP 0R0603-PAD SUS_STAT#
1
C88 C89 Selects Loading of STRAPS From EEPROM
1
SC1U10V2KX-1GP SCD1U10V2KX-4GP
C37 68.00119.111 *10 :: Bypass the loading of EEPROM straps and use Hardware Default Values
2
SC220P50V2KX-3GP 1D8V_S0 I2C Master can load strap values from EEPROM if connected,
2
220ohm 200mA or use default values if not connected
1 2 ANB1C
R43
1
SBK160808T-221Y-N-GP C99 F12 A22 GMCH_TXAOUT0+ 19
AVDD1 TXOUT_L0P
1
Close to NB ball TC2 C80 SCD1U10V2KX-4GP E12 PART 3 OF 6 B22 GMCH_TXAOUT0- 19
AVDD2 TXOUT_L0N
ST100U6D3VBM-5GP
SC1U10V2KX-1GP F14 A21 GMCH_TXAOUT1+ 19
2
AVDDDI TXOUT_L1P
DY G15 B21 GMCH_TXAOUT1- 19
2
GMCH_BLUE 1D8V_S0_AVDDQ AVSSDI TXOUT_L1N
H15 AVDDQ TXOUT_L2P B20 GMCH_TXAOUT2+ 19
77.C1071.081 H14 AVSSQ TXOUT_L2N A20 GMCH_TXAOUT2- 19
GMCH_GREEN A19
TXOUT_L3P
E17 C_Pr TXOUT_L3N B19
GMCH_RED F17 Y
F15 B18 GMCH_TXBOUT0+ 19
CRT/TVOUT
COMP_Pb TXOUT_U0P
1
150R2F-1-GP
140R2F-GP
1
6 ALLOW _LDTSTOP 1 2 NB_ALLOW _LDTSTOP 220ohm 200mA 1 1D8V_S0_PLVDD18 D14 PLLVDD18 68.00119.111
1
0R2J-2-GP C643 B12 A15 C649 DY
C644 SCD1U10V2KX-4GP PLLVSS VDDLT18_1 SC1U10V2KX-1GP C648
DY 68.00119.111 B15
2
VDDLT18_2
LVTM
SC1U10V2KX-1GP DY VDDA18HTPLL H17 A14 SCD1U10V2KX-4GP
2
2 VDDA18HTPLL VDDLT33_1
PLL PWR
1D8V_S0 B14 L35
L4 VDDLT33_2 1D8V_S0_VDDLT18
for TR 220ohm 200mA D7 VDDA18PCIEPLL1 1 2
1 2 VDDA18PCIEPLL E7 C14 PBY201209T-221Y-N-GP
VDDA18PCIEPLL2 VSSLT1
1
SC4D7U6D3V3MX-2GP
2R3J-GP D15 C652 68.00206.121
VSSLT2
1
SC1U10V2KX-1GP
2
POWERGOOD VSSLT4
ST100U6D3VBML1GP
CLOCKs PM
3 CLK_NBHT_CLK C25 HT_REFCLKP
3 CLK_NBHT_CLK# C24 HT_REFCLKN
1D1V_S0
RN11 E11
3 CLK_NB_14M REFCLK_P/OSCIN
1 4 NB_REFCLK_N F11 E9
ENABLE External CLK GEN 2 3
REFCLK_N LVDS_DIGON
F7 GMCH_BL_ON
GMCH_LCDVDD_ON 19
LVDS_BLON GMCH_BL_ON 35
68.00119.111 CLK_NB_GFX T2 G12 LVDS_ENA_BL
3 CLK_NB_GFX GFX_REFCLKP LVDS_ENA_BL TP26 TPAD14-GP
1D8V_S0 SRN1KJ-7-GP CLK_NB_GFX# T1
L5 3 CLK_NB_GFX# GFX_REFCLKN RN10
1 2 VDDA18HTPLL TPAD14-GP CLK_NBGPP_CLK U1 1 8
B TP180 GPP_REFCLKP B
220ohm 200mA TPAD14-GP CLK_NBGPP_CLK# U2 2 7
TP181 GPP_REFCLKN
1
SBK160808T-221Y-N-GP C97 3 6
C86 DY SCD1U10V2KX-4GP V4 4 5 UMA
3 CLK_NB_GPPSB GPPSB_REFCLKP
SC1U10V2KX-1GP V3
3 CLK_NB_GPPSB#
2
GPPSB_REFCLKN
SRN4K7J-10-GP
19 CLK_DDC_EDID B9 I2C_CLK
A9 D9
68.00119.111
19 DAT_DDC_EDID
TPAD14-GP DDC_DATA0/AUX0N B8
I2C_DATA MIS. TMDS_HPD
D10 NB_DVI_HPD HDMI_DETECT# 21
TP188 DDC_CLK0/AUX0P DDC_DATA0/AUX0N HPD TP24 TPAD14-GP
1D8V_S0 TPAD14-GP DDC_CLK0/AUX0P A8
L1 TP239 DDC_DATA0/AUX0N DDC_CLK0/AUX0P
21 GMCH_HDMI_CLK GMCH_HDMI_CLK B7 D12 SUS_STAT# 2 1 3D3V_S0
VDDA18PCIEPLL GMCH_HDMI_DATA DDC_CLK1/AUX1P SUS_STAT# R29 10KR2J-3-GP
1 2 21 GMCH_HDMI_DATA A7 DDC_DATA1/AUX1N
220ohm 200mA AE8 RS780_DXP3_1
THERMALDIODE_P TP23 TPAD14-GP
1
RESERVED TESTMODE
STRP_DATA 0 *1
1
RS780_AUX_CAL C8 AUX_CAL R347
VCC_NB 1.1V 1.0V
1
1K8R2F-GP
R294
150R2F-1-GP
RS780M-GP-U2 RS780 SYMBOL
2
2
3D3V_S0
1
A R19 UMA A
DY 2K2R2J-2-GP
RN64
Wistron Corporation
2
STRP_DATA 1 4 LVDS_ENA_BL
35,53 BLON_IN 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2 3 GMCH_BL_ON
19,53 BRIGHTNESS_AMD Taipei Hsien 221, Taiwan, R.O.C.
SRN0J-10-GP-U
UMA Title
for TR ATi-RS880M_LVDS&CRT_(2/3)
Size Document Number Rev
A3
JV71-TR SA
Date: Monday, July 06, 2009 Sheet 9 of 61
5 4 3 2 1
5 4 3 2 1
ANB1F
1D1V_S0
0.6A per ANT Rev1.1, Page3
A25 VSSAHT1 VSSAPCIE1 A2
L36 D23 PART 6/6 B1
+1.1V_RUN_VDDHT 1D1V_S0 VSSAHT2 VSSAPCIE2
1 2 ANB1E E22 VSSAHT3 VSSAPCIE3 D3
PBY201209T-221Y-N-GP C655 C91 C659 C94 300mil Width G22 D5
VSSAHT4 VSSAPCIE4
1
SC4D7U6D3V3MX-2GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
220 ohm @ 100MHz,2A J17 VDDHT_1 VDDPCIE_1 A6 G24 VSSAHT5 VSSAPCIE5 E4
DY DY K16 VDDHT_2 PART 5/6 VDDPCIE_2 B6 G25 VSSAHT6 VSSAPCIE6 G1
1
L16 C6 C83 C49 C55 C68 C40 H19 G2
2
VDDHT_3 VDDPCIE_3 VSSAHT7 VSSAPCIE7
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
D M16 VDDHT_4 VDDPCIE_4 D6 DY DY J22 VSSAHT8 VSSAPCIE8 G4 D
SCD1U10V2KX-4GP
P16 E6 SC4D7U6D3V3MX-2GP L17 H7
2
VDDHT_5 VDDPCIE_5 VSSAHT9 VSSAPCIE9
R16 VDDHT_6 VDDPCIE_6 F6 L22 VSSAHT10 VSSAPCIE10 J4
T16 VDDHT_7 VDDPCIE_7 G7 L24 VSSAHT11 VSSAPCIE11 R7
VDDPCIE_8 H8 L25 VSSAHT12 VSSAPCIE12 L1
H18 VDDHTRX_1 VDDPCIE_9 J9 M20 VSSAHT13 VSSAPCIE13 L2
1D1V_S0 0.45A per ANT Rev1.1, Page3 G19 K9 N22 L4
L40 VDDHTRX_2 VDDPCIE_10 VSSAHT14 VSSAPCIE14
F20 VDDHTRX_3 VDDPCIE_11 M9 P20 VSSAHT15 VSSAPCIE15 L7
1 2 +1.1V_RUN_VDDHTRX E21 L9 1103 R19 M6
PBY201209T-221Y-N-GP C677 C674 C106 C102 VDDHTRX_4 VDDPCIE_12 VSSAHT16 VSSAPCIE16
D22 VDDHTRX_5 VDDPCIE_13 P9 10A per ANT Rev1.1, Page3 R22 VSSAHT17 VSSAPCIE17 N4
1
1
SC4D7U6D3V3MX-2GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
220 ohm @ 100MHz,2A B23 VDDHTRX_6 VDDPCIE_14 R9 +NB_VCORE R24 VSSAHT18 VSSAPCIE18 P6
SCD1U10V2KX-4GP
DY DY A23 VDDHTRX_7 VDDPCIE_15 T9 Per check list (Rev 0.02) R25 VSSAHT19 VSSAPCIE19 R1
V9 H20 R2
2
2
VDDPCIE_16 1D1V_S0 VSSAHT20 VSSAPCIE20
AE25 VDDHTTX_1 VDDPCIE_17 U9 RS780M: 1V ~ 1.1V, check PWR team U22 VSSAHT21 VSSAPCIE21 R4
AD24 VDDHTTX_2 V19 VSSAHT22 VSSAPCIE22 V7
GROUND
AC23 VDDHTTX_3 VDDC_1 K12 W22 VSSAHT23 VSSAPCIE23 U4
1D2V_S0 AB22 J14 W24 V8
VDDHTTX_4 VDDC_2 VSSAHT24 VSSAPCIE24
1
AA21 U16 C52 C36 C74 C90 C60 C79 C46 C85 C76 W25 V6
VDDHTTX_5 VDDC_3 VSSAHT25 VSSAPCIE25
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
L38 Y20 J11 DY DY DY DY Y21 W1
VDDHTTX_6 VDDC_4 VSSAHT26 VSSAPCIE26
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2 +1.2V_RUN_VDDHTTX W19 K15 AD25 W2
2
PBY201209T-221Y-N-GP C673 C111 C104 C95 C101 VDDHTTX_7 VDDC_5 VSSAHT27 VSSAPCIE27
V18 VDDHTTX_8 VDDC_6 M12 VSSAPCIE28 W4
1
1
SC4D7U6D3V3MX-2GP
SCD1U10V2KX-4GP
POWER
220 ohm @ 100MHz,2A U17 VDDHTTX_9 VDDC_7 L14 L12 VSS11 VSSAPCIE29 W7
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY DY T17 VDDHTTX_10 VDDC_8 L11 M14 VSS12 VSSAPCIE30 W8
R17 M13 N13 Y6
2
220 ohm @ 100MHz,2A C63 C62 C53 C57 C61 C47 H9 T15 W11
VDDA18PCIE_7 VDDC_19 VSS23
SC4D7U6D3V3KX-GP
SC4D7U6D3V3MX-2GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C651
RS780M-GP-U2
1
SC1U10V2KX-1GP
DY C65
C66 DY SCD1U10V2KX-4GP
2
SCD1U10V2KX-4GP
2
RS780 SYMBOL
ANB1D
B B
PAR 4 OF 6
AB12 MEM_A0 MEM_DQ0/DVO_VSYNC AA18 MEM_COMP_P and MEM_COMP_N trace
AE16 AA20
V11
MEM_A1 MEM_DQ1/DVO_HSYNC
AA19 width >=10mils and 10mils spacing from
MEM_A2 MEM_DQ2/DVO_DE
AE15 MEM_A3 MEM_DQ3/DVO_D0 Y19 other Signals in X,Y,Z directions
AA12 MEM_A4 MEM_DQ4 V17
AB16 MEM_A5 MEM_DQ5/DVO_D1 AA17
AB14 AA15 1D8V_S0
MEM_A6 MEM_DQ6/DVO_D2
AD14 MEM_A7 MEM_DQ7/DVO_D4 Y15
AD13 MEM_A8 MEM_DQ8/DVO_D3 AC20 1 R339 2
AD15 AD19 0R0402-PAD
MEM_A9 MEM_DQ9/DVO_D5
AC16 AE22
SBD_MEM/DVO_I/F
MEM_A10 MEM_DQ10/DVO_D6
AE13 MEM_A11 MEM_DQ11/DVO_D7 AC18
AC14 MEM_A12 MEM_DQ12 AB20
Y14 MEM_A13 MEM_DQ13/DVO_D9 AD22
MEM_DQ14/DVO_D10 AC22
AD16 MEM_BA0 MEM_DQ15/DVO_D11 AD21
AE17 +1.8V_IOPLLVDD18 1D1V_S0
MEM_BA1
AD17 MEM_BA2 MEM_DQS0P/DVO_IDCKP Y17
MEM_DQS0N/DVO_IDCKN W18 1 R341 2
W12 AD20 0R0402-PAD
MEM_RAS# MEM_DQS1P
Y12 MEM_CAS# MEM_DQS1N AE21
AD18 MEM_WE#
AB13 MEM_CS# MEM_DM0 W17
AB18 MEM_CKE MEM_DM1/DVO_D8 AE19
V14 MEM_ODT
IOPLLVDD18 AE23
V15 AE24 +1.1V_IOPLLVDD
MEM_CKP IOPLLVDD
A W14 MEM_CKN UMA A
IOPLLVSS AD23
AE12 MEM_COMPP
AD12 MEM_COMPN MEM_VREF AE18
Wistron Corporation
RS780M-GP-U2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ATi-RS880M_Side Port&PWR&GND(3/3)
Size Document Number Rev
A3
JV71-TR SA
Date: Monday, July 06, 2009 Sheet 10 of 61
5 4 3 2 1
5 4 3 2 1
R146 ASB1A
33R2J-2-GP
1 2 NB_RST# N2
SB700 P4 PCI_CLK0_R
9,26,35 PLT_RST1# A_RST# PCICLK0 TP204 TPAD14-GP
Part 1 of 5 P3 PCI_CLK1_R TP203 TPAD14-GP
C774 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_P0 PCICLK1 PCI_CLK2_R
PCI CLKS
8 ALINK_NBRX_SBTX_P0 1 2 V23 PCIE_TX0P PCICLK2 P1 1 2 PCI_CLK2 15
C777 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_N0 V22 P2 PCI_CLK3_R R144 10R0402-PAD
2 PCI_CLK3 15
8 ALINK_NBRX_SBTX_N0 PCIE_TX0N PCICLK3
C779 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_P1 V24 T4 PCI_CLK4_R R141 10R0402-PAD
2 CLK_PCI4 15
8 ALINK_NBRX_SBTX_P1 PCIE_TX1P PCICLK4
C787 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_N1 V25 T3 PCI_CLK5_R R137 10R0402-PAD
2 CLK_PCI_LOM 15
8 ALINK_NBRX_SBTX_N1 PCIE_TX1N PCICLK5/GPIO41
C794 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_P2 U25 R138 0R0402-PAD
8 ALINK_NBRX_SBTX_P2 PCIE_TX2P
EC42
EC41
EC39
EC40
C791 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_N2 U24
8 ALINK_NBRX_SBTX_N2 PCIE_TX2N
C802 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_P3 T23
8 ALINK_NBRX_SBTX_P3 PCIE_TX3P
C801 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_N3 T22 N1 PCIRST#_SB TP138 TPAD14-GP
8 ALINK_NBRX_SBTX_N3 PCIE_TX3N PCIRST#
1
D D
U22
2
PCIE_RX0N AD0
8 ALINK_NBTX_C_SBRX_P1 U19 PCIE_RX1P AD1 P7 DY DY DY DY
8 ALINK_NBTX_C_SBRX_N1 V19 PCIE_RX1N AD2 V4
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
8 ALINK_NBTX_C_SBRX_P2 R20 PCIE_RX2P AD3 T1
8 ALINK_NBTX_C_SBRX_N2 R21 PCIE_RX2N AD4 V3
8 ALINK_NBTX_C_SBRX_P3 R18 PCIE_RX3P AD5 U1
8 ALINK_NBTX_C_SBRX_N3 R17 PCIE_RX3N AD6 V1
1D2V_S0 +1.2V_RUN_PCIE_PVDD PCIE_VDDR V2
R143 AD7
1 2 562R2F-GP PCIE_CALRP T25 PCIE_CALRP AD8 T2
R147 1 2 2K05R2F-GP PCIE_CALRN T24 W1
PCIE_CALRN AD9
L24 >15mil Width 43 mA AD10 T9
1 2 P24 R6
PBY201209T-221Y-N-GP PCIE_PVDD AD11
R7
for TR
AD12
1
SC1U10V2KX-1GP
AD15
AD16 Y7
U73A
14
AD17 W8
AD18 V9
Y8 PLT_RST1#_B 1
AD19 PE_RST
AD20 AA8
PE_GPIO0
DY 3
AD21 Y4 2
AD22 Y3
Y2 TSLVC08APW -1-GP
PCI_AD23 15
7
AD23
AD24 AA2 PCI_AD24 15 73.07408.L16
AD25 AB4 PCI_AD25 15
3 CLK_PCIE_SB N25 PCIE_RCLKP/NB_LNK_CLKP AD26 AA1 PCI_AD26 15 2ND = 73.07408.L15
C N24 AB3 C
3D3V_S5 3 CLK_PCIE_SB# PCIE_RCLKN/NB_LNK_CLKN AD27 PCI_AD27 15
AD28 AB2 PCI_AD28 15
K23 AC1 3D3V_M92 3D3V_S5
NB_DISP_CLKP AD29 PCI_AD29 15
K22 NB_DISP_CLKN AD30 AC2 PCI_AD30 15
AD1
PCI INTERFACE
AD31
1
U16A
14
14
M25 NB_HT_CLKN CBE1# U7
1 AA7 10KR2F-2-GP
CBE2#
3 PLT_RST1#_B 32,33,36,52 P17 CPU_HT_CLKP CBE3# Y1 4
9,26,35 PLT_RST1# 2 M18 AA6 DY 6 M92_RST# 52
2
CPU_HT_CLKN FRAME#
DEVSEL# W5 48,59 RT8202_PGOOD_VGA 5
TSLVC08APW -1-GP M23 AA5
7
SLT_GFX_CLKP IRDY#
1
M22 Y5 DY C860 TSLVC08APW -1-GP
7
SLT_GFX_CLKN TRDY# SCD1U10V2KX-4GP
PAR U6 73.07408.L16
73.07408.L16 J19 W6 2ND = 73.07408.L15
2
GPP_CLK0P STOP#
2ND = 73.07408.L15 J18 GPP_CLK0N PERR# W4
3RD = 73.07408.02B SERR# V7
3D3V_S0
L20 AC3 PCI_REQ#0 TP124 TPAD14-GP
GPP_CLK1P REQ0# PCI_REQ#1
for TR L19 GPP_CLK1N REQ1# AD4 TP119 TPAD14-GP
AB7 PCI_REQ#2 TP198 TPAD14-GP
REQ2#
1
M19 AE6 PCI_REQ#3 TP115 TPAD14-GP
For SB710 M20
GPP_CLK2P
GPP_CLK2N
REQ3#/GPIO70
REQ4#/GPIO71 AB6 PCI_REQ#4 TP197 TPAD14-GP DY R511
CLOCK GENERATOR
AD2 PCI_GNT#0 TP117 TPAD14-GP 10KR2J-3-GP
GNT0# PCI_GNT#1
N22 GPP_CLK3P GNT1# AE4 TP121 TPAD14-GP
P22 AD5 PCI_GNT#2 TP118 TPAD14-GP
2
R440 GPP_CLK3N GNT2# PE_GPIO1
1 DY 2 GNT3#/GPIO72 AC6 PE_GPIO1 43,59
R162 10MR2J-L-GP 2 1CLK_SB_14M_1L18 AE5 PCI_GNT#4 TP120 TPAD14-GP
3 CLK_SB_14M 25M_48M_66M_OSC GNT4#/GPIO73
0R2J-2-GP AD6
CLKRUN# PM_CLKRUN# 35
2 1 32K_X1 V5 PCI_LOCK# TP201 TPAD14-GP
LOCK#
1
B C424 SC15P50V2JN-2-GP TP209 25M_X1 B
J21 25M_X1
TPAD14-GP AD3 INT_PIRQE# TPAD14-GP TP116 R126
INTE#/GPIO33 INT_PIRQF# 10KR2J-3-GP
INTF#/GPIO34 AC4 TPAD14-GP DY TP191 DY
AE2 INT_PIRQG# TPAD14-GP TP123
INTG#/GPIO35
1
2
25M_X2 INTH#/GPIO36
3
LPCCLK1 EC48
A3 X1 LAD0 H24 LPC_LAD0 35,36 1 DY 2
H23 EC47 1 DY 2SC22P50V2JN-4GP
LPC_LAD1 35,36
2
LAD1 SC22P50V2JN-4GP
J25
RTC XTAL
2 1 32K_X2 B3 H25
C433 X2 LFRAME# LDRQ0# LPC_LFRAME# 35,36 ARTC1
LDRQ0# H22 TP213 TPAD14-GP
SC15P50V2JN-2-GP AB8 LDRQ1#
LDRQ1#/GNT5#/GPIO68 TP193 TPAD14-GP
AD7 PCI_REQ#5 1
BMREQ#/REQ5#/GPIO65 PCI_REQ#5 12 PWR
SERIRQ V15 INT_SERIRQ 35 2 GND
NP1 NP1
1
F23 RTC_AUX_S5 C409 NP2
9 NB_ALLOW _LDTSTOP ALLOW_LDTSTP RTC_CLK 15,34 NP2
SCD1U16V2ZY-2GP
6 PROCHOT#_SB F24 PROCHOT# RTCCLK C3 DY
6,51 CPU_PW RGD F22 C2 INTRUDER# TPAD14-GP
TP148
2
LDT_PG INTRUDER_ALERT# RTC_AUX_S5_R BAT-CON2-1-GP-U
CPU
510R2J-1-GP
1
1
C407 C408
SC1U10V2KX-1GP
SCD1U16V2ZY-2GP
SB710-GP
2
2
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ATi-SB710_PCIE&PCI_(1/5)
Size Document Number Rev
A3
JV71-TR SA
Date: Monday, July 06, 2009 Sheet 11 of 61
5 4 3 2 1
5 4 3 2 1
RSMRST#_KBC
Reserve for DY
1
9,41 NB_PW RGD 2 R422 1 NB_PW RGD_R ASB1D
0R0402-PAD EC963
EMI SC1KP50V2KX-1GP
SB700 Part 4 of 5
2
1D8V_S0 E1 TP143 1ICH_PME#
0408 E2 TP142 1 RI#
PCI_PME#/GEVENT4#
RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC C8 CLK48_USB
CLK48_USB 3
H7 TP211 1 S2# SLP_S2/GPM9#
F5 G8 USB_PCOMP 1 2
34,35,41,43,48,59,60 PM_SLP_S3# SLP_S3# USB_RCOMP R167
G1 1 DY 2CLK48_USB_R2 C432
1 DY2
USB MISC
NB_PW RGD 35,47 PM_SLP_S5# SLP_S5# 11K8R2F-GP R161
1 2 H2
USB 1.1
GA20IN/GEVENT0# USB_FSD12P signals in X, Y, Z directions.
35 KBRCIN# W15 KBRST#/GEVENT1# USB_FSD12N E8
35 ECSCI#_1 K4 LPC_PME#/GEVENT3#
3D3V_S5 ECSMI#_KBC K24 H11 USBPP10 32
TPAD14-GP GEVENT5# LPC_SMI#/EXTEVNT1# USB_HSD11P
TP141 F1 S3_STATE/GEVENT5# USB_HSD11N J10 USBPN10 32
1 DY 2 SB_TEST2 TPAD14-GP SYS_RST# J2
TP139 SYS_RESET#/GPM7#
R445 2K2R2F-GP 26 PCIE_W AKE# H6 E11 USBPP8 19
SB_TEST1 EC_TMR WAKE#/GEVENT8# USB_HSD10P
1 DY 2 35 EC_TMR F2 BLINK/GPM6# USB_HSD10N F11 USBPN8 19 USB
R443 2K2R2F-GP SMB_ALERT# J6
SB_TEST0 3D3V_S0 NB_PW RGD_R SMBALERT#/THRMTRIP#/GEVENT2#
1 DY 2 W14 NB_PWRGD USB_HSD9P A11 Pair Device
R442 2K2R2F-GP B11
RSMRST#_KBC USB_HSD9N
35 RSMRST#_KBC D3 RSMRST#
USB_HSD8P C10 USBPP3 25 11 CardReader
2
1 DY 2 ICH_PME# D10
USB_HSD8N USBPN3 25
R154 10KR2J-3-GP R410 10 WEBCAM
1 DY 2 PCIE_W AKE# 1KR2F-3-GP 37 FP_ID FP_ID AE18 G11
SATA_IS0#/GPIO10 USB_HSD7P USBPP1 25
R444 10KR2J-3-GP GPIO6 AD18 H12 9 NC
TP190 CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N USBPN1 25
1 DY 2 SMB_ALERT# TPAD14-GP GPIO4 AA19
TP194
1
R441 10KR2J-3-GP GPIO0/HDMI TPAD14-GP SMARTVOLT/SATA_IS2#/GPIO4
W17 CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P E12 USBPP2 25 8 USB2 OCP1#
V17 E14
2009/04/10for TR 59 MXM_PW R_EN CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N USBPN2 25
RN97 W20 7 USBCN1
PM_SLP_S5# CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
8 1 28 ACZ_SPKR W21 SPKR/GPIO2 USB_HSD5P C12 USBPP5 24
USB 2.0
7 2 ECSCI#_1 SMBC0_SB AA18 D12 USBPN5 24 6 USB1
ECSW I# SMBD0_SB W18 SCL0/GPOC0# USB_HSD5N
6 3 SDA0/GPOC1#
5 4 PM_SLP_S3# SMB_CLK K1 B12 5 Bluetooth
C SMB_DATA SCL1/GPOC2# USB_HSD4P C
K2 SDA1/GPOC3# USB_HSD4N A12
GPIO
SRN10KJ-6-GP TPAD14-GP DDC1_SCL AA20 4 NC
TP196 DDC1_SCL/GPIO9
TPAD14-GP DDC1_SDA Y18 G12 USBPP6 37
TP199 DDC1_SDA/GPIO8 USB_HSD3P
TPAD14-GP SATA_DET# C1 G14 USBPN6 37 3 Fringer print
TP149 LLB#/GPIO66 USB_HSD3N
RN98 TPAD14-GP GPIO5 Y19
TP200 SHUTDOWN#/GPIO5
3D3V_S5 8 1 RSMRST#_KBC TPAD14-GP
TP218
GEVENT7# G5 DDR3_RST#/GEVENT7# USB_HSD2P H14 2 NC
7 2 ECSMI#_KBC H15
USB_HSD2N
3D3V_S0 6 3 PCI_REQ#5 PCI_REQ#5 11 1 MINIC1
5 4 USB_HSD1P A13 USBPP7 33
USB_HSD1N B13 USBPN7 33 0 USB3 OCP0#
SRN10KJ-6-GP
35 ECSW I# USB_HSD0P B14 USBPP0 25
B9 USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N A14 USBPN0 25
Close to SB700 TPAD14-GP USB_OC#5 B8
TP151 USB_OC5#/IR_TX0/GPM5#
25 USB_OC#4 USB_OC#4 A8 A18
USB_OC4#/IR_RX0/GPM4# IMC_GPIO8
USB OC
RN49 A9 B18
SRN33J-5-GP-U TPAD14-GP USB_OC#2 USB_OC3#/IR_RX1/GPM3# IMC_GPIO9
TP220 E5 USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10 F21
28 ACZ_BITCLK 1 4 USB_OC#1 F8 D21
25 USB_OC#1 USB_OC1#/GPM1# SCL2/IMC_GPIO11
31 ACZ_BTCLK_MDC 2 3 25 USB_OC#0 E4 USB_OC0#/GPM0# SDA2/IMC_GPIO12 F19
RN47 E20
SRN33J-5-GP-U ACZ_BIT_CLK SCL3_LV/IMC_GPIO13
31 ACZ_SDATAOUT_MDC 1 4 M1 AZ_BITCLK SDA3_LV/IMC_GPIO14 E21
28 ACZ_SDATAOUT 2 3 ACZ_SDATAOUT_R M2 E19
AZ_SDOUT IMC_PWM1/IMC_GPIO15
28 ACZ_SDATAIN0 J7 AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16 D19 SB_GPO16 15
31 ACZ_SDATAIN1 J8 AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17 E18 SB_GPO17 15
HD AUDIO
TPAD14-GP ACZ_SDIN2 L8
TP206 AZ_SDIN2/GPIO44
RN96 TPAD14-GP ACZ_SDIN3 M3 G20
TP205 AZ_SDIN3/GPIO46 IMC_GPIO18
SRN33J-5-GP-U ACZ_SYNC_R
28,31 ACZ_SYNC
28,31 ACZ_RST#
1
2
4
3
L6
ACZ_RST#_R M4 AZ_SYNC IMC_GPIO19 G21
D25
Strap Pin / define to use LPC or SPI ROM
TP207 GPM8# L5 AZ_RST# IMC_GPIO20
1 AZ_DOCK_RST#/GPM8# IMC_GPIO21 D24
INTEGRATED uC
B B
IMC_GPIO22 C25
2
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
10KR2J-3-GP
10KR2J-3-GP
DY TO STRAPS
1
DY DY B24
1
IMC_GPIO26
DY DY DY DY DY B23
1
IMC_GPIO27
IMC_GPIO28 A23
IMC_GPIO29 C22
IMC_GPIO30 A22
IMC_GPIO31 B22
IMC_GPIO32 B21
IMC_GPIO33 A21
TP212 1 IMC_GPIO0 H19 D20
3D3V_S0 TP214 IMC_GPIO1 IMC_GPIO0 IMC_GPIO34
1 H20 IMC_GPIO1 IMC_GPIO35 C20
INTEGRATED uC
3D3V_S5 3D3V_S0 R152 TP216 1 IMC_GPIO2 H21 A20
IDE_RST# SPI_CS2#/IMC_GPIO2 IMC_GPIO36
1 DY 2 F25 IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37 B20
NEWCARD /GLAN IMC_GPIO38 B19
10KR2J-3-GP TP221 1 IMC_GPIO4 D22 A19
IMC_GPIO4 IMC_GPIO39
5
6
7
8
SB710-GP
26,33 SMB_CLK
26,33 SMB_DATA
A 3,16,17 SMBC0_SB UMA A
3,16,17 SMBD0_SB
Wistron Corporation
1
DY DY
Title
ATi-SB710_USB&GPIO_(2/5)
Size Document Number Rev
A3
JV71-TR SA
Date: Monday, July 06, 2009 Sheet 12 of 61
5 4 3 2 1
5 4 3 2 1
ATA 66/100/133
AE12 SATA_RX2N IDE_D3/GPIO18 AC22
AD12 AD21 CLK_ID_0
SATA_RX2P IDE_D4/GPIO19 CLK_ID_1
IDE_D5/GPIO20 AE20
AD13 SATA_TX3P IDE_D6/GPIO21 AB20 Dummy CKG select
SERIAL ATA
AE13 SATA_TX3N IDE_D7/GPIO22 AD19
IDE_D8/GPIO23 AE19
AB14 SATA_RX3N IDE_D9/GPIO24 AC20
AC14 AD20 3D3V_S0
SATA_RX3P IDE_D10/GPIO25
IDE_D11/GPIO26 AE21
AE14 SATA_TX4P IDE_D12/GPIO27 AB22
AD14 SATA_TX4N IDE_D13/GPIO28 AD22
1
IDE_D14/GPIO29 AE23
R407 R412
AD15
AE15
SATA_RX4N IDE_D15/GPIO30 AC23
10KR2J-3-GP 10KR2J-3-GP
CLK_ID
SATA_RX4P
C
DY DY (1,0) C
2
SATA_TX5P
C373
SC15P50V2JN-2-GP
AC16 SATA_TX5N SB_SPI_MISO
CLK_ID_1
CLK_ID_0
ICS: 0,0
G6 TP217 TPAD14-GP
2 1 AE16 SATA_RX5N
SPI_DI/GPIO12
SPI_DO/GPIO11 D2 SPI_MOSI_R TP146 TPAD14-GP SEG: 0,1
R434 AD16 D1 ICH_SPICLK
SATA_RX5P SPI_CLK/GPIO47 TP144 TPAD14-GP RTM: 1,0
1
1
1KR2F-3-GP F4 SB_SPI_HOLD TP215 TPAD14-GP
SPI_HOLD#/GPIO31
SPI ROM
XTAL-25MHZ-96GP X3 R127 1 2 SATA_CAL V12 F3 ICH_SPICS0# TP219 TPAD14-GP R416 R413
10MR2J-L-GP SATA_CAL SPI_CS#/GPIO32 10KR2J-3-GP 10KR2J-3-GP
82.30020.791 DY
SATA_X1 Y12 U15 LAN_RST# TP202 TPAD14-GP DY
2
2
SATA_X2_R SATA_X2 ROM_RST#/GPIO14
2 1 1 2 AA12 SATA_X2
R128 300R2J-4-GP M8
C367 FANOUT0/GPIO3
38 MEDIA_LED# W11 SATA_ACT#/GPIO67 FANOUT1/GPIO48 M5
SC15P50V2JN-2-GP M7
FANOUT2/GPIO49
93 mA
1D2V_S0 PLLVDD_SATA AA11 P5
PLLVDD_SATA FANIN0/GPIO50
SATA PWR
>15mil Width FANIN1/GPIO51 P8 2009/04/09 ALL DY
1 R426 2 W12 XTLVDD_SATA FANIN2/GPIO52 R8
0R0603-PAD
1
C784 C785 C6
TEMP_COMM
SCD1U10V2KX-4GP
SC1U10V2KX-1GP DY B6
TEMPIN0/GPIO61
A6
2
TEMPIN1/GPIO62
TEMPIN2/GPIO63 A5
HW MONITOR
TEMPIN3/TALERT#/GPIO64 B5 ALERT# 34
A4 PSW _CLR#
VIN0/GPIO53
VIN1/GPIO54 B4
3D3V_S0 C4
B XTLVDD_SATA VIN2/GPIO55 B
VIN3/GPIO56 D4
>15mil Width VIN4/GPIO57 D5
1 R428 2 VIN5/GPIO58 D6
0R0603-PAD A7 PSW _CLR#
VIN6/GPIO59
1
C778 B7
VIN7/GPIO60
2
SC1U10V2KX-1GP
AVDD_HW M 3D3V_S5 G106
2
>15mil Width
AVDD F6 1 R163 2 GAP-OPEN
0R0603-PAD
1
G7 C418
AVSS
1
C423
SCD1U10V2KX-4GP
DY
SC2D2U6D3V2MX-GP
SB710-GP
2
3D3V_S0
RN101
8 1 MEDIA_LED# Layout connect to Cap then GND
7 2 PSW _CLR#
6 3 ALERT#
5 4
SRN10KJ-6-GP
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ATi-SB710_SATA-IDE_(3/5)
Size Document Number Rev
A3 JV71-TR SB
Date: Monday, July 06, 2009 Sheet 13 of 61
5 4 3 2 1
5 4 3 2 1
ASB1C
ASB1E
131 mA SB700 510 mA 1D2V_S0
L9 VDDQ_1 VDD_1 L15 >100mil Width
M9 VDDQ_2 Part 3 of 5 VDD_2 M12 SB700 Part 5 of 5
3D3V_S0 T15 M14 A2
VDDQ_3 VDD_3 VSS_1
1
U9 N13 C806 C805 C815 C814 C386 A25
VDDQ_4 VDD_4 VSS_2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U6D3V3MX-GP
3D3V_S0
CORE S0
U16 VDDQ_5 VDD_5 P12 DY DY DY VSS_3 B1
U17
PCI/GPIO I/O
P14 D7
2
VDDQ_6 VDD_6 VSS_4
V8 VDDQ_7 VDD_7 R11 T10 AVSS_SATA_1 VSS_5 F20
W7 VDDQ_8 VDD_8 R15 U10 AVSS_SATA_2 VSS_6 G19
1
1
C435 C781 C800 C799 C807 C773 Y6 T16 U11 H8
VDDQ_9 VDD_9 AVSS_SATA_3 VSS_7
SC10U6D3V3MX-GP
SC4D7U6D3V3KX-GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY DY AA4 VDDQ_10 U12 AVSS_SATA_4 VSS_8 K9
D AB5 V11 K11 D
2
2
VDDQ_11 AVSS_SATA_5 VSS_9
AB21 VDDQ_12 V14 AVSS_SATA_6 VSS_10 K16
W9 AVSS_SATA_7 VSS_11 L4
Y9 AVSS_SATA_8 VSS_12 L7
>50mil Width CKVDD 1D2V_S0 Y11 L10
AVSS_SATA_9 VSS_13
Y14 AVSS_SATA_10 VSS_14 L11
Y20 VDD33_18_1 CKVDD_1.2V_1 L21 1 R148 2 Y17 AVSS_SATA_11 VSS_15 L12
71 mA AA21 L22 0R0402-PAD AA9 L14
VDD33_18_2 CKVDD_1.2V_2 AVSS_SATA_12 VSS_16
1
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
C403 C402 C401 C400
IDE/FLSH I/O
CLKGEN I/O
AA22 VDD33_18_3 CKVDD_1.2V_3 L24 AB9 AVSS_SATA_13 VSS_17 L16
AE25 VDD33_18_4 CKVDD_1.2V_4 L25 DY DY DY DY AB11 AVSS_SATA_14 VSS_18 M6
AB13 M10
2
1D2V_S0 AVSS_SATA_15 VSS_19
AB15 AVSS_SATA_16 VSS_20 M11
PCIE_VDDR AB17 M13
L25 600 mA AVSS_SATA_17 VSS_21
>100mil Width AC8 AVSS_SATA_18 VSS_22 M15
1 2 AD8 AVSS_SATA_19 VSS_23 N4
PBY201209T-221Y-N-GP AE8 N12
AVSS_SATA_20 VSS_24
1
1
220 ohm 2A C394 C809 C389 C395 C396 N14
POWER VSS_25
SC4D7U6D3V3MX-2GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY DY VSS_26 P6
P9
2
2
3D3V_S5 VSS_27
VSS_28 P10
P18 32 mA >20mil Width A15 P11
PCIE_VDDR_1 AVSS_USB_1 VSS_29
P19 PCIE_VDDR_2 B15 AVSS_USB_2 VSS_30 P13
P20 PCIE_VDDR_3 C14 AVSS_USB_3 VSS_31 P15
1
A-LINK I/O
P21 A17 C404 C414 C419 C405 D8 R1
PCIE_VDDR_4 S5_3.3V_1 AVSS_USB_4 VSS_32
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R22 PCIE_VDDR_5 S5_3.3V_2 A24 DY DY D9 AVSS_USB_5 VSS_33 R2
SC4D7U6D3V3MX-2GP
R24 B17 D11 R4
2
PCIE_VDDR_6 S5_3.3V_3 AVSS_USB_6 VSS_34
R25 PCIE_VDDR_7 S5_3.3V_4 J4 D13 AVSS_USB_7 VSS_35 R9
3.3V_S5 I/O
GROUND
S5_3.3V_5 J5 D14 AVSS_USB_8 VSS_36 R10
S5_3.3V_6 L1 D15 AVSS_USB_9 VSS_37 R12
C L2 E15 R14 C
1D2V_S0 AVDD_SATA S5_3.3V_7 AVSS_USB_10 VSS_38
>50mil Width F12 AVSS_USB_11 VSS_39 T11
L23 567 mA F14 T12
AVSS_USB_12 VSS_40
1 2 AA14 AVDD_SATA_1 G9 AVSS_USB_13 VSS_41 T14
PBY201209T-221Y-N-GP AB18 113 mA 1D2V_S5 H9 U4
AVDD_SATA_4 AVSS_USB_14 VSS_42
1
SATA I/O
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
CORE S5
DY DY AC18 G4 J11 Y21
2
1
AD17 C427 C431 C422 C417 C434 J12 AB1
2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AE17 AVDD_SATA_7
197 mA DY DY SC10U6D3V3MX-GP J14 AVSS_USB_19 VSS_47 AB19
DY DY J15 AB25
2
AVSS_USB_20 VSS_48
USB_PHY_1.2V_1 A10 K10 AVSS_USB_21 VSS_49 AE1
USB_PHY_1.2V_2 B10 K12 AVSS_USB_22 VSS_50 AE24
K14 AVSS_USB_23
K15 AVSS_USB_24
PCIE_CK_VSS_9 P23
PCIE_CK_VSS_10 R16
5V_S0 R19
R406 PCIE_CK_VSS_11
Use Plane Shape for +3.3V_AVDD_USB >10mil Width PCIE_CK_VSS_12 T17
A16 AE7 V5_VREF 2 1 U18
AVDDTX_0 V5_VREF PCIE_CK_VSS_13
B16 AVDDTX_1 H18 PCIE_CK_VSS_1 PCIE_CK_VSS_14 U20
1
3D3V_S5 C16 J16 AVDDCK_3D3V C769 C766 1KR2F-3-GP J17 V18
AVDDTX_2 AVDDCK_3.3V PCIE_CK_VSS_2 PCIE_CK_VSS_15
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
L27 658 mA D16 AVDDTX_3 DY J22 PCIE_CK_VSS_3 PCIE_CK_VSS_16 V20
1 2 AVDD_USB D17 K17 AVDDK_1D2V 3D3V_S5 K25 V21
2
AVDDTX_4 AVDDCK_1.2V PCIE_CK_VSS_4 PCIE_CK_VSS_17
PLL
1
C428 C429 C416 C415 C420 C421 F18 C437 C436 P16 W25
AVDDRX_2 PCIE_CK_VSS_8 PCIE_CK_VSS_21
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
B DY DY DY G15 AVDDRX_3 DY RB751V-40-2-GP B
G17 >15mil Width F9 L17
2
2
AVDDRX_4 AVSSC AVSSCK
G18 AVDDRX_5 83.R2004.B8F
2ND = 83.R0304.A8F
SB710-GP
SB710-GP
47 mA 3D3V_S0
>15mil Width
AVDDCK_3D3V 2 L26 1
0R0603-PAD
1
C425 C426
SCD1U10V2KX-4GP SC1U10V2KX-1GP DY
2
2
62 mA 1D2V_S0
AVDDK_1D2V
>15mil Width L52 2
1
0R0603-PAD
1
1
C816 C817
SCD1U10V2KX-4GP DY SC1U10V2KX-1GP
A UMA A
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ATi-SB710_POWER&GND_(4/5)
Size Document Number Rev
A3 JV71-TR SB
Date: Monday, July 06, 2009 Sheet 14 of 61
5 4 3 2 1
5 4 3 2 1
REQUIRED STRAPS
REQUIRED SYSTEM STRAPS
D D
3D3V_S0 3D3V_S5
1
DY DY DY DY DY DY DY DY DY
2
2
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
2K2R2F-GP
PCI_CLK2 11
PCI_CLK3 11
CLK_PCI4 11
CLK_PCI_LOM 11
PCLK_FW H 11,36
PCLK_KBC 11,35
RTC_CLK 11,34
C ACZ_RST#_R 12 C
SB_GPO17 12
1
2
R135 R139 R159 R429
2
1
1
RN52
1
2
RN46 SRN2K2J-1-GP
SRN10KJ-5-GP DY DY DY
RN50
SRN10KJ-5-GP
DEBUG STRAPS
2
4
3
3
4
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
SB_GPO16 12
4
3
1
TPAD14-GP TP137
R166 TPAD14-GP PCI_AD23 11
TP136 PCI_AD24 11
DY 2K2R2F-GP TPAD14-GP
TPAD14-GP
TP195 PCI_AD25 11
TP135 PCI_AD26 11
TPAD14-GP TP134
2
TPAD14-GP PCI_AD27 11
TP133 PCI_AD28 11
TPAD14-GP TP130
TPAD14-GP PCI_AD29 11
TP129 PCI_AD30 11
B
CLK_PCI_LOM PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD30 B
PCI_CLK2 PCI_CLK3 CLK_PCI4 PCLK_FWH PCLK_KBC RTCCLK AZ_RST# SB_GPO17 , SB_GPO16 PCI_AD29
ROM TYPE: USE USE PCI USE ACPI USE IDE USE DEFAULT
PULL WatchDOG USE CLKGEN INTERNAL ENABLE PCI PULL LONG PLL BCLK PLL PCIE STRAPS Reserved
HIGH (NB_PWRGD) DEBUG IMC ENABLED RTC ROM BOOT H, H = Reserved HIGH RESET
ENABLED STRAPS ENABLED
(DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT)
(Use Internal) DEFAULT H, L = SPI ROM Reserved
RESERVED
EXT. RTC DISABLE PCI USE BYPASS BYPASS BYPASS IDE USE EEPROM Reserved
PULL WatchDog IGNORE IMC CLKGEN (PD on X1, L, H = LPC ROM DEFAULT PULL
ROM BOOT SHORT PCI PLL ACPI PLL PCIE STRAPS
LOW (NB_PWRGD) DEBUG DISABLED DISABLED apply LOW RESET BCLK
DISABLED STRAPS (Use External) 32KHz to DEFAULT L, L = FWH ROM
DEFAULT DEFAULT DEFAULT DEFAULT RTC_CLK)
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ATi-SB710_STRAPPING_(5/5)
Size Document Number Rev
A3 JV71-TR SA
Date: Monday, July 06, 2009 Sheet 15 of 61
5 4 3 2 1
5 4 3 2 1
ADIMM2
1
25 198 C458 C456
5 MEM_MA_DATA9 DQ9 SA0
SC2D2U6D3V2MX-GP
35 200 DY SCD1U10V2KX-4GP
5 MEM_MA_DATA10 DQ10 SA1
37 DY
2
5 MEM_MA_DATA11 DQ11
20 50
5
5
MEM_MA_DATA12
MEM_MA_DATA13 22
36
DQ12
DQ13
NC#50
NC#69 69
83
(A0)
5 MEM_MA_DATA14 DQ14 NC#83
5 MEM_MA_DATA15 38 DQ15 NC#120 120
5 MEM_MA_DATA16 43 DQ16 NC#163/TEST 163
45 1D8V_S3
5 MEM_MA_DATA17 DQ17
55
NORMAL TYPE
5 MEM_MA_DATA18 DQ18
5 MEM_MA_DATA19 57 DQ19 VDD 81
C
5 MEM_MA_DATA20 44 DQ20 VDD 82 C
1
64 117 C338
5 MEM_MA_DATA29 DQ29 VDD
74 118 SC1D5P50V2CN-1GP
5 MEM_MA_DATA30 DQ30 VDD
76
2
5 MEM_MA_DATA31 DQ31
123 3 MEM_MA_CLK0_N
5 MEM_MA_DATA32 DQ32 VSS
5 MEM_MA_DATA33 125 8
DQ33 VSS MEM_MA_CLK1_P
5 MEM_MA_DATA34 135 9
DQ34 VSS
5 MEM_MA_DATA35 137 12
DQ35 VSS
1
124 15 C331
5 MEM_MA_DATA36 DQ36 VSS
126 18 SC1D5P50V2CN-1GP
5 MEM_MA_DATA37 DQ37 VSS
134 21
2
5 MEM_MA_DATA38 DQ38 VSS MEM_MA_CLK1_N
5 MEM_MA_DATA39 136 24
DQ39 VSS
5 MEM_MA_DATA40 141 27
DQ40 VSS
5 MEM_MA_DATA41 143 28
DQ41 VSS
5 MEM_MA_DATA42 151 33
DQ42 VSS
5 MEM_MA_DATA43 153 34
DQ43 VSS
5 MEM_MA_DATA44 140 39
DQ44 VSS
5 MEM_MA_DATA45 142 40
DQ45 VSS
5 MEM_MA_DATA46 152 41
DQ46 VSS
5 MEM_MA_DATA47 154 42
DQ47 VSS
5 MEM_MA_DATA48 157 47
DQ48 VSS
5 MEM_MA_DATA49 159 48
DQ49 VSS
5 MEM_MA_DATA50 173 53
DQ50 VSS
5 MEM_MA_DATA51 175 54
DQ51 VSS
B 5 MEM_MA_DATA52 158 59 B
DQ52 VSS
5 MEM_MA_DATA53 160 60
DQ53 VSS
174 65
DDR_VREF
5 MEM_MA_DATA54 DQ54 VSS
5 MEM_MA_DATA55 176 66
DQ55 VSS
5 MEM_MA_DATA56 179 71
DQ56 VSS
5 MEM_MA_DATA57 181 72
DQ57 VSS
5 MEM_MA_DATA58 189 77
DQ58 VSS
5 MEM_MA_DATA59 191 78
DQ59 VSS
5 MEM_MA_DATA60 180 121
DQ60 VSS 1D8V_S3 VREF_DDR_MEM
5 MEM_MA_DATA61 182 122
DQ61 VSS
5 MEM_MA_DATA62 192 127
DQ62 VSS
5 MEM_MA_DATA63 194 128
DQ63 VSS
132
VSS
1
11 133 C844
5 MEM_MA_DQS0_N DQS0# VSS
29 138 SCD1U10V2KX-4GP
5 MEM_MA_DQS1_N DQS1# VSS
49 139 RN100
2
5 MEM_MA_DQS2_N DQS2# VSS
5 MEM_MA_DQS3_N 68 144 1 4
DQS3# VSS
5 MEM_MA_DQS4_N 129 145 2 3
DQS4# VSS
1
146 149 C834 C832
5 MEM_MA_DQS5_N DQS5# VSS
SCD1U10V2KX-4GP
167 150 SRN1KJ-7-GP
5 MEM_MA_DQS6_N DQS6# VSS
186 155 SC1KP50V2KX-1GP
2
5 MEM_MA_DQS7_N DQS7# VSS
156
VSS
5 MEM_MA_DQS0_P 13 161
DQS0 VSS
5 MEM_MA_DQS1_P 31 162
DQS1 VSS
5 MEM_MA_DQS2_P 51 165
DQS2 VSS
5 MEM_MA_DQS3_P 70 168
DQS3 VSS
131 171
5
5
MEM_MA_DQS4_P
MEM_MA_DQS5_P 148
DQS4
DQS5
VSS
VSS
172 LAYOUT: Locate close to
169 177
5
5
MEM_MA_DQS6_P
MEM_MA_DQS7_P 188
DQS6
DQS7
VSS
VSS
178 DIMM
183
VSS
5,18 MEM_MA0_ODT0 114 OTD0 VSS 184
A 5,18 MEM_MA0_ODT1 119 OTD1 VSS 187 A
VSS 190
VREF_DDR_MEM 1 VREF VSS 193 UMA
2 VSS VSS 196
1
SCD1U10V2KX-4GP
C845
SC2D2U6D3V2MX-GP
C847 202 GND GND 201 Wistron Corporation
LOW 5.2 mm
2
ADIMM1
1
25 198 DIMM2_SA1 1 2 C507 C499
5 MEM_MB_DATA9 DQ9 SA0
SC2D2U6D3V2MX-GP
35 200 R203 10KR2J-3-GP DY DY SCD1U10V2KX-4GP
5 MEM_MB_DATA10 DQ10 SA1
37
2
5 MEM_MB_DATA11 DQ11
20 50
5 MEM_MB_DATA12
5 MEM_MB_DATA13 22
36
DQ12
DQ13
NC#50
NC#69 69
83
(A2)
5 MEM_MB_DATA14 DQ14 NC#83
5 MEM_MB_DATA15 38 DQ15 NC#120 120
5 MEM_MB_DATA16 43 DQ16 NC#163/TEST 163
45 1D8V_S3
5 MEM_MB_DATA17 DQ17
5 MEM_MB_DATA18 55 DQ18
5 MEM_MB_DATA19 57 DQ19 VDD 81
5 MEM_MB_DATA20 44 DQ20 VDD 82 PLACE CLOSE TO PROCESSOR
5 MEM_MB_DATA21 46 DQ21 VDD 87 WITHIN 1.5 INCH
5 MEM_MB_DATA22 56 DQ22 VDD 88
C C
5 MEM_MB_DATA23 58 DQ23 VDD 95
61 96 MEM_MB_CLK0_P
5 MEM_MB_DATA24 DQ24 VDD
5 MEM_MB_DATA25 63 DQ25 VDD 103
1
73 104 C348
5 MEM_MB_DATA26 DQ26 VDD
75 111 SC1D5P50V2CN-1GP
5 MEM_MB_DATA27 DQ27 VDD
62 112
2
5 MEM_MB_DATA28 DQ28 VDD
64 117 MEM_MB_CLK0_N
5 MEM_MB_DATA29 DQ29 VDD
5 MEM_MB_DATA30 74 118
DQ30 VDD MEM_MB_CLK1_P
5 MEM_MB_DATA31 76
DQ31
5 MEM_MB_DATA32 123 3
DQ32 VSS
1
125 8 C340
5 MEM_MB_DATA33 DQ33 VSS
135 9 SC1D5P50V2CN-1GP
5 MEM_MB_DATA34 DQ34 VSS
137 12
2
5 MEM_MB_DATA35 DQ35 VSS MEM_MB_CLK1_N
5 MEM_MB_DATA36 124 15
DQ36 VSS
126 18
NORMAL TYPE
5 MEM_MB_DATA37 DQ37 VSS
5 MEM_MB_DATA38 134 21
DQ38 VSS
5 MEM_MB_DATA39 136 24
DQ39 VSS
5 MEM_MB_DATA40 141 27
DQ40 VSS
5 MEM_MB_DATA41 143 28
DQ41 VSS
5 MEM_MB_DATA42 151 33
DQ42 VSS
5 MEM_MB_DATA43 153 34
DQ43 VSS
5 MEM_MB_DATA44 140 39
DQ44 VSS
5 MEM_MB_DATA45 142 40
DQ45 VSS
5 MEM_MB_DATA46 152 41
DQ46 VSS
5 MEM_MB_DATA47 154 42
DQ47 VSS
5 MEM_MB_DATA48 157 47
DQ48 VSS
5 MEM_MB_DATA49 159 48
DQ49 VSS
5 MEM_MB_DATA50 173 53
DQ50 VSS
5 MEM_MB_DATA51 175 54
DQ51 VSS
5 MEM_MB_DATA52 158 59
DQ52 VSS
5 MEM_MB_DATA53 160 60
DQ53 VSS
5 MEM_MB_DATA54 174 65
B DQ54 VSS B
5 MEM_MB_DATA55 176 66
DQ55 VSS
5 MEM_MB_DATA56 179 71
DQ56 VSS
5 MEM_MB_DATA57 181 72
DQ57 VSS
5 MEM_MB_DATA58 189 77
DQ58 VSS
5 MEM_MB_DATA59 191 78
DQ59 VSS
5 MEM_MB_DATA60 180 121
DQ60 VSS
5 MEM_MB_DATA61 182 122
DQ61 VSS
5 MEM_MB_DATA62 192 127
DQ62 VSS
5 MEM_MB_DATA63 194 128
DQ63 VSS
132
VSS
5 MEM_MB_DQS0_N 11 133
DQS0# VSS
5 MEM_MB_DQS1_N 29 138
DQS1# VSS
5 MEM_MB_DQS2_N 49 139
DQS2# VSS
5 MEM_MB_DQS3_N 68 144
DQS3# VSS
5 MEM_MB_DQS4_N 129 145
DQS4# VSS
5 MEM_MB_DQS5_N 146 149
DQS5# VSS
5 MEM_MB_DQS6_N 167 150
DQS6# VSS
5 MEM_MB_DQS7_N 186 155
DQS7# VSS
156
VSS
5 MEM_MB_DQS0_P 13 161
DQS0 VSS
5 MEM_MB_DQS1_P 31 162
DQS1 VSS
5 MEM_MB_DQS2_P 51 165
DQS2 VSS
5 MEM_MB_DQS3_P 70 168
DQS3 VSS
5 MEM_MB_DQS4_P 131 171
DQS4 VSS
5 MEM_MB_DQS5_P 148 172
DQS5 VSS
5 MEM_MB_DQS6_P 169 177
DQS6 VSS
5 MEM_MB_DQS7_P 188 178
DQS7 VSS
183
VSS
5,18 MEM_MB0_ODT0 114 184
OTD0 VSS
5,18 MEM_MB0_ODT1 119 187
OTD1 VSS
190
VSS
VREF_DDR_MEM 1 VREF VSS 193
A A
2 VSS VSS 196
1
SCD1U10V2KX-4GP
C854 UMA
C855 202 201
SC2D2U6D3V2MX-GP GND GND
2
62.10017.E21 Title
2ND = 62.10017.A51
HI 9.2mm
Place C2.2uF and 0.1uF < 3RD = 62.10017.G71 DDR_SO-DIMM SKT_2
Size Document Number Rev
500mils from DDR connector Custom
JV71-TR SB
Date: Monday, July 06, 2009 Sheet 17 of 61
5 4 3 2 1
5 4 3 2 1
Decoupling Capacitor
0D9V_S3
Put decap near power(0.9V) and pull-up resistor
1
C450 DY C451 C452 C470 C468 C469 C498 DY C497 C496 C515 C514 C516
DY C513
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
D DY DY D
PARALLEL TERMINATION
2
Put decap near power(0.9V) and pull-up resistor
0D9V_S3 0D9V_S3
RN63 RN55
1 8 MEM_MA0_ODT1 5,16 1 8 MEM_MB_ADD4 5,17
2 7 MEM_MA0_CS#1 5,16 2 7 MEM_MB_ADD11 5,17
3 6 MEM_MA_W E# 5,16 3 6 MEM_MB_ADD5 5,17
4 5 MEM_MA_CAS# 5,16 4 5 MEM_MB_ADD8 5,17
SRN47J-4-GP
RN66
SRN47J-4-GP
RN58
Place these Caps near DM1
1 8 MEM_MA_ADD8 5,16 1 8 MEM_MB_ADD6 5,17
2 7 2 7 1D8V_S3
MEM_MA_ADD5 5,16 MEM_MB_ADD2 5,17
3 6 MEM_MA_CKE1 5,16 3 6 MEM_MB_ADD0 5,17
4 5 MEM_MA_ADD15 5,16 4 5 MEM_MB_BANK1 5,17
1
SRN47J-4-GP SRN47J-4-GP C482 C480 C838 C841 C886 C884 C484 Layout Note:
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
RN68 RN59 DY
Place one cap close to every 2 pullup
SCD1U16V2ZY-2GP
1 8 MEM_MA_ADD4 5,16 1 8 MEM_MB_RAS# 5,17
2
2 7 MEM_MA_ADD2 5,16 2 7 MEM_MB0_CS#0 5,17 resistors terminated to 0D9V_S3
3 6 MEM_MA_BANK1 5,16 3 6 MEM_MB0_ODT0 5,17
4 5 MEM_MA_ADD0 5,16 4 5 MEM_MB_ADD13 5,17
SRN47J-4-GP SRN47J-4-GP
C RN61 RN54 C
1 8 MEM_MA_ADD12 5,16 1 8 MEM_MB_ADD9 5,17
2 7 MEM_MA_ADD9 5,16 2 7 MEM_MB_ADD12 5,17
3 6 3 6
4 5
MEM_MA_BANK2 5,16
MEM_MA_CKE0 5,16 4 5
MEM_MB_BANK2 5,17
MEM_MB_CKE0 5,17 Place these Caps near DM2 1D8V_S3
SRN47J-4-GP SRN47J-4-GP
RN62 RN60
1 8 MEM_MA_BANK0 5,16 1 8 MEM_MB_CKE1 5,17
2 7 MEM_MA_ADD10 5,16 2 7 MEM_MB_ADD15 5,17
1
3 6 3 6 C840 C481 C487 C839 C885 C887 C483 C888 Layout Note:
MEM_MA_ADD3 5,16 MEM_MB_ADD14 5,17
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
4 5 MEM_MA_ADD1 5,16 4 5 MEM_MB_ADD7 5,17 DY
Place one cap close to every 2 pullup
2
SRN47J-4-GP SRN47J-4-GP resistors terminated to 0D9V_S3
RN67 RN56 DY
1 8 MEM_MA_ADD14 5,16 1 8 MEM_MB_BANK0 5,17
2 7 MEM_MA_ADD7 5,16 2 7 MEM_MB_ADD10 5,17
3 6 MEM_MA_ADD11 5,16 3 6 MEM_MB_ADD1 5,17
4 5 MEM_MA_ADD6 5,16 4 5 MEM_MB_ADD3 5,17
SRN47J-4-GP SRN47J-4-GP
RN69 RN57
1 8 MEM_MA0_CS#0 5,16 1 8 MEM_MB0_CS#1 5,17
2 7 MEM_MA_RAS# 5,16 2 7 MEM_MB0_ODT1 5,17
3 6 MEM_MA0_ODT0 5,16 3 6 MEM_MB_CAS# 5,17 1D8V_S3
4 5 MEM_MA_ADD13 5,16 4 5 MEM_MB_W E# 5,17 0D9V_S3 Place these Caps near PARALLEL TERMINATION
SRN47J-4-GP SRN47J-4-GP
C488
1
B B
SCD1U16V2ZY-2GP
C523 C524 C525 C526 C527 C490 C491 C479
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY DY DY DY DY
2
Do not share the Term resistor between
the DDR addess and Control Signals.
1
C478 C440 C441 C442 C444 C443 C477 C489 C475
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY DY DY DY DY DY
2
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
1
LCD1 C1 53 LVDS_TXAOUT1- LVDS_TXAOUT1- 3 6 LCD_TXAOUT1-
41 SC10U6D3V3MX-GP 53 LVDS_TXAOUT1+ LVDS_TXAOUT1+ 4 5 LCD_TXAOUT1+ 1 Vin
D 35 LCD_CB_SEL 40 1 D
2
DIS SRN0J-7-GP 2 Vin
12 USBPP8 39 2
12 USBPN8 38 3 RN25 3 Brightness
37 4 CCD_PW R 53 LVDS_TXBCLK- LVDS_TXBCLK- 1 8 LCD_TXBCLK-
36 5 LCD_TXBCLK+ 53 LVDS_TXBCLK+ LVDS_TXBCLK+ 2 7 LCD_TXBCLK+ 4 BLON
35 DBC_EN 35 6 LCD_TXBCLK- 53 LVDS_TXBOUT2- LVDS_TXBOUT2- 3 6 LCD_TXBOUT2-
3D3V_S0 34 7 LCD_TXBOUT2+ 53 LVDS_TXBOUT2+ LVDS_TXBOUT2+ 4 5 LCD_TXBOUT2+ 5 GND
LCD_EDID_CLK_1 33 8 LCD_TXBOUT2-
LCD_EDID_DAT_1 32 9 LCD_TXBOUT1+ DIS SRN0J-7-GP 6 GND
31 10 LCD_TXBOUT1-
30 11 LCD_TXBOUT0+ RN24
29 12 LCD_TXBOUT0- 53 LVDS_TXBOUT0- LVDS_TXBOUT0- 1 8 LCD_TXBOUT0-
BRIGHTNESS_CN 28 13 LCD_TXACLK+ 53 LVDS_TXBOUT0+ LVDS_TXBOUT0+ 2 7 LCD_TXBOUT0+ CCD Pin
BLON_OUT_1 27 14 LCD_TXACLK- 53 LVDS_TXBOUT1- LVDS_TXBOUT1- 3 6 LCD_TXBOUT1-
26 15 LCD_TXAOUT2+ 53 LVDS_TXBOUT1+ LVDS_TXBOUT1+ 4 5 LCD_TXBOUT1+ Pin Symbol
25 16 LCD_TXAOUT2-
24 17 LCD_TXAOUT1+ DIS SRN0J-7-GP 1 CCD_PWR
DCBATOUT 23 18 LCD_TXAOUT1-
F1 22 19 LCD_TXAOUT0+ 2 USB-
1 2 DCBATOUT_LCD1 21 20 LCD_TXAOUT0-
42 RN17 3 USB+
1
UMA SRN0J-7-GP
RN18
9 GMCH_TXBOUT1+ GMCH_TXBOUT1+ 1 8 LCD_TXBOUT1+
9 GMCH_TXBOUT1- GMCH_TXBOUT1- 2 7 LCD_TXBOUT1-
9 GMCH_TXBOUT0+ GMCH_TXBOUT0+ 3 6 LCD_TXBOUT0+
9 GMCH_TXBOUT0- GMCH_TXBOUT0- 4 5 LCD_TXBOUT0-
F2
CCD_PW R 1 2 3D3V_S0 UMA SRN0J-7-GP
1
SCD1U16V2ZY-2GP
2ND = 69.50007.771
BRIGHTNESS_CN DY R588
1 2 BRIGHTNESS 35
B BLON_OUT_1 33R2J-2-GP B
1 2 BLON_OUT 35
R589 33R2J-2-GP
1
C4 C3
SC100P50V2JN-3GP
SC100P50V2JN-3GP
DY DY R3
10KR2J-3-GP
2
DY
1
3D3V_S0
2
for TR D39
3D3V_S0 PESD5V0S1BB-GP-U
4
3
83.0005V.0AF
UMA RN2
LCDVDD SRN4K7J-8-GP
2
9 GMCH_LCDVDD_ON 1 2 PD Add For ESD
R2 0R2J-2-GP Layout 40 mil
U1 DIS RN14
1
2
Close to LCD connector Side
53 LCDVDD_ON 1 2 LCDVDD_ON_1 1 5 1 4 LCD_EDID_CLK_1
R25 0R2J-2-GP EN IN#5 53 LCD_EDID_CLK LCD_EDID_DAT_1
2 GND 53 LCD_EDID_DAT 2 3
DIS 3 OUT IN#4 4
R1 SRN0J-10-GP-U
1
1
1
SC4D7U6D3V3MX-2GP
DY SC4D7U6D3V3MX-2GP
74.05285.07F 9 CLK_DDC_EDID 2 3
2
2
100KR2J-1-GP 9 DAT_DDC_EDID 1 4 SC220P50V2KX-3GP
2
SRN0J-10-GP-U SC220P50V2KX-3GP
2
A UMA UMA A
for TR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
LCD CONN
Size Document Number Rev
A3 JV71-TR -1
Date: Monday, July 06, 2009 Sheet 19 of 61
5 4 3 2 1
5 4 3 2 1
UMA
RN21
8 1
9 GMCH_BLUE 7 2
9 GMCH_GREEN 6 3
9 GMCH_RED 5 4
SRN0J-7-GP
D CRT_R_1 1
L18
2 CRT_R
3D3V_S0
Hsync & Vsync level shift D
68.00230.021 5V_S0
2ND = 68.00119.081 FCB1608CF-GP
L16
1
CRT_G_1 1 2 CRT_G
4
3
68.00230.021 C700
2ND = 68.00119.081 FCB1608CF-GP RN37 DY SCD1U16V2ZY-2GP For System CRT
2
L15 SRN2K2J-1-GP
2009/05/22 SB Change to 10Ω
DIS CRT_B_1 CRT_B U46A
14
1 2
1
DIS
1
2
1
1
RN114 EC32 EC30 EC27 FCB1608CF-GP C215 C203 C176 RN34 RN36
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC2D2P50V2CC-GP
SC2D2P50V2CC-GP
SC2D2P50V2CC-GP
4 5 DY DY DY 68.00230.021 2 3 HSYNC_1 2 3 CRT_HSYNC1_1 1 4 CRT_HSYNC1
R489 R488 R490 53,56 CRT_HSYNC CRT_VSYNC1
3 6 2ND = 68.00119.081 1 4 2 3
2
53 CRT_RED 53,56 CRT_VSYNC
150R2F-1-GP
2 7 TSAHCT125PW -GP
53 CRT_GREEN 150R2F-1-GP 150R2F-1-GP SRN0J-10-GP-U SRN10J-7-GP
U46B 73.74125.L13
14
1 8
7
53 CRT_BLUE
4
2ND = 73.74125.L12
2
2
SRN10J-1-GP Change
VSYNC_1 5 6 CRT_VSYNC1_1
2009/05/22 SB Change to 10Ω UMA
RN31
2009/05/22 SB Change to 2.2p 1 4 TSAHCT125PW -GP
7
9 GMCH_VSYNC
R489 PU & TR-DIS-->150R EC31 9 GMCH_HSYNC 2 3 73.74125.L13
DY 2ND = 73.74125.L12
TR-UMA & TR-MUX-->140R SRN0J-10-GP-U
CRT_R 1 2
Layout Note:
C Place these resistors for TR C
close to the CRT-out MLVG04023R0QV05-GP
connector EC29 DY
CRT_G 1 2
MLVG04023R0QV05-GP
Layout Note: DY
* Must be a ground return path between this ground and the ground on
EC28
DDC_CLK & DATA level shift
the VGA connector. CRT_B 1 5V_CRT_S0
2
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT 5V_S0
MLVG04023R0QV05-GP
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
1
F3
FUSE-1D1A6V-4GP-U D25 3D3V_S0
69.50007.691 BAS16PT-GP
2ND = 69.50007.771
2
83.00016.F11
2ND = 83.00016.B11
3
3D3V_S0
8
7
6
5
B CRT1 RN44 B
DY
4
3
17 2 3 RN35
RN26 1 4 SRN10KJ-6-GP
6 SRN2K2J-1-GP
CRT_R 1 11 SRN0J-10-GP-U
1
2
3
4
7
1
2
5V_CRT_S0 CRT_G 2 12 DAT_DDC1_5 CRT_IN#_R
8
CRT_B 3 13 CRT_HSYNC1 DIS U95
9 RN33
4 14 CRT_VSYNC1 2 3 DAT_DDC1_5_Q 4 3 DAT_DDC1 1 R49 2DAT_DDC1_5
53 CRT_DDCDATA
1
10 1 4 0R0402-PAD
53 CRT_DDCCLK
C722 CRT_IN#_R 5 15 CLK_DDC1_5 5 2
SCD01U50V2KX-1GP SRN0J-10-GP-U
2
16 6 1
CRT_VSYNC1
UMA RN20 2N7002KDW -GP
CRT_HSYNC1 VIDEO-15-47-GP-U 2 3 CLK_DDC1_5_Q 84.2N702.A3F
9 GMCH_DDCCLK
1
C150 1 4
9 GMCH_DDCDATA
20.20392.015 2ND = 84.DM601.03F
SC18P50V2JN-1-GP
C161 DAT_DDC1_5 3RD = 20.20798.015 2009/04/15 ESD For 2KV By John 0R0402-PAD
1
SC18P50V2JN-1-GP
C142
for TR
1
SC100P50V2JN-3GP
DY SC100P50V2JN-3GP
2
R64
A UMA A
2 1CRT_IN#_R
35 CRT_DEC#
470R2J-2-GP DY
EC24 Wistron Corporation
1
1 2
Title
JV71-TR SB
Date: Monday, July 06, 2009 Sheet 20 of 61
5 4 3 2 1
5 4 3 2 1
1
2009/04/09 1.5k to 2.2k By John 5V_S0
3D3V_S0
HDMI1 DY D35
RN6
BAV99-5-GP 081222 SC
18 15 TDMS_A_CLK 2 3 Q40
C
+5V_POWER SCL TDMS_A_DAT MMBT3904-4-GP
16 1 4
3
SDA
B 84.T3904.C11
HDMI_TX0+ 7 2ND = 84.03904.L06
HDMI_TX0- TMDS_DATA0+ HDMI_A_CEC TP14 TPAD14-GP SRN2K2J-1-GP HDMI_HPD
9 13 1
E
HDMI_TX1+ TMDS_DATA0- CEC
4 TMDS_DATA1+ DDC/CEC_GROUNG 17 DY HDMI_A_HPD 53
1
D HDMI_TX1- 6 19 HDMI_A_HPD_CN EC66 DY D
HDMI_TX2+ TMDS_DATA1- HOT_PLUG_DETECT EC65 RN90
1 TMDS_DATA2+ 2 R201 1 HDMI_DETECT# 9
SC220P50V2JN-3GP
HDMI_TX2- 3 14 EC64 HDMI_A_HPD_CN 1 4 0R2J-2-GP
2
TMDS_DATA2- RESERVED#14
SC220P50V2JN-3GP
2 3 UMA
2
MLVG04023R0QV05-GP
8 TMDS_DATA0_SHIELD
5 DY SRN100KJ-6-GP
TMDS_DATA1_SHIELD R202
2 TMDS_DATA2_SHIELD
20 10KR2J-3-GP
2
GND
11 21
1
HDMI_TXC+ TMDS_CLOCK_SHIELD GND
10 TMDS_CLOCK+ GND 22
HDMI_TXC- 12 23 3D3V_S0
TMDS_CLOCK- GND
SKT-HDMI19P-11GP-U1 for TR
62.10078.171
2ND = 62.10078.121
4
3
RN79
SRN2K2J-1-GP DY
UMA DIS
1
2
RN32 RN43
9 GMCH_HDMI_CLK 2 3 HDMI_A_CLK_1 2 3 HDMI_A_CLK 53
9 GMCH_HDMI_DATA 1 4 HDMI_A_DAT_1 1 4 HDMI_A_DAT 53
SRN0J-6-GP SRN0J-10-GP-U
3D3V_S0
3D3V_S0
53 TMDS_A_TXC-
C 53 TMDS_A_TXC+ C
2
C32 C34 C28 C638 RN8
53 TMDS_A_TX0-
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
TMDS_A_TX0- 2 3 HDMI_TX0-
53 TMDS_A_TX0+ TMDS_A_TX0+ 1 4 HDMI_TX0+
1
SRN0J-10-GP-U
53 TMDS_A_TX1- RN9
53 TMDS_A_TX1+
2
2
R282 TMDS_A_TX1- 2 3 HDMI_TX1-
DY DY DY DY R281 4K7R2J-2-GP TMDS_A_TX1+ 1 4 HDMI_TX1+
53 TMDS_A_TX2- 4K7R2J-2-GP SRN0J-10-GP-U
53 TMDS_A_TX2+ RN12
DY DY TMDS_A_TX2- 2 3 HDMI_TX2-
1
1
From VGA TMDS_A_TX2+ 1 4 HDMI_TX2+
SRN0J-10-GP-U
RN7
TMDS_A_TXC- 3 HDMI_TXC-
11
15
21
26
33
40
46
35
34
2
for TR
2
U35 TMDS_A_TXC+ 1 4 HDMI_TXC+
SRN0J-10-GP-U
NC#35
NC#34
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
8 HDMI_CLK- 2 UMA 3 38 23 HDMI_TXC-
IN_D1- OUT_D1-
8 HDMI_CLK+ 1 4 RN27 39 IN_D1+ OUT_D1+ 22 HDMI_TXC+
SRN0J-10-GP-U
8 HDMI_DATA0- 2 UMA 3 41 20 HDMI_TX0-
IN_D2- OUT_D2-
8 HDMI_DATA0+ 1 4 RN28 42 IN_D2+ OUT_D2+ 19 HDMI_TX0+
SRN0J-10-GP-U
8 HDMI_DATA1- 2 UMA 3 44 17 HDMI_TX1-
IN_D3- OUT_D3-
8 HDMI_DATA1+ 1 4 RN29 45 IN_D3+ OUT_D3+ 16 HDMI_TX1+
SRN0J-10-GP-U
8 HDMI_DATA2- 2 UMA 3 47 14 HDMI_TX2-
B IN_D4- OUT_D4- B
8 HDMI_DATA2+ 1 4 RN30 48 IN_D4+ OUT_D4+ 13 HDMI_TX2+
SRN0J-10-GP-U DY 2009/04/14 Follow JM70 By John
From NB Recommended Equalization: [PC1,PC0]=01, 4dB
3D3V_S0 R301 2 DY 4K7R2J-2-GP
1 PC0 3 8 HDMI_A_DAT_1
SCD1U16V2ZY-2GP
R302 2 4K7R2J-2-GP PC1 PC0 SDA HDMI_A_CLK_1
1 4 PC1 SCL 9
HPD_1 1 R626 5V_S0
DY HPD 7 2
0R2J-2-GP DY
HDMI_DETECT# 9
REXT_HDMI 6 DY
RT_EN#_8101 REXT HDMI_A_HPD_CN
10 RT_EN# HPD_SINK 30
1
3D3V_S0 3D3V_S0 OE#_8101 25 29 TDMS_A_DAT U72 C465
OE# SDA_SINK
3D3V_S0 2 R283 1 DDC_EN_PS8101 32 DDC_EN SCL_SINK 28 TDMS_A_CLK
DY 1 8
2
HDMI_A_CLK_1 1OE# VCC
2 7
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
4K7R2J-2-GP 1A 2OE#
2
3 DY 2B 6 TDMS_A_DAT
1B
1
DY R303 4 5 HDMI_A_DAT_1
R295 R288 499R2F-2-GP GND 2A
1
5
12
18
24
27
31
36
37
43
49
20KR2F-L-GP PS8101-GP
4K7R2J-2-GP DY 71.P8101.003 CBTD3306PW -GP
1
DY 0R0402-PAD 73.03306.E0B
2
A
D
A
DY
. Q19
2N7002E-1-GP Wistron Corporation
. 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
. 84.2N702.D31 Taipei Hsien 221, Taiwan, R.O.C.
. .
2ND = 84.2N702.E31
Title
G
JV71-TR SB
Date: Monday, July 06, 2009 Sheet 21 of 61
5 4 3 2 1
5 4 3 2 1
D D
SATA Connector
SATA1
24
NP2
22
13 SATA_TXP0 21
13 SATA_TXN0 20
19
13 SATA_RXN0 18
13 SATA_RXP0 17
16
15
14
13
12
C 5V_S0 11 C
10
9
8
7
6
5
K
1
1
TC22 DY 4
SC10U6D3V3MX-GP DY C685 D23 3
2 SS24-GP 2
SCD1U16V2ZY-2GP
83.2R004.08G
1
A
2ND = 83.2R004.J8M NP1
23
3RD = 83.2R004.H8M
SKT-SATA22P-27-GP
62.10065.471
2ND = 62.10065.551
3RD = 62.10065.661
2009/05/23 SB Change
SATA_TXP0
SATA_RXN0
SATA_RXP0
SATA_TXN0
MP
B B
3
DY DY DY DY
3
D21
BAV99PT-GP-U D22 D19 D24
BAV99PT-GP-U BAV99PT-GP-U BAV99PT-GP-U
1
3D3V_S0 3D3V_S0
83.00099.K11 3D3V_S0 3D3V_S0
83.00099.K11 83.00099.K11 83.00099.K11
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HDD
Size Document Number Rev
JV71-TR SB
Date: Monday, July 06, 2009 Sheet 22 of 61
5 4 3 2 1
5 4 3 2 1
D
SATA ODD Connector D
ODD1
8
NP1
S1
13 SATA_TXP1 S2
13 SATA_TXN1 S3
S4
13 SATA_RXN1 S5
13 SATA_RXP1 S6
R165 DY S7
5V_S0 10KR2J-3-GP
1 2ODD_DP P1
P2
P3
DY 1ODD_MD P4
1
DY TC9 P5
SC10U6D3V3MX-GP
C430 TP152 P6
SCD1U16V2ZY-2GP
D4 TPAD14-GP NP2
2
83.2R004.H8M 9
C SSM24PT-GP C
A
SKT-SATA7P+6P-46-GP
62.10065.631
2009/06/29 PD Change
SATA_RXP1
MP
SATA_RXN1
SATA_TXN1
SATA_TXP1
3
DY D5 DY DY DY
3
BAV99PT-GP-U D6 D8
BAV99PT-GP-U BAV99PT-GP-U D7
BAV99PT-GP-U
1
3D3V_S0 3D3V_S0
83.00099.K11 3D3V_S0 3D3V_S0
B
83.00099.K11 83.00099.K11 B
83.00099.K11
A A
UMA
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
ODD
Size Document Number Rev
JV71-TR SB
Date: Monday, July 06, 2009 Sheet 23 of 61
5 4 3 2 1
5 4 3 2 1
D
BLUETOOTH MODULE D
1.5A / High Active Voltage 2V
3D3V_S0
3D3V_BT_S0
U68 DY C920
SC4D7U6D3V3MX-2GP
3D3V_BT_S0 1 5 1 2
OUT IN
2 GND
3 NC#3 EN 4
1
EC98 DY BLUETOOTH_EN 35
SCD1U16V2ZY-2GP
G5240B1T1U-GP
2
74.05240.A7F
2ND = 74.09711.A7F R527
0R0402-PAD
2 1
EC21 put near
BLUE1 / all
USB put one
choke near
6
connector by
EMI request USB_5-
4 USBPN5 12
C 3 USB_5+ C
USBPP5 12
2
BT1 1 3D3V_BT_S0
ACES-CON4-1-GP-U2
20.D0197.104
2ND = 20.F0984.004
5
2 1
R528
0R0402-PAD
B B
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BLUETOOTH
Size Document Number Rev
JV71-TR SA
Date: Monday, July 06, 2009 Sheet 24 of 61
5 4 3 2 1
5 4 3 2 1
5V_USB1_S0 5V_S5
USB1 USB2 U54
6
1 USB2 1 8
0R0603-PAD GND OUT#8
6 2 IN#2 OUT#7 7
12 USBPN2 1 R156 2 USB_2- 2 1 3 IN#3 OUT#6 6
1 2 USB_2+ 3 0R0603-PAD USB_PW R_EN# 4 5
12 USBPP2 EN/EN# OC# USB_OC#0 12
0R0603-PAD 4 1 R169 2 USB_3- 2
12 USBPN3
R157 5 1 2 USB_3+ 3 EC84
12 USBPP3
1
0R0603-PAD 4 G547F2P81U-GP SCD1U16V2ZY-2GP
1
SKT-1394-4P-27-GP-U R170 5 C836 74.00547.A79 DY
D 2ND = 74.02181.079 D
2
2009/04/20 EMI Change to 0603 By John SKT-1394-4P-27-GP-U SC4D7U6D3V3MX-2GP
2
22.10218.T51 2009/04/20 EMI Change to 0603 By John
2ND = 22.10321.111 5V_USB1_S0
3RD = 22.10218.W51 22.10218.T51 100 mil
4TH = 22.10218.P01 2ND = 22.10321.111
3RD = 22.10218.W51
1
4TH = 22.10218.P01 TC29 EC79 DY EC83
SCD1U16V2ZY-2GP
79.22710.E0L DY
SE220U6D3VM-8GP
2ND = 79.22710.6AL
SC1000P50V3JN-GP-U
2
2
2009/04/16 ADD By John
C C
5V_USB2_S0
USB3
2009/04/20 EMI Change to 0603 By John
USB3
6
5V_USB2_S0 1
0R0603-PAD
5V_S5 1 R133 2 USB_0- 2
12 USBPN0
U62 1 2 USB_0+ 3
12 USBPP0
0R0603-PAD 4
1 8 R134 5
GND OUT#8
2 IN#2 OUT#7 7
3 6 SKT-1394-4P-27-GP-U
USB_PW R_EN# IN#3 OUT#6
4 EN/EN# OC# 5 USB_OC#1 12
EC106
1
G547F2P81U-GP SCD1U16V2ZY-2GP 22.10218.T51
1
C869 74.00547.A79 DY 2ND = 22.10321.111
2ND = 74.02181.079 3RD = 22.10218.W51
2
B SC4D7U6D3V3MX-2GP B
4TH = 22.10218.P01
2
2009/04/17 ADD By John
2009/04/16 Change By John
5V_USB2_S0
3D3V_S0
100 mil
1
EC108 DY EC107
C798
SCD1U16V2ZY-2GP
TC33 DY
1 2 SE100U10VM-4-GP
SC1000P50V3JN-GP-U
2
2
79.10111.40L
USBCN1 2ND = 79.10711.4AL
SC1U10V3ZY-6GP 14
12
38 PW R_CON_BTN#_1 PW R_CON_BTN#_1 11
38 PW R_CON_LED# PW R_CON_LED# 10
9
12 USB_OC#4 8
7
12 USBPN1 6
12 USBPP1 5
4 2009/04/20 ADD By John
3 USB_OC#4 1 TP173 AFTE14P-GP
35 USB_PW R_EN#
5V_S5 2
A USBPN1 1 TP174 AFTE14P-GP A
UMA
1
SC1U6D3V2KX-GP
EC85 C837 1
SC1U6D3V2KX-GP
Wistron Corporation
2
LAN_AVDD
1D2V_LAN_S5 3D3V_S5 3D3V_LAN_S5 3D3V_LAN_S5
3D3V_LAN_S5
1 R46 2
0R0603-PAD
1
1
C110 C103 C64 C93
SC4D7U6D3V3MX-2GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R549
56
61
15
19
38
52
68
6
U4 10KR2J-3-GP
2
2
1 R44 2 XTALVDD_G
DC#38
DC#52
NC#68
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
1D2V_LAN_S5 3D3V_LAN_S5 0R0402-PAD
2
U3
1
2D5V_1D2V_LAN 1 8 C100
BIASVDD_G A0 VCC EE_W P SCD1U10V2KX-4GP
BIASVDDH 36 2 A1 WP 7
1
5 3 6 SCLK
2
VDDC_IO A2 SCL SO C939
D 55 VDDC_IO 4 GND SDA 5 D
13 SCD1U10V2KX-4GP
2
VDDC XTALVDD_G AT24C02BN-SH-T-GP
20 VDDC XTALVDDH 23 1 R20 2 BIASVDD_G
1
1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
2
48 LAN_AVDD
AVDDH LAN_AVDD
AVDDH 42
1 R27 2 LAN_AVDD
2009/04/10 Bead to 0Ω by John 0R0402-PAD
AVDDL_G 39 AVDDL
1
AVDDL_G 45 C67 C48
AVDDL
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AVDDL_G 51 AVDDL
2
3D3V_LAN_S0
3D3V_S0 49
TRD3_N MDI3- 27
TRD3_P 50 MDI3+ 27
1 R26 2 GPHY_PLLVDD 35 GPHY_PLLVDDL
0R0603-PAD 47 MDI2- 27 Place PLLVDD/AVDDL
C56 TRD2_N
TRD2_P 46 MDI2+ 27 CKT as close to chip as
1
SCD1U10V2KX-4GP possible
TRD1_N 43 MDI1- 27
44 MDI1+ 27
2
1
C C
R35
2 3D3V_LAN_S5 DY 10KR2J-3-GP
PCIE_SDSVDD LINKLED#
33 PCIE_VDDL SPD100LED# 1 10M/100M/1G_LED# 27
24 67
2
PCIE_VDDL SPD1000LED#
1
66 LAN_ACT_LED# 27 ENERGY_DET
C69 TRAFFICLED#
1
SCD1U10V2KX-4GP
2
8 GPIO2 R40
GPIO_2
1
TP59 TPAD14-GP C98 C113 C108 C72 C115 DY 10KR2J-3-GP
2009/04/10 Bead to 0Ω by John
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3MX-2GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2
2
9 UART_MODE
UART_MODE EE_W P TP61 TPAD14-GP 1D2V_LAN_S5
GPIO_1/SERIAL_DI 7
8 PCIE_RXP1 SCD1U16V2KX-3GP 1 2 C87 PCIE_RXDP 26 4 GPIO0
SCD1U16V2KX-3GP 1 PCIE_TXD_P GPIO_0/SERIAL_DO
8 PCIE_RXN1 2 C96 PCIE_RXDN 25 PCIE_TXD_N
TP183TPAD14-GP
8 PCIE_TXP1 31 PCIE_RXD_P 1 R18 2 AVDDL_G
8 PCIE_TXN1 32 0R0402-PAD
PCIE_RXD_N
SCD1U10V2KX-4GP
12 PCIE_W AKE# 12 C43
WAKE#
1
9,11,35 PLT_RST1# 1 R48 2 LAN_RST 10 PERST#
RN104
0R0402-PAD 3 CLK_PCIE_LAN 29 65 SCLK 5 4 C50
PCIE_REFCLK_P SCLK/EECLK
1
3 CLK_PCIE_LAN# 28 63 SI 6 3 SC4D7U6D3V3MX-2GP
2
PCIE_REFCLK_N SI SO
DY SO/EEDATA 64 7 2 R23
C117 62 CS# 8 1
2
SC47P50V2JN-3GP CS#
1 2GPHY_PLLVDD
SRN4K7J-10-GP 2D5V_1D2V_LAN FCM1608K-601T03GP
68.00217.241
1
C45
SCD1U10V2KX-4GP
59 ENERGY_DET 35 C38
B ENERGY_DET SC4D7U6D3V3MX-2GP B
2
1
1
VAUX_PRESENT54 C112 C116
VAUX_PRSNT
SCD1U10V2KX-4GP
35 LOW _PW R VMAINPRSNT 53 SCD1U10V2KX-4GP 1 R32 2PCIE_PLLVDD
LOW _PW R VMAIN_PRSNT 0R0603-PAD
3
2
LOW_PWR
1
2 R47
DY 1
0R2J-2-GP 2D5V_1D2V_LAN C75 C81
DY
SCD1U10V2KX-4GP
12,33 SMB_CLK 1 2 LAN_SMB_CLK 58 17 SC4D7U6D3V3MX-2GP
2
TEST1 VDDC_IO
12,33 SMB_DATA 1 R39 0R2J-2-GP
2 LAN_SMB_DATA 57 TEST2
DY R34 0R2J-2-GP
LAN_XO_R 2 1LAN_X0
X1 R45 200R2J-L1-GP 22 18 3D3V_LAN_S5 1 R28 2PCIE_SDSVDD
XTALO REGOUT12_IO 0R0603-PAD
1 2 21 XTALI
1
LAN_XI R22
C92 XTAL-25MHZ-96GP C51
1
1
C105 2 1RDAC 37 C109 SC4D7U6D3V3MX-2GP
2
RDAC
1
SC15P50V2JN-2-GP
SC4D7U6D3V3MX-2GP
R42 DY C84
SC15P50V2JN-2-GP
1K2R2F-1-GP
2ND = 82.30020.851
2
2009/04/09 1.24k to 1.2k By John
2
14 REGCTL12 Q5
REGCTL12
3
BCP69-GP 1
84.00069.B1B
2
2ND = 84.DCP69.01B
A 1D2V_LAN_S5 A
UMA
3 LAN_CLKREQ# LAN_CLKREQ# 11
3D3V_LAN_S0 CLKREQ#
Wistron Corporation
1
3 6 VAUX_PRESENT
4 5 Title
BCM5784MKMLG-GP
BCM5784MKMLG
69
SRN1KJ-10-GP-U
71.05784.M03 Size Document Number Rev
A3
JV71-TR SA
Date: Monday, July 06, 2009 Sheet 26 of 61
5 4 3 2 1
A B C D E
XRF_TDC 3 10 MCT1
26 MDI1+ 2 11 RJ45_3
26 MDI0+ 5 8 RJ45_1
4 9 MCT2
26 MDI0- 6 7 RJ45_2
2D5V_1D2V_LAN
DY
XFORM-271-GP
1 R15 2
0R2J-2-GP 68.HD081.301 Change
2ND = 68.68160.30B
1
SCD1U16V2ZY-2GP
LAN_ACT_LED#
10M/100M/1G_LED#
3 3
DY DY
XF2 C11 C558
26 MDI2+ 1 12 RJ45_4 SC1KP50V2KX-1GP SC1KP50V2KX-1GP
3 10 MCT3
26 MDI2- 2 11 RJ45_5
26 MDI3+ 5 8 RJ45_7
4 9 MCT4
1
1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
26 MDI3- 6 7 RJ45_8
C16 C14
XFORM-271-GP
2
68.HD081.301 Change
2ND = 68.68160.30B
2009/06/03 SB Change
68.HD081.301 Change 68.HD081.30B
DOC_TIP,DOC_RING,TIP,RING:
W/S : 10/100 @ Surface layers
10/20 @ Inner layers
2 2
10(+) 9(-)::GREEN
10(+) 11(-):ORANGE
2009/04/09 Change 4P2R By John
CONN_PW R 10
11 RN77
RJ45_1 1 SRN75J-1-GP
RJ45_2 2
RJ45_3 3
RJ45_4 4
1
2
3
4
RJ45_5 5
RJ45_6 6
2
RJ45_7
MCT_R
7
RJ45_8 8 EC11 EC60
CONN_PW R2 12
1
SC100P50V2JN-3GP
SC100P50V2JN-3GP
DY DY
2
26 LAN_ACT_LED# 13 C570
15 SC1KP2KV6KX-GP
1
RJ45-13P-3-GP
1 UMA 1
22.10177.B51
2ND = 22.10177.B81
12(+) 13(-):YELLOW 3RD = 22.10177.C21 2009/04/09 Follow JV70-PU By John
Wistron Corporation
2009/05/23 SB Change 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
LAN CONN
Size Document Number Rev
A3
JV71-TR SB
Date: Friday, July 10, 2009 Sheet 27 of 61
A B C D E
5 4 3 2 1
3D3V_S0
1
C898
SC10U6D3V3MX-GP
D D
2
5VA_S0
"VAUX" Pull high to enable standby mode
1
C909
SC10U6D3V3MX-GP C912
3D3V_S0 SCD1U10V2KX-4GP
2
RN108 C901
1
1 4 AUDIO_BEEP 1 2 AUDIP_PC_BEEP C900
2 3 SCD1U10V2KX-4GP
C897
2
SRN47K-2-GP-U SC1U10V2KX-1GP SC33P50V2JN-3GP
1
2 1
C896
R515 SC100P50V2JN-3GP
2
4K7R2J-2-GP RESET# 1 2 ACZ_RST# 12,31
R516 0R2J-2-GP ACZ_SYNC 12,31 R520
2
BCLK 1 2 ACZ_BITCLK 12 1 2 LINEOUT_JD# 30
35 KBC_BEEP R514 0R2J-2-GP 39K2R2F-L-GP
C 1 2 C
C895 DY R519
12 ACZ_SPKR SC22P50V2JN-4GP ALC268_SENSE 1 2 LINEIN_JD# 30
10KR2F-2-GP
C899
2DY R518
25
38
12
11
10
33
44
43
34
13
1
1
9
6
U64 1 2 MIC_JD# 30
SC22P50V2JN-4GP 20KR2F-L-GP
AVDD1
AVDD2
RESET#
DVDD_IO
AGPIO
DVDD
SYNC
CENTER
BEEP
BCLK
LFE
SENSE_B
SENSE_A
Sense resistors need close codec
30 INT_MIC
30 AUD_MICIN_L
4
3
2
5
6
2009/04/09 4.7u
7MIC1-L_PORT-B_1
SC2D2U6D3V2MX-GP 1
to 2.2u By John
2 C680 MIC1-L_PORT-B 21
LINE2_VREFO
MIC1_L
ALC888S SIDESURR_L
SIDESURR_R
45
46
30 AUD_MICIN_R 1 8 MIC1-R_PORT-B_1
SC2D2U6D3V2MX-GP 1 2 C681 MIC1-R_PORT-B 22
MIC1_R
INT_MIC_2 SC1U10V3ZY-6GP 1 2 C902 IMT_MIC1-L 16
GPIO0/DMIC_CLK/SPDIFO2
SRN75J-1-GP SC1U10V3ZY-6GP 1 C904 IMT_MIC1-R 17 MIC2_L
2 MIC2_R SURR_L 39 FRONTL 29
SURR_R 41 FRONTR 29
GPIO1/DMIC_DATA
RN109 MIC1V_R 32
MIC1V_L MIC1_VREFO_R
1 8 28 MIC1_VREFO_L FRONT_L 35 SOUNDL 29
B MIC2-VREFO B
PIN37_VREFO
2 7 30 MIC2_VREFO FRONT_R 36 SOUNDR 29
3 6
4 5
CD_GND
AVSS1
AVSS2
JDREF
DVSS
DVSS
CD_R
VREF
CD_L
SRN2K2J-2-GP
2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
ALC888S-VC2-GR-GP
26
42
4
7
27
40
37
2
3
18
20
19
2009/04/09 4.7u to 1u By John 71.00888.D0G
1
DMIC_CLK 1
TP225 TPAD14-GP
JDREF
MXM_SPDIF 1
TP223 TPAD14-GP
1 DMIC_DAT MONO-OUT
1
TPAD14-GP TP224 VREF TP234 TPAD14-GP
1
1 C917
1
SCD47U6D3V2KX-GP
C919 R521
DY SC10U10V5ZY-1GP 2 20KR2F-L-GP
2
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Azalia codec ALC888
Size Document Number Rev
A3
JV71-TR SB
Date: Monday, July 06, 2009 Sheet 28 of 61
5 4 3 2 1
A B C D E
5V_S0 +5V_SPK_AMP
Close to U53.8 Close to U53.18 +5V_SPK_AMP
+5V_SPK_AMP
2 R532 1 +5V_SPK_AMP
SC1U6D3V2KX-GP
0R0603-PAD
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
1
1
SC10U6D3V3MX-GP
C923
C924
C922
1
SC10U6D3V3MX-GP
C929
C928
SCD1U10V2KX-4GP
60ohm 100MHz C930
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
2
2
DY DY DY SC1U6D3V2KX-GP
3000mA 0.05ohm DC
2
1
1
C925
C926
C927
4 4
2
Close to Pin9
18
17
30
8
9
U70
PVDD
PVDD
CPVDD
HPVDD
VDD
C933
AMP_C1P 1 2 SC1U6D3V2KX-GP
SPKR_L+ 6 10
30 SPKR_L+ SPKR_L- OUTL+ C1P AMP_C1N
30 SPKR_L- 7 OUTL- C1N 12
SPKR_R- 19 R533 2009/05/23 SB Change to 11.8K
30 SPKR_R- SPKR_R+ OUTR- AUD_LIN_R 11K8R2F-GP C931
30 SPKR_R+ 20 OUTR+ SPKR_INR 2 +5V_SPK_AMP
3 AUD_LIN_L 2 1 AUD_LIN_R_1 1 2 SC1U6D3V2KX-GP R535 2 1 100KR2J-1-GP
DY
SPKR_INL SOUNDR 28
2 1 AUD_LIN_L_1 1 2 R537 2 1 0R2J-2-GP MAX9789A_SHDN#
SOUNDL 28
SPKR_R+1 15 11K8R2F-GP C932 AMP_MUTE#_R R536 2 1 0R2J-2-GP
DY
30 SPKR_R+1 HPR AMP_SHUTDOW N# 35
SPKR_L+1 16 23 AUD_SPK_ENABLE# R534 SC1U6D3V2KX-GP
30 SPKR_L+1 HPL SPKR_EN#
MUTE# 25
AUD_HP1_OUT_R2 26 22 AMP_MUTE#_R
AUD_HP1_OUT_L2 HP_INR HP_EN AMP_REGEN
27 HP_INL LDO_EN 4 2 R538 1 5V_S0
29 0R0402-PAD
AUD_AMP_GAIN1 LDO_OUT AUD_BIAS
31 GAIN1 BIAS 24 5VA_S0
AUD_AMP_GAIN2 32 1 AUD_SET 2009/04/09 100k to 0k By John
GAIN2 LDO_SET
CPGND
CPVSS
1
PGND
PGND
PVSS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
GND
GND
C935 R540 C937
1
C936
C979
SC1U6D3V2KX-GP 0R0402-PAD 0R0402-PAD
SC4D7U6D3V3MX-2GP
28 FRONTR 1 2 AUD_HP1_OUT_R1 1 R541 2 AUD_HP1_OUT_R2 MAX9789CETJ-GP
21
5
28
33
11
13
14
3 1 2 AUD_HP1_OUT_L1 1 2 AUD_HP1_OUT_L2 3
28 FRONTL
Signal inverter for speaker shutdown
2
R539 2009/05/20 SB Add
C934 0R0402-PAD
SC1U6D3V2KX-GP
2009/05/23 SB Change to 0Ω
1 2AUD_CPVSS
+5V_SPK_AMP
C938
SC1U6D3V2KX-GP
1
R542
100KR2J-1-GP
AMP_SHUTDOW N# 35
2
AUD_SPK_ENABLE#
U71
28 ALC_EAPD
AMP_MUTE#_R G
. .
2
1
1
D32 D
.
.
.
R543 BAW 56-3-GP
0R0402-PAD 83.00056.E11 S
DY
3
2N7002E-1-GP
R544
MAX9789A_SHDN# 1 2 3D3V_S0 84.2N702.D31
2
2ND = 84.2N702.E31 2
10KR2J-3-GP
DY
GAIN SETTING
+5V_SPK_AMP
1
R545 R546
100KR2J-1-GP 100KR2J-1-GP
DY
2
AUD_AMP_GAIN1 AUD_AMP_GAIN2
1
R547 R548
100KR2J-1-GP 100KR2J-1-GP
DY
2
1 UMA 1
JV71-TR SB
Date: Monday, July 06, 2009 Sheet 29 of 61
A B C D E
5 4 3 2 1
METAL
2 3 LINE_IN_R_CONN 3
28 LINE_IN_R
28 LINE_IN_L 1 4 6
LINE_IN_L_CONN 2
SPKR_L- 1 AFTE14P-GP TP5 1
SPKR_L+ 1 AFTE14P-GP TP6 SRN75J-2-GP-U
SPKR_R- 1 AFTE14P-GP TP18
1
1
R512
R513
SPKR_R+ 1 AFTE14P-GP TP19
PHONE-JK359-GP
1
EC97 EC96
22.10133.I51
DYDY 2ND = 22.10088.H21
10KR2J-3-GP
10KR2J-3-GP
MLVG04023R0QV05-GP
MLVG04023R0QV05-GP
3RD = 22.10133.I41
2
2
SPKR_R1
3
2
SPKR_R+ 1 20.F1240.002 2009/05/06 SB Change
DY DY
SPKR_R- 2 未未
2009/07/06 PD change to 22.10265.211 symbol未
4
ACES-CON2-12-GP
SPKR_L1
3
SPKR_L+
SPKR_L-
1
2
20.F1240.002 MIC IN
MICIN1
4
C NP2 C
ACES-CON2-12-GP NP1
1
METAL
2009/06/18 SB Change 3
2
28 AUD_MICIN_R
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
6
28 AUD_MICIN_L 2
1
1
R498
R500
EC94 EC95
DY
1
1
MLVG04023R0QV05-GP
MLVG04023R0QV05-GP
PHONE-JK360-GP
DY DY
10KR2J-3-GP
10KR2J-3-GP
DY 22.10133.I61
2ND = 22.10133.I21
2
3RD = 22.10088.H11
2
2
INT MIC 2009/05/06 SB Change
未未
2009/07/06 PD change to 22.10265.201 symbol未
AMIC1
4
2
1 INT_MIC_1 1 ER1 2
0R0402-PAD INT_MIC 28
3
1
ACES-CON2-12-GP
B 20.F1240.002 MLVG0402220NV05BP-GP-U B
EC58
2009/06/18 SB Change 69.80024.011
2
TX
28 AUD_SPDIF_OUT C
5V_SPDIF_S0
IC
B DRIVE
A LED
28 LINEOUT_JD# 5
4
METAL
LOUT_L+1 3
RN111 2
2 3 LOUT_R+1 1
29 SPKR_L+1
29 SPKR_R+1 1 4 7
6
SRN75J-2-GP-U
PHONE-JK382-GP
22.10133.K21
1
EC104 EC105
U56
DY
MLVG04023R0QV05-GP 2009/07/03 PD Change
MLVG04023R0QV05-GP
LINEOUT_JD# 4 3
EN# NC#3
GND 2
5V_SPDIF_S0
DY
5V_S0 5 1
2
2
IN OUT
A UMA A
1
1
C851 C853
G5240B2T1U-GP-U
SCD1U16V2ZY-2GP
Wistron Corporation
2
SCD1U16V2ZY-2GP 74.05240.B7F DY
2
2 1 Title
DY 0R2J-2-GP
R472 AUDIO JACK
Size Document Number Rev
JV71-TR SB
Date: Monday, July 06, 2009 Sheet 30 of 61
5 4 3 2 1
5 4 3 2 1
D D
2
MDC1 C539
SC4D7U6D3V3MX-2GP
1
NP1
14
13 15
1 2 3D3V_S5
12 ACZ_SDATAOUT_MDC ACZ_SDATAOUT_MDC 3 4
5 6 3D3V_S5
12,28 ACZ_SYNC R437 1 2 ACZ_SYNC_A 7 8
12 ACZ_SDATAIN1 R245 1 0R0402-PAD
2 ACZ_SDATAIN1_A 9 10
33R2J-2-GP 11 12 ACZ_BTCLK_MDC_1 1 R244 2 ACZ_BTCLK_MDC 12
12,28 ACZ_RST# 1 R438 2ACZ_RST#_MDC 16 18 0R0402-PAD
0R0402-PAD 17
1
NP2 C540
1 11
1
1
SC4D7U6D3V3MX-2GP
R243 C541
13 16
100KR2J-1-GP
DY C534 TYCO-CONN12A-4-GP DUMMY-C2
1
SC22P50V2JN-4GP C536 20.F1074.012 14 17
2
SC100P50V2JN-3GP
2
15 18
2
2009/06/05 SB Change 2 12
C C
B B
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
MDC
Size Document Number Rev
JV71-TR SB
Date: Monday, July 06, 2009 Sheet 31 of 61
5 4 3 2 1
5 4 3 2 1
3D3V_S0 3D3V_D_S0
SD_CLK/XD_D1/MS_CLK
SD_DAT0/XD_D6/MS_D0
SD_DAT7/XD_D2/MS_D2
SD_DAT6/XD_D7/MS_D3
1 R487 2
0R0603-PAD
SD_DAT4/XD_WP#
SD_DAT3/XD_WE#
SD_DAT2/XD_RE#
SD_DAT1/XD_D4
SD_DAT5/XD_D0
XD_D5/MS_BS
XD_D3/MS_D1
MS_INS#
XD_R/B#
XD_CD#
SD_CD#
XD_CE#
XD_CLE
D D
XD_ALE
CARD_3D3V_S0
SD_WP
2
C876
DY SC1U10V3KX-3GP
1
U58
19
20
21
23
25
26
27
28
29
31
34
35
37
38
39
40
41
42
43
RTS5159-GR-GP
SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14
SP15
SP16
SP17
SP18
SP19
2
C872
2
SC1U10V3KX-3GP C874
SCD1U16V2ZY-2GP 9 24
1
CARD_3V3 MS_D5
22
1
VREG MS_D4
2 R493 1 AV_PLL 1 AV_PLL
0R0402-PAD
VREG 10 VREG
NC#30 30
3D3V_S0 2 R491 1 3V_VBUS_S0 8 7
0R0603-PAD 3V3_IN NC#7
NC#3 3
3D3V_D_S0 33 D3V3
2
C875 -1 11 D3V3
1
C871 SCD1U16V2ZY-2GP DY C852
SC4D7U6D3V3MX-2GP DY C873 SCD1U16V2ZY-2GP
1
SCD1U16V2ZY-2GP
2
MODE_SEL 45
LED1 SD_CMD MODE_SEL
36 SD_CMD GND 6
3D3V_S0 1 R484 2 VBUS_R ADY K VBUS_LED 14 GPIO0 GND 12
DY68R2F-GP R494 2 32
RREF GND
XTAL_CTR
LED-W -23-GP 1 2 RREF 44 46
C 6K19R2F-GP RST# GND C
EEDO
EECS
EESK
XTLO
RST#
EEDI
XTLI
3D3V_D_S0
DM
DP
71.05159.00G
5
4
13
47
48
17
16
15
18
1
MODE_SEL
DY
1
R474
1
100KR2J-1-GP 2 R496 1 USB_10+
XDAL_CTR
C864 R482 12 USBPP10 0R0402-PAD
2
12M_XO
11,33,36,52 PLT_RST1#_B
2
0R0402-PAD DY 0R0402-PAD
2
1
C858
SC1U10V3KX-3GP
DY
2
3D3V_D_S0 2 R485 1
0R0402-PAD
B B
CARD1
SD_DAT3 0R0402-PAD
SD_DAT5/XD_D0 2 1 R506 SD_DAT5/XD_D0_1 8 12 SD_CMD_1 R470 2 1 SD_CMD
0R0402-PAD SD_CLK/XD_D1/MS_CLK XD_D0 SD_CMD SD_CLK/XD_D1/MS_CLK 0R0402-PAD
9 XD_D1 SD_CLK 24
SD_DAT7/XD_D2/MS_D2_1 26 36 SD_CD#
XD_D3/MS_D1 XD_D2 SD_CD_SW
2 1 R502 XD_D3/MS_D1_1 27 XD_D3 SD_WP_SW 35 SD_W P
0R0402-PAD SD_DAT1/XD_D4_1 28
XD_D5/MS_BS_1 XD_D4
30 XD_D5
SD_DAT0/XD_D6/MS_D0_1 31 19 SD_DAT0/XD_D6/MS_D0_1
SD_DAT6/XD_D7/MS_D3_1 XD_D6 MS_DATA0 XD_D3/MS_D1_1
32 XD_D7 MS_DATA1 20
18 SD_DAT7/XD_D2/MS_D2_1 R501 2 10R0402-PAD SD_DAT7/XD_D2/MS_D2
XD_R/B# MS_DATA2 SD_DAT6/XD_D7/MS_D3_1 R507 2
1 XD_R/B MS_DATA3 16 10R0402-PAD SD_DAT6/XD_D7/MS_D3
SD_DAT2/XD_RE#_1 2
XD_CE# XD_RE XD_D5/MS_BS_1 R503 2
3 XD_CE MS_BS 21 10R0402-PAD XD_D5/MS_BS
XD_CLE 4 17 MS_INS#
XD_ALE XD_CLE MS_INS SD_CLK/XD_D1/MS_CLK
5 XD_ALE MS_SCLK 15
SD_DAT3/XD_W E#_1 6
SD_DAT4/XD_W P# XD_WE
A 2 1 R505 SD_DAT4/XD_W P#_1 7 XD_WP UMA A
0R0402-PAD XD_CD# 34 13
XD_CD_SW 4IN1_GND
4IN1_GND 22
NP1 38
SD_DAT0/XD_D6/MS_D0_1 1 2 NP2
NP1
NP2
4IN1_GND
4IN1_GND 37 Wistron Corporation
SD_DAT1/XD_D4_1 DY EC88 1 2 SCD1U25V2ZY-1GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SD_DAT2/XD_RE#_1 DY EC90 1 2 SCD1U25V2ZY-1GP Taipei Hsien 221, Taiwan, R.O.C.
SD_DAT3/XD_W E#_1 DY EC92 1 2 SCD1U25V2ZY-1GP CARD-PUSH-36P-5-GP
SD_W P DY EC89 1 2 SCD1U25V2ZY-1GP 20.I0081.011 Title
SD_CD# DY EC93 1 2 SCD1U25V2ZY-1GP
SD_CMD_1 DY EC91 1 2 SCD1U25V2ZY-1GP CARDREADER- RTS5159
SD_CLK/XD_D1/MS_CLK DY EC86 1 2 SCD1U25V2ZY-1GP Size Document Number Rev
DY EC87 SCD1U25V2ZY-1GP
JV71-TR SB
Date: Monday, July 06, 2009 Sheet 32 of 61
5 4 3 2 1
A B C D E
4 4
2
53
NP1 R250
1 2 0R0603-PAD
3 4
1
5 6
3 W LAN_CLKREQ# 1 R620 2 W LAN_CLKREQ#_1 7 8
0R0402-PAD 9 10
3 CLK_PCIE_MINI1# 11 12
2
3 CLK_PCIE_MINI1 13 14
15 16 C552
SC100P50V2JN-3GP 10KR2J-3-GP
1
35 E51_RxD 17 18 1 DY 2
19 20 R252
35 E51_TxD PLT_RST1#_MINI1 W IRELESS_EN 35
21 22 1 2 PLT_RST1#_B 11,32,36,52
8 PCIE_RXN2 C550 1 2 RXN2 23 24 R251 0R2J-2-GP
8 PCIE_RXP2 C549 1 2 RXP2 25 26
SCD1U16V2KX-3GP 27 28 RN72 SRN33J-5-GP-U
SCD1U16V2KX-3GP 29 30 SMB_CLK_MINI1 1 DY 4 SMB_CLK 12,26
8 PCIE_TXN2 31 32 SMB_DATA_MINI12 3
3
SMB_DATA 12,26 3
8 PCIE_TXP2 33 34
35 36 USBPN7 12
37 38 USBPP7 12
3D3V_S0 39 40
41 42 LED_W W AN# 1 TP169 TPAD14-GP
43 44 W LAN_LED#_MC 40
45 46
2009/04/20 Change to 3D3V_S0 By John 47 48
49 50
5V_S5 2 R241 1 5V_S5_MIN2 51 52
0R0402-PAD NP2
54
SKT-MINI52P-20-GP
20.F1117.052
2ND = 62.10043.391
2 2
3D3V_S0 1D5V_S0
3D3V_MINI
1
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
TC13
ST100U6D3VBM-8GP
2
DY
1 UMA 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
MINI CARD
Size Document Number Rev
JV71-TR SA
Date: Monday, July 06, 2009 Sheet 33 of 61
A B C D E
5 4 3 2 1
FAN1_VCC
5V_S0
*Layout* 15 mil
1
C669 C679 C670 FAN1_VCC 1 AFTE14P-GP TP57
SC4D7U6D3V3MX-2GP
SCD1U16V2ZY-2GP DY D20 DY SC2200P50V2KX-2GP
1
BAS16-1-GP R9 FAN1_FG1 1 AFTE14P-GP TP58
2
10KR2J-3-GP
83.00016.B11 FAN1_VCC
2
D
2ND = 83.00016.K11 FAN1
D
2
5
FAN1_FG1 3
2
1
4
1
C18 *Layout* 15 mil
SC1KP50V2KX-1GP
ACES-CON3-GP-U1
2
20.F0714.003
2ND = 20.D0246.103
5V_S0
5V_S0 U2
*Layout* 30 mil
1 2 5V_G792_S0 6 1
R12 VCC FAN1
20 DVCC FG1 4
10R2J-2-GP C12 14 G792_32K
CLK
1
1
SC4D7U6D3V3MX-2GP C9 C10 16
SDA SMBD_Therm 35,53
DY SCD1U16V2ZY-2GP 7 18
DXP1 SCL SMBC_Therm 35,53
1
2
DXP2 NC#19
1
SC1U10V3ZY-6GP 11
R11 SCD1U16V2ZY-2GP DXP3 G792_DXP2
C
2
21KR2F-GP 5 G792_DXP3
C
13 ALERT# DGND
15 17 B Q23
ALERT# DGND
1
T8_HW _SHUT# 13 C17 C8 C551 B Q11 C702 MMBT3904-4-GP
2
THERM#
SC470P25V2KN
C V_DEGREE 3 8 MMBT3904-4-GP 84.T3904.C11 C
E
THERM_SET SGND1 G792_DXN2 SC470P25V2KN
41 RUNPW ROK 2 10 84.T3904.C11 2ND = 84.03904.L06
2
E
RESET# SGND2
1
GAP-CLOSE
GAP-CLOSE
49K9R2F-L-GP SC2200P50V2KX-2GP
2
G792SFUF-GP G1 G2
74.00792.A79 2.H/W Shutdown
2
2ND = 74.75392.079
1
3D3V_S5
DXP1:108 Degree H_THERMDA 6
DXP2:H/W Setting
1
Place near chip as close C20
U16B DXP3:88 Degree SC2200P50V2KX-2GP
14
as possible
R7
2
4 10R2J-2-GP H_THERMDC 6
12,35,41,43,48,59,60 PM_SLP_S3# 32KHZ G792_32K
6 1 2
11,15 RTC_CLK 5 1.For CPU Sensor
TSLVC08APW -1-GP
7
1
1
R308
1
2
VCC HTH
DY GND 2 2 setting 95 degree . Put Near SB.
4 3 LTH
RESET#/RESET LTH
1
C645
1
SCD01U16V2KX-3GP DY R309
T8_HW _SHUT# LOW 3_OFF G680LT1UF-GP R338 U38 DY 0R2J-2-GP
R321
2
DY 6K04R2F-GP
1 DY 2 SB_THSET 1 5 G709_VCC
2
18KR2F-GP SET VCC
2 GND DY
2
1
G709T1UF-GP
R322 DY R337 R314
2
2
R311 D17 RSMRST# 6,35
10KR2J-3-GP BAT54-4-GP 3D3V_AUX_S5
DY U39
3
2
1 A VCC 5
35,51 S5_ENABLE 2 B
1
SCD1U16V2ZY-2GP GND Y
DY
D34
2
NC7S08M5X-NL-GP
2 3V5V_ENABLE 45
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
3 Taipei Hsien 221, Taiwan, R.O.C.
6,35 RSMRST#
1 2
1 Title
KBC_THERMTRIP# 35
R298 1KR2F-3-GP
BAT54CPT-GP
G792
Size Document Number Rev
83.R2003.E81 A3 JV71-TR SB
2ND = 83.BAT54.081 Date: Monday, July 06, 2009 Sheet 34 of 61
5 4 3 2 1
5 4 3 2 1
3D3V_AUX_S5 3D3V_S0
FOR KBC DEBUG
1
3D3V_AUX_S5 3D3V_AUX_S5 C207 C194
5V_AUX_S5
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
EC36 VBAT VBAT 1 R394 2 X-32D768KHZ-38GPU
2
8
7
6
5
SCD1U16V2ZY-2GP 0R0603-PAD
1
C753 C751 C754 C750 C725 C139 C749 C730 TPAD14-GP TP113
1KBC_XO_R
3 2
1
3D3V_S0 3D3V_S0
SC10U6D3V3MX-GP
SCD1U16V2ZY-2GP
SC1U16V3ZY-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY RN39 C733 TPAD14-GP TP114
SC10U6D3V3MX-GP
SRN4K7J-10-GP DY DY X2
2
DY
2
C259 C271 4 1
1
2
3
4
SC10U6D3V3MX-GP
SCD1U16V2ZY-2GP
BAT_SCL SMBC_Therm
1
BAT_SDA SMBD_Therm R87 2 R66 1 10KR2J-3-GP
D DY 82.30001.691 U81B 2 OF 2 DY D
30KR2F-GP
LPC_LAD[0..3]
11,36 LPC_LAD[0..3]
2
50 BAT_IN#
2
2009/07//01 PD Change to 390 for reset 3D3V_AUX_S5 1 2 KBC_XI 77 53 KCOL0 1 TP39 AFTE14P-GP
R85 10MR2J-L-GP 32KX1/32KCLKIN KBSOUT0/JENK# KCOL1 TP27 AFTE14P-GP
KBSOUT1/TCK 52 1
102
115
R95 KCOL2 TP40 AFTE14P-GP
80
19
46
76
88
KBSOUT2/TMS 51 1
1
1 2 PLT_RST1#_1 1 OF 2 U81A 50 KCOL3 1 TP28 AFTE14P-GP
9,11,26 PLT_RST1# KBSOUT3/TDI
R382 KBC_XO 79 49 KCOL4 1 TP41 AFTE14P-GP
GPIO41
VDD
AVCC
VCC
VCC
VCC
VCC
VCC
32KX2 KBSOUT4/JEN0#
1
390R2J-1-GP DY 100KR2J-1-GP 29 AMP_SHUTDOW N# 30 48 KCOL5 1 TP29 AFTE14P-GP
C232 GPIO55/CLKOUT KBSOUT5/TDO KCOL6 TP42 AFTE14P-GP
KBSOUT6/RDY# 47 1
SC100P50V2JN-3GP TPAD14-GP TP63 KBC_CIR 63 43 KCOL7 1 TP30 AFTE14P-GP
2
BAT_IN# GPIO14/TB1 KBSOUT7 KCOL8 TP43 AFTE14P-GP
124 GPIO10/LPCPD# VREF 104 12,51 PM_PW RBTN# 117 GPIO20/TA2 KBC KBSOUT8 42 1
7 TP150 TPAD14-GP GPIO25 31 41 KCOL9 1 TP31 AFTE14P-GP
LRESET# 1105 GPIO56/TA1 KBSOUT9 KCOL10 TP44 AFTE14P-GP
11,15 PCLK_KBC 2 LCLK A/D GPI90/AD0 97 AD_IA 49 28 KBC_BEEP 32 GPIO15/A_PWM KBSOUT10 40 1
3 98 TP_LOCK_BTN# 39 12 EC_TMR 118 39 KCOL11 1 TP32 AFTE14P-GP
11,36 LPC_LFRAME# LFRAME# GPI91/AD1 GPIO21/B_PWM KBSOUT11
2
1
91 22 CHARGE_LED 40 3D3V_S0 2 3 KBRCIN# C731
40 W LAN_TEST_LED GPIO81 GPIO45/E_PWM Q7
1
SC1U10V3KX-3GP
23 EC964
EMI
E
GPIO46/TRST# MODEL_ID1 SC1KP50V2KX-1GP SRN10KJ-5-GP
24
2
GPIO47 SPI_W P_R#
25 6,34 RSMRST# B
RN88
0408
2
GPIO50/TDO
33 E51_TxD 111 GPO83/SOUT_CR/BADDR1 GPIO51 26 TP_LOCK_LED 40
1 4 E51_TxD 113 27 BLON_OUT 19 1 DY 2 ECSCI#_KBC MMBT3906-4-GP
C
DBC_EN 33 E51_RxD CCD_ON 112 GPIO87/SIN_CR GPIO52/RDY# UMA_DISCRETE# R71 0R2J-2-GP
2 3 GPO84/BADDR0 GPIO53 28 84.T3906.A11
TPAD14-GP TP110 73 LOW _PW R LOW _PW R 26 D2 2ND = 84.03906.F11
DC_BATFULL114 GPIO70 ENERGY_DET
SRN10KJ-5-GP 40 DC_BATFULL GPIO16 GPIO71 74 ENERGY_DET 26
LCD_CB_SEL 14 75 BT_LED 40 6 1
19 LCD_CB_SEL GPIO34 GPIO72 12 ECSCI#_1
34,51 S5_ENABLE 15 GPIO36 GPO82/TRIS# 110 USB_PW R_EN# 25
RN89
GPIO34 and GPIO46 swap
SER/IR 5 2 3D3V_S5 8 1 LOW _PW R
3D3V_AUX_S5 7 2KBC_THERMTRIP#
VCORF 44 3D3V_S5 6 3 ENERGY_DET
B VCORF SPI_W P_R# 2 R76 ECSW I#_KBC S5_ENABLE B
1 SPI_W P# 36 12 ECSW I# 4 3 5 4
1
0R0402-PAD
AGND
C146
GND
GND
GND
GND
GND
GND
BLON_IN 1 2 83.R0304.A8H
W PCE773LA0DG-GP R384 0R2J-2-GP GMCH_BL_ON 9
KB1 2ND = 83.R2002.B8E
103
5
18
45
78
89
116
27 71.00773.00G
3D3V_S0 1 DY 2
KCOL0 1 R88 0R2J-2-GP
for TR
KCOL1 2
1
KCOL2 3 3D3V_S0
KCOL3 R115 R114
KCOL4
4
5 Internal KeyBoard Connector 10KR2J-3-GP 10KR2J-3-GP
PlanarID
KCOL5 6 DY (1,0)
1
KCOL6 7
2
KCOL7
KCOL8
8
PCB_VER1
SA: 0,0 R258
10KR2J-3-GP
9 DY
KCOL9 10 PCB_VER0 SB: 0,1
KCOL10 11
-1: 1,0
2
1
1
KCOL11 12
KCOL12 13 MODEL_ID1 R116 R113
-2: 1,1
1
2
KCOL16 17
KCOL17 18
2
KROW 0 19
A KROW 1 20 UMA A
KROW 2 21 MODEL_ID0
KROW 3 22 2009/04/20
KROW 4 UMA_DISCRETE#
23
Wistron Corporation
2
KROW 5 24
KROW 6 25 2009/04/20 ADD By John DY R393 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2
PTW O-CON26-4-GP
DIS KBC WPC773
1
3D3V_AUX_S5
EC34 3D3V_AUX_S5
5
6
7
8
D SCD1U16V2ZY-2GP D
DY RN94
2
2
SRN10KJ-6-GP R106
0R0603-PAD
4
3
2
1
U9
1
SPI_HOLD#
35 SPICS# 1 8 BIOS_VCC
ER4 CS# VCC
35 SPIDI 1 2BIOS_DO 2 SO/SIO1 HOLD# 7 SPI_HOLD# 0R0402-PAD
35 SPI_W P# 33R2J-2-GP SPI_W P# 3 6 BIOS_CLK 2 ER3 1 SPICLK 35
WP#/ACC SCLK BIOS_DIO
4 GND SI/SIO0 5 2 1 SPIDO 35
ER2
1
1
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
DY DY
2
72.25165.A01
2
2ND = 72.25X16.A01
16M Bits
SPI FLASH ROM
C C
LPC_LAD[0..3]
11,35 LPC_LAD[0..3]
DB1
3D3V_S0 1
11,35 LPC_LAD0 2
11,35 LPC_LAD1 3
11,35 LPC_LAD2 4
11,35 LPC_LAD3 5
11,35 LPC_LFRAME# 6 DY
11,32,33,52 PLT_RST1#_B 7
8
11,15 PCLK_FW H 9
B B
10
11
12
MLX-CON10-7-GP
20.D0183.110
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BIOS
Size Document Number Rev
A3 JV71-TR SA
Date: Monday, July 06, 2009 Sheet 36 of 61
5 4 3 2 1
5 4 3 2 1
TOUCH PAD
TP_DATA
TP_CLK
5V_S0 TP_LEFT
5V_S0 TP_RIGHT
D D
2
1
2
1
EC73 EC74 EC22 EC23
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
RN83 EC26
1
SCD1U10V2KX-4GP
DY DY DY DY DY
2
SRN10KJ-5-GP
4 TPCN1
3
14
RN85 12
11
35 TPDATA TPDATA 1 4 TP_DATA 10
35 TPCLK TPCLK 2 3 TP_CLK 9
8
SRN33J-5-GP-U 7
TP_RIGHT 6
5
4
3
2
TP_LEFT 1
13
C PTW O-CON12-3-GP-U C
20.K0370.012
2ND = 20.K0315.012
B B
DY DY DY DY DY
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
1
1
EC967 EC965 EC966 EC968 EC969
2
2
2009/05/26 SB Change to 5D5V 5V_S0
1
3D3V_FP_S0 2
12 USBPP6 3
12 USBPN6 4
35 FP_DETECT# 5
6
12 FP_ID 7
TP_LEFT 8
A TP_RIGHT 9 A
UMA
10
11
12
Wistron Corporation
14 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
DY
Q20
C PW R_CON_LED# PW R_CON_LED# 25
B R1
35 PW R_CON_LED
E
R2
D PDTC143ZU-GP-U D
84.00143.E1K
2ND = 84.00143.D1K
5V_S0
300R2J-4-GP LED-B-98-GP
83.00193.A70
2nd = 83.19217.G70
2009/07/06 PD change to 300Ω
3D3V_S0
10KR2J-3-GP
1
R566
2
R569
PW R_CON_BTN# 1 2470R2J-2-GP
35 PW R_CON_BTN#
25 PW R_CON_BTN#_1
B B
DY
PW R_CON_BTN# 1 2
EC71 SC220P50V2JN-3GP
DY
A NUM_LED#_R 1 2 A
EC61 SC220P50V2JN-3GP
DY
CAP_LED#_R 1 2
EC63 SC220P50V2JN-3GP Wistron Corporation
DY 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
MEDIA_LED# 1 2 Taipei Hsien 221, Taiwan, R.O.C.
EC62 SC220P50V2JN-3GP
Title
LAUNCH BOARD
Size Document Number Rev
A3 JV71-TR SB
Date: Monday, July 06, 2009 Sheet 38 of 61
5 4 3 2 1
5 4 3 2 1
1
DY
3 4 EC3
SC1KP50V2KX-1GP
LID1 R621
2
SW -TACT-5P-1-GP
2 LID_CLOSE#_1 1 2
OUT LID_CLOSE# 35
2
62.40009.A61 EC161
2ND = 62.40009.B21 3 100R2J-2-GP
GND
DY
1
2009/05/23 SB Change 1 EC70
3D3V_AUX_S5 VDD SCD22U6D3V2KX-1GP
RN80 MLVG04023R0QV05-GP
1
KBC_PW RBTN# ME268-002-GP
1 4
2 3 LID_CLOSE# 74.00268.07B
Beckup Button
2
SRN10KJ-5-GP EC69
SCD1U16V2ZY-2GP 2009/04/02 for power loss By John
1
BK_SW 1
1 2 Beckup#_1
5
1
DY
3 4 EC4
SC1KP50V2KX-1GP
2
SW -TACT-5P-1-GP
C C
62.40009.A61 3D3V_S0
2ND = 62.40009.B21 RN4
2009/05/23 SB Change 1 8 W IRELESS_BTN#
2 7 BT_BTN#
3 6 BECKUP#
4 5 TP_LOCK_BTN# 35
SRN10KJ-6-GP
WIRELESS Button
W LAN_SW 1
1 2 W IRELESS_BTN#_1 RN3
Beckup#_1 1 8 Beckup# BECKUP# 35
5 BT_BTN#_1 2 7 BT_BTN# BT_BTN# 35
1
SW -TACT-5P-1-GP SRN470J-3-GP
62.40009.A61
2ND = 62.40009.B21
B B
2009/05/23 SB Change
BT/3G Button
TP_LOCK1 R227
1 2 TP_LOCK_BTN#_1 1 2 TP_LOCK_BTN# 35
BT_SW 1 5 470R2J-2-GP
1
1 2 BT_BTN#_1
3 4 EC51
5 SC1KP50V2KX-1GP
2
1
DY SW -TACT-5P-1-GP DY
3 4 EC5
SC1KP50V2KX-1GP 62.40009.A61
2
2009/05/23 SB Change
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SWITCH
Size Document Number Rev
A3 JV71-TR SA
Date: Monday, July 06, 2009 Sheet 39 of 61
5 4 3 2 1
5 4 3 2 1
Q29
C PW RLED#_1 R628 300R2J-4-GP PW R_LED7
B R1 PW RLED#_1 2 1 FRONT_PW RLED#_R2 K A
35 FRONT_PW RLED 5V_S5
E
R2 PW R_LED1 5V_S5 LED-B-98-GP
PDTC143ZU-GP-U 83.00193.A70 2nd = 83.19217.G70
84.00143.E1K FRONT_PW RLED#_R1 3 2
2ND = 84.00143.D1K R629 300R2J-4-GP PW R_LED8
2 1 FRONT_PW RLED#_R3 K A 5V_S5
Q30
C STDBY_LED#_BD STDBY_LED#_R 4 1 3D3V_S5 LED-B-98-GP
D B R1 SRN300J-1-GP 83.00193.A70 2nd = 83.19217.G70 D
35 STDBY_LED
E 4 5
R2 3 6 LED-OB-2-GP Q15 R630 300R2J-4-GP PW R_LED9
PDTC143ZU-GP-U 2 7 83.19223.A70 C PW RLED#_2 2 1 FRONT_PW RLED#_R4 K A 5V_S5
84.00143.E1K 1 8 2ND = 83.00195.G70 B R1
35 FRONT_PW RLED LED-B-98-GP
2ND = 84.00143.D1K R2
E
Q31 RN110 83.00193.A70 2nd = 83.19217.G70
C DC_BATFULL# PDTC143ZU-GP-U
B R1 84.00143.E1K R631 300R2J-4-GP PW R_LED10
35 DC_BATFULL 5V_AUX_S5 FRONT_PW RLED#_R5
R2
E 2ND = 84.00143.D1K 2 1 K A 5V_S5
PDTC143ZU-GP-U CHARGER_LED1 LED-B-98-GP
84.00143.E1K 83.00193.A70 2nd = 83.19217.G70
2ND = 84.00143.D1K DC_BATFULL#_R 3 2
2009/06/03 SB Change
Q32
C CHARGE_LED#
B R1 CHARGE_LED#_R 4 1
35 CHARGE_LED 3D3V_AUX_S5
E
R2
PDTC143ZU-GP-U LED-OB-2-GP
84.00143.E1K 83.19223.A70
2ND = 84.00143.D1K 2ND = 83.00195.G70
R1225
C Q14 300R2J-4-GP PW R_LED11 C
C AC_IN_LED_1 1 2 AC_IN_LED#_1 K A 5V_S5
B R1
35 AC_IN_LED R1226 300R2J-4-GP LED-B-98-GP
E
R2 1 2 AC_IN_LED#_2 83.00193.A70 2nd = 83.19217.G70
PDTC143ZU-GP-U
84.00143.E1K R1227 300R2J-4-GP PW R_LED12
2ND = 84.00143.D1K 1 2 AC_IN_LED#_3 K A 5V_S5
LED-B-98-GP
83.00193.A70 2nd = 83.19217.G70
PW R_LED13
K A 5V_S5
2009/06/04 SB Change LED-B-98-GP
83.00193.A70 2nd = 83.19217.G70
3D3V_S0
R219
Q10 TP_LOCK_LED1
3D3V_S0 C TP_LOCK_LED# 1 2 TP_LOCK_LED#_1 K A
B R1
B 35 TP_LOCK_LED B
E LED-Y-57-GP
R2 75R2J-1-GP
83.01921.P70
PDTC143ZU-GP-U 2ND = 83.00190.S7A
1
84.00143.E1K
R627 2ND = 84.00143.D1K
100KR2J-1-GP
2
D
84.00143.F1K BAW 56-5-GP Q4
2ND = 84.00143.C1K 83.00056.Q11 .
.
. .
.
84.2N702.D31
2ND = 84.2N702.E31
S
A 35 W LAN_TEST_LED A
5V_S0 2N7002E-1-GP
Q3 R6 3GBT_LED1
R1
C BT_LED# 1 2 BLT_LED#_1 K A Wistron Corporation
B 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
35 BT_LED LED-B-98-GP Taipei Hsien 221, Taiwan, R.O.C.
E 100R2J-2-GP
R2 83.00193.A70
PDTC143ZU-GP-U 2nd = 83.19217.G70 Title
84.00143.E1K
2ND = 84.00143.D1K Blue-tooth LED LED
Size Document Number Rev
A3 JV71-TR SB
Date: W ednesday, July 08, 2009 Sheet 40 of 61
5 4 3 2 1
5 4 3 2 1
2D5V_S0 3D3V_S0
4
3
RN99
SRN100KJ-6-GP
D D
1
2
C825
D27
2 1 2D5V_S0_PG 2
12,34,35,43,48,59,60 PM_SLP_S3# 1
83.00056.Q11
BAW 56-5-GP 2ND = 83.00056.G11
3RD = 83.00056.K11
R457
45 3V/5V_POK 1 DY 2
0R2J-2-GP
R456
47 1D8V_S3_PW RGD 1 DY 2
0R2J-2-GP
C C
1D8V_S3
Q9 DY
G
. .
D
.
.
.
3D3V_S5 S NB_PW RGD 9,12
U16C
14
2N7002E-1-GP
9 84.2N702.D31
12,34,35,43,48,59,60 PM_SLP_S3#
8 SB_PW RGD 12
10
B B
D3 TSLVC08APW -1-GP
7
46 1D1V_PW RGD 2
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
POWER ON LOGIC
Size Document Number Rev
A3
JV71-TR SA
Date: Monday, July 06, 2009 Sheet 41 of 61
5 4 3 2 1
5 4 3 2 1
Title
Power Block Diagram
Size Document Number Rev
A3 JV71-TR SA
Date: Monday, July 06, 2009 Sheet 42 of 61
5 4 3 2 1
5 4 3 2 1
5V_S0 5V_S5
U28 DY U67
C546 1 S D 8
SCD1U25V3KX-GP 2 S D 7 S D
5V_AUX_S5 I min = 150 mA 1 DY2 3 S D 6
3D3V_AUX_S5 4 G D 5 AO3400-1-GP-U
U11
D Change 84.03400.A37 D
G
G9 AO4468-GP
1
2
3
VINDY
GND
SHDN#
VOUT
NC#4
5
4
3D3V_AUX_S5_G 1 2
GAP-CLOSE-PW R
Run Power 84.04468.037
DCBATOUT 3D3V_S5
84.S0610.B31
1
1
BC2 G909-330T1U-GP BC1 RUN_POW ER_ON 3D3V_S0
2ND = 84.00610.C31 3D3V_S0
SC1U16V3ZY-GP
SC1U16V3ZY-GP
2nd source:74.09198.G7F 1 2 Z_12V S D U65
2
2
R522 10KR2J-3-GP Q28 1 S D 8
K
1
1
NDS0610-NL-GP R525 C921 1 R526 2 S D 7
SCD22U25V3KX-GP
330KR2J-L1-GP
D31 3 S D 6 S D
10KR2J-3-GP
2 PDZ9D1B-GP 4 G D 5
Change AO3400-1-GP-U
2 R523 1 Z_12V_G3 AO4468-GP 84.03400.A37
G
A
330KR2J-L1-GP 84.04468.037
83.9R103.C3F
3D3V_S0
1
R529
1
100KR2J-1-GP Z_12V_D4 1D8V_S0 1D8V_S3 1D8V_S3
1D8V_S0
DY R524
100R5J-3-GP U49 DY
2
U63
U96
1 S D 8
2
4 3 2 S D 7
Z_12V_D3
3D3V_runpwr 3 S D 6 S D
5 2 4 G D 5
C PM_SLP_S3# 12,34,35,41,48,59,60 AO3400-1-GP-U C
D
6 1 AO4468-GP 84.03400.A37
G
Q33 DY 84.2N702.A3F R431 84.04468.037 Change
2ND = 84.DM601.03F 1 2 1D8V_S0_ON
Z_12V_D3 2N7002KDW -GP
G
1
1MR2F-GP C795 2009/04/21 Change By John
2N7002EW -1-GP SC22P50V2JN-4GP
for TR
2
S
2
2009/04/15 ESD For 2KV By John R581 for TR
3D3V_M92 0R2J-2-GP
1D8V_S0 1D8V_M92
DIS
1
1
U44 R585
R584 3D3V_M92 3D3V_S5 1 2
DY 100R5J-3-GP 0R3J-0-U-GP
for TR S D DIS
2
G
R342 DIS
1
D
1
DY 2MR2F-GP C675 DIS
G M92_runpwr_1 U97 DIS SC22P50V2JN-4GP
2
DIS
2
2N7002EW -1-GP 4 3
DY 84.2N702.A3F
S
B DCBATOUT B
5 2 2ND = 84.DM601.03F
1
6 1 1D8V_M92 U59 1D8V_S3
R583
100KR2J-1-GP DY
2N7002KDW -GP
S D
2
DY R1220 2009/04/15 ESD For 2KV By John AO3400-1-GP-U
R509 84.03400.A37
G
1 2 PE_GPIO1_1 1 2 1D8V_M92_ON DY
K
11,59 PE_GPIO1
1
C865
0R2J-2-GP D33 1MR2F-GP SC22P50V2JN-4GP
DY R1221 PDZ9D1B-GP DY
2
DY
1 2 DY
A
48,59,60 VGA_PW R_EN
0R2J-2-GP 83.9R103.C3F
53 PE_GPIO1_1
DY R1222
1 2
R509,R342→10MΩ
60 1D5V_POK
0R2J-2-GP
C865→22pF
C675→1000pF
2009/04/21 ADD By John For VGA sequence issue
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DCBATOUT DCBATOUT_6265_2
DCBATOUT DCBATOUT_6265_3 G4 DCBATOUT_6265_1
G15 1 2
1 2
GAP-CLOSE-PW R-3-GP
GAP-CLOSE-PW R-3-GP G3 C383 C387 C382 C384
SCD1U25V3KX-GP
1 2
5
6
7
8
1
SC10U25V6KX-1GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
G16 TC8 DY VCC_CORE_S0_0
D
D
D
D
1 2 ST15U25VDM-1-GP GAP-CLOSE-PW R-3-GP U15
Design Current: 12.6A
2
G5 1 2 BSC119N03MSC-G-GP
2
GAP-CLOSE-PW R-3-GP 1 2 C374 SC33P50V2JN-3GP C377 SC180P50V2JN-1GP Peak current: 18A
1 2 OCP_min:24A
GAP-CLOSE-PW R-3-GP
G
S
S
S
D G6 1 R131 26265_FB_NB_R 1 2 D
5V_S0 44K2R2F-1-GP C376 SC1KP50V2KX-1GP
1 2 84.11903.C37 68.R3610.20A
4
3
2
1
R415 2ND = 68.R3610.20C VCC_CORE_S0_0
GAP-CLOSE-PW R-3-GP 1 2 1 2
DCBATOUT DCBATOUT_6265_1 C380 SCD1U10V2KX-4GP UGATE0 L49
G11 2R3J-GP PHASE0 1 2
1
1 2 1 R132 2 L-D36UH-1-GP
1
C768 22KR2F-GP BOOT0 1 2 Parts
GAP-CLOSE-PW R-3-GP SC1U10V3KX-3GP C346 R389 TC4 TC3 TC25
16K2R2F-GPclose to
5
6
7
8
5
6
7
8
1
SE330U2VDM-L-GP
SE330U2VDM-L-GP
G12 GNDA_VCORE SCD22U10V3KX-2GP SE330U2VDM-L-GP
D
D
D
D
D
D
D
D
1 2 U13 PWM IC
BSC057N03MSG-GP
GNDA_VCORE R1301 0R0402-PAD
2 CPU_VDDNB_RUN_FB_H 6 U12
2
1
G
S
S
S
G
S
S
S
1 2 11K3R2F-2-GP 1 4 CPU_VDDNB_RUN_FB_H C735 SCD1U16V2KX-3GP
6265_OCSET_NB
GAP-CLOSE-PW R-3-GP 5V_S0 3D3V_S0 LGATE_NB 2 3 CPU_VDDNB_RUN_FB_L R390 R402 79.33719.L01
4
3
2
1
4
3
2
1
1
G14 2R3J-GP 1 DY 2 1 DY 2 2ND = 77.C3371.051
C767 PHASE_NB SRN10J-7-GP 10R2F-L-GP NTC-10K-9-GP
6265_COMP_NB
1 2
ISP0
6265_VSEN_NB
6265_FSET_NB
SCD1U25V3KX-GP LGATE0 79.33719.L01
6265_FB_NB
2
1
1
GAP-CLOSE-PW R-3-GP UGATE_NB ISP0_R 2ND = 77.C3371.051
6265_VCC
6265_VIN
R124 R123 84.57N03.A37 84.57N03.A37 ISN0 2 1
DY 0R0603-PAD DY R122 GNDA_VCORE G8
10KR2F-2-GP 0R2J-2-GP CPU_VDDNB_RUN_FB_L_R 1 R129 2 CPU_VDDNB_RUN_FB_L 6 GAP-CLOSE-PW R-3-GP
R862 close
0R0402-PAD
to L75
2
6265_OFS/VFIXEN
3D3V_S0 DCBATOUT_6265_3
1
GNDA_VCORE
49
48
47
46
45
44
43
42
41
40
39
38
37
1
GND
VIN
VCC
FB_NB
COMP_NB
FSET_NB
VSEN_NB
RTN_NB
OCSET_NB
PGND_NB
LGATE_NB
PHASE_NB
UGATE_NB
1
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U25V3KX-GP
R403 0R2J-2-GP
10KR2F-2-GP DY
2
5
6
7
8
2
U50
D
D
D
D
2
G
S
S
S
R118 1 0R0402-PAD 6265_ENABLE SVC PGND0 LGATE0
41,46 VCORE_EN 2 6 U10 31 Peak current: 3A OCP_min:5A
4
3
2
1
6265_RBIAS ENABLE LGATE0
1 2 7 RBIAS PVCC 30
1 2 R400 93K1R2F-L-GP 6265_OCSET 8 29 LGATE1 VDDNB
OCSET LGATE1
1
R399 23K7R2F-GP 6265_VDIFF0 9 28 C320 UGATE_NB L53
6265_FB0 VDIFF0 PGND1 PHASE1 BOOT_NB 1 PHASE_NB 1
10 FB0 74.06265.B73 PHASE1 27 SC2D2U6D3V2MX-GP 2 2
6265_COMP0 11 26 UGATE1 C364 IND-3D3UH-57GP
2
GNDA_VCORE 6265_VW 0 COMP0 UGATE1 BOOT1 SCD22U10V3KX-2GP TC28
12 VW0 BOOT1 25 68.3R310.20A
SE220U2VDM-8GP
2ND = 68.3R31A.10V
5
6
7
8
1
COMP1
VDIFF1
VSEN0
VSEN1
RTN0
RTN1
G10 U53
D
D
D
D
ISN0
ISN1
ISP0
ISP1
VW1
FB1
1 2 SI4800BDY-T1
2
GAP-CLOSE-PW R-3-GP ISL6265AHRTZ-T-GP 79.22719.20L
13
14
15
16
17
18
19
20
21
22
23
24
DCBATOUT_6265_2
2ND = 77.22271.20L
GNDA_VCORE 84.04800.D37
G
S
S
S
ISP0 ISN1
6265_FB1
6265_COMP1
6265_VW1
6265_VDIFF1
4
3
2
1
ISN0 ISP1 ESR=15mohm
1D8V_S3 C181 C180 C179 C178 LGATE_NB
5
6
7
8
1
B VCC_CORE_S0_0 B
D
D
D
D
VCC_CORE_S0_1
SC10U25V6KX-1GP
SCD1U25V3KX-GP
U5 DY
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
1
BSC119N03MSC-G-GP
2
R96
1
R387 R103
DY 0R2J-2-GP
G
S
S
S
Close to 10R2J-2-GP 10R2J-2-GP VCC_CORE_S0_1
2
4
3
2
1
2ND = 68.R3610.20C
2
2
BOOT1 1 2 Parts
6 CPU_VDD1_RUN_FB_H
C288 R107 TC5 TC6 TC23
16K2R2F-GPclose to
1
5
6
7
8
5
6
7
8
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
Parallel SCD22U10V3KX-2GP 79.33719.L01
1
D
D
D
D
D
D
D
D
R388 DY R97 U14 PWM IC 2ND = 77.C3371.051
BSC057N03MSG-GP
10R2J-2-GP 10R2F-L-GP U8
1
Close to 1 2
2
BSC057N03MSG-GP R93 4K02R2F-GP
CPU socket
2
1 2
G
S
S
S
G
S
S
S
C240 SCD1U16V2KX-3GP
79.33719.L01
4
3
2
1
4
3
2
1
2ND = 77.C3371.051
R100 R379 R858 close to L77
LGATE1 1 DY 2
1 DY 2 79.33719.L01
6265_FB0_C C741 SC180P50V2JN-1GP 6265_FB1_C C261 SC180P50V2JN-1GP 10R2F-L-GP NTC-10K-9-GP 2ND = 77.C3371.051
ISP1
1 2 DY 1 2DY 84.57N03.A37 84.57N03.A37 ISP1_R
A R398 C744 C746 R98 C237 C236 A
UMA
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 ISN1 2 1
249R2F-GP C740 SC1KP50V2KX-1GP 249R2F-GP SC1KP50V2KX-1GP G7
SC4700P50V2KX-1GP SC180P50V2JN-1GP SC4700P50V2KX-1GP SC180P50V2JN-1GP C241 GAP-CLOSE-PW R-3-GP
Wistron Corporation
R102 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
R90
1KR2F-3-GP R391 C738 R392 1KR2F-3-GP C218 Taipei Hsien 221, Taiwan, R.O.C.
1 R397 2 1 2 1 2 1 2 1 2 1 2 1 2 1 R94 2
54K9R2F-L-GP 6K81R2F-1-GP Title
2 R395 1 SC180P50V2JN-1GP 2 R92 1 54K9R2F-L-GP SC1KP50V2KX-1GP 6K81R2F-1-GP
3D3V_S0
910KR2J-GP DY 3D3V_S0 DY
316KR2F-GP CPU Vcore(ISL6265HR)
6265_FB0_R 1 2 6265_FB1_R 1 2 Size Document Number Rev
2 R396 1 C742 SC1KP50V2KX-1GP 2 R91 1 C217 SC180P50V2JN-1GP
0R2J-2-GP DY 0R2J-2-GPDY A3 JV71-TR SA
Date: Monday, July 06, 2009 Sheet 44 of 61
5 4 3 2 1
5 4 3 2 1
1
1 2 1 2
GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP R591 R592
G119 G120 GAP-CLOSE-PW R-3-GP 10KR2J-3-GP 10KR2J-3-GP GAP-CLOSE-PW R-3-GP
1 2 1 2 G121 G122
D 1 2 U98 U99 1 2 D
2
GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP
G124 G123 GAP-CLOSE-PW R-3-GP 1 6 VCC_ENTIP1 1 6 VCC_ENTIP2 GAP-CLOSE-PW R-3-GP
1 2 1 2 G125 G126
1 2 3V5V_ENABLE 2 5 3V5V_ENABLE 2 5 1 2
1
GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP C940
GAP-CLOSE-PW R-3-GP 51125_ENTIP1 3 4 51125_ENTIP2 3 4 GAP-CLOSE-PW R-3-GP
DY
1
2
1
1
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2 C942 C943 1 2
2N7002KDW -GP 2N7002KDW -GP
1
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
R593 C941 R594
ST15U25VDM-1-GP
ST15U25VDM-1-GP
2
2
1 2 84.2N702.A3F 2ND = 84.DM601.03F 1 2
2
2ND = 84.DM601.03F
GAP-CLOSE-PW R-3-GP 2009/04/15 ESD For 2KV By John GAP-CLOSE-PW R-3-GP
G131 DCBATOUT_51125 2009/04/15 ESD For 2KV By John G132
1 2 2009/06/04 Wayne 1 2
1
G133
R595 1 2
2009/03/11 Wayne 100KR2J-1-GP
GAP-CLOSE-PW R-3-GP
DCBATOUT_51125 DCBATOUT_51125
2
DCBATOUT_51125
2009/03/11 Wayne C947 C952 2009/03/11 Wayne
SC10U25V6KX-1GP
SCD01U50V2KX-1GP
DY C950
1
C944 51125_EN C948 C949
1
1
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
C C945 C946 84.04800.D37 84.04800.D37 C
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
2
2
Design Current = 6A D Id=7A D
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
2
8
7
6
5
5
6
7
8
Max Current = 7A Id=7A 2009/03/20 Wayne Qg=8.7~13nC
D
D
D
D
U75 U76
D
D
D
D
OCP min = 10A Qg=8.7~13nC Rdson=23~30mohm
16
SI4800BDY-T1 SI4800BDY-T1
Rdson=23~30mohm U77
TAI-TEC 7*7*3 Design Current = 6A
VIN
DCR=17.6mohm, Irating=6A SCD1U25V3KX-GP TAI-TEC 7*7*3 Max Current = 7A
S
S
S
G
R1198
G
S
S
S
Isat=13.5A C951 R1197 C953
G S DCR=17.6mohm, Irating=6A OCP min = 10A
1
2
3
4
4
3
2
1
2009/03/11 Wayne S G 2 151125_VBST2_1 2 151125_VBST2 9 BOOT2 BOOT1 22 51125_VBST1 2 1 51125_VBST1_1 1 2
4D7R2F-GP 4D7R2F-GP Isat=13.5A
3D3V_PW R SCD1U25V3KX-GP 51125_DRVH2 10 21 51125_DRVH1 5V_PW R
L55 UGATE2 UGATE1 L56
68.3R310.20A 68.3R310.20A 2009/03/11 Wayne
2ND = 68.3R31A.10V 1 2 51125_LL2 11 20 51125_LL1 1 2
PHASE2 PHASE1
2ND = 68.3R31A.10V
51125_DRVL2 51125_DRVL1 U79
IND-3D3UH-57GP D 12 LGATE2 LGATE1 19 IND-3D3UH-57GP
1
SI4812BDY-T1-E3-GP
C954 TC35 U78
D
8
7
6
5
5
6
7
8
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
DY
SCD1U10V2KX-4GP
ST220U6D3VDM-20GP
SCD1U10V2KX-4GP
D
D
D
D
C955
51125_VO2 7 24 51125_VO1
D
D
D
D
2
VO2 VO1
1
84.04812.A37 G134 TC36
SI4812BDY-T1-E3-GP
2
1
2
1 2 51125_EN 13 23 2ND = 77.C2271.00L
S
S
S
G
G
S
S
S
R596 820KR2F-GP EN PGOOD
G S
1
2
3
4
4
3
2
1
51125_ENTIP2 6 51125_ENTIP1
S G 1
2
C956 51125_TONSEL 4 25
TONSEL GND
Id=7.7A
1
Qg=8.5~13nC
2
1
14 18 51125_VCLK 1 R597
SKIPSEL NC#18
1
1
Id=7.7A 51125_SKIPSEL Rdson=16.5~21mohm 0R2J-2-GP DY
2009/03/20 Wayne R598 DYR599 R600
VREG3
VREG5
1 2
Rdson=16.5~21mohm TPAD14-GP 51125_FB1_R
1 2
1
51125_FB2_R
2
2
C957 RT8205AGQW -GP R601 C958 DY
8
17
2
3D3V_AUX_S5 5V_AUX_S5
3D3V_AUX_S5_5_51125
DY
2
5V_AUX_S5_51125
1
1 R236 2 1 R237 2 3V/5V_POK 41
1
0R0603-PAD 0R0603-PAD
R602 R603
10KR2F-2-GP 51125_VREF 2 R604 1 2009/03/20 Wayne 20KR2F-L-GP
0R0402-PAD Close to VFB Pin (pin2)
2
2
3D3V_AUX_S5 2 1
0R2J-2-GP DY R605
1
0R2J-2-GP
A UMA A
DCBATOUT DCBATOUT_51124
G63 1D1V_PW R 1D1V_S0
1 2 DCBATOUT_51124_1 G55
1 2
1
C635
D 1 2
5
6
7
8
SCD1U25V3KX-GP
GAP-CLOSE-PW R-3-GP C633 C634
D
D
D
D
SC4D7U25V5KX-GP
D G65 GAP-CLOSE-PW R-3-GP D
SC4D7U25V5KX-GP
1 2 U37 G57
2
SI4800BDY-T1 1 2
GAP-CLOSE-PW R-3-GP 84.04800.D37
GAP-CLOSE-PW R-3-GP
G
S
S
S
79.10712.L02 G58
2ND = 79.10112.3JL G S 1 2
4
3
2
1
GAP-CLOSE-PW R-3-GP
DCBATOUT DCBATOUT_51124_1 Iomax=8A G59
G49 1 2
1 2 Vtrip(mV)=Rtrip(Kohm)*10(uA) Vo(cal)=1.1060V 1D1V_PW R
L32 GAP-CLOSE-PW R-3-GP
Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin))
SE100U25VM-L1-GP
SE390U2D5VM-2GP
G47 COIL-1UH-34-GP-U 1 2
SC18P50V2JN-1-GP
1 2 68.1R01A.20B TC16
1
1
TC21 2ND = 68.1R01B.10K R319 C623 GAP-CLOSE-PW R-3-GP
D
5
6
7
8
GAP-CLOSE-PW R-3-GP 2 R333 1 16K9R2F-GP G51
DY
D
D
D
D
G48 0R0402-PAD 3D3V_S0 U40 1 2
SC1U10V3KX-3GP
2
2
1 2 SI4172DY-T1-GE3-GP
DY
2
3D3V_S0 51124_VFB1 GAP-CLOSE-PW R-3-GP
1
GAP-CLOSE-PW R-3-GP R334 G52
1
79.10712.L02 5V_S5 1 2
G
S
S
S
2ND = 79.10112.3JL R313 10KR2J-3-GP R318 79.3971V.6AL
38K3R2F-GP GAP-CLOSE-PW R-3-GP
G S 2ND = 77.93971.02L
4
3
2
1
10KR2J-3-GP 84.04172.037 G54
2
C650 1 2
2
1
1
SC4D7U6D3V3MX-2GP
2
R327 2009/06/4 WAYNE GAP-CLOSE-PW R-3-GP
C 2R3J-GP 1D2V_PW R C
2
C654
SC1U10V2KX-1GP
C623 change to 1u10v for ESL
24
U41
2
5
1
6
7
R299 DY
2
2 1
VFB1
VFB2
VO1
VO2
PGOOD1
PGOOD2
41,44 VCORE_EN
10KR2J-3-GP
1
SC180P50V2JN-1GP
V5FILT DRVL1
16 V5IN
51124_EN1 23
51124_EN2 EN1 DCBATOUT_51124
8 EN2 1D2V_PW R 1D2V_S0
3 GND
25 10 51124_DRVH2 C666 G66
GND DRVH2
SCD1U25V3KX-GP
13 11 51124_LL2 1 2
PGND2 LL2
TONSEL
1
2 R335 1 18 12 51124_DRVL2 C664 C665
VBST1
VBST2
41,44 VCORE_EN PGND1 DRVL2
5
6
7
8
TRIP1
TRIP2
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
0R0402-PAD GAP-CLOSE-PW R-3-GP
D
D
D
D
G67
2
1 BC4 U45 1 2
SCD47U6D3V2KX-GP TPS51124RGER-GPU1 SI4800BDY-T1
17
14
22
9
4
2 DY 74.51124.073 84.04800.D37 GAP-CLOSE-PW R-3-GP
51124_TRIP1 G68
1D2V Iomax=5A
G
S
S
S
51124_TRIP2
51124_TONSEL
1 2
1
B B
OCP>10A
4
3
2
1
1
SE390U2D5VM-2GP
68.1R510.10K C657 G70
1
2ND = 68.1R51A.10F C682 TC18 1 2
1
SC1U10V3KX-3GP
C641 R329
DY
2
5
6
7
8
51124_LL1 2 1 51124_VBST1 17K8R2F-GP GAP-CLOSE-PW R-3-GP
2
SC18P50V2JN-1-GP
DY R326 U42 G71
DY
D
D
D
D
2
SI4812BDY-T1-E3-GP
SCD1U16V2KX-3GP DY R323 0R2J-2-GP 51124_VFB2 1 2
84.04812.A37
1
C661 10KR2J-3-GP GAP-CLOSE-PW R-3-GP
1
G
S
S
S
SCD1U16V2KX-3GP 2ND = 77.93971.02L
4
3
2
1
GAP-CLOSE-PW R-3-GP
2
51124_V5FILT G73
2009/06/4 WAYNE 1 2
GAP-CLOSE-PW R-3-GP
2009/03/27 WAYNE
C682 change to 1u10v for ESL
GND OPEN V5FILT
TPS51124_1D1V_1D2V
Size Document Number Rev
A3 JV71-TR SA
Date: Monday, July 06, 2009 Sheet 46 of 61
5 4 3 2 1
5 4 3 2 1
SE100U25VM-L1-GP
1
GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP
G92 G95 C868
SCD1U25V3KX-GP
1 2 1 2 C863 C867
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP
2
G93 G96
5
6
7
8
1 2 1 2
D
D
D
D
D 79.10712.L02 U61 D
2ND = 79.10112.3JL GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP FDS8884-GP
84.08884.037
5V_S5 Cyntec 10*10*4
DCR=4.2mohm, Irating=16A
G
S
S
S
Isat=33A Vo(cal)=1.8214V
4
3
2
1
1D8V Iomax=10A
1
2009/03/19 Wayne 2ND = 68.1R51A.10E 1D8V_PW R
1
C862
SC1U10V2KX-1GP
R469
300R3F-GP
L54 OCP>15A
1 2
IND-1D5UH-34-GP
R618
2
1
C861 68.1R510.10J TC32
2
5
6
7
8
1
51117A_V5FILT 2 1 51117A_VBST_1 2 1 R465 C849 C903
D
D
D
D
SC18P50V2JN-1-GP
SE330U2VDM-L-GP
U60 30KR2F-GP DY DY
SC1U10V2KX-1GP
1
SC1U10V3KX-3GP
FDS6690AS-GP 79.33719.L01
2
C850 84.06690.E37 2ND = 77.C3371.051
2
51117A_VFB
2
1
1
G
S
S
S
D29 U57 R619
DY R464
4
3
2
1
CH551H-30PT-GP 4 13 5117A_DRVH2 2R3J-GP 15117A_DRVH_1 21KR2F-GP
83.R5003.C8F V5FILT DRVH 51117A_DRVL
10 9
2
V5DRV DRVL
2009/03/27 WAYNE
2
51117A_VFB 5 12 51117A_LL add C903 for ESL
51117A_VBST VFB LL
14 VBST
3
0R2J-2-GP VOUT
PGOOD 6
1D8V_PW R 3D3V_S5 Vout=0.75*(R1+R2)/R2
12,35 PM_SLP_S5# 1 R467 251117A_EN 1 EN_PSV GND 7
C 1 R466 2 51117A_TON 2 TON PGND 8 C
1
51117A_TRIP 11 15 1D8V_PW R 1D8V_S3 1D8V_PW R
249KR2F-GP TRIP GND R468
1
2
GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP
1D8V_S3_PW RGD 41 G100 G105
2
1 2 1 2
DDR_0.9V
B Iomax=1.5A B
5V_S5 1D8V_S3 OCP>3A
1
SC1U16V3KX-2GP
2
GAP-CLOSE-PW R-3-GP
G33
U27 1 2
10 1 GAP-CLOSE-PW R-3-GP
9026_S5 VIN VDDQSNS G34
12,35 PM_SLP_S5# 1 2 9 S5 VLDOIN 2
R249 0R2J-2-GP 8 3 1 2
9026_S3 GND VTT
1 2 7 S3 PGND 4
DDR_VREF_S3 R247 0R2J-2-GP 6 5 GAP-CLOSE-PW R-3-GP
VTTREF VTTSNS
GND
2
11
74.09026.079
2ND = 74.02997.A79
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DCDC_1D8V_APW7141/LDO 0D9V
Size Document Number Rev
A3 JV71-TR SA
Date: Monday, July 06, 2009 Sheet 47 of 61
5 4 3 2 1
5 4 3 2 1
D 1D5V_S0 D
Iomax=1A
G957 1D5V_S0_LDO 1D5V_S0
G111
1 2
1
C918 DY GAP-CLOSE-PW R-3-GP
G110
SC10U6D3V5KX-1GP 1 2
2
U66 GAP-CLOSE-PW R-3-GP
3 3D3V_S0
VOUT
GND 2
VIN 1
1
C913
DY G957T65UF-GP DY SC1U10V3KX-3GP
74.95765.03C
2
1D2V_S5
For MINI Card.NEW Card power SW Iomax=400mA
U18
C 1D2V_S5 C
3D3V_S5
VOUT 2
3 VIN
GND 1
C412
2D5V
1
C410 C413 C411
1
SC1U10V3KX-3GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V5KX-1GP
G9131-12T73UF-GP DY
DY Iomax=0.2A
2
74.09131.C31
2
Place near to SB710 2D5V_LDO
3D3V_S0
2009/04/09 Change to 74.09131.C31 By John U47
G74
VOUT 2 1 2 2D5V_S0
SC1U10V3ZY-6GP
3 VIN
1 GAP-CLOSE-PW R-3-GP
GND
1
C761
C782
SC22U6D3V5MX-2GP
APL5308-25AC-1GPU
2
74.05308.F31
2ND = 74.09131.A31
B
2009/04/09 FOLLOW JM70-PU By John B
1D8V_S3
1
SC10U6D3V3MX-GP
SC10U10V5ZY-1GP SC1U10V3ZY-6GP
2
11,59 RT8202_PGOOD_VGA 1 2
0R2J-2-GP
Iomax=0.6A
1D1V_M92_PW R
DIS 1D1V_M92
R447 U48 DIS G86
9
PM_SLP_S3#1 29025_EN 1 2
12,34,35,41,43,59,60 PM_SLP_S3#
0R2J-2-GP
GND
1
1
SCD1U25V3ZY-1GP
1 2 2 7 R421 DY 1 2
2
SC10U6D3V5KX-1GP
DIS 9025_FB
1
RT9025-25PSP-GP
A
for TR R446 74.09025.03D R420 UMA A
DIS 2K2R2J-2-GP 2ND = 74.09661.07D DIS 20KR2F-L-GP
Wistron Corporation
2
LDO 2D5V/1D5V/1D2V_S5/1D1V_M92
Size Document Number Rev
A3
JV71-TR SA
Date: Monday, July 06, 2009 Sheet 48 of 61
5 4 3 2 1
5 4 3 2 1
AD+
2009/03/23 WAYNE
U30 AD+_TO_SYS DCBATOUT
8 D S 1 BT+
D S R262
7 2 U34
6 D S 3 1 2 1 S D 8
5 D G 4 2 S D 7
D01R3721F-GP-U AD+ 3 S D 6
AO4407A-GP R260 R259 4 G D 5 C23
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
2
SCD1U25V3KX-GP
84.04407.F37 AD+_G_1
1ISL88731_CSSN
1 2 1 2
G42
G43
AO4407A-GP
10KR2J-3-GP 100KR2J-1-GP
2
1
84.04407.F37
1
3
1
D R293 D
U88 470KR2J-2-GP
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
2N7002KDW -GP
1
84.2N702.A3F
2
2ND = 84.DM601.03F R287 R286
6
10R2J-2-GP 10R2J-2-GP
G62
G60
G61
G50
2009/04/15 ESD For 2KV By John
2
2
2
2 R261 1
C574 C573
10KR2F-2-GP ISL88731_ACOK
2 1 1 2
D14
A K SCD047U25V2KX-GP C577
SCD1U25V3KX-GP
1
SCD1U25V3KX-GP
CH521S-30PT-GP-U C572 CHG_AGND
ISL88731_CSSP
2
2
1
1
2ND = 83.R2003.J8F C576
SCD1U25V3KX-GP
SC1U10V3KX-3GP
C620
C626
R277 3RD = 83.R2003.F8F U32
C619
215KR3F-1-GP CHG_AGND
NC#1
5
6
7
8
1
22 28 R285
2
DCIN CSSP
D
D
D
D
4D7R3F-L-GP
ISL88731_ACIN 2 2 U36
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
2
2
ACIN ISL88731_CSSN_R CHG_AGND FDS8884-GP
27
2
CSSN
1
G
S
S
S
49K9R2F-L-GP C561 0R3J-0-U-GP 1
SCD01U50V2KX-1GP
4
3
2
1
BOOT ISL88731_LDO BAT54PT-GP
21 1 2
2
C ISL88731_ACOK VDDP C
13 ACOK
SC1U10V3KX-3GP 2009/03/23 WAYNE BT+
CHG_AGND 24 ISL88731_DHI
CHG_AGND UGATE
35,50 BAT_SCL 10 SCL 1 2 R278
C575 L31
23 ISL88731_LX SCD1U50V3KX-GP ISL88731_LX 1 2 1 2
PHASE IND-10UH-209-GP
9 68.1001C.10Y D01R3721F-GP-U
35,50 BAT_SDA SDA ISL88731_DLO
20 2ND = 68.1001B.10R
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
LGATE
2
C447 C445 C439 C438
5
6
7
8
1
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
G46
G45
D
D
D
D
14 19 U33
NC#14 PGND
R276 10R2F-L-GP FDS8884-GP
2
18 ISL88731_CSIP_R 1 2
CHG_AGND CSOP 84.08884.037
R272
1
17 C567
ISL88731_CSIP
CSON
G
S
S
S
1 2 ISL88731_IINP 8 SCD22U50V3ZY-1GP
35 AD_IA ICM
4
3
2
1
ISL88731_CSIN
1KR2F-3-GP
R274
1ISL88731_CCV1
1 2 ISL88731_CCV 6
10KR2F-2-GP VCOMP
5 NC#5 NC#16 16
1
R275
SCD01U50V2ZY-1GP
VREF
10KR2J-3-GP
C564
DY 7
SC1U10V3KX-3GP
SCD1U25V2ZY-1GP
NC#7 PBATT_SENSE_R
12 15 1 2
GND
1
C565
C569
C562
C560
2
SCD01U50V2KX-1GP
C566
B DY DY 100R2J-2-GP B
ISL88731AHRZ-T-GP
SCD015U25V2KX-GP
2
29
DY 74.88731.B73
1 2
G44
GAP-CLOSE-PW R-2U
CHG_AGND 3D3V_AUX_S5
1
R270
10KR2F-2-GP
2
AC_IN#
35 AC_IN# ISL88731_LDO
D
Q18
.
1
84.2N702.B3K . R268
2ND = 84.2N702.C3K .
. . 10KR2F-2-GP
2N7002EW -GP
2
G
S
R269 1 2 ISL88731_ACOK
A 0R0402-PAD A
UMA
1
R266
15KR2J-1-GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2
Title
ISL88731A Charger
Size Document Number Rev
A3 SA
JV71-TR
Date: Monday, July 06, 2009 Sheet 49 of 61
5 4 3 2 1
A B C D E
4 4
AD_JK
DCIN1
Adaptor in to generate DCBATOUT AD+
4
1 AD_JK
2
2 EC59 U29
SCD1U50V3KX-GP
3 DY 1 S D 8
2 S D 7
K
5 3 S D 6
1
6 D9 AD+_2 4 G D 5
C556
NP1 SCD1U50V3KX-GP P6SBMJ24APT-GP AO4407A-GP
2
83.P6SBM.AAG
A
DC-JACK174-GP 2ND = 83.P6SMB.AAG R256 C557
84.04407.F37
1
22.10037.I01 200KR2F-L-GP SC1U50V5ZY-1-GP
2ND = DIS=22.10037.I21 Q13
2
R2
2009/05/06 SB Change 2
AD_OFF#_JK 1 R1
3
1
DTA124EUB-GP R255
Q12
AD_JK 1 AFTE14P-GP TP8 3 84.00124.T1K 100KR2J-1-GP
AD_JK 1 AFTE14P-GP TP7 1 R1 2ND = 84.00124.K1K
2 3RD = 84.00124.N1K
2
R2
35 AD_OFF DTC124EUB-GP
3 3
84.00124.S1K
1
2ND = 84.00124.H1K
R257 3RD = 84.00124.M1K
1KR2F-3-GP
2
3D3V_AUX_S5
83.00099.K11
1
2
D10 DY D11 DY D12 DY
BAV99PT-GP-U BAV99PT-GP-U BAV99PT-GP-U
83.00099.K11 83.00099.K11
3
RN76 BAT1
1 8
2 BATA_SDA_1 2
35,49 BAT_SDA 2 7 3 SCL GND 1
3 6 BATA_SCL_1 4 2
35,49 BAT_SCL SDA GND
4 5 BAT_IN#_1 5 8
BAT_IN# GND
6 BT+#6 GND 9
SRN33J-7-GP 7 BT+#7
35 BAT_IN# BT+
1
DY EC13 ALP-CON7-2-GP
1
SC10P50V2JN-4GP
SC10P50V2JN-4GP
EC17 DY EC18 DY 2ND = 20.81025.007
2
2
D13 SCD1U50V3ZY-GP SCD1U50V3KX-GP 3RD = 20.81240.007
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
2
MM3Z5V6T1G-GP
2009/05/06 SB Change
83.5R603.E3F
A
2ND = 83.5R603.M3F
R8
49 BATT_SENSE 1 2
0R0402-PAD
1 UMA 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
AD/BATT CONN
Size Document Number Rev
JV71-TR SB
Date: Monday, July 06, 2009 Sheet 50 of 61
A B C D E
5 4 3 2 1
14
14
14
1
DY DY EC99 EC100 EC55 EC101 EC102 EC103 EC52 EC53 EC54 EC33 EC35 EC38
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
12 9 12
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
11 DY 8 DY 11 DY DY DY DY DY DY DY DY DY DY DY DY
2
13 10 13
7
73.07408.L16 73.07408.L16
73.07408.L16 2ND = 73.07408.L15 2ND = 73.07408.L15
D
DCBATOUT
2ND = 73.07408.L15 D
3RD = 73.07408.02B BT+ 1D8V_S3
1
1
EC7 EC8 EC9 EC10 EC12 EC20 EC46 EC25 EC37 EC21 EC15
EC701 EC702 EC703 EC704 EC705 EC706 EC707 EC708 EC709 EC710 EC711 EC712 EC713 EC714 EC715
1
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY
2
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
2
2
DCBATOUT DCBATOUT 1D8V_S3
1
1
EC113 EC118 EC119 EC114 EC120 EC115 EC121 EC116 EC122 EC123 EC117 EC128 EC130 EC125 EC129 EC126 EC131 EC127 EC132 EC124 EC133
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY DY DY DY DY
2
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY
2
C C
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
HOLE256R142-GP
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
SPRING-9-GP
DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY
DY
1
1
1
1
1
2009/06/30 PD Add for EMI
H11 SPRING_GND4 SPRING_GND5 SPRING_GND6 SPRING_GND10 SPRING_GND11 SPRING_GND12 SPRING_GND13 SPRING_GND14 SPRING_GND15 SPRING_GND16
B B
SPRING-56-GP
SPRING-41-GP
SPRING-41-GP
SPRING-43-GP-U
SPRING-43-GP-U
SPRING-62-GP
SPRING-12-GP-U
SPRING-43-GP-U
SPRING-43-GP-U
SPRING-43-GP-U
DY DY DY DY DY DY DY DY DY
SPRING-7
SPRING-7
SPRING-7
SPRING-7
DY DY DY DY
SPRING-U3
SPRING-U3
1
1
UMA
1
1
Change Change
34.4C322.001 34.3P604.001 34.3P604.001 34.15J03.001
TP228 TPAD14-GP
Wistron Corporation
1
AVGA1A 1 OF 8
for TR PEG_RXP[15..0]
PEG_TXP[15..0] 8 PEG_RXP[15..0]
8 PEG_TXP[15..0] PEG_RXN[15..0]
PEG_TXN[15..0] 8 PEG_RXN[15..0]
8 PEG_TXN[15..0]
D PEG_TXP0 AA38 Y33 PEG_RXP0_1 C222 1 2 PEG_RXP0 D
PEG_TXN0 PCIE_RX0P PCIE_TX0P PEG_RXN0_1 SCD1U16V2KX-3GP PEG_RXN0
Y37 PCIE_RX0N PCIE_TX0N Y32 1 2
C231 SCD1U16V2KX-3GP
DIS
PEG_TXP1 PEG_RXP1_1 C226 DIS PEG_RXP1
Y35 PCIE_RX1P PCIE_TX1P W33 1 2
PEG_TXN1 W36 W32 PEG_RXN1_1 SCD1U16V2KX-3GP 1 2 PEG_RXN1
PCIE_RX1N PCIE_TX1N C233 SCD1U16V2KX-3GP
DIS
PEG_TXP2 PEG_RXP2_1 C257 DIS PEG_RXP2
W38 PCIE_RX2P PCIE_TX2P U33 1 2
PEG_TXN2 V37 U32 PEG_RXN2_1 SCD1U16V2KX-3GP 1 2 PEG_RXN2
PCIE_RX2N PCIE_TX2N C238 SCD1U16V2KX-3GP
DIS
PEG_TXP3 PEG_RXP3_1 C268 DIS PEG_RXP3
V35 PCIE_RX3P PCIE_TX3P U30 1 2
PEG_TXN3 U36 U29 PEG_RXN3_1 SCD1U16V2KX-3GP 1 2 PEG_RXN3
PCIE_RX3N PCIE_TX3N C248 SCD1U16V2KX-3GP
DIS
PEG_TXP4 PEG_RXP4_1 C278 DIS PEG_RXP4
U38 PCIE_RX4P PCIE_TX4P T33 1 2
PEG_TXN4 T37 T32 PEG_RXN4_1 SCD1U16V2KX-3GP 1 2 PEG_RXN4
CALIBRATION
DIS
R89 1K27R2F-L-GP
AJ21 NC#AJ21 PCIE_CALRP Y30 1 2
2009/07//01 PD Change to 200 for reset AK21 NC#AK21
AH16 NC_PWRGOOD PCIE_CALRN Y29 1 2
R99 2KR2F-3-GP
R423 DIS
11,32,33,36 PLT_RST1#_B 1 2 PLT_RST1#_M92_1 AA30
200R2J-L1-GP PERST#
DIS
1
C780 M92-M2-GP
DY SC47P50V2JN-3GP DIS
2
71.M92M2.M01
11 M92_RST# 1 R582 2
Change to 71.M92M2.M02
0R2J-2-GP
A
DY UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
M92 PCIE
Size Document Number Rev
A3
JV71-TR SB
Date: Monday, July 06, 2009 Sheet 52 of 61
5 4 3 2 1
5 4 3 2 1
DPLL_PVDD
L7
DIS Layout notice:
for TR 1D8V_M92 1 2
BLM15BD121SS1D-GP It should be pleace near HDMI connector
DY DIS DY
C121 C123 C138 C147 DIS
1
SCD1U16V2KX-3GP
68.00084.F81 DIS AVGA1B 2 OF 8
for TR
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SCD1U16V2KX-3GP
2ND = 68.00217.701 AVGA1G 7 OF 8 0R2J-2-GP 2 1 R504 BRIGHTNESS_AMD 9,19
2
AU24 TX2P_DPAP3 C696 1DIS 2 DY
TXCAP_DPA3P TMDS_A_TXC+ 21
AV23 TX2P_DPAN3 SCD1U16V2KX-3GP C6971 DIS2 LVDS CONTROL AK27 BLON_IN_R 0R2J-2-GP 2 1 R499
for TR TXCAM_DPA3N SCD1U16V2KX-3GP
TMDS_A_TXC- 21 VARY_BL
AJ27
BLON_IN 9,35
LCDVDD_ON 19
TX2P_DPAP2 C694 DIGON
AT25 1DIS 2 TMDS_A_TX0+ 21
MUTI GFX TX0P_DPA2P TX2P_DPAN2 SCD1U16V2KX-3GP C6951
TX0M_DPA2N
AR24 DIS2 TMDS_A_TX0- 21
DPLL_VDDC 1D8V_M92 1D8V_M92 1D8V_M92 1D8V_M92 DPA SCD1U16V2KX-3GP
L6
1
2
D DIS AU26 TX2P_DPAP1 C692 1DIS 2 D
TX1P_DPA1P TMDS_A_TX1+ 21
1 2 AV25 TX2P_DPAN1 SCD1U16V2KX-3GP C6931 DIS2 AK35 RN38
1D1V_M92 TMDS_A_TX1- 21 LVDS_TXBCLK+ 19
2
BLM15BD121SS1D-GP TX1M_DPA1N SCD1U16V2KX-3GP TXCLK_UP_DPF3P SRN10KJ-5-GP
AL36 LVDS_TXBCLK- 19
R365 R367 R370 R371 TX2P_DPAP0 C690 1DIS 2 TXCLK_UN_DPF3N
AR8
DVPCNTL_MVP_0 TX2P_DPA0P
AT27 TMDS_A_TX2+ 21 DIS
SAMSUNG 10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
C122 C120 C130 C126 AU8 AR26 TX2P_DPAN0 SCD1U16V2KX-3GP C6911 DIS2 TMDS_A_TX2- 21 AJ38 LVDS_TXBOUT0+ 19
1
1
DVPCNTL_MVP_1 TX2M_DPA0N SCD1U16V2KX-3GP TXOUT_U0P_DPF2P
DY DIS DY DIS AP8 AK37 LVDS_TXBOUT0- 19
4
3
DVPCNTL_0 TXOUT_U0N_DPF2N
HYNIX
DY
DY
SC10U6D3V3MX-GP
SC1U10V3KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1R552
1R554
1R555
1R556
1R553
1R557
1R558
1R559
68.00084.F81 AW8 AR30
1
DVPCNTL_1 TXCBP_DPB3P
2ND = 68.00217.701 AR3 AT29 AH35 LVDS_TXBOUT1+ 19
2
2
DVPCNTL_2 TXCBM_DPB3N TXOUT_U1P_DPF1P
AR1 AJ36 LVDS_TXBOUT1- 19
MEM_ID0 DVPCLK TXOUT_U1N_DPF1N
AU1 AV31
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
MEM_ID1 DVPDATA_0 TX3P_DPB2P
AU3 AU30 AG38 LVDS_TXBOUT2+ 19
MEM_ID2 DVPDATA_1 DPB TX3M_DPB2N TXOUT_U2P_DPF0P
AW3 AH37
MEM_ID3 AP6
DVPDATA_2
AR32
TXOUT_U2N_DPF0N LVDS_TXBOUT2- 19 for TR
2
DVPDATA_3 TX4P_DPB1P
AW5 AT31 AF35
DVPDATA_4 TX4M_DPB1N TXOUT_U3P
AU5 AG36
DVPDATA_5 TXOUT_U3N
AR6 AT33
HYNIX-SAMSUNG
2
2
DVPDATA_6 TX5P_DPB0P
AW6 AU32
DVPDATA_7 TX5M_DPB0N LVTMDP
DVPDATA [3:2:1:0] for VRAM type R363 R368 R369 R374 AU6
DVPDATA_8
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
selection H/W strap HYNIX AT7
DVPDATA_9 TXCCP_DPC3P
AU14
AV7 AV13 AP34 LVDS_TXACLK+ 19
Should provide VRAM Table for VBios DVPDATA_10 TXCCM_DPC3N TXCLK_LP_DPE3P
AN7 AR34 LVDS_TXACLK- 19
1
DVPDATA_11 TXCLK_LN_DPE3N
request AV9
DVPDATA_12 TX0P_DPC2P
AT15
5V_S0
AT9 AR14 AW37 LVDS_TXAOUT0+ 19
DVPDATA_13 TX0M_DPC2N TXOUT_L0P_DPE2P
AR10 Q22 AU35 LVDS_TXAOUT0- 19
DVPDATA_14 DPC TXOUT_L0N_DPE2N
DVPDATA [3:0] AW10
DVPDATA_15 TX1P_DPC1P
AU16
AU10 AV15 G AR37
0100 512MB Hynix-H5PS1G63EFR-20L (500MHz)
. .
DVPDATA_16 TX1M_DPC1N TXOUT_L1P_DPE1P LVDS_TXAOUT1+ 19
SAMSUNG
AP10 AU39 LVDS_TXAOUT1- 19
HYNIX-SAMSUNG
1
1000 512MB Samsung-K4N1G164QE-HC20 (500MHz) DVPDATA_17 TXOUT_L1N_DPE1N
AV11 AT17 D
.
.
.
DVPDATA_18 TX2P_DPC0P R324
1100 512MB QIMONDA HYB18T1G161C2F-20 (500MHz) AT11
DVPDATA_19 TX2M_DPC0N
AR16
TXOUT_L2P_DPE0P
AP35 LVDS_TXAOUT2+ 19
AR12 100KR2F-L1-GP S AR35 LVDS_TXAOUT2- 19
DVPDATA_20 TXOUT_L2N_DPE0N
AW12
DVPDATA_21 TXCDP_DPD3P
AU20 DY
AU12 AT19 AN36
2
DVPDATA_22 TXCDM_DPD3N 2N7002EW-GP TXOUT_L3P
AP12 AP37
DVPDATA_23 TXOUT_L3N
TX3P_DPD2P
AT21 84.2N702.B3K
TX3M_DPD2N
AR20 2ND = 84.2N702.C3K DIS
DPD AU22
TX4P_DPD1P M92-M2-GP
It's strap for GDDR3-136ball AV21
TX4M_DPD1N
Need to Clarify I2C
TX5P_DPD0P
AT23 CRT_RED
AR22
TX5M_DPD0N CRT_GREEN
C
19 LCD_EDID_CLK AK26 C
3D3V_M92 SCL
19 LCD_EDID_DAT AJ26
SDA CRT_BLUE
AD39 CRT_RED 20
8
7
6
5
GENERAL PURPOSE I/O R
AD37
R# RN86
56 GPIO_VGA_00 AH20
GPIO_0 SRN150F-1-GP
56 GPIO_VGA_01 AH18 AE36 CRT_GREEN 20 DIS
2
GPIO_1 G
56 GPIO_VGA_02 AN16 AD35 1 2
R75 GPIO_VGA_03 GPIO_2 G#
1 AH23
GPIO_3_SMBDATA DIS 0R2J-2-GP
DIS 10KR2J-3-GP TP83 1 GPIO_VGA_04 AJ23 AF37 R80
CRT_BLUE 20
1
2
3
4
TP80 GPIO_4_SMBCLK B
DIS 56 GPIO_VGA_05 AH17
GPIO_5_AC_BATT B#
AE38
1 AJ17 DAC1
1
1
R354 2 GPIO_15_PWRCNTL_0 SCD1U16V2KX-3GP C118 C119 C182 C183 C184 C187 BLM15BD121SS1D-GP
3 CLK_27M_SSIN DY 1 AK14
GPIO_16_SSIN VDD1DI
AC33 100mA DAC1_VDD1DI
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
0R2J-2-GP Thermal_int AG30 AC34 AVSSQ DIS DIS
GPIO_17_THERMAL_INT VSS1DI
1 AN14 DIS DY DY DIS DIS DIS
2
THERMTRIP_VGA TP66 GPIO_18_HPD3
1 AM17
GPIO_19_CTF 68.00084.F81
TP79 59 PWRCNTL_1 AL13 AC30 2ND = 68.00217.701
R355 1 GPIO_20_PWRCNTL_1 R2
DIS 2 AJ14
GPIO_21_BB_EN R2#
AC31
10KR2J-3-GP AK13
56 GPIO_VGA_22 GPIO_22_ROMCSB
1 AN13 AD30 AVSSQ
TP184 JTAG_TRSTB AM23
GPIO_23_CLKREQB G2
AD31
for TR
JTAG_TRSTB G2#
1 AN23
TP65 JTAG_TDI DAC2_A2VDD 3D3V_M92 DAC1_VDD1DI 1D8V_M92
1 AK23 AF30 L17
1
TP73 JTAG_TCK B2
DIS 1 AL24
JTAG_TMS B2#
AF31
R53 TP72 1 AM24 2 R70 1 1 2
1KR2F-3-GP TP71 JTAG_TDO C173 0R0402-PAD
1 AJ19
1
GENERICA
Back Bias (body bias) which minimizes TP85 1 AK19
GENERICB C
AC32 SCD1U16V2KX-3GP C160 C159 C156 C220 C221 C204 BLM15BD121SS1D-GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC10U6D3V3MX-GP
TP76 1 AJ20 AD32 DIS
power consumption in battery modes.
2
TP81 GENERICC Y
1 AK20 AF32 DIS DY DY DY DIS DIS DIS
2
PD = Disable TP74 GENERICD COMP
1 AJ24
GENERICE_HPD4 68.00084.F81
PU = Enable TP78 1 AH26 DAC2 2ND = 68.00217.701
TP75 GENERICF
1 AH24 AD29
B TP82 GENERICG H2SYNC B
AC29
1D8V_M92 V2SYNC
for TR 21 HDMI_A_HPD AK24 100mA
HPD1
AG31 DAC2_VDD2DI
for TR
1
VDD2DI
AG32
R73 VSS2DI DAC2_A2VDDQ 1D8V_M92
L19
499R2F-2-GP VREFG VOLTAGE DIVIDER IS 130mA
DIS AG33 1 2 3D3V_M92
(VREFG = VDDR4,5(1.8V) / 3 = 0.6V) A2VDD
2mA
DAC2_A2VDD
C202
2
1
AD33 DAC2_A2VDDQ SCD1U16V2KX-3GP BLM15BD121SS1D-GP
VGA_VREFG A2VDDQ C201
AH13
VREFG DIS
AF33 DIS DY SC1U6D3V2KX-GP
2
1
A2VSSQ
68.00084.F81
R69 C152 R418 2ND = 68.00217.701
1
249R2F-GP SCD1U16V2KX-3GP AA29 1 2 DIS
2
2
DPLL_PVDD DDC/AUX AM26 U31
PLL/CLOCK DDC1CLK CRT_DDCCLK 20
120mA DDC1DATA
AN26 CRT_DDCDATA 20 DIS
AM32 R2711 2 0R2J-2-GP SMBC_G781 8 1
DPLL_VDDC DPLL_PVDD 34,35 SMBC_Therm SMBCLK VCC
Depending on OSC used select voltage divider resist AN32 AM27 R2731 2 0R2J-2-GP SMBD_G781 7 2 GPU_DPLUS
DPLL_PVSS AUX1P 34,35 SMBD_Therm SMBDATA DXP
AL27 ALERT#_G781 6 3 GPU_DMINUS
values R25 R70 to ensure XTALIN voltage level of 300mA AUX1N
DIS 5
ALERT# DXN
4
1.8V GND THERM#
AN31 AM19 HDMI_A_CLK 21
DPLL_VDDC DDC2CLK
AL19 HDMI_A_DAT 21
DDC2DATA
G781P8F-GP
R212 2 DY 1 XTALIN AV33 AN20 DIS
3 CLK_27M_M92 XTALIN AUX2P
0R2J-2-GP XTALOUT AU34 AM20
XTALOUT AUX2N
AL30
for TR
4
3
DDCCLK_AUX3P
AM30
DDCDATA_AUX3N RN75
DY
For Thermal sensor DDCCLK_AUX4P
AL29 43 PE_GPIO1_1 SRN2K2J-1-GP
GPU_DPLUS AF29 AM29 DIS
DPLUS DDCDATA_AUX4N U100
GPU_DMINUS AG29 THERMAL
for TR DMINUS
AN21 SMBD_G781 1 6 SMBD_Therm
1
2
DDCCLK_AUX5P
L10 AM21
TP77 FAN_PWM DDCDATA_AUX5N
1 AK32 2 5
TSVDD TS_FDO
1D8V_M92 1 220mA AJ32 AJ30
BLM15BD121SS1D-GP TSVDD DDC6CLK SMBC_G781 SMBC_Therm
AJ33 AJ31 3 4
A TSVSS DDC6DATA A
1
NC_DDCCLK_AUX7P 2N7002KDW-GP
SC1U10V3KX-3GP
SCD1U16V2KX-3GP
X6
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DIS 4 1 Taipei Hsien 221, Taiwan, R.O.C.
1
XTAL-27MHZ-58-GP
2
for TR
1D8V_M92
D
362mA D
for TR 0408 VDDR1+VDDRHx 1.50 V (DDR3 700 MHz) 0.93 A (RMS) / 1.2 A (peak)
DY DIS DY DIS DIS
C245 C305 C247 C246
1
AVGA1E 5 OF 8 C224
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
1D5V_M92
MEM I/O
2
PCIE
AC7 AA31
VDDR1 PCIE_VDDR
AD11 AA32
VDDR1 PCIE_VDDR
DY DIS DY DY DIS DIS DIS AF7 AA33
1
C339 C345 C341 C335 C323 C342 C195 VDDR1 PCIE_VDDR
AG10 AA34
VDDR1 PCIE_VDDR
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AJ7 V28
VDDR1 PCIE_VDDR
AK8 W29
2
VDDR1 PCIE_VDDR
AL9 W30
VDDR1 PCIE_VDDR 1D1V_M92
G11 Y31
VDDR1 PCIE_VDDR
G14
G17
VDDR1 1400mA
VDDR1
G20 G30
VDDR1 PCIE_VDDC
G23 G31
VDDR1 PCIE_VDDC
G26
VDDR1 PCIE_VDDC
H29 DIS DIS DIS DIS DIS DIS DIS DIS DIS
DIS DIS DIS DIS DIS DIS DIS G29 H30 C313 C306 C321 C337 C298 C283 C329 C276 C350
1
VDDR1 PCIE_VDDC
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C317 C219 C199 C318 C336 C188 C171 H10 J29
VDDR1 PCIE_VDDC
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC10U6D3V3MX-GP
J7 J30
VDDR1 PCIE_VDDC
J9 L28
2
VDDR1 PCIE_VDDC
K11 M28
VDDR1 PCIE_VDDC
K13 N28
VDDR1 PCIE_VDDC
K8 R28
VDDR1 PCIE_VDDC
L12 T28
VDDR1 PCIE_VDDC
L16 U28
VDDR1 PCIE_VDDC
L21
VDDR1
L23
VDDR1
DIS 1 DIS DIS DIS DY DIS DY L26 AA15
1
C330 C334 C169 C291 C302 C325 C164 VDDR1 CORE VDDC
L7 AA17
VDDR1 VDDC VCC_GFX_CORE
M11 AA20
VDDR1 VDDC
SC10U6D3V3MX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
N11 AA22
2
2
VDDR1 VDDC
P7
VDDR1 VDDC
AA24 DIS DIS DIS DIS DIS DIS DY DIS DIS DIS DIS DIS DIS DY DIS
R11 AA27
VDDR1 VDDC
U11 AB13
VDDR1 VDDC
U7 AB16
VDDR1 VDDC C216 C269 C290 C297 C267 C277 C266 C162 C210 C265 C270 C223 C228 C157 C234
C Y11 AB18 C
1
VDDR1 VDDC
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
Y7 AB21
for TR VDDR1 VDDC
AB23
VDDC
AB26
2
1D8V_M92 VDDC
L22 AB28
VDDC
DIS DIS DIS DIS DIS VDDC
AC12
1 2 VDD_CT LEVEL AC15
TRANSLATION VDDC
AC17
VDDC
POWER
BLM15BD121SS1D-GP AF26 AC20
1
AG26 AC24
VDD_CT VDDC
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
68.00084.F81 AG27 AC27
2
VDD_CT VDDC
2ND = 68.00217.701 VDDC
AD13
AD16
I/O VDDC
AD18
VDDC VCC_GFX_CORE
AF23 AD21
VDDR3 VDDC
AF24 AD23
3D3V_M92 50mA AG23
VDDR3 VDDC
AD26
VDDR3 VDDC
AG24 AF17
VDDR3 VDDC
AF20
VDDC
AF22 DIS DIS DIS DIS DY DIS DY DIS DIS DY
1
VDDC C296 C200 C165 C189 C190 C208 C235 C172 C185 C209
DIS DIS DIS DIS AF13 AG16
1
VDDR5 VDDC
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
C668 C166 C175 C191 AF15 AG18
VDDR5 VDDC
AG13 AG21
170mA
2
VDDR5 VDDC
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VDDR5 VDDC
M16
VDDC
M18
for TR AD12
VDDC
M23
VDDR4 VDDC
AF11 M26
1D8V_M92 170mA AF12
VDDR4 VDDC
N15
VDDR4 VDDC
for TR 0408 AG11
VDDR4 VDDC
N17
N20
VDDC
N22
1D5V_M92 VDDC
DIS DIS DIS DIS 68.00084.F81 N24
VRAM CLOCK
1
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VSSRHA VDDC
DIS DIS L21 R18
1
B VSSRHB VDDC B
DY DY VDDC
T15
C310 DY T17
SC1U6D3V2KX-GP C311 VDDC
T20 DIS DIS DIS DIS
2
SC1U6D3V2KX-GP VDDC
T22
40mA
1
PLL VDDC C355 C284 C300 C225
68.00084.F81 VDDC
T24
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
2ND = 68.00217.701 PCIE_PVDD AB37
PCIE_PVDD VDDC
T27
U16
2
VDDC
H7 U18
for TR H8
NC_MPV18#1 VDDC
U21
NC_MPV18#2 VDDC
U23
1D8V_M92 PCIE_PVDD VDDC
L46 U26
VDDC
DIS 40mA AM10
NC_SPV18 VDDC
V15
1 2 V17
BLM15BD121SS1D-GP VDDC
SPV10 AN9 V20
SPV10 VDDC
V22
VDDC
DIS DIS DIS AN10 V24
1
SPVSS VDDC
68.00084.F81 C729 C726 C727
VDDC
V27
2ND = 68.00217.701 VDDC
Y16
SC10U6D3V3MX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
Y18
2
VDDC VCC_GFX_CORE
Y21
VCC_GFX_CORE BACK BIAS VDDC
DIS VDDC
Y23
22mA AA13
VDDC
Y26
Y28
BBP VDDC
Y13 AH27
BBP VDDC
VDDC
AH28 DIS DIS DIS
C275 C230 C282 C274 C304
1
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
M15 C357
VDDCI
SC10U6D3V3MX-GP
C229 C211 ISOLATED N13 DY DIS
1
2
SPV10 VDDCI
T12
VDDCI
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
2
VCC_GFX_CORE
L11
DIS DIS DIS
1 2 M92-M2-GP
BLM15BD121SS1D-GP
DIS
1
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
2ND = 68.00217.701
2
A A
UMA
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
M92 POWER
Size Document Number Rev
A2
JV71-TR SA
Date: Monday, July 06, 2009 Sheet 54 of 61
5 4 3 2 1
5 4 3 2 1
AVGA1H 8 OF 8
1
DPC_VDD10 DPA_VDD10 C131 C128 C124 PCIE_VSS GND
DIS G33
PCIE_VSS GND
AA2
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
G34 AA21
PCIE_VSS GND
AN17 AN27 68.00214.091 H31 AA23
2
DPC_VSSR DPA_VSSR PCIE_VSS GND
D AP16 AP27 2ND = 68.00206.341 H34 AA26 D
DPC_VSSR DPA_VSSR PCIE_VSS GND
AP17 AP28 H39 AA28
DPC_VSSR DPA_VSSR PCIE_VSS GND
AW14 AW24 J31 AA6
DPC_VSSR DPA_VSSR PCIE_VSS GND
AW16 AW26 J34 AB12
DPC_VSSR DPA_VSSR PCIE_VSS GND
K31 AB15
PCIE_VSS GND
K34 AB17
PCIE_VSS GND
K39 AB20
PCIE_VSS GND
AP22 AP25 L31 AB22
NC_DPD_VDD18#1 NC_DPB_VDD18#1 PCIE_VSS GND
AP23 AP26 L34 AB24
NC_DPD_VDD18#2 NC_DPB_VDD18#2 PCIE_VSS GND
M34 AB27
1D1V_M92 1D1V_M92 PCIE_VSS GND
M39 AC11
PCIE_VSS GND
N31 AC13
DPB_VDD10 PCIE_VSS GND
1 R348 2 AP14 AN33 1 R65 2 N34 AC16
0R0603-PAD DPD_VDD10 DPB_VDD10 0R0603-PAD PCIE_VSS GND
AP15 AP33 P31 AC18
DPD_VDD10 DPB_VDD10 PCIE_VSS GND
P34 AC2
PCIE_VSS GND
P39 AC21
PCIE_VSS GND
R34 AC23
PCIE_VSS GND
AN19 AN29 T31 AC26
DPD_VSSR DPB_VSSR PCIE_VSS GND
AP18 AP29 T34 AC28
DPD_VSSR DPB_VSSR PCIE_VSS GND
AP19 AP30 T39 AC6
DPD_VSSR DPB_VSSR PCIE_VSS GND
AW20 AW30 U31 AD15
DPD_VSSR DPB_VSSR PCIE_VSS GND
AW22 AW32 U34 AD17
DPD_VSSR DPB_VSSR PCIE_VSS GND
V34 AD20
1D8V_M92 1D8V_M92 PCIE_VSS GND
L41
DIS DIS DIS DIS DIS DIS DIS
L9 for TR V39
W31
PCIE_VSS GND
AD22
AD24
for TR 1 2 2 R359
DIS 1 AW18 AW28 1 R358 2 1 2 W34
PCIE_VSS GND
AD27
BLM15BD121SS1D-GP DPCD_CALR DPAB_CALR BLM15BD121SS1D-GP for TR Y34
PCIE_VSS GND
AD9
1
1
C709 C708 C155 150R2F-1-GP 150R2F-1-GP C136 C132 C127 PCIE_VSS GND
DIS DIS 68.00084.F81 Y39
PCIE_VSS GND
AE2
SC10U6D3V3MX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
2ND = 68.00217.701 1D8V_M92
68.00084.F81 DPE_VDD18 AH34
DP E/F POWER DP PLL POWER
AU28 DPA_PVDD 20mA GND
AE6
AF10
2
2
DPE_VDD18 DPA_PVDD GND
2ND = 68.00217.701 AJ34 AV27 1 R51 2 AF16
SC1U6D3V2KX-GP 400mA DPE_VDD18 DPA_PVSS 0R0603-PAD GND
AF18
1D1V_M92 GND
AF21
1
L13
2
DIS DIS DIS
DPE_VDD10 AL33 AV29 DPB_PVDD 20mA F15
GND GND
GND
AG17
AG2
HCB1608KF-1-GP AM33
DPE_VDD10 DPB_PVDD
AR28 for TR F17
GND GND
AG20
1
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
C711
68.00084.F81 DPF_VDD18 AF34 DPE_PVDD for TR G2
G6
GND GND
AK11
AK31
2
1
NC_DPF_PVSS GND GND
SCD1U16V2KX-3GP
GND GND
SC10U6D3V3MX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
AH39 L22 AL6
2
DPF_VSSR GND GND
AK39
DPF_VSSR 68.00084.F81 L24
GND GND
AL8
AL34 DIS DPE_PVDD 1D8V_M92 L6 AM11
DPF_VSSR 2ND = 68.00217.701 L42 GND GND
AM34
DPF_VSSR
DIS DIS M17
GND GND
AM31
1 2 M22 AM9
BLM15BD121SS1D-GP GND GND
M24 AN11
1
C714 C715 GND GND
DIS DIS DIS N16
GND GND
AN2
2 1 AM39 DIS C713 N18 AN30
DPEF_CALR GND GND
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
68.00084.F81 N2 AN6
2
R68 GND GND
2ND = 68.00217.701 N21 AN8
150R2F-1-GP M92-M2-GP GND GND
N23 AP11
GND GND
N26 AP7
GND GND
N6 AP9
GND GND
R15 AR5
GND GND
R17 AW34
GND GND
R2 B11
GND GND
R20 B13
GND GND
R22 B15
GND GND
R24 B17
GND GND
R27 B19
GND GND
R6 B21
GND GND
T11 B23
GND GND
T13 B25
GND GND
T16 B27
B GND GND B
T18 B29
GND GND
T21 B31
GND GND
T23 B33
GND GND
T26 B7
GND GND
U15 B9
GND GND
U17 C1
GND GND
U2 C39
GND GND
U20 E35
GND GND
U22 E5
GND GND
U24 F11
GND GND
U27 F13
GND GND
U6
GND
V11
GND
V16
GND
V18
GND
V21
GND
V23
GND
V26
GND
W2
GND
W6
GND
Y15
GND
Y17
GND
Y20
GND VSS_MECH1 TP107
Y22 A39 1
GND VSS_MECH VSS_MECH2 TP108
Y24 AW1 1
GND VSS_MECH VSS_MECH3 TP154
Y27 AW39 1
GND VSS_MECH
U13
GND
V13
GND
M92-M2-GP 2009/05/16 SB Add
DIS
A A
UMA
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DP POWER_GND
Size Document Number Rev
A2
JV71-TR SA
Date: Monday, July 06, 2009 Sheet 55 of 61
5 4 3 2 1
5 4 3 2 1
H2SYNC, GENERICC
AVGA1D 4 OF 8
PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
57,58 MDB[63..0] 3D3V_M92
MAB[0..12] 57,58 THEY MUST NOT CONFLICT DURING RESET
MDB0 C5 P8 MAB0 DIS
MDB1 DQB_0 MAB_0 MAB1
C3
DQB_1 MAB_1
T9 53 GPIO_VGA_00 R63 1 2 10KR2J-3-GP GPIO_28_TDO , GPIO21_BB_EN
MDB2 E3 P9 MAB2
MEMORY INTERFACE B
MDB3 DQB_2 MAB_2 MAB3
E1
DQB_3 MAB_3
N7 DIS
MDB4 F1 N8 MAB4 R62 1 2 10KR2J-3-GP
MDB5 DQB_4 MAB_4 MAB5 53 GPIO_VGA_01
F3 N9
MDB6 DQB_5 MAB_5 MAB6
F5
DQB_6 MAB_6
U9 DIS
D MDB7 G4 U8 MAB7 R58 1 2 10KR2J-3-GP D
DQB_7 MAB_7 53 GPIO_VGA_02
MDB8 H5 Y9 MAB8 If BIOS_ROM_EN (GPIO22) = 0 If BIOS_ROM_EN (GPIO22) = 1
MDB9 DQB_8 MAB_8 MAB9
H6
DQB_9 MAB_9
W9 DIS
MDB10 J4 AC8 MAB10 R61 1 2 10KR2J-3-GP Size of the primary
DQB_10 MAB_10 53 GPIO_VGA_05
MDB11 K6 AC9 MAB11 GPIO[13,12,11] Manufacturer Part Number GPIO[13,12,11]
MDB12 DQB_11 MAB_11 MAB12
memory apertures
K5
DQB_12 MAB_12
AA7 DY
MDB13 L4 AA8 BA2 R54 1 2 10KR2J-3-GP
MDB14 DQB_13 MAB_13/BA2 BA0 BA2 57,58 53 GPIO_VGA_08
M6
DQB_14 MAB_14/BA0
Y8 BA0 57,58 128MB x000 M25P05A 0100
MDB15 M1 AA9 BA1 DY ST
MDB16 DQB_15 MAB_15/BA1 BA1 57,58
R56
256MB x001 M25P10A 0101
M3 53 GPIO_VGA_09 1 2 10KR2J-3-GP V Microelectronics
MDB17 DQB_16 DQMB#0 64MB x010 M25P20 0101
M5 H3
MDB18 DQB_17 DQMB_0 DQMB#1
N4
DQB_18 DQMB_1
H1 DIS 32MB x M25P40 0101
MDB19 P6 T3 DQMB#2 R57 1 2 10KR2J-3-GP
MDB20 P5
DQB_19 DQMB_2
T5 DQMB#3
53 GPIO_VGA_11 512MB x M25P80 0101
MDB21 DQB_20 DQMB_3 DQMB#4 1GB x
R4 AE4
MDB22 DQB_21 DQMB_4 DQMB#5 Chingis
T6
DQB_22 DQMB_5
AF5 DY 2GB x Pm25LV512A 0100
MDB23 T1 AK6 DQMB#6 R55 1 2 10KR2J-3-GP (formerly PMC)
DQB_23 DQMB_6 53 GPIO_VGA_22 4GB x Pm25LV010A 0101
MDB24 U4 AK5 DQMB#7
MDB25 DQB_24 DQMB_7
V6
MDB26 DQB_25 RDQSB0
V1 F6 DQMB#[0..7] 57,58
MDB27 DQB_26 QSB_0/RDQSB_0 RDQSB1
V3 K3
MDB28 DQB_27 QSB_1/RDQSB_1 RDQSB2
Y6 P3
MDB29 DQB_28 QSB_2/RDQSB_2 RDQSB3 RECOMMENDED SETTINGS
40.2R PN:64.40R25.6DL Y1
DQB_29 QSB_3/RDQSB_3
V5 DIS
MDB30 Y3 AB5 RDQSB4 R377 1 2 10KR2J-3-GP STRAPS PIN DESCRIPTION 0= DO NOT INSTALL RESISTOR
DQB_30 QSB_4/RDQSB_4 20,53 CRT_HSYNC
( 0.5 * VDDR1 ) ( for SSTL-1.8/SSTL-2/DDR2 ) MDB31 Y5 AH1 RDQSB5 1 = INSTALL 10K RESISTOR
MDB32 DQB_31 QSB_5/RDQSB_5 RDQSB6 R378
( 0.7 * VDDR1 ) ( for GDDR3/GDDR4 ) AA4 AJ9 20,53 CRT_VSYNC 1 2 10KR2J-3-GP X = DESIGN DEPENDANT
MDB33 DQB_32 QSB_6/RDQSB_6 RDQSB7
AB6
DQB_33 QSB_7/RDQSB_7
AM5 DIS NA = NOT APPLICABLE
MDB34 AB1 PCIE FULL TX OUTPUT SWING
DQB_34 RDQSB[0..7] 57,58
MDB35 AB3 G7 WDQSB0 Tansmitter Power Savings Enable
MDB36 DQB_35 QSB_0B/WDQSB_0 WDQSB1
DIVIDER RESISTORS DDR2 DDR3 GDDR3 AD6
DQB_36 QSB_1B/WDQSB_1
K1 53 GPIO_VGA_12
R60 1 2 10KR2J-3-GP TX_PWRS_ENB GPIO0 0= 50% Tx output swing
MDB37 AD1 P1 WDQSB2 DY
MDB38 DQB_37 QSB_2B/WDQSB_2 WDQSB3
1= Full Tx output swing
AD3
DQB_38 QSB_3B/WDQSB_3
W4 (Internal PD) 1
MVREF TO 1.8V 100R 100R 40.2R MDB39 AD5 AC4 WDQSB4 R59 1 2 10KR2J-3-GP
DQB_39 QSB_4B/WDQSB_4 53 GPIO_VGA_13
MDB40 AF1 AH3 WDQSB5 DY
MDB41 DQB_40 QSB_5B/WDQSB_5 WDQSB6
AF3
DQB_41 QSB_6B/WDQSB_6
AJ8 Transmitter De-emphasis Enable
MVREF TO GND 100R 100R 100R MDB42 AF6 AM3 WDQSB7 TX_DEEMPH_EN GPIO1 0= Tx de-emphasis disabled
MDB43 DQB_42 QSB_7B/WDQSB_7 1
AG4 WDQSB[0..7] 57,58 1= Tx de-emphasis enabled
MDB44 DQB_43 ODTB0
AH5
DQB_44 ODTB0
T7 ODTB0 57 (Internal PD)
MDB45 ODTB1
for TR 0408 MDB46
AH6
AJ4
DQB_45 ODTB1
W7 ODTB1 58
MDB47 DQB_46 CLKB0 PCIE GNE2 ENABLED
AK3 L9 CLKB0 57
1D5V_M92 MDB48 DQB_47 CLKB0 CLKB0#
C AF8
DQB_48 CLKB0#
L8 CLKB0# 57 HDMI must only be enabled on systems that are 0 = Advertises the PCI-E device C
MDB49 AF9 BIF_GEN2_EN_A GPIO2 as 2.5GT/s
MDB50 AG8
DQB_49
AD8 CLKB1 legally entitled. It is the responsibility of the system 1
MDB51 DQB_50 CLKB1 CLKB1#
CLKB1 58 designer to ensure that the system is entitled to 1 = Advertises the PCI-E device
AG7 AD7 CLKB1# 58
1
DQB_60 CSB0_1#
SCD1U16V2KX-3GP
R432 C789 C792 MDB61 AP3 ROMSO GPIO8 Serial ROM Output from ROM 0
DQB_61
SCD01U50V2KX-1GP
2
1
CKEB0 CKEB0 57
DIS MVREFDB Y12 AA11 CKEB1
MVREFDB CKEB1 CKEB1 58
MVREFSB AA12
MVREFSB WEB0# SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
N10
2
WEB0# WEB0# 57
AB11 WEB1# if BIOS_ROM_EN=1,then Config[3:0]
WEB1# WEB1# 58
ROMIDCFG[3:0] defines the ROM type X X X
GPIO[13,12,11] if BIOS_ROM_EN=0,then Config[3:0]
C793 TESTEN AD28 (Internal PD)
1
SCD1U16V2KX-3GP
CLKTESTA AK10
100R2F-L1-GP-U
CLKTESTB CLKTESTA
DIS DIS AL10 DIS AH11
2
CLKTESTB DRAM_RST
DIS DIS PWRCNTL_[1,0] GPIO[15,20] Power control signals to control the core
1
4K7R2F-GP
4K7R2F-GP
R417
1KR2F-3-GP DIS
M92-M2-GP BB_EN GPIO21 Back Bias (body bias) which minimizes
2
0V = Disable 0
GPIO DVPDATA(23:20) Initialization Behavior: This signal is input during 3D3V = Enable
reset (no reference clock is required). After reset,
(Internal PD) the default state is output low (0 V).
B The signals above can be left unconnected if not AUD[1:0] B
used. AUD[1] VGA_HSYNC
for TR 0408 00:No audio function
1D5V_M92 AUD[0] VGA_VSYNC
01:Audio for DisplayPort and HDMI
( if adapter is detected) 1
(Internal PD) 10:Audio for DisplayPort only
1
57,58 VRAM_RST
1
DY
1
DIS
R1204 C961
4K7R2F-GP SC2200P50V2KX-2GP
2
2
A A
UMA
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Memory / Straps
Size Document Number Rev
A2
JV71-TR SA
Date: Monday, July 06, 2009 Sheet 56 of 61
5 4 3 2 1
5 4 3 2 1
DDR3 1D5V_M92
K8
K2
N1
R9
AFBRAM3
VDD
VDD
VDD
VDD
DQL0
DQL1
DQL2
DQL3
E3
F7
F2
F8
MDB21
MDB20
MDB22
MDB16
1D5V_M92
K8
K2
N1
R9
AFBRAM4
VDD
VDD
VDD
VDD
DQL0
DQL1
DQL2
DQL3
E3
F7
F2
F8
MDB11
MDB14
MDB8
MDB10
B2 H3 MDB19 B2 H3 MDB15
VDD DQL4 MDB17 VDD DQL4 MDB13
D9 VDD DQL5 H8 D9 VDD DQL5 H8
G7 G2 MDB23 G7 G2 MDB9
VDD DQL6 MDB18 VDD DQL6 MDB12
R1 VDD DQL7 H7 R1 VDD DQL7 H7
N9 VDD N9 VDD
D D7 MDB27 D7 MDB5 D
DQU0 MDB28 DQU0 MDB4
A8 VDDQ DQU1 C3 A8 VDDQ DQU1 C3
A1 C8 MDB30 A1 C8 MDB3
VDDQ DQU2 MDB24 VDDQ DQU2 MDB7
C1 VDDQ DQU3 C2 C1 VDDQ DQU3 C2
C9 A7 MDB25 C9 A7 MDB0
VDDQ DQU4 MDB31 VDDQ DQU4 MDB1
D2 VDDQ DQU5 A2 D2 VDDQ DQU5 A2
E9 B8 MDB26 E9 B8 MDB6
VDDQ DQU6 MDB29 VDDQ DQU6 MDB2
F1 VDDQ DQU7 A3 F1 VDDQ DQU7 A3
H9 VDDQ H9 VDDQ
H2 C7 RDQSB3 H2 C7 RDQSB0
VDDQ DQSU W DQSB3 RDQSB3 56 VDDQ DQSU W DQSB0 RDQSB0 56
DIS DQSU# B7 W DQSB3 56 DIS DQSU# B7 W DQSB0 56
VREFD_U0 H1 VREFD_U0 H1
R1199 VREFDQ R1200 VREFDQ
VREFC_U0 M8 F3 RDQSB2 VREFC_U0 M8 F3 RDQSB1
ZQ1 VREFCA DQSL W DQSB2 RDQSB2 56 ZQ3 VREFCA DQSL W DQSB1 RDQSB1 56
1 2 L8 ZQ DQSL# G3 W DQSB2 56 1 2 L8 ZQ DQSL# G3 W DQSB1 56
K1 ODTB0 K1 ODTB0
243R2F-2-GP MAB0 ODT ODTB0 56 243R2F-2-GP MAB0 ODT ODTB0 56
N3 A0 N3 A0
MAB1 P7 MAB1 P7
MAB2 A1 CSB0#_0 MAB2 A1 CSB0#_0
P3 A2 CS# L2 CSB0#_0 56 P3 A2 CS# L2 CSB0#_0 56
MAB3 N2 T2 MAB3 N2 T2
MAB4 A3 RESET# MAB4 A3 RESET#
P8 A4 P8 A4
MAB5 P2 MAB5 P2
MAB6 A5 MAB6 A5
R8 A6 NC#T7 T7 VRAM_RST 56,58 R8 A6 NC#T7 T7 VRAM_RST 56,58
MAB7 R2 L9 MAB7 R2 L9
MAB8 A7 NC#L9 MAB8 A7 NC#L9
T8 A8 NC#L1 L1 T8 A8 NC#L1 L1
MAB9 R3 J9 MAB9 R3 J9
MAB10 A9 NC#J9 MAB10 A9 NC#J9
L7 A10/AP NC#J1 J1 L7 A10/AP NC#J1 J1
MAB11 R7 MAB11 R7
MAB12 A11 MAB12 A11
N7 A12/BC# N7 A12/BC#
C T3 J8 T3 J8 C
A13 VSS A13 VSS
M7 A15 VSS M1 M7 A15 VSS M1
VSS M9 VSS M9
VSS J2 VSS J2
BA0 M2 P9 BA0 M2 P9
56,58 BA0 BA0 VSS 56,58 BA0 BA0 VSS
BA1 N8 G8 BA1 N8 G8
56,58 BA1 BA1 VSS 56,58 BA1 BA1 VSS
BA2 M3 B3 BA2 M3 B3
56,58 BA2 BA2 VSS 56,58 BA2 BA2 VSS
VSS T1 VSS T1
VSS A9 VSS A9
CLKB0 J7 T9 CLKB0 J7 T9
56 CLKB0 CLKB0# CK VSS 56 CLKB0 CLKB0# CK VSS
56 CLKB0# K7 CK# VSS E1 56 CLKB0# K7 CK# VSS E1
VSS P1 VSS P1
CKEB0 K9 CKEB0 K9
56 CKEB0 CKE 56 CKEB0 CKE
VSSQ G1 VSSQ G1
VSSQ F9 VSSQ F9
DQMB#3 D3 E8 DQMB#0 D3 E8
56 DQMB#3 DQMB#2 DMU VSSQ 56 DQMB#0 DQMB#1 DMU VSSQ
56 DQMB#2 E7 DML VSSQ E2 56 DQMB#1 E7 DML VSSQ E2
VSSQ D8 VSSQ D8
VSSQ D1 VSSQ D1
W EB0# L3 B9 W EB0# L3 B9
56 W EB0# CASB0# WE# VSSQ 56 W EB0# CASB0# WE# VSSQ
56 CASB0# K3 CAS# VSSQ B1 56 CASB0# K3 CAS# VSSQ B1
RASB0# J3 G9 RASB0# J3 G9
56 RASB0# RAS# VSSQ 56 RASB0# RAS# VSSQ
DIS DIS
H5TQ1G63BFR-12C-GP SAMSUNG 72.41164.H0U H5TQ1G63BFR-12C-GP
72.51G63.C0U HYUNIX 72.51G63.C0U 72.51G63.C0U
CLKB0#
B for TR for TR B
CLKB0
56,58 DQMB#[0..7] 1D5V_M92 1D5V_M92
1
R409 R408
56,58 RDQSB[0..7]
1
1
DIS
56R2F-1-GP
56R2F-1-GP
DIS
56,58 W DQSB[0..7] DIS DIS
2
R405 R425
4K99R2F-L-GP 4K99R2F-L-GP
2
2
MAB[0..12] VREFC_U0 VREFD_U0
56,58 MAB[0..12]
1
1
1
1
SCD1U16V2KX-3GP
4K99R2F-L-GP
4K99R2F-L-GP
C788 R424
SCD1U16V2KX-3GP
DIS C763
2
2 SCD47U6D3V2KX-GP
1D5V_M92 for TR
DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS
C812 C796 C783 C390 C399 C813 C804 C748 C758 C756 C755 C747 C757 C764 C765 C743 C821 C818
1
1
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
A UMA A
2
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DDR3 B0
Size Document Number Rev
A3
JV71-TR SB
Date: Monday, July 06, 2009 Sheet 57 of 61
5 4 3 2 1
5 4 3 2 1
K8 E3 MDB42 K8 E3 MDB52
VDD DQL0 MDB41 VDD DQL0 MDB50
K2 VDD DQL1 F7 K2 VDD DQL1 F7
N1 F2 MDB46 N1 F2 MDB48
VDD DQL2 MDB43 VDD DQL2 MDB49
R9 VDD DQL3 F8 R9 VDD DQL3 F8
B2 H3 MDB44 B2 H3 MDB53
VDD DQL4 MDB40 VDD DQL4 MDB54
D9 VDD DQL5 H8 D9 VDD DQL5 H8
G7 G2 MDB47 G7 G2 MDB51
VDD DQL6 MDB45 VDD DQL6 MDB55
D R1 VDD DQL7 H7 R1 VDD DQL7 H7 D
N9 VDD N9 VDD
D7 MDB37 D7 MDB61
DQU0 MDB35 DQU0 MDB62
A8 VDDQ DQU1 C3 A8 VDDQ DQU1 C3
A1 C8 MDB38 A1 C8 MDB58
VDDQ DQU2 MDB39 VDDQ DQU2 MDB56
C1 VDDQ DQU3 C2 C1 VDDQ DQU3 C2
C9 A7 MDB34 C9 A7 MDB60
VDDQ DQU4 MDB32 VDDQ DQU4 MDB59
D2 VDDQ DQU5 A2 D2 VDDQ DQU5 A2
E9 B8 MDB36 E9 B8 MDB57
VDDQ DQU6 MDB33 VDDQ DQU6 MDB63
F1 VDDQ DQU7 A3 F1 VDDQ DQU7 A3
H9 VDDQ H9 VDDQ
H2 C7 RDQSB4 H2 C7 RDQSB7
VDDQ DQSU W DQSB4 RDQSB4 56 VDDQ DQSU W DQSB7 RDQSB7 56
DIS DQSU# B7 W DQSB4 56 DIS DQSU# B7 W DQSB7 56
VREFD_U2 H1 VREFD_U2 H1
R1201 VREFDQ R1202 VREFDQ
VREFC_U2 M8 F3 RDQSB5 VREFC_U2 M8 F3 RDQSB6
ZQ2 VREFCA DQSL W DQSB5 RDQSB5 56 ZQ4 VREFCA DQSL W DQSB6 RDQSB6 56
1 2 L8 ZQ DQSL# G3 W DQSB5 56 1 2 L8 ZQ DQSL# G3 W DQSB6 56
K1 ODTB1 K1 ODTB1
243R2F-2-GP MAB0 ODT ODTB1 56 243R2F-2-GP MAB0 ODT ODTB1 56
N3 A0 N3 A0
MAB1 P7 MAB1 P7
MAB2 A1 CSB1#_0 MAB2 A1 CSB1#_0
P3 A2 CS# L2 CSB1#_0 56 P3 A2 CS# L2 CSB1#_0 56
MAB3 N2 T2 MAB3 N2 T2
MAB4 A3 RESET# MAB4 A3 RESET#
P8 A4 P8 A4
MAB5 P2 MAB5 P2
MAB6 A5 MAB6 A5
R8 A6 NC#T7 T7 VRAM_RST 56,57 R8 A6 NC#T7 T7 VRAM_RST 56,57
MAB7 R2 L9 MAB7 R2 L9
MAB8 A7 NC#L9 MAB8 A7 NC#L9
T8 A8 NC#L1 L1 T8 A8 NC#L1 L1
MAB9 R3 J9 MAB9 R3 J9
MAB10 A9 NC#J9 MAB10 A9 NC#J9
L7 A10/AP NC#J1 J1 L7 A10/AP NC#J1 J1
C MAB11 R7 MAB11 R7 C
MAB12 A11 MAB12 A11
N7 A12/BC# N7 A12/BC#
T3 A13 VSS J8 T3 A13 VSS J8
M7 A15 VSS M1 M7 A15 VSS M1
VSS M9 VSS M9
VSS J2 VSS J2
BA0 M2 P9 BA0 M2 P9
56,57 BA0 BA0 VSS 56,57 BA0 BA0 VSS
BA1 N8 G8 BA1 N8 G8
56,57 BA1 BA1 VSS 56,57 BA1 BA1 VSS
BA2 M3 B3 BA2 M3 B3
56,57 BA2 BA2 VSS 56,57 BA2 BA2 VSS
VSS T1 VSS T1
VSS A9 VSS A9
CLKB1 J7 T9 CLKB1 J7 T9
56 CLKB1 CLKB1# CK VSS 56 CLKB1 CLKB1# CK VSS
56 CLKB1# K7 CK# VSS E1 56 CLKB1# K7 CK# VSS E1
VSS P1 VSS P1
CKEB1 K9 CKEB1 K9
56 CKEB1 CKE 56 CKEB1 CKE
VSSQ G1 VSSQ G1
VSSQ F9 VSSQ F9
DQMB#4 D3 E8 DQMB#7 D3 E8
56 DQMB#4 DQMB#5 DMU VSSQ 56 DQMB#7 DQMB#6 DMU VSSQ
56 DQMB#5 E7 DML VSSQ E2 56 DQMB#6 E7 DML VSSQ E2
VSSQ D8 VSSQ D8
VSSQ D1 VSSQ D1
W EB1# L3 B9 W EB1# L3 B9
56 W EB1# CASB1# WE# VSSQ 56 W EB1# CASB1# WE# VSSQ
56 CASB1# K3 CAS# VSSQ B1 56 CASB1# K3 CAS# VSSQ B1
RASB1# J3 G9 RASB1# J3 G9
56 RASB1# RAS# VSSQ 56 RASB1# RAS# VSSQ
DIS DIS
H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP
72.51G63.C0U
B
SAMSUNG 72.41164.H0U B
56,57 DQMB#[0..7]
HYUNIX 72.51G63.C0U CLKB1#
CLKB1
56,57 RDQSB[0..7] 1D5V_M92 1D5V_M92
1
for TR for TR R362 R361
56,57 W DQSB[0..7]
1
DIS DIS
56R2F-1-GP
56R2F-1-GP
MAB[0..12] R373 DIS R346 DIS
56,57 MAB[0..12]
2
4K99R2F-L-GP 4K99R2F-L-GP
2
VREFC_U2 VREFD_U2
MDB[63..0]
56,57 MDB[63..0]
1
1
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1
4K99R2F-L-GP
R372
4K99R2F-L-GP
DIS 2 SCD47U6D3V2KX-GP
2
1D5V_M92
for TR
DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS
A C192 C170 C663 C660 C144 C212 C163 C214 C724 C671 C672 C676 C683 C688 C698 C662 C710 C728 UMA A
1
1
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
Wistron Corporation
2
2
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
M92 DDR3 B1
Size Document Number Rev
A3
JV71-TR SB
Date: Monday, July 06, 2009 Sheet 58 of 61
5 4 3 2 1
5 4 3 2 1
DCBATOUT DCBATOUT_8202_VGA
G142
1 2
GAP-CLOSE-PW R-3-GP
G143 5V_S5
1 2
1
GAP-CLOSE-PW R-3-GP
G144 R454
TC30 1 2 DIS 10R2F-L-GP
1
SE100U25VM-L1-GP
2
G145 RT8202_VDD_VGA
2
1 2
1
D28
GAP-CLOSE-PW R-3-GP DIS C831 CH521S-30-GP-U1 DIS DIS DIS DIS
Iomax=8A, OCP>12A
5
6
7
8
DCBATOUT_8202_VGA SC1U10V3ZY-6GP DIS C824 C823 C828 C826
1
D
D
D
D
3D3V_S0 83.00521.01F U51
VGA_CORE_PW R VCC_GFX_CORE
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SCD1U50V3KX-GP
1 R461 2 RT8202_TON_VGA 5V_S5
2
1MR2F-GP SI4800BDY-T1
RT8202_BST_VGA
79.10712.L02
2
1
1
2ND = 79.10112.3JL DIS C842 84.04800.D37 DIS G77
3RD = 79.10712.6JL R449 SC1KP50V2KX-1GP 1 2
1
10KR2F-2-GP
G
S
S
S
DY DIS
2
DIS C830 GAP-CLOSE-PW R-3-GP
R450
4
3
2
1
SC1U10V3ZY-6GP DIS G78
2
2
11,48 RT8202_PGOOD_VGA 2 1 1 2
9
U55 1 2RT8202_LX_VGA DIS
1
VDD
VDDP
C827 R460 C835 L50 G80
SC100P50V2JN-3GP 16 13 RT8202_BST_VGA_L
1 2 SCD1U25V3KX-GP RT8202_LX_VGA 1 2 1 2
2
5
6
7
8
8 RT8202_DL_VGA 68.1R51A.10E DIS G81
LGATE R455
1
D
D
D
D
2 1 RT8202_EN_VGA 15 U52 2ND = 68.1R510.10J C843 1 2
12,34,35,41,43,48,60 PM_SLP_S3# EN/DEM
1
D38 10 RT8202_OC_VGA_L 1 2 RT8202_LX_VGA SI4172DY-T1-GE3-GP DY TC26
OC
1
SC1U10V3KX-3GP
83.R5003.C8F DY CH551H-30PT-GP C846 DY 3 RT8202_FB_VGA DIS SE390U2D5VM-2GP GAP-CLOSE-PW R-3-GP
2
FB G82
2ND = 83.R5003.H8H 5 DIS DIS
2
R577 NC#5 VGA_CORE_PW R 8K2R2F-1-GP
14 1 1 2
2
SCD1U25V3ZY-1GP
NC#14 VOUT
G
S
S
S
12,34,35,41,43,48,60 PM_SLP_S3# 1 2 84.04172.037
PGND
0R2J-2-GP GAP-CLOSE-PW R-3-GP
GND
GND
4
3
2
1
C
DIS 79.3971V.6AL G84 C
2ND = 77.93971.02L 1 2
RT8202APQW -GP
for TR
17
6
74.08202.A73 GAP-CLOSE-PW R-3-GP
G79
R625 DY RT8202_DL_VGA 1 2
1 2
43,48,60 VGA_PW R_EN 0R2J-2-GP GAP-CLOSE-PW R-3-GP
G75
2009/06/04 WAYNE 1 2
GAP-CLOSE-PW R-3-GP
G83
Vout=0.75*(1+Rh/Rl) 1 2
SC47P50V2JN-3GP
GAP-CLOSE-PW R-3-GP
1
DIS G76
1
R459 1 2
C833 16KR2F-GP 2009/04/10 Vout Change 0.9v to 0.95v by John
DIS GAP-CLOSE-PW R-3-GP
2
RT8202_FB_VGA
2009/04/10 Vout Change 0.9v to 0.95v By John
1
1
R452 R458 R451
DIS 59KR2F-GP DY 110KR2F-L-GP DIS 47KR2F-GP
2
2
B B
DY
D
D
Q26 Q25 DIS
. .
84.2N702.B3K 84.2N702.B3K
.
. . 2ND = 84.2N702.C3K .
. . 2ND = 84.2N702.C3K
2009/04/10 FOLLW SJM50-TR for TR DIS . .
2N7002EW -GP 2N7002EW -GP
R463 DIS
G
G
S
S
R453
3D3V_S0 NV_VID1 1 2 NV_VID0 1 2
PW RCNTL_1 53 PW RCNTL_0 53
DY
10KR2J-3-GP 10KR2J-3-GP
1
1
100KR2J-1-GP DY
R623 C848 DIS C829
DY SCD1U10V2KX-4GP SCD1U10V2KX-4GP
2
2
DY D37
2
PE_GPIO1 2
11,43 PE_GPIO1
BAW 56-5-GP 3 VGA_PW R_EN
VGA_PW R_EN 43,48,60
SC1U6D3V2KX-GP
C978
0R2J-2-GP
DY 83.00056.Q11 DY
2
2ND = 83.00056.G11
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
RT8202A_VGA CORE
Size Document Number Rev
A3
JV71-TR SA
Date: Monday, July 06, 2009 Sheet 59 of 61
5 4 3 2 1
5 4 3 2 1
1
TC39 G137 84.04800.D37
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
1 2
SE100U25VM-L1-GP
DY D
2
5
6
7
8
GAP-CLOSE-PW R-3-GP
2 U84 DY DY DY
D
D
D
D
SI4800BDY-T1
D 79.10712.L02 D
2ND = 79.10112.3JL
3RD = 79.10712.6JL Id=5A DY
Qg=8.7~13nC,
G
S
S
S
G S
4
3
2
1
Rdson=23~30mohm Iomax=3A
OCP>6A
1D5V_VRAM 1D5V_VRAM 1D5V_M92
5V_S5
L57 DY G138
Vo(cal)=1.8046V
1 2 1 2
1 84.04800.D37 DY DY
IND-5D6UH-45-GP GAP-CLOSE-PW R-3-GP
1
R1206 C969 C967 C966 TC38 G139
D
1
5
6
7
8
2ND = 79.22710.6AL
79.22710.E0L
C965 DY 300R3F-GP DY DY DY 1 2
SE220U6D3VM-8GP
R1207
1
SC1U10V2KX-1GP DY C968 U85
D
D
D
D
2
SC18P50V2JN-1-GP
SCD1U10V2KX-4GP
SC1U10V3KX-3GP
1 2 51117_VBST_1 2 1 SI4800BDY-T1 R1208 GAP-CLOSE-PW R-3-GP
2
C970 DY
2
1
G
S
S
S
D36 G141
R1209 G S
2
4
3
2
1
1
DY CH551H-30PT-GP U86 DY 1 2
83.R5003.C8F 4 13 51117_DRVH 1 2 51117_DRVH_1 R1210
VDD UGATE 51117_DRVL 3D3R2F-GP 47KR2F-GP GAP-CLOSE-PW R-3-GP
2ND = 83.R5003.H8H 10 9
2
VDDP LGATE
3RD = 83.5R003.08F DY
51117_1D8V_VFB 5 12 51117_LL
2
51117_VBST FB PHASE
14
C BOOT DY 3 C
20081128 VOUT
PGOOD 6 1D5V_PGOOD 1 2
1D8V_PW R
3D3V_S0 Id=5A
5912_EN_U87 1 7 R1213
1 R1212 2 51117_TON 2
EN/DEM GND
8
Qg=8.7~13nC,
TON PGND 10KR2J-3-GP
DY 249KR2F-GP 51117_TRIP1 11 CS NC#15 15 Rdson=23~30mohm
DY
1
RT8209BGQW -GP
DY R1214
16KR2F-GP
2
20090108_SB Wayne
1D5V_S0
Iomax=3.16A
B B
3D3V_S0
1D8V_S3 OCP>6A
5V_S5
1
1
C972 DIS C973 DIS
DIS C971 SC10U6D3V3MX-GP SC10U6D3V3MX-GP
2
SC1U16V3KX-2GP
2
R1215
10KR2J-3-GP DY
1
DY U87
6
R1224
VCNTL
1 2 1D5V_PGOOD 7 5
43 1D5V_POK POK VIN
0R2J-2-GP 9 Vo(cal.)=1.5096V
R1216 VIN 1D5V_VRAM
1 2 5912_EN_U87 8 3
12,34,35,41,43,48,59 PM_SLP_S3# EN VOUT
0R2J-2-GP DIS DIS VOUT 4
DIS DIS DIS DIS
1
FB
SC47P50V2JN-3GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2 26K7R3F-GP
43,48,59 VGA_PW R_EN
2
0R2J-2-GP
APL5912-KAC-GP
1
R1223 SO-8-P
A 48 9025_POK 1 2 UMA A
1
0R2J-2-GP
DY R1218
DIS 30K1R3F-GP
2009/04/09 74.05912.A71 Wistron Corporation
1
Title
RT8209B/APL5912_1D5V_ VRAM
Size Document Number Rev
A3
JV71-TR SA
Date: Monday, July 06, 2009 Sheet 60 of 61
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A UMA A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
HISTORY
Size Document Number Rev
A3 JV71-TR SA
Date: Monday, July 06, 2009 Sheet 61 of 61
5 4 3 2 1