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Welcome to the FT232BM Designer’s Guide. The Designers Guide includes printouts of a number of FT232BM
reference schematics and explanations of the key points of each schematic. These are intended to be used in
conjunction with the FT232BM data sheet, the current version of which should also be downloaded from the
FTDI web site.
The schematic files are downloadable separately as a ZIP archive which contains the schematics both in
OrCAD SDT 16-bit DOS format and in OrCAD Capture for Windows 32-bit format.
The OrCAD SDT 16-bit DOS format schematics are readable by OrCAD SDT version 3.2 and above. These
consist of files with the following extensions –
• .sch = OrCAD 16-bit DOS binary schematic file
• .lib = OrCAD 16-bit DOS binary component library file
• .src = OrCAD DOS library source ( text ) file
The OrCAD Capture for Windows schematics are readable by OrCAD Capture version 7.2 and above. These
consist of a file with a .dsn extension.
OrCAD 16-bit DOS schematics can be imported into Protel schematic capture for Windows. Before reading in
the schematic ( .sch ) file, create a Protel library first by reading in the OrCAD library source ( .src ) file and
save it in Protel binary library format. Both OrCAD and Protel use the same default extensions for schematic
and library files, so if you do not wish to overwrite the original OrCAD files, save the Protel versions to a
different folder.
DG232 Version 2.0 © Future Technology Devices Intl. Ltd. 2002/2003 Page 1 of 16
FB1
1 2 VCC VCC VCC VCC
USB
FERRITE BEAD
CN1
CN-USB C5 R3
1 10nF
470R
2 C7
Figure 1.0
3 0.1uF
4
C4 C6
5
33nF 0.1uF
U1 VCC-5v
30
3
26
13
6 25 TXD
VCC
VCC
3V3OUT TXD
AVCC
VCC-IO
24 RXD
R4 27R RXD
16
TXDEN
28 15
XTOUT PWREN#
VCC 4 14
RESET# PWRCTL
12
TXLED#
32 11
EECS RXLED#
1
EESK
2 10 SLEEP# POWERDN#
EEDATA SLEEP#
DECOUPLING CAPS
31 RSTOUT# RESET#
VCC TEST
AGND
GND
GND
GND
FT232BM
29
9
17
R7
47k
C3 C2 C1
10uF 0.1uF 0.1uF VCC
U2
1 8
CS VCC
2 7
SK NC
3 6
DIN NC
R1
FT232BM – 5 volt Bus Powered Example Schematic ( 232-5VB )
10k
FT232BM Designers Guide
Page 2 of 16
INTERFACING TO 5 V LOGIC - BUS POWERED ( <= 100mA ) APPLICATION
FT232BM Designers Guide
Figure 1.0 is an example of a 5 volt, USB bus powered design using the FT232BM connected to a 5v MCU or
other external logic.
• In this example, we assume that the total current of the design is <= 100mA ( low power ), and that the
MCU / logic can detect USB suspend mode using either the SLEEP# or PWREN# pins of the FT232BM and
put itself and any circuitry it is controlling into a low power state in order to meet the total USB suspend
current requirement of 500uA or less.
• RSTOUT# is used to provide a power-on reset to the external logic in this example. If the MCU has it’s
own power-on reset logic then there is usually no need to use RSTOUT# to reset the device and this
connection and the 47k pull-down can be omitted.
• PWRCTL is tied to GND to tell the device to indicate a bus powered device in it’s USB descriptor.
• RTS / CTS handshaking is used in this example. If the MCU has no dedicated handshaking signals then
general purpose IO pins can usually be used to implement the handshaking. If the MCU is guaranteed to
accept data sent from the FT232BM at the programmed baud rate, then a single wire handshake will do (
tie CTS# of the FT232BM to GND ).
• SLEEP# goes inactive ( high ) at power-on and goes low during USB suspend. PWREN# is high on
power-on and only goes low ( active ) after the device has been configured ( successfully enumerated )
by USB. During USB suspend PWREN# will go high – the opposite polarity to SLEEP#. For a low power
bus powered USB device , either SLEEP# or PWREN# can be used for power control, however for a high
power bus powered USB device ( 100mA .. 500mA ) you must use PWREN# for power control as no USB
device is allowed to draw more than 100mA from the bus until USB configuration is complete.
• RSTOUT# has no pull-down capability – it drives to 3.3v when not in reset, and goes tri-state during
power-on reset. If used to reset an external device, a pull-down resistor must be added to make it low
during reset.
• When RTS/CTS hardware handshaking is enabled CTS# can be used to stop the FT232BM transmitting
data to the MCU / external logic. When CTS# is active ( low ) the FT232BM will transmit any data in it’s
internal buffers. On taking CTS# high, the FT232BM will stop transmitting data. Due to the asynchronous
nature of the interface, there is a latency of 0 to 3 characters between taking CTS# high and data
transmission stopping. The FT232BM drives RTS# high when the available buffer space inside the device
drops below 32 bytes. This allows the MCU / logic to continue to send up to 30 characters to the FT232BM
after RTS# goes high without causing buffer over-run.
• A suitable 3-pin ceramic resonator could be a Murata CSTCR6M00G15 or equivalent. See http://
www.murata.com/catalog/p63e.pdf for details If you prefer to use a 2 pin resonator or a crystal refer to
Figures 4 and 5 of the FT232BM data sheet for details.
• A suitable ferrite bead could be a Steward MI0805K400R-00 or equivalent. This is also available from
DigiKey as Part # 240-1035-1. For specifications consult the Steward web site - http://www.steward.com
DG232 Version 2.0 © Future Technology Devices Intl. Ltd. 2002/2003 Page 3 of 16
VCC VCC VCC
USB
CN1
CN-USB R3
1 470R
2 R4 27R C6
Figure 2.0
3 0.1uF
4
R5 27R
C4 C5
5
33nF 0.1uF
U1 VCC-5v
30
3
26
13
R7 6 25 TXD
VCC
VCC
R6 1k5 3V3OUT TXD
AVCC
VCC-IO
10k 24 RXD
RXD
AGND
GND
GND
GND
FT232BM
29
9
17
C3 C2 C1
10uF 0.1uF 0.1uF VCC
U2
1 8
CS VCC VCC
2 7
SK NC
3 6
DIN NC
GND
R1
FT232BM – 5 volt Self Powered Example Schematic ( 232-5VS )
10k
FT232BM Designers Guide
Page 4 of 16
INTERFACING TO 5 V LOGIC - SELF POWERED APPLICATION
Figure 2.0 is an example of a 5 volt, USB self powered design using the FT232BM connected to a 5v MCU or
other external logic. A USB self power design has it’s own PSU and does not draw it’s power from the USB
bus. In such a case, no special care need be taken to meet the USB suspend current ( 0.5mA ) as the device
does not get its power from the USB port.
• In this case it is still useful to connect SLEEP# ( or PWREN# ) to the CPU as this will let the CPU know
that the PC is in suspend mode and thus unable to communicate with the device. If the device requires to
“wake up” the PC then the MCU should connect one of it’s IO Ports to the Ring Indicator pin ( RI# ). The
default state of RI# should be high - strobing this low for a few milliseconds then taking it high again will
cause a USB resume sequence thus requesting the PC to wake up. To use this feature, Remote Wake-Up
must be enabled in the 93C46 EEPROM.
• PWRCTL is tied to VCC to tell the device to indicate a self powered device in it’s USB descriptor.
• RTS / CTS handshaking is used in this example. If the MCU has no dedicated handshaking signals then
general purpose IO pins can usually be used to implement the handshaking. If the MCU is guaranteed to
accept data sent from the FT232BM at the programmed baud rate, then a single wire handshake will do (
tie CTS# of the FT232BM to GND ).
• Self powered designs should NOT force current back into the Host PC ( or HUB ) via the USB Port when
the said Host / Hub is powered down and the self powered device is still powered-up from it’s own
PSU. This rule includes injecting current into the powered down Host / Hub via the 1k5 pull-up on USB
D+. Failure to do this can result in unreliable operation in the field. This is an integral part of the USB
specification and applies to all USB Self Powered devices ( not just FT232BM peripherals ). In this design,
the presence of power on the host/hub USB port is used to control the RESET# pin of the FT232BM.
When the Host / Hub is powered up RSTOUT# pulls the top end of the 1k5 resistor on USB D+ to 3.3v
nominal thus identifying the device as a full speed device to USB. When the Host / HUB powers down,
the FT232BM is reset and RSTOUT# will go low thus preventing current being injected into the Host / Hub
USB D+ line via the 1k5 resistor.
DG232 Version 2.0 © Future Technology Devices Intl. Ltd. 2002/2003 Page 5 of 16
FB1
1 2 VCC VCC VCC
USB
FERRITE BEAD Q1
CN1
CN-USB C5 R3
1 10nF
Figure 3.0
470R
2 IRLML6402 Soft Start C7
3 Circuit 0.1uF
4 C8
0.1uF
C4 C6
5
33nF 0.1uF
U1 VCC-5v
30
3
26
13
6 25 TXD
VCC
VCC
3V3OUT TXD
AVCC
DTR# 21
R6 1k5
5 RSTOUT# DSR# 20
DCD# 19
27 XTIN
Y1 18 R7 5v MCU or Logic cct
RI#
6MHz RESONATOR 1k
TXDEN 16
28 XTOUT PWREN# 15
TXLED# 12
32 EECS RXLED# 11
1 EESK
2 EEDATA SLEEP# 10
DECOUPLING CAPS
31 TEST
VCC
AGND
GND
GND
GND
FT232BM
29
9
17
C3 C2 C1
10uF 0.1uF 0.1uF VCC
U2
1 CS VCC 8
2 7
93C46/56/66
R2 ( Optional )
2k2
R1
10k
FT232BM Designers Guide
Page 6 of 16
FT232B APPLICATION SCHEMATIC
POWERED APPLICATION
FT232BM – 5 volt Bus Powered Example Schematic with Power Switching ( 232-5VSW )
Figure 3.0 is an example of a 5 volt, USB bus powered design using the FT232BM connected to a 5v MCU or
other external logic. In this design, the FT232BM controls the power to the auxiliary circuitry using PWEREN#
to shut off power to this circuitry when –
• A P-Channel Logic Level MOSFET is used as a power switch to control the power to the auxiliary devices
– in this example we use a International Rectifier part number IRLML6402. R7 and C8 form a “soft start”
circuit which limits the current surge when the MOSFET turns on. Without this, there is a danger that the
transient power surge of the MOSFET turning on will reset the FT232BM or the USB Host / Hub controller.
The values used allow the attached circuitry to power up with a slew rate of ~ 12.5v per millisecond, in
other words the output voltage will transitioning from GND to 5v in around 400uS.
• When using this circuit, enable the “Pull-Down on Suspend” option in the EEPROM. This will ensure
minimum leakage current during sleep ( suspend ) mode by gently pulling down the UART interface pins
of the FT232BM pins to GND during USB suspend.
• The auxiliary circuitry attached to the FT232BM device must have it’s own power-on-reset circuitry and
should NOT use RESETO# to generate a reset for this circuitry. RESETO# does not generate a reset
during USB sleep ( suspend ) when the auxiliary logic is powered-off, thus cannot be used as a reset in
this case.
• A “USB High-Power Bus Powered Device” ( one that consumes more than 100mA and up to 500mA )
of current from the USB bus during normal operation must use this power control feature to remain
compliant as the USB specification does not allow a USB peripheral to draw more than 100mA of current
from the USB Bus until the device has been successfully enumerated. A “USB High-Power Bus Powered
Device” cannot be plugged into a USB Bus-Powered Hub as these can only supply 100mA per USB port.
• The Power ( current ) consumption of the device is set in a field in the 93C46 EEPROM attached to the
FT232BM. A “USB High-Power Bus Powered Device” must use the 93C46 to inform the system of it’s
power requirements.
• PWRCTL is tied to GND to tell the device to indicate a bus powered device in it’s USB descriptor.
• RTS / CTS handshaking is used in this example. If the MCU has no dedicated handshaking signals then
general purpose IO pins can usually be used to implement the handshaking. If the MCU is guaranteed to
accept data sent from the FT232BM at the programmed baud rate, then a single wire handshake will do (
tie CTS# of the FT232BM to GND ).
DG232 Version 2.0 © Future Technology Devices Intl. Ltd. 2002/2003 Page 7 of 16
FB1
1 2 VCC VCC VCC
USB
FERRITE BEAD
LDO REGULATOR 3.3v
CN1
CN-USB C5 R3
1 10nF VCC-3.3V
Figure 4.0
470R I O
2
3 G
4
U3 C7
0.1uF
C4 C6
5
33nF 0.1uF
U1 VCC-3.3v
30
3
26
13
6 25 TXD
VCC
VCC
3V3OUT TXD
AVCC
16
TXDEN
28 15
XTOUT PWREN#
VCC 4 14
RESET# PWRCTL
12
TXLED#
32 11
EECS RXLED#
1
EESK
2 10 SLEEP# POWERDN#
EEDATA SLEEP#
DECOUPLING CAPS
31 RSTOUT# RESET#
VCC TEST
AGND
GND
GND
GND
FT232BM
29
9
17
R7
47k
C3 C2 C1
10uF 0.1uF 0.1uF VCC
U2
1 8
CS VCC
2 7
R1
FT232BM – 3.3 volt Bus Powered Example Schematic ( 232-3VB )
10k
FT232BM Designers Guide
Page 8 of 16
FT232B APPLICATION SCHEMATIC
Figure 4.0 is an example of a 3.3 volt, USB bus powered design using the FT232BM connected to a 3.3v MCU
or other external logic.
• The main difference between this circuit and the 5 volt circuit of Figure 1.0 is that a 3.3 volt LDO regulator
i.c. is used to provide a 3.3v supply to the auxiliary circuiry.
• VCC-IO is driven from the 3.3v LDO regulator i.c. in order to drive the UART interface from the FT232BM to
the MCU / external logic at 3.3v level instead of 5v level.
• As the USB supply rail can drop to 4.4 volts or less under load, an LDO ( Low Dropout ) voltage regulator
must be used in this instance.
• The 3.3v LDO voltage regulator must also have a low quiescent ( no load ) current in order to ensure that
the USB suspend current requirement ( <= 500uA ) is met during USB suspend.
• In this example, we assume that the total current of the design is <= 100mA ( low power ), and that the
MCU / logic can detect USB suspend mode using either the SLEEP# or PWREN# pins of the FT232BM and
put itself and any circuitry it is controlling into a low power state in order to meet the total USB suspend
current requirement of 500uA or less.
• RSTOUT# is used to provide a power-on reset to the external logic in this example. If the MCU has it’s
own power-on reset logic then there is usually no need to use RSTOUT# to reset the device and this
connection and the 47k pull-down can be omitted. Note : If RSTOUT# is used to reset an external device
AND to pull-up the USB D+ line, it’s Vout high can be as low as 2.2v so it must be used to drive a TTL level
reset input on the external device.
• PWRCTL is tied to GND to tell the device to indicate a bus powered device in it’s USB descriptor.
• RTS / CTS handshaking is used in this example. If the MCU has no dedicated handshaking signals then
general purpose IO pins can usually be used to implement the handshaking. If the MCU is guaranteed to
accept data sent from the FT232BM at the programmed baud rate, then a single wire handshake will do (
tie CTS# of the FT232BM to GND ).
DG232 Version 2.0 © Future Technology Devices Intl. Ltd. 2002/2003 Page 9 of 16
VCC VCC VCC3V
USB
CN1
CN-USB R3
1 470R
2 R4 27R C6
0.1uF
Figure 5.0
3
4
R5 27R
C4 C5
5
33nF 0.1uF
U1 VCC-3v
30
3
26
13
R6 6 25 TXD
VCC
VCC
R8 1k5 3V3OUT TXD
AVCC
VCC-IO
10k 24 RXD
RXD
8
16
TXDEN
28 15 POWEREN#
XTOUT PWREN#
4 14
RESET# PWRCTL
12
TXLED#
32 11
EECS RXLED#
1
EESK
2 10
EEDATA SLEEP#
DECOUPLING CAPS
31
VCC TEST
AGND
GND
GND
GND
FT232BM
29
9
17
C3 C2 C1
10uF 0.1uF 0.1uF VCC
U2
1 8 VCC VCC3V
CS VCC EXTERNAL POWER
2 7
SK NC
3 6
DIN NC
4 5
R1
GND
10k
FT232BM – 3.3 volt Self Powered Example Schematic ( 232-3VS )
FT232BM Designers Guide
Page 10 of 16
INTERFACING TO 3.3V LOGIC - SELF POWERED APPLICATION
Figure 5.0 is an example of a 3.3 volt, USB self powered design using the FT232BM connected to a 3.3v MCU
or other external logic. A USB self power design has it’s own PSU and does not draw it’s power from the USB
bus. In such a case, no special care need be taken to meet the USB suspend current ( 0.5mA ) as the device
does not get its power from the USB port. The differences between this circuit and that of Figure 2.0 are
minimal. See the notes in Figure 2 for the main details.
• In this case the internal PSU needs to supply 3.3 volts to the auxiliary circuitry and 5 volts to the
FT232BM i.c.
• The VCCIO power line to the FT232BM is driven from the 3.3v supply in order to drive the auxiliary logic at
the correct voltage level.
Important Note : In this design, the PWRCTL Pin ( Pin 14 ) of the FT232BM is tied high to indicate a self
powered design. It is important to tie this to VCCIO ( 3.3v ) and NOT to VCC ( 5.0v ) otherwise the input
protection diodes on this pin will conduct and try to pull VCCIO towards 5.0v
As well as being undesirable, this may cause excessive current to be drawn by the FT232BM and the 3.3v
logic attached to this device.
DG232 Version 2.0 © Future Technology Devices Intl. Ltd. 2002/2003 Page 11 of 16
FB1 REG1
1 2 VCC VCC VCC TC55RP3302
USB Q1
FERRITE BEAD
CN1
CN-USB C4 R3 G Vi Vo
Figure 6.0
1 10nF IRLML6402 Soft Start C8
470R
1
2
3
2 Circuit C6 4.7uF
3 C10 0.1uF
4 0.1uF
C3 C5 C9
5
33nF 0.1uF 0.1uF
U1 VCC-3v
30
3
26
13
6 25 TXD
VCC
VCC
3V3OUT TXD
DTR# 21
R6 1k5
5 RSTOUT# DSR# 20
DCD# 19
27 XTIN R7
Y1 18 1k 3v MCU or Logic cct
RI#
6MHz RESONATOR
TXDEN 16
28 XTOUT PWREN# 15
TXLED# 12
32 EECS RXLED# 11
1 EESK
2 EEDATA SLEEP# 10
DECOUPLING CAPS
31 TEST
VCC
AGND
GND
GND
GND
FT232BM
29
9
17
C7 C2 C1
4.7uF 0.1uF 0.1uF VCC
U2
1 CS VCC 8
93C46/56/66
R2 ( Optional )
2k2
R1
10k
FT232BM Designers Guide
Page 12 of 16
FT232B APPLICATION SCHEMATIC
FT232BM – 3.3 volt Switched Power Bus Powered Schematic ( 232-3VSW)
Figure 6.0 is an example of a 3.3 volt, USB bus powered design with power switching using the FT232BM
connected to a 3.3v MCU or other external logic. The circuit is essentially a combination of the schematics of
Figure 3 and Figure 4.
• A 3.3 volt LDO regulator i.c. is used to provide a 3.3v VCCIO rail and switched 3.3v supply to the auxiliary
circuiry via a IRLML6402 P-Channel MOSFET .
• In this example, we use a Telcom / MicroChip TC55RP3302 as the 3.3v LDO regulator. This has a maximum
rated output current of 250mA. If a higher current is required, use an LD1117 / LM1117 series LDO
regulator instead as these are rated to 800mA. The two are not pin compatible.
• R7 and C10 form a soft start circuit which helps prevent excesssive power switching transients when the
MOSFET turns on. We would advise you to include these components as without them the current surge
when the IRLML6402 MOSFET initially turns on can be capable of resetting the FT232BM or tripping the
power sense circuitry in a USB hub.
DG232 Version 2.0 © Future Technology Devices Intl. Ltd. 2002/2003 Page 13 of 16
FB1
1 2 VCC VCC VCC
USB
FERRITE BEAD
CN1
CN-USB C10 R5
1 10nF
470R
Figure 7.0
2
3
4 SKT1
VCC VCC DB9M
5
C9 C11 RI 9
5
33nF 0.1uF DTR 4
U2 CTS 8
30
3
26
13
TXDATA 3
SHIELD RTS 7
6 25 TXD D1 D2 RXDATA 2
VCC
VCC
3V3OUT TXD LED LED DSR
AVCC
TX RX 6
VCC-IO
24 RXD DCD 1
R6 27R RXD
8 USBDM
23 RTS#
RTS#
10
21 DTR#
DTR# R1 R2 SHIELD
R8
5 20 DSR# 220R 220R
RSTOUT# DSR#
1k5 19 DCD#
DCD#
27 XTIN
Y1 18 RI#
RI#
6MHz RESONATOR
TXDEN 16
U1
28 XTOUT PWREN# 15
TXD 7 2 TXDATA
DTR# T1IN T1OUT DTR
VCC 4 RESET# PWRCTL 14 6 T2IN T2OUT 3
RTS# 20 1 RTS
T3IN T3OUT
TXLED# 12 21 T4IN T4OUT 28
32 11 CTS 9 8 CTS#
EECS RXLED# DSR R1IN R1OUT DSR#
4 R2IN R2OUT 5
1 DCD 27 26 DCD#
EESK RXDATA R3IN R3OUT RXD
23 R4IN R4OUT 22
2 10 SLEEP# RI 18 19 RI#
DECOUPLING CAPS EEDATA SLEEP# VCC R5IN R5OUT
31 TEST
VCC SLEEP# 25
AGND
GND
GND
VCC SHDN#
C5 24 C7
FT232BM EN
0.1uF 0.1uF
29
9
17
VCC 13 17
V+ V-
12 15 VCC
C1+ C2+
14 C1- C2- 16
C4 C3 C1 C2 C6 C8
10uF 0.1uF 0.1uF 0.1uF VCC 0.1uF 10 11 0.1uF
GND VCC
MAX213CAI
U3 MAX213CWI
GND 1 8 ADM213E
CS VCC SP213ECA
2 SK NC 7
3 DIN NC 6
4 DOUT GND 5
93C46/56/66
R4 ( Optional )
2k2
SP213EHCA
R3
Page 14 of 16
FT232BM –5v BUS Powered USB => RS232 Converter Example Schematic ( USB-232B )
FT232BM Designers Guide
Figure 7.0 is an example of a 5 volt, USB bus powered design using the FT232BM connected to a TTL
RS232 level converter i.c .
• For RS232 applications, the baud rate of the finished product is limited by the ac. driving characteristics
of the level converter i.c. rather than that of the FT232BM.
• This example uses the popular “213” series of TTL to RS232 level converters. These devices have 4
transmitters and 5 receivers in a 28 LD SSOP package and feature an in-built voltage converter to convert
the 5v ( nominal ) VCC to the +/- 9volts required by RS232. An important feature of these devices is the
SHDN# pin which can power down the device to a low quiescent current during USB suspend mode
• The device used in this schematic is a Sipex SP213EHCA which is capable of RS232 communication
at up to 500k baud. If a lower baud rate is acceptable, then several pin compatible alternatives are
available such as Sipex SP213ECA , Maxim MAX213CAI and Analog Devices ADM213E which are good
for communication at up to 115,200 baud. If a higher baud rate is desired, use a Maxim MAX3245CAI part
which is capable of RS232 communication at rates of up to 1M baud.
• Note : the MAX3245 is not pin compatible with the 213 series devices, also it’s SHDN pin is active high so
connect this to PWREN# instead of SLEEP#.
DG232 Version 2.0 © Future Technology Devices Intl. Ltd. 2002/2003 Page 15 of 16
FT232BM Designers Guide
Disclaimer
Neither the whole nor any part of the information contained in, or the product described in this manual, may
be adapted or reproduced in any material or electronic form without the prior written consent of the copyright
holder.
This product and its documentation are supplied on an as-is basis and no warranty as to their suitability for
any particular purpose is either made or implied.
Future Technology Devices International Ltd. will not accept any claim for damages howsoever arising as a
result of use or failure of this product. Your statutory rights are not affected.
This product or any variant of it is not intended for use in any medical appliance, device or system in which
the failure of the product might reasonably be expected to result in personal injury.
The information in this document may be subject to change without notice.
Contact Information
At the time of writing our Sales Network covers over 50 different countries world-wide. Please visit the Sales Network
page of our Web Site site for the contact details our distributor(s) in your country.
DG232 Version 2.0 © Future Technology Devices Intl. Ltd. 2002/2003 Page 16 of 16