AVERAGE CURRENT MODE CONTROL IN POWER ELECTRONIC CONVERTERS – ANALOG

VERSUS DIGITAL

K. D. Purton * and R. P. Lisner**

*Department of Electrical and Computer System Engineering, Monash University, Australia,

and Switch Mode Power Conversion P/L, Melbourne, Australia

**Department of Electrical and Computer System Engineering,

Monash University, Australia

Abstract

This paper presents Average Current Mode Control (ACMC) as a general purpose, high-
performance all-round control method for AC-DC conversion, DC-DC conversion, and DC-
AC conversion (including grid-feed inverters). A detailed examination of the typical analog
circuit implementation and waveforms, based on simulations and experimental results, is used
to explain how ACMC achieves superior performance. Several reported digital
implementations are critically examined. Finally a hybrid analog-digital control
implementation of ACMC is proposed.

1. INTRODUCTION “PWM Conductance Control” appears to be the first to

Average Current Mode Control (ACMC) is typically a use the output of an “integrator-zero” compensated
two loop control method (inner loop, current; outer CEA and a linear ramp as inputs to the PWM
loop, voltage) for power electronic converters. Many comparator. This approach was developed
of these applications have been in the higher switching commercially by Unitrode [4].
frequency, lower power segment (up to 10kW, at The usual implementation of ACMC relies on analog
20kHz and above), but this is changing. A 30kW three operational amplifiers as error amplifiers, and makes
phase inverter using analog ACMC has been reported use of wide-band sensing of the inductor current, to
[1]. The main distinguishing feature of ACMC, as include both the AC and DC components. Figure 1
compared with peak current mode control, is that shows a basic buck converter with synchronous
ACMC uses a high gain, wide bandwidth Current rectification. The voltage waveform representing the
Error Amplifier (CEA) to force the average of one inductor current is connected to one input of the CEA
current within the converter, typically the inductor with large gain at DC and low frequencies to force the
current, to follow the demanded current reference with average value of the inductor current to follow the
very small error, as a controlled current source. current reference, which is connected to the other
Advantages of ACMC include large noise margin, no input.
requirement for additional slope compensation, easy
current limit implementation, excellent voltage and
current regulation, simple compensation, good
behaviour in both continuous and discontinuous
inductor current modes, and has inherent Vin and Vout
feed-forward properties. All this is achieved with only
a slight increase in complexity over earlier schemes.
2. PRINCIPLES OF OPERATION
An early paper on average current control was
published by Papathomas and Giacopelli of Bell Labs
in 1979 [2]. This used digital hardware (no computer)
rather than analog hardware. A current controlled
oscillator clocked a counter and when this count
(proportional to the inductor average current) matched
a current reference count, the switch was turned off. A
more conventional analog approach was reported by Figure 1. Simplified schematic of buck converter
O’Sullivan et al of the European Space Centre in 1988 with synchronous rectifier and average current
[3], in which the authors claimed to have been using mode control regulating output voltage.
this scheme for the previous decade. Their so-called
Figure 2 shows real waveforms in a low power test
circuit. Fig. 2 (a) shows regulation of the average
inductor current (Iout) at 0.5A, Fig. 2 (b) at 1.0A, and
Fig. 2 (c) at 1.5A. The CEA output is an inverted and
amplified version of the difference between the
inductor current and the current reference signal, with
a positive DC offset. This CEA output is then
compared with a large amplitude ramp waveform at
the converter switching frequency, at the inputs to a
Pulse Width Modulation (PWM) comparator. These
sawtooth waveforms intersect at two points in each
cycle, defining the rise and fall instants of the PWM
pulse train to the switches. If the reference input to the
CEA is the output of a suitably compensated voltage
Error Amplifier (VEA), the average inductor current
will be controlled to force the converter output voltage Figure 2 (b). Oscilloscope printout of
to track the voltage reference. If the CEA reference is experimental buck converter with ACMC.
a half-sine waveform, the average inductor current Duty cycle is around 50%, and Iout is around
will track this, eg, to force a sinusoidal current into the 1A. Note that inductor current (bottom trace)
power grid via an unfolding bridge.
minimum is zero, not negative, under these
The comparison of the wide band inductor current conditions.
waveform with the PWM ramp waveform results in an
inherent fast feed-forward of input and output voltage
changes, without involving the feedback loops and
without direct monitoring. Since the up-slope and
down-slope of the inductor current waveform are
proportional to the input and output voltages, any
change in these slopes results in immediate adjustment
of PWM duty cycle. Clamping the CEA reference
input limits the converter inductor current. This is
often the output current and so an adjustable output
current limit is easily implemented.

Figure 2 (c). Oscilloscope printout of

experimental buck converter with ACMC.
Duty cycle is around 75%, and Iout is around
1.5A. Note that inductor current (bottom trace)
minimum is positive under these conditions.

Compensation of the CEA is based upon high gain at

Figure 2 (a). Oscilloscope printout of
experimental buck converter with ACMC.
Large sawtooth is switching frequency ramp
input to PWM comparator. Smaller sawtooth
is CEA output to other input of PWM
comparator. Middle trace is PWM output to
main switch. Duty cycle is around 25%, Iout is
around 0.5A. Bottom trace is the buck inductor
current waveform. Note that under these actual
running conditions with a synchronous
rectifier, inductor current is actually negative
for part of the switching cycle.
DC and low frequencies. This is what forces the
average of the controlled current, typically the
inductor current, to track the current reference. This
integrator function is implemented by R1 and C1 in
Fig. 1. At the zero frequency, determined by C1 and
R2, the CEA gain is levelled off and a phase boost
back towards zero degrees of lag, from the constant 90
degrees of phase lag from the integrator, results. The
flat gain above the zero frequency is determined by
R2/R1. A higher frequency pole (C2, R2) rolls off the
gain near the switching frequency. The Bode plot of
such a compensator is shown in Fig. 3.

Figure 3. Bode plot of a typical compensated
analog ACMC current error amplifier. The
magnitude response (3 straight line segments)
shows the low frequency high gain roll-off of
the integrator component, the mid-band
constant gain after the zero component, and
the high frequency roll-off due to the second
pole. The phase response (inverted bathtub
shape) shows the phase boost improving the
phase margin.
(Vertical: -20dB → +60db and 0° → +180°,
horizontal: 1 Hz → 1 MHz)
3. ANALOG CONTROL VERSUS
DIGITAL CONTROL
Analog control
The commonly listed advantages of analog control
include:
• relative simplicity
• lower cost
• wider bandwidth
• small delay between cause and effect
• finer resolution of time and amplitude
The commonly listed disadvantages include:
• a fixed and relatively simple functionality
• susceptibility to noise, ageing and drift
• a large number of components.
Digital control
The commonly listed advantages of digital control
include:
• programmability
• the possibility of intelligent, adaptive, linear or
non-linear control
• the possibility of self-calibration and self-
diagnosis etc
• accuracy, reliability, repeatability
• ability to communicate with other systems
• no ageing or drift
• large noise margins.
The less commonly listed disadvantages of digital
control include:
• software development is tedious, error-prone, and
time consuming, and hence expensive
• microcomputers and DSPs suffer from noise
interference, and generate large amounts of
noise − they rely on good layout, bypassing,
shielding, ground-plane techniques, etc as do
analog systems
• sampling and quantisation result in steps in time
and amplitude, which degrade accuracy and
performance
• the hoped-for component reduction due to large-
scale integration is usually lost in the number of
support ICs (many of which are analog) and
discrete components
• due to the clocked, serial nature of digital
computers, everything they do takes time. Simply
put, the more complex the task, the longer it
takes. This time delay results in phase lag, which
detracts from performance.
Digital controllers are typically mixed-mode
controllers. The real world is analog, and must be
processed by analog circuitry before being digitally
processed. Amplifiers, summers, buffers, level-
shifters, precision rectifiers, anti-aliasing filters,
voltage references, sample and holds, analog to digital
converters, digital to analog converters, final filters,
etc typically require op-amps. A digital
implementation of ACMC may require more analog
circuitry than would an analog implementation, yet
can result in lesser performance with a much higher
cost. The component cost of an analog
implementation, involving a few op-amps, a
comparator, a 555 timer, CMOS logic, and some
resistors and capacitors, may be no more than,
say, $US1.50 in quantity manufacture. The
development time may be a few days. Compare this to
a digital implementation. The hardware cost will be
considerably more, coupled with the added software
cost. The overall cost will be many times more, and
the performance worse.
Accuracy, reliability, repeatability, and freedom from
ageing and drift are not necessarily intrinsic to digital
controllers, nor absent from analog controllers.
Analog controllers depend on resistors and capacitors
in feedback networks to set gains and frequency
response. Components of adequate specification with
tight tolerance, low drift, and a small temperature
coefficient are available. Digital controllers generally
require a lot of analog support circuitry which, in turn,
must be adequate for the task (and typically is).
While typical analog circuitry cannot compete with
the possible intelligence and adaptability of control
using a digital computer, non-linear analog control
can be very practical and cost effective. For example,
consider the non-linear functions within a Unitrode
UC3854 analog power factor controller IC:
multiplication, squaring, and division. A very fast
fuzzy logic controller, with complex non-linear
properties, can be built from analog components.
There are many digital controllers doing good work
now in industry, for example in variable speed,
variable voltage AC induction motor drives.
Computers, ranging from single chip microcontrollers
to advanced DSP processors, are being used by the
thousands. Upon closer examination, it appears that
these devices are not primarily being used as fast,
precise compensators for good transient response, but
rather as versatile, flexible, adaptive system
supervisors. For example, generation of three-phase
PWM with variable amplitude, variable frequency, is
readily done with one powerful CPU. It can also be
done well with analog ICs and discrete components.
However, using a microcontroller to do this is more in
the role of a modulator rather than a compensator. A
digital PID control function is usually tacked on, to
avoid using more external circuitry.
Digital computer implementations of ACMC have
been reported. Some of these have relied on a brute
force sampled version of the analog approach. In [5],
Holme and Manning reported a digital ACMC
scheme. A powerful DSP processor, combined with a
very fast ADC and a digital hardware PWM module,
sampled the inductor current many times per
switching period to locate the peak value. The current
samples, along with samples of Vin and Vout were
processed to force the average inductor current to
track a reference. However, this takes time, and a two-
switching-period delay resulted between sampling and
PWM adjustment. This sampling/processing time
delay translates to a considerable phase lag, which
greatly complicated stability issues. Of even more
concern is the unmentioned orders of magnitude
increase in cost and complexity of this digital copy
over the analog approach, to achieve an inferior result.
If the digital approach resulted in some worthwhile
improvement, then a cost-benefit analysis may justify
it.
Other forms of digital current mode control have been
proposed, such as the predictive approach; for
example, those by Holmes and Martin [6], and Gow
and Manning [7]. These aim to compensate for multi-
switching period delays between parameter
measurement and control response by extrapolating to
a future response from past measurements. While this
predicting of the future based on past trends may be
helpful if things keep going the way they have been,
like some weather forecasting approaches; such a
scheme cannot compete with a fast analog controller
when the unexpected occurs.
4. INVERTER CONTROL INCORPORATING
GAIN SCHEDULING
When a PWM inverter is synthesizing an AC
waveform from a relatively constant DC input, the
duty cycle is adjusted from near zero at the zero
crossings, to near maximum at the peaks. Depending
on the topology of the power converter chosen, this
variation will alter the controller compensation
requirements to a greater or lesser extent. One of the
most difficult to optimise is the buck-boost, or flyback
DC-DC converter, used with an unfolding stage.
Schlecht [8] reported the use of time varying feedback
gains to counteract the 120Hz time dependant
response of the flyback topology when used in an
inverter. The result was closed loop poles that
remained stationary, making possible sharper cusps in
the half-sine waveforms and so reduced distortion in
the current waveform.
Buck derived converters are more common at higher
power levels than buck-boost types, and less
demanding to control. Even so, the control-to-output
transfer function varies with duty cycle [9] and
improved inverter control can result from time varying
compensation, as opposed to fixed parameters.
5. HYBRID ANALOG – DIGITAL ACMC
One approach to optimising performance and cost is to
combine both analog and digital techniques as
appropriate. The authors are investigating a hybrid
ACMC scheme for grid-feed inverters based on a fast
analog core for optimum tracking and regulation,
combined with an economic micro-controller. The
primary task of the latter is to generate the required
reference, and to adjust gains and corner frequencies
by digitally controlled resistances, according to
monitored conditions, such as the operating point
within the AC waveform at the time, and the nature of
the load. Such adaptive-gain-scheduling non-linear
control is able to improve on both the pure analog and
pure digital control schemes, with minimum cost.
An example of time varying gains is shown in
figure 4. The CEA gain is increased near the zero
crossings to improve the tracking of the average
inductor current, forcing it to more closely follow the
sinusoidal reference, and so reducing cross-over
distortion. The slightly fuzzy trace is Vout, the smooth
trace is the sinusoidal reference. Maintaining this
higher gain throughout the entire half cycle would
result in sub-harmonic oscillation near the peaks, and
greater distortion. For illustration, only one step in the
CEA gain is shown, for better results more steps are
used.
Figure 4. Sinusoidal output voltage waveform
(50Hz) of an inverter with ACMC. Region
shown is each side of the zero crossing. The
smooth line is the sinusoidal reference. The
fuzzy line is the actual Vout waveform. The
switched increase in the CEA gain near the
zero crossing has reduced the crossover
distortion. Vout now more closely tracks the
reference in this region.
(Vertical: -10V → +10V,
horizontal: 4.0 msec → 16.0 msec,
zero-crossing at 10.0 msec)
6. CONCLUSIONS
Analog ACMC is superior to digital current mode
control from the two important considerations of
speed of response and cost. The system advantages of
digital computers can be combined with the above
advantages of analog ACMC by creating a hybrid of
the two, producing a result which is greater than the
sum of the individual parts.
7. REFERENCES
[1] Fraser, M. E., and Manning, C. D, “Performance
of Average Current Mode Controlled PWM
Inverter with High Crest Factor Load”, Power
Electronics and Variable Speed Drives, 26-28
October 1994, Conference Publication No. 399,
IEE, pp. 661-666.
[2] Papathomas, T. V., and Giacopelli, J. N., “Digital
Implementation of an Average Current Controlled
Switching Regulator”, IEEE PESC, 1979, pp.
155-161.
[3] O’Sullivan, D., Spruyt, H., and Crausaz, A.,
“PWM Conductance Control”, IEEE PESC, 1988,
pp.351-359.
[4] Dixon, L. H., “Average Current Mode Control of
Switching Power Supplies”, Unitrode Power
Supply Design Seminar SEM-700, 1990,
pp. 5-1 to 5-14.
[5] Holme, P. R., and Manning, C. D., “Digital
Control of High Frequency PWM Converters”,
EPE Proceedings, Brighton, 1993, pp. 260-265.
[6] Holmes, D. G., and Martin, D. A.,
“Implementation of a Direct Digital Predictive
Current Controller for Single and Three Phase
Voltage Source Inverters”, IEEE IAS Meeting,
1996, pp. 906-913.
[7] Gow, J. A., and Manning, C. D., “Novel Fast-
Acting Predictive Current Mode Controller for
Power Electronic Converters”, IEE Proc.-Electr.
Power Applications, Vol. 148, No. 2,
March 2001, pp. 133-139.
[8] Schlecht, M. F., “Time-varying Feedback Gains
for Power Circuits with Active Waveshaping”,
IEEE PESC, 1981, pp. 52-59.
[9] Cooke, P., “Modelling Average Current Mode
Control”, IEEE APEC, 2000, pp. 256-262.