EEEB273 Sem.

1 16/17 CMOS Opamp

Chapter 13 (Part 2): CMOS Operational Amplifier

Content:
o MC14573 CMOS Operational Amplifier
o Folded Cascode CMOS Operational Amplifier

MC14573 CMOS Operational Amplifier

Two-stage op-amp:

o M1 & M2: PMOS input

differential-pair
o M3 & M4: NMOS active load
o M5, M6 & Rset: Biasing of
input stage
o M7: Second stage: common-
source
o M8: Bias current & active
load for M7

DC Analysis
V   V   VSG5
o M5 & M6 are matched :
I set  IQ  (1)
Rset
o Current in M5: I set  I D5  K p 5 (VSG5  VTP )2 (2)
# Example 13.8, Ex 13.8
# TYU *13.9 ,13.10
1 Dr Fazrena Hamid
EEEB273 Sem.1 16/17 CMOS Opamp
Small-signal analysis
 Gain of input stage: Ad  gm1 (ro 2 || ro 4 )
 Rin for second stage is ∞
1
ro 2  ro 4 
I D 2
 Gain of second stage: Av 2  gm7 (ro 7 || ro8 )
o g m7  2 K n 7 I D 7
1
r  r 
o o 7 o 8 I
D7
 no loading effect due to external load

# Example 13.9, Ex 13.9

# TYU *13.11

2 Dr Fazrena Hamid
EEEB273 Sem.1 16/17 CMOS Opamp
Folded-Cascode CMOS Op amp

Advantage of cascode configuration: ↑ gain

 Figure (a): conventional cascode:
o vi determines ID1 (current through M1)
o ID1 is the input signal for M2
o ac current through M1 & M2
 Figure (b): folded cascode:
o vi determines dc current I1
o dc current I2 = IQ – I1
o ac currents in M2 & M1 are equal in magnitude, but of opposite
direction.
 Current folded back  folded-cascode

3 Dr Fazrena Hamid
EEEB273 Sem.1 16/17 CMOS Opamp
Folded-cascode op amp
 M1 & M2 : differential-pair, M5 & M6: cascode
 M7 – M10 : active load (modified Wilson current mirror)
 VB2 provided by a separate network
 Since M3, M4, M11-M13 are matched, ID3 = ID4 = IREF
o ID1 = ID2 = ½ IREF
o ID5 = ID6 = ½ IREF

Apply vd : ac current
induced:
 From M1 , M6 and
output
 From M2, M5 and
mirrored in M8

Differential gain:
Ad  gm1 ( Ro6 || Ro8 )
Ro6  gm6 (ro6 )(ro 4 || ro1 )
Ro8  gm8 (ro8ro10 )

# Example 13.11, Ex 13.11

4 Dr Fazrena Hamid