Beruflich Dokumente
Kultur Dokumente
8085
Collected By
C.Gokul
AP/EEE
Velalar College of
Engg & Tech,Erode
MOV Rd, Rs
M, Rs
Rd, M
This instruction copies the contents of the source
register into the destination register. (contents of the
source register are not altered)
A F A F
B 30 C B 30 C
MOV M,B
D E D E
H 20 L 50 H 20 L 50 30
A F A F
B C B C 40
MOV C,M
D E D E
H 20 L 50 40 H 20 L 50 40
MVI-Move immediate 8-bit
Opcode Operand
Rd, Data
MVI M, Data
A F A F
B C MVI B,60H B 60 C
D E D E
H L H L
204FH 204F
HL=2050 HL=2050 40
MVI M,40H
2051H 2051H
LDA-Load accumulator
Opcode Operand
A A 30
30
LDA
2000H 2000H 30
2000H
LDAX-Load accumulator indirect
Opcode Operand
LDAX B/D Register Pair
Example: LDAX D
BEFORE EXECUTION AFTER EXECUTION
A F A 80 F
B C B C 80
2030H 80 2030H
LDAX D
D 20 E 30 D 20 E 30
LXI-Load register pair immediate
Opcode Operand
LXI Reg. pair, 16-bit data
A F A 80 F
B C B C
2030H 30 9030H 50
LXI H,
H L 2030 H 90 L 30
2031H 90
M=50
LHLD-Load H and L registers direct
Opcode Operand
LHLD 16-bit address
A F A 80 F
B C
8500H 60
B C
2030H 00
LHLD
H L 2030 H 85 L 00
85
M=60
STA-Store accumulator direct
Opcode Operand
STA 16-bit address
A 50 A
50
STA 50
2000H 2000H
2000H
STAX-Store accumulator indirect
Opcode Operand
Example: STAX B
B 85 C 00
8500H 1A
A=1AH STAX B
SHLD-Store H and L registers direct
Opcode Operand
SHLD 16-bit address
D E
8500H 80
H 70 L 80 SHLD
8501H 70
8500
XCHG-Exchange H and L with D and E
Opcode Operand
XCHG None
Example: XCHG
BEFORE EXECUTION AFTER EXECUTION
D 20 E 40 D 70 E 80
XCHG
H 70 L 80 H 20 L 40
SPHL-Copy H and L registers to the
stack pointer
Opcode Operand
SPHL None
Example: SPHL
BEFORE EXECUTION
SP
H 25 L 00
SPHL
AFTER EXECUTION
SP 2500
H 25 L 00
XTHL-Exchange H and L with top of
stack
Opcode Operand
XTHL None
Example: XTHL
L=SP
H=(SP+1)
SP 2700
2700H 50 SP 2700
40
2700H
H 30 L 40 H L
2701H 60 60
50
30
2701H
XTHL
2702H 2702H
Opcode Operand Description
PCHL None Load program counter with H-
L contents
Example: PCHL
PUSH-Push register pair onto stack
Opcode Operand
PUSH Reg. pair
Opcode Operand
POP Reg. pair
Example: IN 8C H
BEFORE EXECUTION
PORT 10 A
80H
IN 80H
AFTER EXECUTION
PORT
80H
10 A 10
OUT- Copy data from accumulator to
a port with 8-bit address
Opcode Operand
OUT 8-bit port address
The contents of accumulator are copied into the I/O
port.
PORT 10 A 40
50H
OUT 50H
AFTER EXECUTION
PORT 40 A 40
50H
2.Arithmetic Instructions
These instructions perform the
operations like:
◦ Addition
◦ Subtract
◦ Increment
◦ Decrement
Addition
Any 8-bit number, or the contents of register, or
the contents of memory location can be added to
the contents of accumulator.
The result (sum) is stored in the accumulator.
No two other 8-bit registers can be added
directly.
Example: The contents of register B cannot be
added directly to the contents of register C.
ADD
B C B C 05
D E
05
ADD C D E
H L
H L A=A+C
04+05=09
BEFORE EXECUTION
AFTER EXECUTION
A 04
ADD M A 14
A=A+M D
B C B C
D E E
10
H 20 L 50
10 H 20 L 50
The contents of register or memory and Carry Flag (CY) are added to the
contents of accumulator.
CY 01
A 50
A 56
B C B C 20
05 ADC C D E
D E A=A+C+CY H L
H L
50+05+01=56
CY 1
A 06 2050H 30 ADC M A 37 2050H 30
H 20 L 50
A=A+M+CY
H 20 L 50
06+1+30=37
ADI
Example: ADI 45 H
BEFORE EXECUTION AFTER EXECUTION
A 03 ADI 05H A 08
A=A+DATA(8)
03+05=08
CY 1 ACI 20H
A 05 A=A+DATA A 26
(8)+CY 05+20+1=26
DAD
Opcode Operand Description
DAD Reg. pair Add register pair to H-L pair
D 12 E 34 D 12 E 34
H 23 L 45
DAD D H 35 L 79
1234
2345 +
------- DAD D HL=HL+DE
3579 DAD B HL=HL+BC
Subtraction
Any 8-bit number, or the contents of register, or
the contents of memory location can be
subtracted from the contents of accumulator.
The result is stored in the accumulator.
Subtraction is performed in 2’s complement
form.
Ifthe result is negative, it is stored in 2’s
complement form.
No two other 8-bit registers can be subtracted
directly.
collected by C.Gokul AP/EEE,VCET
SUB
B C B C 04
D E
04
SUB C D E
H L
H L A=A-C
09-04=05
BEFORE EXECUTION
AFTER EXECUTION
A 14
SUB M A 04
A=A-M
B C B C
D E D E
10
H 20 L 50
10 H 20 L 50
The contents of the register or memory location and Borrow Flag (i.e. CY)
are subtracted from the contents of the accumulator.
CY 01
A 08
A 02
B C B C 05
05 SBB C D E
D E
H L
A=A-C-CY H L
08-05-01=02
CY 1
A 06 2050H 02 SBB M A 03 2050H 02
H 20 L 50 A=A-M-CY H 20 L 50
06-02-1=03
SUI
Opcode Operand Description
A 08 SUI 05H A 03
A=A-DATA(8)
08-05=03
SBI
Opcode Operand Description
SBI 8-bit data Subtract immediate from
accumulator with borrow
Example: SBI 45 H
CY 1
SBI 20H
A 25 A=A-DATA A 04
(8)-CY
25-20-01=04
Increment / Decrement
The 8-bit contents of a register or a
memory location can be incremented or
decremented by 1.
The 16-bit contents of a register pair can
be incremented or decremented by 1.
Increment or decrement can be
performed on any register or a memory
location.
INR
Opcode Operand Description
INR R Increment register or
M memory by 1
A A
B 10 C INR B B 11 C
D
H
E
L
R=R+1 D
H
E
L
10+1=11
BEFORE EXECUTION AFTER EXECUTION
H L
2050H 10 H L
11 2050H
20 50
INR M 20 50
M=M+1 10+1=11
INX
SP SP
B C B C
D E INX H D E
H 10 L 20 RP=RP+1 H 10 L 21
1020+1=1021
DCR
A A
B C B C
D E 20
DCR E D E 19
H L R=R-1 H L
20-1=19
BEFORE EXECUTION AFTER EXECUTION
H L
H
20
L
50
2050H
21
DCR M
20 50 2050H 20
M=M-1 21-1=20
DCX
SP SP
B C B C
D E DCX H D E
H 10 L 21 RP=RP-1 H 10 L 20
3.Logical Instructions
These instructions perform logical operations on
data stored in registers, memory and status flags.
The contents of the accumulator are logically ANDed with the contents of
register or memory.
The result is placed in the accumulator.
If the operand is a memory location, its address is specified by the
contents of H-L pair.
S, Z, P are modified to reflect the result of the operation.
CY is reset and AC is set.
Example: ANA B or ANA M.
0101 0101=55H
CY AC 1011 0011=B3H CY 0 AC 1
B3 0001 0001=11H B3
A 55 2050H A 11 2050H
H 20 L 50 ANA M H 20 L 50
A=A and M
Opcode Operand Description
ANI 8-bit data Logical AND immediate with
accumulator
1011 0011=B3H
0011 1111=3FH
0011 0011=33H
CY AC CY AC 1
ANI 3FH 0
A B3 A=A and DATA(8) A 33
Opcode Operand Description
ORA R Logical OR register or memory with
M accumulator
The contents of the accumulator are logically ORed with the contents of the
register or memory.
If the operand is a memory location, its address is specified by the contents of H-L
pair.
CY AC CY 0 AC 0
ORA B
A=A or R
A AA A BA
B 12 C B 12 C
D E D E
H L H L
0101 0101=55H
1011 0011=B3H
BEFORE EXECUTION AFTER EXECUTION
1111 0111=F7H
CY AC CY AC 0
0
ORA M
B3
A=A or M
B3
A 55 2050H A F7 2050H
H 20 L 50 H 20 L 50
Opcode Operand Description
CY AC CY AC
ORI 08H 0 0
A B3 A=A or DATA(8) A BB
Opcode Operand Description
CY AC CY 0 AC 0
A AA A 87
B 10 C 2D B C 2D
D E XRA C D E
H L A=A xor R H L
0101 0101=55H
BEFORE EXECUTION 1011 0011=B3H AFTER EXECUTION
1110 0110=E6H
CY AC CY 0 AC 0
B3 XRA M B3
2050H 2050H
A 55
A=A xor M A E6
H 20 L 50 H 20 L 50
Opcode Operand Description
CY AC CY AC
XRI 39H 0 0
A B3 A=A xor DATA(8) A 8A
Compare
Any 8-bit data, or the contents of
register, or memory location can be
compares for:
◦ Equality
◦ Greater Than
◦ Less Than
10<20:CY=01
BEFORE EXECUTION AFTER EXECUTION
A>M: CY=0
A=M: ZF=1
A<M: CY=1
CY Z CY 0
ZF 1
A B8
B8 A B8 2050H
B8
2050H
H 20 L 50
CMP M H 20 L 50
A-M
B8=B8 :ZF=01
Opcode Operand Description
CY Z CY AC
CPI 30H 0 0
A BA
A-DATA A BA
BA>30 : CY=00
Rotate
Each bit in the accumulator can be shifted
either left or right to the next position.
Opcode Operand Description
RLC None Rotate accumulator left
CY B7 B6 B5 B4 B3 B2 B1 B0
AFTER EXECUTION
B7 B6 B5 B4 B3 B2 B1 B0 B7
Opcode Operand Description
RRC None Rotate accumulator right
B7 B6 B5 B4 B3 B2 B1 B0 CY
AFTER EXECUTION
B0 B7 B6 B5 B4 B3 B2 B1 B0
CY B7 B6 B5 B4 B3 B2 B1 B0
AFTER EXECUTION
B7 B6 B5 B4 B3 B2 B1 B0 CY
Opcode Operand Description
RAR None Rotate accumulator right
through carry
B7 B6 B5 B4 B3 B2 B1 B0 CY
AFTER EXECUTION
CY B7 B6 B5 B4 B3 B2 B1 B0
Complement
Thecontents of accumulator can be
complemented.
Each 0 is replaced by 1 and each 1 is
replaced by 0.
Opcode Operand Description
A 00 A FF
Opcode Operand Description
CMC None Complement carry
C 00 C FF
Opcode Operand Description
STC None Set carry
Books:
Microprocessors and microcontrollers by krishnakanth
Microprocessors and microcontrollers by Nagoor Kani
Staff references
8085 microprocessor by Sajid
Akram, researcher/lecturer at c.abdul hakeem college of
engineering and technology
Timingdiagram by puja00 (slideshare.net)
Microprocessor 8086 by Gopikrishna Madanan, Assistant
Professor of Physics at Collegiate Education, Kerala, India