DEBRE MARKOS UNIVERSITY

INSTITUTE OF TECHNOLOGY
SCHOOL OF ELECTRICAL AND COMPUTER ENGINEERING

COMPUTER ENGINEERING (PG)

VLSI Assignment #1

By: - Enideg Ayalew

Submitted to: - Almaw Ayelign (Ph.D. Candidate)

Submission date: 06/06/20

What is MOSFET and it’s construction?

The MOSFET (Metal Oxide Semiconductor Field Effect Transistor) transistor is a

semiconductor device, which is widely used for switching and amplifying electronic signals in
the electronic devices. The MOSFET is a core of integrated circuit and it can be designed and
fabricated in a single chip because of these very small sizes. The MOSFET is a four terminal
device with source(S), gate (G), drain (D) and body (B) terminals. The body of the MOSFET is
frequently connected to the source terminal so making it a three terminal device like field effect
transistor. MOSFET is the most common transistor and can be used in both analog and digital
circuits.

The MOSFET works by electronically varying the width of a channel along which charge
carriers flow (electrons or holes). The charge carriers enter the channel at source and exit via the
drain. The width of the channel is controlled by the voltage on an electrode is called gate which
is located between source and drain. It is insulated from the channel near an extremely thin layer
of metal oxide. The MOS capacity present in the device is the main part

MOSFET Operation

The working of a MOSFET depends upon the MOS capacitor. The MOS capacitor is the main
part of MOSFET. The semiconductor surface at the below oxide layer which is located between

2|Page
source and drain terminals. It can be inverted from p-type to n-type by applying positive or
negative gate voltages.

When we apply positive gate voltage the holes present under the oxide layer with a repulsive
force and holes are pushed downward with the substrate. The depletion region populated by the
bound negative charges that are associated with the acceptor atoms. The electrons reach channel
is formed. The positive voltage also attracts electrons from the n+ source and drain regions into
the channel. Now, if a voltage is applied between the drain and source, the current flows freely
between the source and drain and the gate voltage controls the electrons in the channel. If we
apply negative voltage, a hole channel will be formed under the oxide layer.

P-Channel MOSFET

The drain and source are heavily doped p+ region and the substrate is in n-type. The current
flows due to the flow of positively charged holes also known as p-channel MOSFET. When we
apply negative gate voltage, the electrons present beneath the oxide layer experience repulsive
force and they are pushed downward in to the substrate, the depletion region is populated by the
bound positive charges, which are associated with the donor atoms. The negative gate voltage
also attracts holes from p+ source and drain region into the channel region.

3|Page
N-Channel MOSFET

The drain and source are heavily doped n+ region and the substrate is p-type. The current flows
due to the flow of negatively charged electrons, also known as n-channel MOSFET. When we
apply the positive gate voltage the holes present beneath the oxide layer experience repulsive
force and the holes are pushed downwards in to the bound negative charges which are associated
with the acceptor atoms. The positive gate voltage also attracts electrons from n+ source and
drain region in to the channel thus an electron reach channel is formed.

MOSFET characteristic
MOSFETs are tri-terminal, unipolar, voltage-controlled, high input impedance devices, which
form an integral part of vast variety of electronic circuits. These devices can be classified into
two types viz., depletion-type and enhancement-type, depending on whether they possess a
channel in their default state or no, respectively. Further, each of them can be either p-channel or
n-channel devices as they can have their conduction current due to holes or electrons
respectively. However, inspite of their structural difference, all of them are seen to work on a
common basic principle which is explained in detail in the article “MOSFET and its operation“.

4|Page
This further implies that all of them exhibit almost similar characteristic curves, but for differing
voltage values.

1. Cut-Off Region:- is a region in which the MOSFET will be OFF as there will be
no current flow through it. In this region, MOSFET behaves like an open switch and is thus
used when they are required to function as electronic switches.
2. Ohmic or Linear Region :- is a region where in the current IDS increases with an increase in
the value of VDS. When MOSFETs are made to operate in this region, they can be used as
amplifiers.
3. Saturation Region :- the MOSFETs have their IDS constant inspite of an increase in VDS and
occurs once VDS exceeds the value of pinch-off voltage VP. Under this condition, the
device will act like a closed switch through which a saturated value of IDS flows. As a
result, this operating region is chosen whenever MOSFETs are required to perform
switching operations.
Having known this, let us now analyze the biasing conditions at which these regions are
experienced for each kind of MOSFET.

Enhancement-type MOSFET
The operation of MOSFET in Enhancement mode is similar to the operation of the open switch,
it will start to conduct only if the positive voltage(+VGS) is applied to the gate terminal and the
drain current starts to flow through the device. The channel width and drain current will increase
when the bias voltage increases. But if the applied bias voltage is zero or negative the transistor
will remain in the OFF state itself.

VI Characteristics

VI characteristics of the enhancement-mode MOSFET are drawn between the drain current
(ID) and the drain-source voltage (VDS). The VI characteristics are partitioned into three different
regions, namely ohmic, saturation, and cut-off regions. The cutoff region is the region where the
MOSFET will be in the OFF state where the applied bias voltage is zero. When the bias voltage
is applied, the MOSFET slowly moves towards conduction mode, and the slow increase in
conductivity takes place in the ohmic region. Finally, the saturation region is where the positive
voltage is applied constantly and the MOSFET will be staying in the conduction state.

5|Page
Depletion Mode

The depletion-mode MOSFETs are usually called the “Switched ON” devices as they are
generally in the closed state when there is no bias voltage at the gate terminal. When we increase
the applied voltage to the gate in positive the channel width will be increased in depletion
mode. This will increase the drain current ID through the channel. If the applied gate voltage is
highly negative, then the channel width will be less and the MOSFET might enter into the cutoff
region.

VI characteristics:
The V-I characteristics of the depletion-mode MOSFET transistor are drawn between the
drain-source voltage (VDS) and Drain current (ID). The small amount of voltage at the gate
terminal will control the current flow through the channel. The channel formed between the drain
and the source will act as a good conductor with zero bias voltage at the gate terminal. The
channel width and drain current will increase if the positive voltage is applied to the gate
whereas they will get decreased when we apply a negative voltage to the gate.

6|Page
There are some important applications of metal oxide semiconductor FET (MOSFET) are
as given below:
MOSFET is used for switching and amplifying electronics signals in the electronic
devices.
It is used as an inverter.
It can be used in digital circuit.
MOSFET can be used as a high frequency amplifier.
It can be used as a passive element e.g. resistor, capacitor and inductor.
It can be used in brushless DC motor drive.
It can be used in electronic DC relay.
It is used in switch mode power supply (SMPS).

2. let us to discuss about CMOS construction, operation, characteristic and application

CMOS operation
In CMOS technology, both N-type and P-type transistors are used to design logic functions. The
same signal, which turns ON a transistor of one type, is used to turn OFF a transistor of the other

7|Page
type. This characteristic allows the design of logic devices using only simple switches, without
the need for a pull-up resistor.

In CMOS logic gates a collection of n-type MOSFETs is arranged in a pull-down network

between the output and the low voltage power supply rail (Vss or quite often ground). Instead of
the load resistor of NMOS logic gates, CMOS logic gates have a collection of p-type MOSFETs
in a pull-up network between the output and the higher-voltage rail (often named Vdd).

Thus, if both a p-type and n-type transistor have their gates connected to the same input, the p-
type MOSFET will be ON when the n-type MOSFET is OFF, and vice-versa. The networks are
arranged such that one is ON and the other OFF for any input pattern as shown in the figure
below.

CMOS offers relatively high speed, low power dissipation, high noise margins in both states, and
will operate over a wide range of source and input voltages (provided the source voltage is
fixed).

Construction of CMOS

Complementary metal oxide semi-conductor devices are chips in which both P-channel and N-
channel enhancement MOSFETs are connected in push-pull arrangement. The basic
connections for CMOS are shown in figure.

8|Page
N-channel and P channel CMOS connections

Above figure shows various CMOS connections especially N-channel and P-channel CMOS
connections.
In this circuit, two MOSFETs (P-channel MOSFET and N-channel-MQSFET) are connected in
series so that source of P-channel device is connected to a positive voltage supply + VDD and the
source of N-channel device is connected to the ground. Gates of both the devices are connected
as a common input and drain terminals of both the devices are connected together as a common
output.

When the input is kept low that is at 0 volt, then gate of MOSFET T, is at negative potential with
respect to the source S1. So MOSFET T1 will be ON with its resistance RON = l kilo Ohm, while
gate of MOSFET T2, will be at 0 Volt relative to its source. So T2 will be OFF with its
resistance RSoff = 10^10 Ohms. Both of these resistances act like a potential divider and output
of this will be approximately +VDD volts

In other case when the input is kept at high level that is +VDD volts then the gate of MOSFET T1,
is at zero potential relative to the source, so T1 will be OFF with its resistance R0FF = 10^10
Ohms while gate of MOSFET T2 will be at positive potential relative to its source so the
MOSFET T2 will be ON with its resistance RON = 1 Kilo Ohm. In this case output will be
approximately 0 volt.

9|Page
Characteristics of CMOS

Two important characteristics of CMOS devices are high noise immunity and low static power
supply drain. Significant power is only drawn when its transistors are switching between on and
off state. CMOS device do not produce as much heat as other forms of logic such as TTL. Also
allows high density of logic functions on chip.

Application of CMOS

Complementary MOS processes were widely implemented and have fundamentally replaced
NMOS and bipolar processes for nearly all digital logic applications. The CMOS technology has
been used for the following digital IC designs.

Computer memories, CPUs

Microprocessor designs
Flash memory chip designing
Used to design application-specific integrated circuits (ASICs)
It also applicable on image processing, sensor design et al

10 | P a g e