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MODIFIED FET FOR SATELLITE
http://nptelonlinecourses.iitm.ac.in/in
dex.php
APPLICATIONS
C.DEEPALAKSHMI
M.E-VLSI,SONA college of
technology,salem,TAMIL NADU.

deepslakshmi@rediffmail.com

CMOS circuit design. In this chapter we will

ABSTRACT:
Normally , there are various
electronic device dedigned for space
applications.These deviceare exposed to the
rediation outside the earth .They should be made
more radifation hardened although they are
already made fas such to a certain extert. In the
proposed design double gate namely the ‘Top
gate’ and the ‘planar fet in used It consist of two
Bottom gate’. The top gate is made floting as in
floting gate transistor arrangement and also
other featuer to be made asymmetrical
therefore analyze the current
achievements in MuGFET device technology in
regard to various, circuitrelevant
figures of merit, specific layout and design
aspects, as well as the
requirements for a future CMOS technology
platform to provide Systemon-
a-Chip (SoC) integration capability

INTRODUCTION:

The satellites are used for processing images

and data for various purposes like
communication,GPRS,GPS,Broadband etc.,As
we depend on information given by the satellites
,it should be the most reliable.The system or
circuit designed for such a purpose must be in
such a way that it is insensitive to radiation.

MuGFET:
For a circuit designer the Multi-Gate MOSFET
(MuGFET) is a
disruptive device architecture because the third ADVANTAGES:
dimension is explicitly
The multiple gate field effect transistor has
exploited to reduce short-channel effects and to many advantages when compared with other
limit the increase of transistors.The result can be shown in the
leakage currents in CMOS technologies beyond graph.[1]
the 45nm node. Moreover,
new gate-stack materials are introduced to
fabricate enhancement-type
nFET and pFET devices, which is a prerequisite
for digital and analog
 MODIFIED TECHNIQE

Instead of connecting a separate capacitor,the

schematic structure of MuGFET is modified such that
it contains a inbuilt capacitance.

The schematic is shown below:

EFFECTS OF RADIATION:

a) spacecraft charging
b) Total ionizing dose
c) Displacement damage
d) Single event effects The layout for the above schematic should be drawn
We are going to consider single event effects. and to verify that whether it satisfies the normal
The change in the state of the node that is occurring properties of any transistor.
due to the incident radiation that causes accumulation
of charges.The charges required to cause the change
of state is called the critical charge.A good circuit LAYOUT1
design is to increase this critical charge.[2]

SOLUTION AT PRESENT:[2]
LAYOUT2

REFERENCES
1)J.P.Colinge,FinFET and other Multigate
transistors,Springer 2011
2)Space radiationeffects on technology and human
biology and proper mitigation techniques by Texas
space Grant commision

SIMULATION RESULT

FURTHER DEVELOPMENT

The digital circuit design has to be made through this

modified structure and the performance should be
simulated
Dear Sir/Madam,

         i am currently working as a Asst

Engineer/Maintenance in Coimbatore
Electricity
DistributionCircle/Metro/Coimbatore
SS.Honestly, i cannot be able to attend the
training in the mentioned hours from May
04,2020 to May 11,2020.Since I have office
hours from 08:00 to 17:30 daily, due to
essentiality of the power sector during
COVID-19 lockdown.

          I am just making a request to make the

training videos separately downloadable for
registered users ,so i can come home after
17:30 and Watch it and start working out
assignments.

          I hope you consider my request.

                                 
Deepalakshmi Chandrasekaran