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Syllabus:
PART-A: Conduct the following Study eXRerimentsto learn ALP using ARM Cortex M3 Registers using an
Evaluation board and the required s0fiware tool.
1. ALP to multiply two 16 bit binary nunlbers.
2. ALP to find the sum g£first 10 inte{er numbers.
PART-B: Conduct tli'efollowing experiments on an ARM CORTEX M3 evaluation board using evaluation
version of Embedded '6:' & Keil Uvision-4 tool/compiler.
Embedded C Codes
1. Interfacing of "LED" - 8 no's to a GPIO of Cortex M3 Controller
i. To blink a single LED bit by bit.
ii. To scroll a LED from bottom to top and top to bottom.
2. Interface of toggle switch to a GPIO of Cortex M3 Controller.
i. Switch Status to be displayed on LED.
ii. Switch Status to be displayed on Buzzer. iii. Switch status to be disRlayed on Relay.
Cycle 2:
3. Usage of an external interrupt to toggle an LED onl off.
4. Usage ofInternal UAR T.
i. To transmit a single character data from Host to UART.
ii. To receive a single character data from UART to Host
iii. To transmit a string of character data from Host to UART
Cycle 3:
Cycle 4:, X~
10. Interface ot'LCD module to Cortex M3 controller -
i. To display single line message.
ii. '1'0 display two line messages.
11. Usage of Internal ADC -
t To determine Digital output for a given Analog input and display digital data on to LCD.
12. Interface a 4x4 keyboard to Cortex M3 controller and display the key code on a LCD.
13. Measurement of ambient temperature using a sensor and SPI ADC IC.
Keil Micro Vision® 5 IDE tool Step by step Tutorial
Open Kei15 IDE tool
e jJViisi:mll
Ifilile' Edlilit Vilew I Prroj1e'ct I Ifl!alsnl De'D-!lJlgl iPe'rrilp,nle'rr,allls lioo,lls S,VCS: WilnJdio'!.i'i.i' IHle'llp'
rNlew M!lJlliliil-iPrrojle'dWt
Close Proje'di
Orrgi3!Iil.iiSe ....
Step 2.. After that, a new window will appear as shown below. Make sure "Software Packs" is selected for the 1st
drof down. In the search box below it, type "lpc1768" and then select the device from list below. Finally click
"OK".
x
Device ~
II Software IPadks
Vendor: NXP
Device: LPC1768
Toolset: ARM
I
I-
Searcm pc1768 l'
~----------------------------.
I 2
DescM~ion:
EJ ..·Q INXP'
EJ ..fl$ ILp'Cl700 'Serbes
4 l_o~_1 Cancel
Step 3. Now, inside the "Manage Run-Time Environment Window" select the check boxes for "CORE" under
"CMSIS" and "Startup" under "Device". If you want to select any other li15fariesyou can do so by selecting the
respective checkboxes. Selecting "Startup" will automatically added all the necessa[YJstartup/boot files required
for LPCl7xx device, so we don't have to import them from external sources. The selection of libraries can be
changed any time later. ~
x
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Sell" Valiliaillliit Veli'SI;OIill IChescrriiptilOIfl
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s··? eMLSIS Cortex Mlucrrocolill"ltlJollllerr So1Ttrwalli"e lmnerfac e Co.impc
!··I·Q CORE I ~,0,,1 CMiSIS- CORE fo-r Cortex- M SOOOO SC3<OO ARM'v,(
! DSp r 1,~,,1 CMiSIS-!D<SP' lLiih,r.alry for Cc.mtex- Ml .50000 .aa-uclSl C3,
$~ RliOS(API) 1,0,,0 CM,SIS- RTOS AP'I fo-r Coeftex- M SOOOO andl SC3100
~ ~ Rli052 (API) 2,1,,0 CMeSIS- RTOS AP'I fo-r Cortex- M SOOOO andl SC3100
[$1 -~ 'CMrSIS Orr'jlve.,.
$-.~ ·Comlpiilelr ARM 'Compiil!err 1,2,.0 COli""Ji"lpiillelErrKttensiions forr ARMI COnfl'P'iller 5. .aJndAl R
8··~ Devi.ce
L..... Q GP'[}MlA
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$"~ Nenwo.sjc 7.4,,0 IPv4/1 Pv5 INlettwOlrkiililiQI.l!..Ilsiina Ethernet orr Ser! a.1p1ile
i±l..~ USIB 6,10,,0
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Device. Target. l0citpuit I Lli;rtil"lgI User I CJC++ I Asrn Lirnlcer I DebLllg I Ultilities I
INXP 'L'PC11763
CodreGellleratioFil---;===========:::::;;l
)(tal ~MHz]: 112.0 AR M Compiler: I Use·defau'tt e,ampJler ",·e:rslo:rn 3
Operating syStem: IIN"",e
r-' Read/Vll'MritemoAryreas,------------,
ReadllO"M,iyem"rAyreas'--------
----,
default off-ctnp Start Startup .aefaui~ of"f-ehip Start Size N"lnit
r IROM11: I r: r 'RAM1: r
r ROM2:
I r: r RAM2: I r
r ROM.3:
I r: r RAM3rl :---
r
.""-<o"'i" ,,,,-<'hi,,
II P IROM1: 1Ih'o
r IROM2 I I r: r IRAM2 11h2007C0!J![I 11h13O!JO r
~
Step 5. Now, click on the "Output" tab. If you want to generate hex file then you can check "Create HEX File".
Step 6. Then click on the "LinKer"tab and Under that tab check the checkbox option which says "Use Memory
Layout from Target Dialog".
!Device I Target I Outpuit I Ustin~ I lJser I C!C++ I Asm
I Lltil~ies I
ae'bU~I
i9 Options TImTalrget 'lalrget l' t Clic1k on this tab x
117 Use IMemory lLayouit from large! lDialo~ Xfl) IBase: r-------
t
r Make RW SectionsP' osition 'IFldeperndent. IRIO' Base: 11h00'l}l}[HHH)
r Make· R,D S..ed.ions ! RIW IBase I
Ih 100Il00I}[)
P'OS~i.nO,In.dependent
r Dont SearchStsndard Ltibranes r------------:
17 Report lmighitfail' COFild~ioFialSs, Errors, disable W'amirngjs,:
1'7 Load Applicatiom at Startup 1'7 Load Applicatio.Fialt 1'7 RUlFt1ol mai",O
Imit,ializ'aticmhile: Startup
l",itiali2aticmRle:
I ~ Edit., I I d Edit.,
- Rest.oreDetmg Sessi"", Settirngs,------------, "Restore, Debug Session Settings ------------,
1'7 Breakipoims 1'7 u(mlba:>:' 1'7 IBreakpoims, 1'7 Toolbox
1'7W'atch Wimdo...s.. 8, Performance 1'7 \"ilatch Wi"'do ...s.
Analy;zer
1'7 MemQIJfDisplay 1'7 System Vie...e..r
1'7 MemGlryDisplay 1'7 System
Vie...e..r
I OK
II Cancel Defaults. Help
Step 8. Now, in the source navigation pane on the left area, right cli~k'on "Source Group 1" and select "Add New
Item to Group 'Source Group 1'''. A.
~' "
~raj.ect r;tEl
E.I<.t$ ~mjecIpt:c17Dx_'9Pi:o
EHb larget1
! ~ SourceGrnua.L,, j-'- --"
~ Image 'File(:'")
D:: \KE:il.5_projec.1:
Step 10. Now you can write your code in the editor. To compile your program Press "F7" key or in the main menu
goto "Project->Build Target". To check for any compilation errors you can have a look at the build output at the
bottom of main window. A screenshot of the Keil MDK uVision 5 is given below. The top red box shows the
Source Tree Navigation and the bottom red box shows the build output.
Step 11. To initiate a debug session using simulator or debug hardware/probe click "Debug->StartiStop Debug
Session" or you can hit "Ctrl+F5" as shown below:
II~ I ~
Project
Now open the flash magic software and follow the below steps. ~
I
Hex File: C:\Users\vicmarIWFlash.he< I[ 8rowse ...
Modified: Tuesdey. November 28. 2011. 17:31 :48 more info
setectthe deslred
progr,am (hex file Slep 4 Options Slep 5 -
Slarll
- notbm fi~e!)
Statt
~ Verif~ sfter programming
IDFill unused Flash
D Gee block checksums
D E<ecule
www.esacademy.comhoftware}flashmaqic
CJleck COM port number from Device manager. Right click my computer, then click manage. Double
click device manger
.;1". Com Ruter Management
I> rocessors
[> ,.~ Sound, video and game controllers
I> yg System devices
~i Universal Serial Bus controllers
Register Configuration
~
LPC1768 has its GPIOs divided into five ports PORTO - PORT4, although many of them are not physically 32bit
wide. Refer the data sheet for more info. The Below registers will be used fQl1 Configuring and using the GPIOs
registers for sending and receiving the Digital signals. A structure LPC_GBIQn(n= 0,1,2,3) contains all the
registers for required for GPIO operation. Refer Ipcl7xx.h file for more info on ~ registers.
LPC1768 GPIO
PINSEL: GPIO Pins Select Register Almost all the LPC1768 pms are multiplexed to support
more than 1 function. Every GPIO pin has a minimum of one function and max of four functions. The
required function can be selected IJ}( configuring the PINSEL register. As there can be up to 4 functions
associated with a GPIO pin, two bits for e'_'chpin are available to select the function. This implies that we need
two PINSEL registers to configure a RG>RTpins. By this the first 16(PO.0-PO.16)pin functions of PORTO can
be selected by 32 bits of RINSELO register. The remaining 16 bits(PO.16-PO.32) are configured using 32bits
of PINSELI register. A'!smentidned earlier every pin has max of four functions. Below table shows how to select
the function for a particular pin using two bits of the PINSEL register.
This register controls the state of output pins. Writing Is produces highs at the corresponding port pins. Writing Os
has no effect. Reading this register returns the current contents of the port output register not the physical port
value.
IValues IIFIOSET
~=====:
10 IINoEffect
~=====:
11 IISetsHigh on Pin
This register controls the state of output pins. Writing Is produces lows at the corresponding ,0it pins. Writing Os
has no effect.
IValues IIFIOCLR
~=====:
10 IINoEffect
~==~
11 IISetsLow on Pi;;:
This register IS used for reading and writing data from/to the PORT.
Output: Writing to this register places cmresponding values in all bits of the particular PORT pins.
Input: The current state of digital port pins can be read from this register, regardless of pin direction or alternate
function selection (as long as pins are not configured as an input to ADC).
Note:lt is recommended to configure the PORT direction and pin function before using it.
Registers on LPC1768 are present on peripheral AHB bus(Advanced High performance Bus) for fast read/write
timing. So, these are Basically Fast 110 or Enhanced 110 and hence the naming convention in datasheet uses a
prefix of "FlO" instead of'something like "GIO" for all the registers related to GPIO. Lets go through these as
given below.
1) FIODIR : This is the GPIO direction control register. Setting a bit to 0 in this register will configure the
corresponMingpin to be used as an Input while setting it to 1 will configure it as Output.
2) FIOMASK : This gives masking mechanism for any pin i.e. it is used for Pin access control. Setting a bit to 0
means that tHe corresponding pin will be affected by changes to other registers like FIOPIN, FIOSET, FIOCLR.
Writing a 1 means that the corresponding pin won't be affected by other registers.
3) FIOPIN : This register can be used to Read or Write values directly to the pins. Regardless of the direction set
f0r the particular pins it gives the current start of the GPIO pin when read.
4) FIOSET : It is used to drive an 'output' configured pin to Logic 1 i.e HIGH. Writing Zero does NOT have any
effect and hence it cannot be used to drive a pin to Logic 0 i.e LOW. For driving pins LOW FIOCLR is used which
is explained below.
5) FIOCLR : It is used to drive an 'output' configured pin to Logic 0 i.e LOW. Writing Zero does NOT have any
effect and hence it cannot be used to drive a pin to Logic 1.
Most of the PINS of LPC 176x MCV are Multiplexed i.e. these pins can be configured to provide up to 4
different functions. By default, after Power-On or Reset: all pins of all ports are set as GPIO so we can
directly use them when learning GPIO usage. The different functions that any particular pin provides can be
selected by setting appropriate value in the PINSEL register for the corresponding pin. Each pin on any
port has 2 corresponding bits in PINSEL register. The first 16 pins (0-15) on a given port will have a
corresponding 32 bit PINSEL register and the rest 16 bits will have another register. For example bits 0 & 1 in
PINSELO are used to select function for Pin 1 of Port 0, bits 2 & 3 in PINSELOare used to select function for PIN
2 of port 0 and so on. The same is applicable for PINMODE register which will go through in last section of this
article. Have a look at the diagram given below.
PINSELORegister
31
PINSELl
...
31 1 30 29 1 28 27 1 26 25 1 24 23 1 22 21 1 20 19 118 17 116 15 114 13 112 11 110 9 18 7 16 5 14 3 12 1 10
PO.31 PO.30 PO.29 PO.28 PO.27 PO.26 PO.25 PO.24 PO.23 PO.22 PO.21 ""P~Q~ PO.19 PO.18 PO.17 PO.16
Example' Port 00 pin's function is decided by contents ofEINSELO register bit 0 and bit 1
~.
TlD2 00
13: '112 P{!1_I6 G~F'lDl PClrl!. 0_6 11.2E1RX;_SID.A r...tA.lI2f :.0 00
.sOlKl r...tA.lI2f :. 1 00
MISOl r...tA.T2:.2: 00
IMOiSJll 00
Since by default all pins are configured as GPIOs we don't need to explicitly assign a '0' value to PINSEL
register in Programming examples.
Example #1)
To configure Pin 4 of Port 0 i.e PO.4 as Output and want to make it High(Logic 1)
Example #2
Making output configured Pin 17 High of Port 1 i.e P 1.17 and then Low can be does as follow)"
LPC_GPIOI->FIODIR = (1«17);
LPC_GPIOI->FIOSET = (1«17);
LPC_GPIOI->FIOCLR= (1«17);
Example #3)
Configuring PO.5 and PO.11 as Ouput and Setting them High:
Example #4)
Example #5)
Configuring Pins of Port 0 (PO.4 to PO.II) as Ouput and Setting them High: and Low
Example #6)
P 0_4
P112:1
Blink a LED
a. To blink LEDs
Lab Program # 2.a Interface a simple Switch and display its status through LED.
}
}
}
2.b. Interface a simple Switch and display its status through Buzzer.
int maint)
{
LPC_GPI03->FIODIR = 1« 25; II port 3.25 pin is configured as alp
LPC_GPIOl->FIODIR & = ~ (1« 21); II port P 1.21 pin is configured as i/p
while(l)
{
if(! (LPC GPIOl->FIOPIN & (1« 21))) II if switch P .21 pressed
{
}
else
{
~
LPC_GPI03->FIOCLR= (1« 25); II ~Pin is Clear fLowl
-.
}
}
}
2.c. Interface a simple Switch and display its status through Buzzer-,Relay and LED.
#inc1udc<LPCI7xx.h> ~
int maint)
{
LPC GPIOO->FIODIR = (1«4) I (l-t::<25); II port PO.4-PO.ll[LEDS] & PO.25[Relay] config as alp
LPC_GPI03->FIODIR = (1«25); II port 3.25[Buzzer] configured as alp
LPC_GPIOl->FIODIR &= ~(1«21); I I port P 1.21[Switch KEY] configured as i/p
while(l)
{
& (1«21))) I I if switch P 1.21 pressed
{
LPCt_GPIOO->FIOSET= (1«4) I (1«25); II tum on LED, RELAY
Iitum on Buzzer
}
Normally
Open (NO)
Embedded Controller Lab Manual 15ECL67
Applications of Relay
n1)) l))
Vss
LPC1768External Interrupts
'Table 83,. Pin .undlon select regisler',4 (PINS'EILAa·ddress IOdOO:2 CD1:'Ob'!Ill d'escllilp!I'on
I"IINSEU I"Iln Functionwhen F'lInctlonwll.enD1 FlinGiion when 1D FunGllonw,hen Resel
"arne DO 1t ·..;.li:lle
1:0 P2.0 GPIO Port .2.0 PWM1j
J,:2 P2.1 GPIO Port .2.1 PWM1.2
5:4 P2.2 GPIO Port .2.2 PWM1.3
7:6 P2.3 GPIO Port .2.3 PWM1,4
9:1l P2.4 GPIO Port 2.4 PWM1.5
11:10 P2.5 GPIO Port .2.5 PWM1.6
13:12 P2.6 GPIO ,PtJrt.2:6 PCAPUJ
15:14 PL7 GPIO Port .2.7 RD2
17:16 P2.8 GPIO PtJrt.2.8 TD2
19:18 P2.9 GPIO Port 2.9 USB_<cONNECT
2.1:20 P2.W GPIO Port 2.10 EINiO
23:22 PZ.11!.:!] GPIO Port2.11 EINi1
25:24 P2.tzl!:!.l GPIO Port 2.12: EINI2:
2:7:26 P2.131:!.1GPIO Port2.1J, EINI1l,
'1I.'1I-"JJ:I! IJ:;IIoI:!iC'.£:Io'''''i'.i:.,M ~~.·l:ki:orIjr.:uri
EINT Registers
I Register II Description I
I EXTINT I
I 31:4 II 3 II 2 II 1 II ° I
~,k~==RE=giFE=R=V;=E=D======IE~1=IN=T=3=~11 EINT2 II EINTI I~=I =EIN=T=o=~I'
A~" Bits will be set whenever the interrupt is detected on the particular interrupt pin.
I~l1e interrupts are enabled then the control goes to ISR.
Writing one to specific bit will clear the corresponding interrupt.
EXTMODE
I I
131:4 112 III 11°
113 I
IRESERVED IIEXTMODE3 IIEXTMODE2 IIEXTMODE1 IIEXTMODEo
I
D~n~ 17
EXTMODEx: This bits is used to select whether the EINTx pin is level or edge Triggered
0: EINTx is Level Triggered.
1: EINTx is Edge Triggered.
EXTPOLAR
31:4 3 2 1 o
EXTPOLARx: This bits is used to select polarity(LOWIHIGH, FALLING/RISING) of the EINTx interrupt
depending on the EXTMODE register.
r:
{
LPC_SC->EXTINT = 1; /* Clear Interrupt Flag ext int 0 */
} LPC_GPIO A ~ (1¥<4); /* Toggle the LEDI everytime INTRO is generated */
OxOO; NVIC _
EnableIRQ(EINTI_IRQn); whilet l )
{
}
}
{
/* Clear Interrupt Flag ext int I */
LPC GPIOO->FIOPIN 1\ = (1« II); /* Toggle the LEDI everytime INTRI is generated */
int main()
{
LPC_SC->EXTINT = 3; /* Clear Pending interrupts */
LPC_PINCON->PINSEL4 = (1« 20) I (1« 22); /* Configure P2 _I 0 as EINTO I */
LPC SC->EXTMODE = I ; /* Configure EINTx as Edge Triggered*/
LPC SC->EXTPOLAR = I; /* Configure EINTx as Falling Edge */
LPC_GPIOO->FIODIR = (1« 4) I (1« 11);
/*configure LED pins as OUTPUT */
LPC _ GPIOO->FIOPIN = OxOO;
NVIC _ EnableIRQ (EINTO_IRQn); /* Enable the EINTO interrupt */
NVIC_EnableIRQ (EINTl_IRQn); while(l) /* Enable the EINTI interrupt */
{
} // any main program running
}
UART module
UART module and registers. LPC1768 has 4-UARTs numbering 0-3, similarly the pins are als0 named as RXDO
RXD3 and TXDO-TXD3.As the LPC1768 pins are multiplexed for multiple functionalities, first they have to be
configured as UART pins.
Below table shows the multiplexed UARTs pins.
~
UART Registers ~
The below table shows the registers associated with LPC1768 UAR yT
IRegister IIDescriPtion
IFCR FIFO
II t... contro~~e.e
;-r
~ ..
,
Controls the UART frame formatting(~umber of Data Bits, Stop bits)]
II~ II" A
IDLM Most Significant Byte of the UART baud rate generator value.
~
JI
Now lets see how to configure the individual registers for UART communication.
LPC1768 has inbuilt 16byte FIFO for Receiver/Transmitter. Thus it can store 16-bytes of data received on UART
without overwriting. If the data is not read before the Queue(FIFO) is filled then the new data will be lost and the
OVERRUN error bit will be set.
FCR
I 31:8 II 7:6 II 5:4 II 3 II 2 II 1 II 0 I
IRESERVEDIIRXTRlGGERJIRESERVEDIIDMAMODEIITXFIFO RESETIIRXFIFO
RESETIIFIFOENABLEI
Bit 0- FIFO:
This bit is used to enable/disable the FIFO for the data received/transmitted.
O--FIFOis Disabled.
I--FIFO is Enabled for both Rx and Tx.
Bit 2 - Tx FIFO:
This is used to clear the 16-byte Tx FIFO.
O--Noimpact.
l--Clears the 16-byte Tx FIFO and the resets the FIFO pointer.
LCR
Word Length
IReserved Select
ISetas->
~
LSR (Line Statns Register) ~
The is a read-only register that provides status information of the U~RT TX and RX blocks.
LSR
1 31:8 IDDDDDDDD
IReserved JIRXFjNITEMT IITHRE 1~~lpE I[Q[J~
This bit will be set when there is a received data in RBR register. This bit will be automatically cleared when RBR
is empty.
0-- The UARTn receiver FIFO is emg:ty.
1-- The UARTn receiver FIFO is not emp-ty.
The overrun error condition is set when the UART Rx FIFO is full and a new character is received. In this case, the
UARTn RBR FIFO will not b€ overwritten and the character in the UARTn RSR will be lost.
0-- No overrun
1-- Buffer over run
31:8 7 6-0
I II II
Reserved TXEN ~~served
I II II
, I
o System Freqj4
1 System Freq
2 System Freqj2
3 System Freqj8
DivAddVal/MulVal == 0
'SiillTIltgjlleUAlRT .P.arcke·tt
X X X
(0
..
'Stalritt iB itt
IDJlata IB·i·ts5: -8
StOlP
'ill)
*B"":
1. Stepl: Configure the GPIO pin for UARTOfunction using PINSEL register.
2. Step2: Configure the FCR for enabling the FIXO and Reste both the RxlTx FIFO.
3. Step3: Configure LCR for 8-data bits, 1 Stop bit, Disable Parity and Enable DLAB.
4. Step4: Get the PCLK from PCLKSELx register 7-6 bits.
5. Step5: Calculate the DLM,DLL vaues for required baudrate from PCL\. ~
6. Step6: Updtae the DLM,DLL with the calculated values. y
7. Step6: Finally clear DLAB to disable the access to DLM,DbL.
After this the UART will be ready to Transmit/Receive Data at t~e-i£ied baudrate.
'1iallle 1!1. 1',11111 'fLlI1lc:1Jlo:nselect re>lJls~eli' III (PIINSEIl.:IlI ~ a.dllllllellS !i!liK41l111C1O2 IllIII. bill: d'e'SiCli',lp~IDClIiII
IPiINSELO III'n FuncUo:n whenl FilincOlon 'li!II.en Oil FuniCtlo:n Funetlo:n Reset
n:ame '001 wll.enl iNI '1i!IIIl:in'fit '1'81:"1:(
1:01 IPOJ) G!PiIO IPc!rit 00.0 RD1 TXD3 8DA.1
31:2: IPR1 GPIIO IPc!rit '0.1 TID1 R.XIDG 8QU 00
,5::4 IPR:2: GPIIO IPc!rit 112 IXID!) ADO.l Reserved
1:6 IPR~ GlPlIO IPc!ri,t 113 IRXD!) ADO ..6 Reserved
9r:tli PR«!J G!PlIO IPc!rit 114 112'SiRX_CILJIK RU2 GAIP.2,Q
111:10 IPO.,5[!] G!PIIO IPc!ri,t 0.5 11.2'S!RX_WS Tn2 GA1P.2.'1
13:~2 IPO.6 G!PIIO PcirI: 116 112BIRX_SnA .s8EL~ MAI2:,O
15:14 IPR7 G:PlIO POOl: 0.1 112SIX,_(::lK SOIK1 MAlIi.2~1
l1:Ui IPIJI.~ G:PlIO IPc!ri t 1JI.8
,
112SIX_WB MI801 MAiIi.2~2:
19:18 IPIJI.9' G!P,IO PcirlIl9 112:8:rX,-,~mA 'MOO111 MAT2:.,~
:2:1:20 PO. 1II] G!PIIO PcirI 0.10 IXID!2 .sDA2 MAI3 ..0
23:22 IPo.H GPIIO PcirI 0.11 1R'KD.2 S012 MA:ra.1
:29:24 Reserved IRes'eFVl8d iR.eseNed Reserved
3~:30 IPO.i5 G!PlIO IPc!rit 0.15 IXm SOIKO SOIK
return (LPC UARTO->RBR); IIIfLSRO bit=l tlART receiver not empty. Send it to RBR
}
L
Tl!
11iCfO C ontrollcr M.AJ( r--IL--
Rl UJ..RT
232
LPC 1768 r--BL--
_[
LPC1768 PWM Module
LPC1768 has 6 PWM output pins which can be used as 6-Single edged or 3-Double edged. There as seven match
registers to support these 6 PWM output signals. Below block diagram shows the PWM pins and the associated
Match(Duty Cycle) registers.
E:JI I
Associated Corresponding
PWM Channel Pin Functions
PINSEL Register Match Register
Ec:J
~
0,1 bits of
O-GPIO, I-PWMl[l], 2-TXD1, 3- MRI ~
I~
PINSEL4
Ec:J
~
Ec:J
Bc:J .
O-GPIO, I-PWMI [5], 2-DSR1, 3)
TRACEDATA[l]JI(
O-GPIO, I-P~C1RI'
TRACEDATA[0]~
3-
8,9 bits of
PINSEL4
10,11 bits of
PINSEL4
MR6
The below table shows the registers associated with LPC1768 PWM.
D
j,.._
I Register II Description
I
Interrupt ROg'lster,Jn,e IR can be read to identify which of eight possible interrupt sources arc pending.
Writing Logic-l will clear the corresponding interrupt.
~
~ \('e~ontrol Register: The TCR is used to control the Timer Counter functions(enable/disable/reset).
~ ~ Tiliier Counter: The 32 -bit TC is incremented every PR +1 cycles of PCLK. The TC is controlled
A through the TCR.
~
~ Prescalar Register: This is used to specify the Prescalar value for incrementing the TC.
D
Prescale Counter: The 32-bit PC is a counter which is incremented to the value stored in PR. When the
value in PR is reached, the TC is incremented.
EJ
Match Control Register: The MCR is used to control the reseting ofTC and generating of interrupt
whenever a Match occurs.
D~n~ ')t:;:
~ Match Register: This register hold the max cycle Time(Ton+ Toff).
~ Match Registers: These registers holds the Match value(PWM Duty) for corresponding PWM
L:: j channels(PWM1-PWM6).
EJ
PWM Control Register: PWM Control Register. Enables PWM outputs and selects PWM channel types
as either single edge or double edge controlled.
~ Load Enable Register: Enables use of new PWM values once the match occurs.
Register Configuration
The below table shows the registers associated with LPC1768 PWM.
TCR
31:4 3 2 1 o
l'-l'
~
Used to Enable or Disable the PWM Block.
0- PWM Disabled
1- PWM Enabled
MCR
PWMMRxI
This bit is used to Enable or Disable the PWM interrupts when the PWMTC matches PWMMRx (x:0-6)
0- Disable the PWM Match interrupt
1- Enable the PWM Match interrupt.
PWMMRxR
This bit is used to Reset PWMTC whenever it Matches PWMRx(x:0-6)
0- Do not Clear.
1- Reset the PWMTC counter value whenever it matches PWMRx.
PWMMRxS
This bit is used to Stop the PWMTC,PWMPC whenever the PWMTC matches PWMMRx(x:0-6).
0- Disable the PWM stop 0 match feature
1- Enable the PWM Stop feature. This will stop the PWM whenever the PWMTC reaches the Match register value.
I I
peR
I 31: 15
II
PWMENAI
14-9
I~I 6-2
PWMSEL2
I~
E
PWMENA6- PWMSEL6-
I Unused lunusedl
PWMSELx "
This bit is used to select the single edged and double edge mode form PWMlX (x:2-6)
0- Single Edge mode for PWMx
1- Double Edge Mode for PWMx.
PWMENAx
This bit is used to enable/disable the PWM output for PWMx(;x: 1-6)
0- PWMx Disable.
1- PWMx Enabled.
A
LER
31-7
Unused
LENx
This bit is used EnablelDisable the loading of new Match value whenever the PWMTC is reset(x:0-6)
PWMTC will be continously incrementing whenever it reaches the PWMMRO, timer will be reset depeding on
PWMTCR configuratcn, Once the Timer is reset the New Match values will be loaded from MRO-MR6 depending
on bits set in this register.
0- Disable the loading of new Match Values
1- Load tl1e new Match values from MRx when the timer is reset.
The TC is continuously incremented and once it matches the MRl(Duty Cycle) the PWM pin is pulled Low. TC
still continues to increment and once it reaches the Cycle time(Ton+ Toff) the PWM module does the following
things:
• Slidel: The TC is being incremented as per the Pre-scalar configuration. The PWM output is high as the
TC is still less that duty cycle.
• Slide2: TC is incremented to 40 and still the PWM pin as HIGH.
• Slide3: TC is incremented to 60 and it matches the Duty Cycle(MRl =60).
• Slide4: Now the Comparatorl(Green) will trigger the R of SR latch and Pulls the PWM output to
Zero(Q=O).TC still continues to increment.
• Slide5: TC is incremented to 80 and PWM pin is low as TC > Duty Cycle.
• Slide6: Now TC is 100 and it matches the Cycle time(MRO==lOO).
• Slide7: Now the Comparator2(Red) will trigger the S of SR latch and pulls the PWM output to
ONE(Q==l). It also resets the TC to zero. It updates Shadow buffers with new Match values from
MRO,MRI.
1. Configure the GPIO pins for PWM operation in respective PINSEL register.
2. Configure TCR to enable the Counter for incrementing the TC, and Enable the PWM li1ock.
3. Set the required pre-scalar value in PR. In our case it will be zero.
4. Configure MCR to reset the TC whenever it matches MRO. ~
5. Update the Cycle time in MRO. In our case it will be 100. L. ~
6. Load the Duty cycles for required PWMx channels in respective match registers MRx(x: 1-6).
7. Enable the bits in LER register to load and latch the new <matchvalues.
8. Enable the required pwm channels in PCR register.
Tallile 8:4,.
~
..~ ......
P,ln 'Iu,nctlo:n select Fell Isler l' (PI,NiBE,n·· 3,dillll'e~iSO!!l400r.C! O~iiI:t)I!1 d escrilpUon
IP,INSEU Plnl F:undf:onl 'whe,n ,Fu,nlrtlo:n Fu,nc:ilcm F'lIn.dflOnl Reset
nlame 01) when, '011 wh,en'110 when 11 valu;e
17:0 IReserved Resel'!led Rle>served IRese'rved
5. Usage ofInternal PWM to generate PWM and vary its duty cycle
#include <lPC17xx.h()'
int main(void)
{
int j,DutyCycle;
LPC_PINCON->PINSEL7 = 3« 20; 1* Cofigure pin P3.26 for PWM mode.
LPC_PWMJ->TCR = (1« 0) I (1« 2); *1 lienable counter and PWM
LPC_P,\~l-::;;MCR= (1« 1); I*Reset on PWMMRO,reset TC if it matches MRO *1
LPC PWM1-)!MRO= 100; 1* set PWM cycle(Ton+Toff)=lOO) *1
LPC__PWMv t>PCR = 1 « 11,' 1* Enable the PWM output pin for PWM_3 *1
}
}
duty cycle =
tON + tOFF
tON = ON time
tOFF = OFF time 25% duty cyde
tON + tOFF = Time period
VREFP---- ......
VREFN---""". ~
b0 ~~--~
bl--Jtr.
bz--.... DAC
bn -- .... '----- _/
Tabh: 80,; Pin function seleGt rellisler11 (PINJ!EU· ad.dress 01l40D2 COMI b11 descrlpUon
PINSEL1 Pin n'ame Fllllltiion when IFunctlon Fu!ncllon Fundlon Reset
00 wilen. 011 wilen to when 11 value
to PO.16 GPIOPortl).16 RXD1 SSELO SSEL QlD
(131
11:10 p(J.21'ill GPIO Port (1.21 Rll Reserved 'RDl OlD
17:16 flO ..24ill GPIO Port (1.24 AOO.l 12SRX_WS GA1fl3.1 OlD
19:18 PO.25 GPIO Port 0.25 ADO.2 128RX,-SDA TXm 00
21:20 flO.26 GPIO Port 0.26 AO!JlT RXID3 00
AD·O.3I.
23:22 PO.27L!Jlgj GPIO Port 0.27 SDAO 'USB_SnA Reserlied OlD
ARM Cortex-M3 LPC176x MCUs incorporate a 10 bit DAC and provide buffered analog output. As per the
datasheet, it is implemented as a string DAC which is the most simplest form of DAC consisting of 2Nresistors in
series where N = no. of bits which simply forms a Kelvin-Varley Divider. LPC176x DAC has only 1 output pin,
referred to as AOUT. The Analog voltage at the output of this pin is given as:
Where VALUE is the 10-bit digital value which is to be converted into its Analog counterpart and VREFis the
input reference voltage.
These are reference voltage input pins used for both ADC and DAC. VREEP is positive
VREFPV, REFNreference voltage and VREFNis negative reference voltage pin. In example shown
below we will use VREFN=OV(GND).
VDDA is Analog Power pin and V SSA is Ground pin used to power the ADC module. These are
generally same as Vee and GND but with additional filtering to reduce noise.
The DAC module in ARM LPC1768/LPC1769 has 3 register~iz. BitCR, DACCTRL, DACCNTVAL. In this
tutorial we will only go through to DACR register since the other 'two are related with DMA operation, explaining
which is not in the scope of this tutorial. Just note that DMA is used to update new values to DACR from memory
without the intervention of CPU. This is particqlarly useful when generation different types of waveforms using
DAC. We will cover this in another tutorial.
Also note that the DAC doesn't have a power control it in PCONP register. Simply select the AOUT alternate
function for pin PO.26using PlNSELl register to enable DAC ouput.
The field containing bits [15:6] is used ro feed a digital value which needs to be converted and bit 16 is used
to select settling time. The bit significance is as shown below:
1. Bit[S:O]: Reserved.
2. Bit[lS:6] - VA~UE starts from bit 6 [ In programming we use Value «6; ]
3. Bit[16] - BIAS: Setting this bit to 0 selects settling time of Ius max with max current consumption of
7D'OuAat max l Mhz update rate. Setting it to 1 will select settling time of 2.5us but with reduce
[)!:
max current consumption of 300uA at max 400Khz update rate.
4. Bits Fl]: Reserved
,
!VRHP
!VREFN
PO.26 (AOUT)
lPC176x [OSO]
Embedded Controller Lab Manual 15ECL67
while (1)
{
LPC_DAC -> DACR= (1024« 6); II l Obit= 1024 Vmax = 3.3 V
for (i = 120000; i > 1; i--); II maintain this value for some delay
A stepper motor is a special type of electric motor that moves in increments, or steps, rather than turning
smoothly as a conventional motor does. Typical increments are 0.9 or l.8 degrees, with 400 or 200 increments
thus representing a full circle. The speed of the motor is determined by the time delay between each incremental
movement.
U8 is a Driver Buffer (ULN2003) device connected to LPC-176!./3Device and can be used for driving
Stepper Motor. On the LPC-1768, P 1.22 to P 1.25 is used to generate the pulse sequence required to run the
stepper Motor. Also, the Stepper Motor is powered by its elwn power supply pin (COM), which is connected to
a l2V supply.
Table shows connections for stepper Motor.
Stepper Motor Pin connectio
n~lp"
~ Stepper LPC-1768 LPC-1768
Motor Coil Pin No Port No
I'
A 39 Pl.22
B 37 Pl.23
C 38 Pl.24
D 39 Pl.25
~
7.b. Interface a Stepper motor and rotate it in anti-clockwise direction.
#include<LPC17xx.H> ~
}
}
~
8.Interface and Control a DC Motor.
a. Clock wise Direction
while(l)
{
LPC _ GPI02->FIOSET=(1 «8); lienable DC motor by making P2.8=1
LPC_GPI04->FIOSET = (1«28); II P4.28 =1
LPC_GPI04->FIOCLR= (1«29); II P4.29 = 0
}
}
b. Anticlockwise Direction
#include <lpc 17xx.h>
int maint)
{
LPC _ GPI02->FIODIR = (1«8); IIConfigure the PORlf2 pins as OUTPUT
LPC _ GPI04->FIODIR = (1«28)1(1 Ilconfigure port4 pins ~8'P4.29 as Input
«29);
while(l)
{
LPC _ GPI02->FIOSET=(1 «8);
LPC_GPI04->FIOCLR= (1«28);
LPC_GPI04->FIOSET = (1«29); clockwise rotation
}
}
c. Control DC motor using switches.
#include <lpc 17xx.h>
int maint)
{
LPC _ GPI02->FIODIR = (1~); IIConfigure the PORT2 pins as OUTPUT
LPC _ GPI04->FIODIR = (1«28)1(1 Ilconfigure port4 pins p4.28,p4.29 as Input
«2j;)~ Ilconfig all the pins of Port 1 as i/p
LPC _ GPIO l->FIODIR= 00;
while(l)
{
lienable DC motor by making P2.8=1
II P4.28 =1
II P4.29 = 0 DC motor Clockwise rotation
DC (direct current) motor rotates continuously. It has two terminals positive and negative. Connecting DC
power supply to these terminals rotates motor in one direction and reversing the polarity of the power
supply reverses the direction of rotation.
U9 is L293 driver IC used to drive the dc motor. It has enable lines which is used to switch on the DC
motor. It is connected to P4.28. Logic' l' enables the driver and logic '0' disables the driver.P4.28 and
P4.29 are used for Motor 1 direction and speed control.
DCM EN P2.8=1
We can't drive a de motor directly through a microcontroller pin. It usually operates in 3.3v-5v and lower currents
but DC motor normally works in 6-12v, 300mA and it has other drawbacks like the back EMF produced by the DC
motor may harm the controller ports and damagertgem. The solution to the above problems is using motor driving
circuit usually known as H-Bridges. They are ~asicallx built using FETs and many dedicated ICs are also available
like L293D etc.
These are dual H-bridge motor drivers, i.e., by using one IC we can control two DC motors in both clock wise and
counter clockwise directions. The L~SBDcan provide bidirectional drive currents of up to 60 OmAat voltages from
4.5 Vto 36 V.
while(l)
{
if (count> OxF) count = 0; I I if count Greater than F, re initialize to 0
for (i=O; i < 20000; i++) Ilchange to illc1dec speed of count
{
LPC_GPI02->FIOPIN = dat7seg[count]; II & OxOOOF];
LPC_GPIOI->FIOSET = (1«26); 1126 fOF'first Sev segnjent , 27 for second
for G=O;j<IOOO; j++); Ilchange to incldec brightness of display
} LPC_GPI01->FIOCLR ~ (1«26); ~
VTCM3 3board provides eight individual SMD led's connected to LPC-1768 device through
74HCl5ldriver IC. Dl te D8 are connected to general purpose 110 pins on LPC-1768 device as shown
in table(14) When LPC-1768 crevice drives Logic' I' the corresponding LED turns on.
DI D2 D3 D4 D5 D6 D7 D8
81 80 79 78 77 76 48 49
Pin No" LPC-1768
Port No
PO. 4 PO.5 PO. 6 PO. 7 PO.8 PO.9 PO.IO PO.II
Dll, D12, Dl3 and Dl4 are Common Cathode segments connected to LPC-1768 device so that each
segment is individually controlled by a general purpose 110 pin. When the LPC-1768 device drives logic
'0' the corresponding segment turns on. See fig and table for more details.
9 cOMab gfc®ab 9 COM a b 9 coa a b
e d COM C P
Seven Segment
Data Lines g f a b p c d e
LPC-1768 Pin '\]~
No
LPC-1768 Port
75
P2.0
74
P2.1
73
P2.2 P2.3
70
P2.4
69 68
P2.6
IV
..-
P2.7
6
No ~
~
SEVEN SEGMENT Selection Pin Configurations: ~
As VTCM3_3 board comes with 4 digit seven segment unit. Displays connected to the microcontroller
usually occupy a large number of valuable 1/0 pins, which can be a big problem especially if it is needed to
display multi digit numbers. The problem i~more than obvious if, for example, it is needed to display four
digit numbers (a simple calculation shfrwstHat 32 output pins are needed in this case). The solution to this
problem is called MULTIPLEXING. This is how an optical illusion based on the same operating principle
as a film camera is made. Only one digit is-..acti;vaet a time, but they change their state so quickly
making impression that all digits of a number are simultaneously active. Each digit can made
active using switching transistors Q I, Q2, ~ and Q4 and these on switched on and off by selection lines
which are in tum connected to LPC"i 768 R0rtS. Table shows the details of seven segment selection lines.
~
Seven SegJiUent~ Displ Disp2 Disp3 Disp4
Selection Lines (D9) (DIO) (Dll) (DI2)
LPC-1768 P1o...N. o/ 40 43 44 45
1'\~~768 Port No Pl.26 Pl.27 Pl.28 Pl.29
,_\Cj(
Display EnC~ng.
Digits to Hex
Display Segments
display code
g f a B p c d e CODE
0 I 0 0 0 I 0 0 0 ~
I I I I 0 I 0 I I ~~
2 0 I 0 0 I I 0 0 ~q
3 0 I 0 0 I 0 0 I ~~
4 0 0 I 0 I 0 I I ~
5 0 0 0 I I 0 0 I [ill
6 0 0 0 I I 0 0 0 [I~
7 I I 0 0 I 0 I I ~~
8 0 0 0 0 I 0 0 0 ~
9 0 0 0 0 I 0 0 I p~
~
A 0 0 0 0 I 0 I 2 ~~
B 0 0 I I I 0 0 0 ~
C I 0 0 I I 0 0 o" ~~
D 0 I I 0 I 0 0 0 ~~
E 0 0 0 I
1- I " \2 0 ~q
F 0 0 0 I I I I 0 [11~
3 Controller _
91 • - ·8 b 9 f
- .. 8 9 • - .'·8 9 • - .8
pz';11
P.t.2
10,
r r
j, J
P!.3
Pl:.4
PlJJ Iii! i..R.B ,Iii
... fJHl! ;,
Pl;S,
PZJ;,
Pl:.~
e ~ ~~ c P . . ~ ~ c P • ~ -. p . ~ ~~• p
LP'C17'68
PIL.:l!'
!'1L.:ll>
PIL.:l,~
PIL.:li,
'16 X 2 LCD Dis/!_ia]
An LeD display is specifically manufactured to be used with microcontrollers, which means that it cannot
be activated by standard Ie circuits. It is used for displaying different messages on a miniature liquid
crystal display. It displays all the letters of alphabet, Greek letters, punctuation marks, mathematical
symbols etc. In addition, it is possible to display symbols made up by the user. Other useful features
include automatic message shift (left and right), cursor appearance, LED backlight etc.
y
There are pins along one side of a small printed board. These are used for connecting to the
microcontroller. There are in total Of~14pins marked with numbers (16 if it has backlight). Their function is
described in the table below:
LCD Pin Configuration
LPC- LPC-
~~CD LCD Pin 1768 1768
I~p:~
Functions Pin Port
o
I <
Y No No
1 GND - -
2 vee - -
3 - -
4 RS 24 P2.28
5 RIW GND GND
6 EN 27 P2.27
7 DATI 75 P2.0
8 DAT2 74 P2.l
9 DAT3 73 P2.2
10 DAT4 70 P2.3
11 DAT5 69 P2.4
12 DAT6 68 P2.5
13 DAT7 67 P2.6
14 DAT8 66 P2.7
15 vee - -
16 GND - -
No HEX Value COMMAND TO LCD'
'l IOxlO'l C1'ea,.,lDi'spIa y Scree n
:2 'Ox3'0 !Fuli'lct:lonSe't::' a,-bit 1 Line, 5:;:.;7Dots.
3 Ox3:8 Function Se:ti:::S-bit,. 2: Line S,x7 Dots
4 lOx20 !FunclLioIIlJ Se'l!:: 4-bit:, ~ Un eo 5x 7' Dots.
.'5 0:>;;:28 !FuncltionSelt:, 4-bit::, :2 Une" 5.x7' Dots,
6 IOx106, BnIT'y Mode
1-'~7 0~X,,-,,~O:-:;8::-' ~[)~'~FS;o::IP·~II'ay=-o, ·" Cursor
off
.e OxOE lD~slil'~oany, Cursor €In
'9 OxOC lDiispllayon. Cursor €Iff
'lQ OxQIF lD~spl'ay'orr, Cursor' blinking
:iII.::!IL 'Ox:18 Shlift: entire display' le,ft
12 lOxl,:C Shift entire displ;ay right
:ilL 3 lOx110 Mlovecursor le·ft:bv €Ine·character
:ilL 4 lOx,141 Move cUl'Sorri'ght by one' character
JlL5 Qx80 !Force cursor to be,ginning of ~5t, row
:ill. 6, 'OxOO !Forcecursor toobeginning of 2nd row
10.) Interface LCD with 1768 and write a Program to display Messa~ge an LCD screen.
I I initialize x=o
x++·, I!increment x
}
}
10.a) Interface a 4x4 keyboard and display the key code on an LCD.
init Icdt);
while (1)
{
key = 0;
for( i ~ 0; i <4; i++) ~
The hex keypad is a peripheral that is organized in rows and Columns. Hex key Pad 16 Keys arranged in a 4 by 4
grid, labeled with the hexadecimal digits 0 to F. An example of this can been seen in Figure 1, below. Internally,
the structure of the hex keypad is very simple. Wires run in vertical columns (we call them CO to C3) and in
horizontal rows (called ROto R3). These 8 wires are available externally, and will be connected to the lower 8 bits
of the port. Each key on the keypad is essentially a switch that connects a row wire to a column wire. Wlien a key is
pressed, it makes an electrical connection between the row and column. Table shows connections f0r H~X K-:EY
Pad matrix.
ROW/COLOUMNS Rl R2 R3 R4 Cl
LPC-1768 Pin No 32 33 34 35 89
LPC-1768 Port No P1.18 P1.19 P1.20 P1.21 P1.14 P1.17
C1 C.2 C3: C4
LPC_PINCON->PINSELlI= Ox00004000;
LPC ADC->ADCR = (1« 0) I /* select channel ; Here Oth bit is 1 ie channel 0 is selected */
(14«8)1 /* CLKDIV = Fpclk / ~DC_Clk - 1 * CLKDIV starts from 8 bit
(1«21); I' PDN ~ I, n~peration 'I
return ;
}
int ADCRead( )
{
int reg Val, ADC _ Data;
LPC_ADC->ADCR &= OxFFFFFFOO; ~11c1cardata
LPC_ADC->ADCR 1=(1 «24) 11; /* switch channel,start AID convert */
while(l)
{
ADCValue = ADCReadO; II read ADC value
sprintf(lstr, "%4u", ADCValue);
led_gotoxy(O,10); Ilgoto l" line, 10 char place
led_putstring(lstr); Ilprint
LPC1768 has an inbuilt 12 bit Successive Approximation ADC which is multiplexed among 8 input pins.
The ADC reference voltage is measured across VREFN to VREFP, meaning it can do the conversion within this
range. Usually the VREFP IS connected to VDD and VREFN IS connected to GND.
As LPC1768 works on 3.3 volts, this will be the ADC reference voltage.
Now the resolution of ADC = 3.3/ 212 = 3.3/4096 =0.000805 = 0.8mV
The ADC pin can be enabled by configuring the corresponding PINSEL register to select ADC function.
When the ADC function is selected for that pin in the Pin Select register, other Digital signals are disconnected
"
from the ADC input pins.
"~
~ I ~I1 I
Adc Associated PINSEL
Pin Functions
Register
~ ~E
nel
~E
O-GPIO, l-ADO[2], 2-12SRX SDA,
18,19 bits of PINSELl
3-TXD3
c:JE
~==========~
O-GPIO, I-SCKl, 2-, 3-ADO[5] 30,31 bits ofPINSEL3
c:JE
~==========~
O-GPIO, l-RXDO, 2-ADO[6], 3- 6,7 bits of PINSELO
c:JE
~==========~
O-GPIO, I-TXDO, 2-ADO[7], 3- 4,5 bits ofPINSELO
ADC Registers
The below table shows the registers associated with LPCl768 ADC.
We are going to focus only on ADCR and ADGDR as these are sufficient for simple AID conversion.
\~
1 R_eg;...i_st_er II D_e_sc_r...;ip_t_iO_n 1
IADDRO - ADDR7 IAID Channel ~a Register: Contains the recent ADC value for respective channel
IADSTAT IAID Stat~s ~er~tains DONE & OVERRUN flag for all the ADC channels
~ ~.-
ADC Register Configuration
Now lets see how to configure the individual registers for ADC conversion.
ADCR
)31:28
r=
1[]~1~23:=22==IEJ~120:=17==1r=J1~15=:8 ===1 i7=:1O=======il I
The remaining cases (010 to Ill) are about starting conversion on occurrence of edge on a particular CAP or MAT
pm.
Bit 27 - EDGE ~
This bit is significant only when the START field contains 010-111. It starts conversion on selected CAP or MAT
input.
o - On Falling Edge
1 - On Rising Edge
~I 27 ~=2=6=:2~4~~~=====2=3=:1=6======~=====15=:4======1~
IDONEII OVERRUN Reserved RESUL1l IIReservedl
Bit 27-OVERRUN
~his b'it is set during the BURST mode where the previous conversion data is overwritten by the new AID
conversion value.
The LM35 series are precision integrated-circuit temperature sensors, whose output voltage is linearly proportional
to the Celsius (Centigrade) temperature. The output of sensor converted to digital that easy connecting with
microcontroller.
SPI InitO;
init lcdt);
uint8_t dummy_u8;
static uint32_t spi_GetPclk(void);
void SPI Init(void)
{
LPC_PINCON->PINSELO 1=OxCOOOOOOO; IISCK
LPC_PINCON->PINSELlI= Ox0000003C; IISSEL, MISO, MOSI
LPC_GPIOO->FIODIR 1= Ox00058000; IISSEL, MOSI, SCK are Outputs 15,16,18
LPC_GPIOO->FIODIR&= ~Ox00020000; IIMISO is Input 17
y
break;
case OxOl: =
'
V_PGlk_U3 Syst2emCoreClock;
break;
case Ox02:
v_Pclk_u32 = SystemCoreClockl2;
break;
case Ox03:
v_P"clk_u32= SystemCoreClockl8;
break;
}
return (v_Pclk_u32);
•
IC1 PO[16,]
PO[1S]
PO[H]
LPC1768
PO[18]
PO[1~]
PO[2G]
PO[,21]
PO[l']
\ISS,
P2[1'1]
P2[12]
ARM Cortex M3 Series: An Introduction
Brief History
ARM was founded in 1990 as Advanced RISC Machines Ltd., a joint venture of Apple Computer, Acorn
Computer Group, and VLSI Technology. In 1991, ARM introduced the ARM6 processor family, and VLSI
became the initial licensee. Subsequently, additional companies, including Texas Instruments, NEC, Sharp
and ST Microelectronics, licensed the ARM processor designs. Nowadays ARM partners ship in excess of 2
billion ARM processors each year. Unlike many semiconductor companies, ARM does not manufacture
processors or sell the chips directly. Instead it licenses the processor designs to business partners. This
business model is commonly called intellectual property (lP) licensing.
Architecture Versions
Over the years, ARM has continued to develop new processors and system blocks. These include the popular
ARM7TDMI processors, more recently the ARMll processor family and latest being the ARM Cortex
Processor family. Table 2.1 summarizes the various architecture versions and processor families.
Architecture Processor Family
ARMv1 ARM1
ARMv2 ARM2, ARM3
ARMv3 ARM6, ARM7
ARMv4 StrongARM, ARM7TDMI, ARM9TDMI
ARMv5 ARM7EJ, ARM9E, ARMlO~-;"'X~~
ARMv6 ARMll, ARM Cortex -M V Y
ARMv7 ARM Cortex-A, ARM Cortex-R, ARM Cortex-M
2. R Profile (ARMv7-R) - is designed for high end embedded systems in which real time performance is
needed. Example applications include higli -eRa.car braking systems.
3. M-Profile (ARMv7-M) - is designed for aeeply embedded microcontroller type systems. Processors
belonging to this profile are the subject for this manual and are studied in greater detail.
Registers
• The Cortex-M3 has registers RO through R15. R13 (the stack pointer) is banked, with only one copy of the
R13 visible at a time.
• RO - R12: General Purpose Registers. These are 32 bit registers for data operations. Some 16-bit
Tnumb instructions can only access a subset of these registers (low registers RO-R7).
• R13: Stack Pointers. Contains two stack pointers. They are banked so that only one is visible at a
time.
• Main Stack Pointer (MSP) - The main stack pointer used by the Operating system and
exception handlers.
• Process Stack Pointer (PSP) - used by the application code.
• R14: Link Register. When a subroutine is called, the return address is stored in the link
register.
• R15: Program Counter. The program counter is the current program
address.
• The Cortex-M3 also has a number of special registers. They are
• Program Status registers (PSR)
• Interrupt Mask registers (PRIMASK, FAULTMASK and BASEPRIV
• Control register (CONTROL)
• The Cortex-M3 has 18 registers in total compared to 37 registers for traditional ARM.
Memory Map
The Cortex-M3 has predefined memory maps, which allows built in peripherals, such as the interrupt
controller and debug components, to be accessed by simple wemory access instructions. The predefined
memory map also allows the Cortex-M3 proceswr to be highly optimized for speed and ease of integration in
system-on-a-chip (SoC) designs.
The Cortex-M3 design has an internal b4.s infrastmcture optimized for this memory usage. In addition, the
design allows these regions to be used differently. FOI1example, data memory can still be put into the CODE
region, and program code can be executed from an: external Random Access Memory (RAM) region. The
Cortex-M3 memory map is outlined in figure as shown.
Operation Modes
The Cortex-M3 processor has two meJdes of operation and two privilege levels. The operation modes (thread
mode and handler mode) determine wl},ether the processor is running a normal program or running an
exception handler like an interrupt handler or system exception handler. The privilege levels provide a
mechanism for safegua~ding memory accesses to critical regions as well as providing a basic security model.
When the processor: is running a main program (thread mode), it can be either in a privileged state or a user
state, but exception handle~{San only be in a privileged state. When the processor exits reset, it is in thread
mode with privileged acces~nght. In this state, a program has access to all memory ranges and can use all
supported instructions. DElftwarein the privileged access level can switch the program into the user access
level using the control register. When an exception takes place, the processor will always
switch ba~Kto the privileged state and return to the previous state when exiting the exception handler. A user
program cannot clYangeback to the privileged state by writing to the control register. It has to go through
an exception handler that programs the control register to switch the processor back into the privileged
access level when re~rning to thread mode.