3-9 NOR Gates and NAND Gates

3-9 NOR Gates and NAND Gates
 Combine basic AND, OR, and NOT

operations.
 The NOR gate is an inverted OR gate. An
inversion “bubble” is placed at the output
of the OR gate.
 The Boolean expression is, x  A  B
Ronald Tocci/Neal Widmer/Gregory

Moss Copyright ©2007 by Pearson Education, Inc.
Digital Systems: Principles and Columbus, OH 43235
Applications, 10e All rights reserved..
Figure 3-19 (a) NOR symbol; (b) equivalent circuit; (c) truth table. Tocci 10th Edition
© 2007 Pearson Education, Inc.
Digital Systems: Principles and Applications, 10e Pearson Prentice Hall
By Ronald J. Tocci, Neal S. Widmer, and Gregory L. Moss Upper Saddle River, NJ 07458
 The NAND gate is an inverted AND gate.
An inversion “bubble” is placed at the
output of the AND gate.
 The Boolean expression is
x  AB

Figure 3-22 (a) NAND symbol; (b) equivalent circuit; (c) truth table. Tocci 10th Edition

 The output of NAND and NOR gates may be
found by simply determining the output of an
AND or OR gate and inverting it.
 The truth tables for NOR and NAND gates
show the complement of truth tables for OR
and AND gates.

4-6 Exclusive OR and Exclusive NOR Circuits
 The exclusive OR (XOR) produces a HIGH output

whenever the two inputs are at opposite levels.
 The exclusive NOR (XNOR) produces a HIGH
output whenever the two inputs are at the same level.
 XOR and XNOR outputs are opposite.

Applications, 10e All rights reserved...
XOR and XNOR Gates
 The eXclusive OR (XOR) gate is similar the OR
gate except the output is high only if 1 (not both) of
the inputs are high
 The truth table for the XOR is as follows
X=A+B
A B X
0 0 0
0 1 1 XOR
1 0 1
1 1 0
Difference to OR
XOR and XNOR Gates
 The eXclusive Not OR (XNOR) gate is the inverse
of the XOR gate
 The truth tables for XNOR is as follows
A B X
0 0 1
0 1 0
1 0 0
1 1 1
Gate Symbol Truth table Boolean expression
A B P
INVERTER 0 1
A P 1 0 P =A
0 0 0
A 0 1 0
AND P P = AB
1 0 0
B 1 1 1
0 0 0
A 0 1 1
OR P P = A+B
1 0 1
B 1 1 1
0 0 1
A 0 1 1
NAND P 1 0 1 P = A B
B 1 1 0
0 0 1
A 0 1 0
NOR P P = A + B
1 0 0
B 1 1 0
0 0 0
A 0 1 1
XOR 1 0 1 P = A  B
P
B 1 1 0
0 0 1
A 0 1 0
XNOR P 1 0 0 P = A  B
B
1 1 1
3-10 Boolean Theorems
The theorems or laws below may represent an expression
containing one variable.
Boolean algebra was created by George Boole, an English
mathematician (1815-1864).
x0  0 x 1  x
xx  x xx  0
x 1  1 xx  x
x  x 1
Figure 3-25 Single-variable theorems. Tocci 10th Edition
3-10 Boolean Theorems
 Multivariable theorems:
x y  yx
 Understanding all of the x y  yx
Boolean theorems will be x  ( y  z)  ( x  y)  z  x  y  z
useful in reducing
expressions to their x( yz )  ( xy ) z  xyz
simplest form. x( y  z )  xy  xz
( w  x)( y  z )  wy  xy  wz  xz
x  xy  x
x  xy  x  y
Moss
x  xy  x  y Copyright ©2007 by Pearson Education, Inc.
The commutative, associative
Boolean Theorems and distributive laws are the

same as regular algebra
(1) x y  yx Commutative laws (it doesn’t matter which way

(2) x  y  y  x } we OR or AND two variables)
x  ( y  z )  ( x  y )  z  x  y  z Associative laws (variables in

(3)
(4) x( yz )  ( xy ) z  xyz
} and AND or OR expression can
be grouped in any way)
(5) x( y  z )  xy  xz
(6) ( w  x)( y  z )  wy  xy  wz  xz
} Distributive law (we can
expand just like normal
algebra)
(7) x  xy  x
(8)
(9)
x  xy  x  y
x  xy  x  y
} These laws are not represented in regular
algebra however they do hold true for Boolean
Algebra. They can be proved by trying all
values of x and y
Lets work through the following example
3-11 DeMorgan’s Theorems
 When the OR sum of two variables is
inverted, it is equivalent to inverting each
variable individually and ANDing them.
 When the AND product of two variables is
inverted, it is equivalent to inverting each
variable individually and ORing them.

Applications, 10e All rights reserved...
DeMorgan’s Theorems
 When the sum (OR) of two variables is inverted it is
the same as inverting the individual variables and
multiplying (AND) them
( x  y )  x. y
 When the product (AND) of two variables is inverted
it is the same as inverting the individual variables and
adding (OR) them
( x. y )  x  y
3-11 DeMorgan’s Theorems
 A NOR gate is equivalent to an AND gate
with inverted inputs.
 A NAND gate is equivalent to an OR gate
with inverted inputs.

Figure 3-26 (a) Equivalent circuits implied by theorem (16); (b) alternative symbol for the NOR function. Tocci 10th Edition

Figure 3-27 (a) Equivalent circuits implied by theorem (17); (b) alternative symbol for the NAND function. Tocci 10th Edition

3-12 Universality of NAND and NOR Gates
 NAND or NOR gates can be used to create
the three basic logic expressions (OR, AND,
and INVERT)
 Figures 3-29 and 3-30 illustrate how
combinations of NANDs or NORs are used to
create the three logic functions.
 Why would provides
Thischaracteristic we want flexibility
to do this?and is
very useful in logic circuit design.
Figure 3-29 NAND gates can be used to implement any Boolean function. Tocci 10th Edition

Figure 3-30 NOR gates can be used to implement any Boolean operation. Tocci 10th Edition

3-16 Summary of Methods to Describe Logic Circuits
 The three basic logic functions are AND, OR,

and NOT.
 Logic functions allow us to represent a
decision process.
 If it is raining OR it looks like rain I will take an
umbrella.
 If I get paid AND I go to the bank I will have
money to spend.
Introduction to Chapter 4
 Basic logic gate functions will be combined in
combinational logic circuits.
 Simplification of logic circuits will be done using
Boolean algebra and a mapping technique.
 Troubleshooting of combinational circuits will be
introduced.
 PLD and HDL control structures will be explained.

4-1 Sum-of-Products Form
 A Sum-of-products (SOP) expression will
appear as two or more AND terms ORed
together.
ABC  ABC
AB  ABC  C D  D

4-2 Simplifying Logic Circuits
 The circuits below both provide the same output, but
the lower one is clearly less complex.
 We will study simplifying logic circuits using

Boolean algebra and Karnaugh mapping
4-3 Algebraic Simplification
 Place the expression in SOP form by applying
DeMorgan’s theorems and multiplying terms.
 Check the SOP form for common factors and
perform factoring where possible.
 Note that this process may involve some trial
and error to obtain the simplest result.

4-4 Designing Combinational Logic Circuits
 To solve any logic design problem:
 Interpret the problem and set up its truth table.
 Write the AND (product) term for each case where the
output equals 1.
 Combine the terms in SOP form.
 Simplify the output expression if possible.
 Implement the circuit for the final, simplified
expression.

Digital Systems: Principles and Upper Saddle River, New Jersey 07458
Applications, 9e All rights reserved.
4-5 Karnaugh Map Method
 A graphical method of simplifying logic
equations or truth tables. Also called a K
map.
 Theoretically can be used for any number of
input variables, but practically limited to 5 or
6 variables.

 The truth table values are placed in the K
map as shown in figure 4-11.
 Adjacent K map square differ in only one
variable both horizontally and vertically.
 The pattern from top to bottom and left to
right must be in the form AB, AB, AB, AB
 A SOP expression can be obtained by
ORing all squares that contain a 1.
Figure 4-11 Karnaugh maps and truth tables for (a) two, (b) three, and (c) four variables. Tocci 10th Edition
 Looping adjacent groups of 2, 4, or 8 1s will
result in further simplification.
 When the largest possible groups have been
looped, only the common terms are placed in
the final expression.
 Looping may also be wrapped between top,
bottom, and sides.
 Figures 4-13 and 4-14 illustrate looping
Figure 4-12 Examples of looping pairs of adjacent 1s. Tocci 10th Edition

Figure 4-13 Examples of looping groups of four 1s (quads). Tocci 10th Edition

Figure 4-14 Examples of looping groups of eight 1s (octets). Tocci 10th Edition

 Complete K map simplification process:
 Construct the K map, place 1s as indicated in the truth
table.
 Loop 1s that are not adjacent to any other 1s.
 Loop 1s that are in pairs
 Loop 1s in octets even if they have already been looped.
 Loop quads that have one or more 1s not already looped.
 Loop any pairs necessary to include 1st not already looped.
 Form the OR sum of terms generated by each loop.

Figure 4-15 Examples 4-10 to 4-12. Tocci 10th Edition

Figure 4-16 The same K map with two equally good solutions. Tocci 10th Edition

Figure 4-17 Example 4-14. Tocci 10th Edition

Don’t care conditions
Some logic circuits have no specific outputs for certain input conditions. That is,
for certain combinations of inputs, we ‘don’t care’ whether the output level is a
high or a low. These input conditions are known as ‘don’t cares’. An example of
these ‘don’t cares’ is shown below.
A B C P
0 0 0 0 C 0 1 C 0 1
AB AB
0 0 1 0
00 0 0 00 0 0
0 1 0 0
0 1 1 x 01 0 X 01 0 X
don't care
1 0 0 x
11 1 1 11 1 1
1 0 1 1
1 1 0 1 10 X 1 10 1 1
1 1 1 1
In the Karnaugh map for this truth table, we may replace the ‘don’t care’ output
with a 1 without affecting the truth table. This we do for the ‘don't care’ at the
bottom left-hand corner of the Karnaugh map. Having done this, we find that we
can have a square cluster of four 1s as shown. From this, we find that
P=A

3-9 NOR Gates and NAND Gates

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3-9 NOR Gates and NAND Gates

 Combine basic AND, OR, and NOT

Ronald Tocci/Neal Widmer/Gregory

Ronald Tocci/Neal Widmer/Gregory

© 2007 Pearson Education, Inc.

Ronald Tocci/Neal Widmer/Gregory

 The exclusive OR (XOR) produces a HIGH output

Ronald Tocci/Neal Widmer/Gregory

Boolean Theorems and distributive laws are the

(1) x y  yx Commutative laws (it doesn’t matter which way

x  ( y  z )  ( x  y )  z  x  y  z Associative laws (variables in

Ronald Tocci/Neal Widmer/Gregory

Ronald Tocci/Neal Widmer/Gregory

© 2007 Pearson Education, Inc.

© 2007 Pearson Education, Inc.

© 2007 Pearson Education, Inc.

© 2007 Pearson Education, Inc.

 The three basic logic functions are AND, OR,

Ronald Tocci/Neal Widmer/Gregory

Ronald Tocci/Neal Widmer/Gregory

 We will study simplifying logic circuits using

Ronald Tocci/Neal Widmer/Gregory

Ronald Tocci/Neal Widmer/Gregory

Ronald Tocci/Neal Widmer/Gregory

© 2007 Pearson Education, Inc.

© 2007 Pearson Education, Inc.

© 2007 Pearson Education, Inc.

Ronald Tocci/Neal Widmer/Gregory

© 2007 Pearson Education, Inc.

© 2007 Pearson Education, Inc.

© 2007 Pearson Education, Inc.

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