Sie sind auf Seite 1von 6

Flip chip 1

Flip chip
Flip chip, also known as Controlled Collapse Chip Connection or its acronym, C4, is a method for
interconnecting semiconductor devices, such as IC chips and Microelectromechanical systems (MEMS), to external
circuitry with solder bumps that have been deposited onto the chip pads. The solder bumps are deposited on the chip
pads on the top side of the wafer during the final wafer processing step. In order to mount the chip to external
circuitry (e.g., a circuit board or another chip or wafer), it is flipped over so that its top side faces down, and aligned
so that its pads align with matching pads on the external circuit, and then the solder is flowed to complete the
interconnect. This is in contrast to wire bonding, in which the chip is mounted upright and wires are used to
interconnect the chip pads to external circuitry.

Process steps
• Integrated circuits are created on the wafer
• Pads are metalized on the surface of the chips
• Solder dots are deposited on each of the pads
• Chips are cut
• Chips are flipped and positioned so that the solder balls are facing the connectors on the external circuitry
• Solder balls are then remelted (typically using hot air reflow)
• Mounted chip is “underfilled” using an electrically-insulating adhesive

Comparison of mounting technologies

Wire bonding/Thermosonic bonding

Flip chip 2

In typical semiconductor fabrication systems chips are

built up in large numbers on a single large wafer of
semiconductor material, typically silicon. The
individual chips are patterned with small pads of metal
near their edges that serve as the connections to an
eventual mechanical carrier. The chips are then cut out
of the wafer and attached to their carriers, typically via
wire bonding such as Thermosonic Bonding. These
wires eventually lead to pins on the outside of the
The interconnections in a power package are made using thick
carriers, which are attached to the rest of the circuitry
aluminium wires (250 to 400 µm) wedge-bonded
making up the electronic system.

Flip chip
Processing a flip chip is similar to conventional IC
fabrication, with a few additional steps.[1] Near the end
of the manufacturing process, the attachment pads are
metalized to make them more receptive to solder. This
typically consists of several treatments. A small dot of
solder is then deposited on each metalized pad. The
Side-view schematic of a typical flip chip mounting
chips are then cut out of the wafer as normal.

Recently, high-speed mounting methods evolved through a cooperation between Reel Service Ltd. and Siemens AG
in the development of a high speed mounting tape known as 'MicroTape.'[2]. By adding a tape-and-reel process into
the assembly methodology, placement at high speed, typically 20,000 placements per hour are achievable using
standard PCB assembly equipment.
To attach the flip chip into a circuit, the chip is inverted to bring the solder dots down onto connectors on the
underlying electronics or circuit board. The solder is then re-melted to produce an electrical connection, typically
using an ultrasonic or alternatively reflow solder process. This also leaves a small space between the chip's circuitry
and the underlying mounting. In most cases an electrically-insulating adhesive is then "underfilled" to provide a
stronger mechanical connection, provide a heat bridge, and to ensure the solder joints are not stressed due to
differential heating of the chip and the rest of the system.

The resulting completed flip chip assembly is much smaller than a traditional carrier-based system; the chip sits
directly on the circuit board, and is much smaller than the carrier both in area and height. The short wires greatly
reduce inductance, allowing higher-speed signals, and also carry heat better.

Flip chips have several disadvantages. The lack of a carrier means they are not suitable for easy replacement, or
manual installation. They also require very flat surfaces to mount to, which is not always easy to arrange, or
sometimes difficult to maintain as the boards heat and cool. Also, the short connections are very stiff, so the thermal
expansion of the chip must be matched to the supporting board or the connections can crack.[3]
Flip chip 3

The process was originally introduced commercially by IBM in the 1960s for ICs being used in the mainframe
systems.[4] DEC followed IBM's lead, but was unable to achieve the quality they demanded, and eventually gave up
on the concept. It was pursued once again in the mid-90s for the Alpha product line, but then abandoned due to the
fragmentation of the company and subsequent sale to Compaq. In the 1970s it was taken up by Delco Electronics,
and has since become very common in automotive applications.

Since the flip chip's introduction a number of alternatives to the solder bumps have been introduced, including gold
balls or molded studs, electrically conductive polymer and the "plated bump" process that removes an insulating
plating by chemical means. Flip chips have recently gained popularity among manufacturers of cell phones, pagers
and other small electronics where the size savings are valuable.

[1] Solder Bump Flip Chip (http:/ / www. flipchips. com/ tutorial02a. html)
[2] http:/ / www. epp-online. de/ epp/ live/ en/ fachartikelarchiv/ ha_artikel/ detail/ 31627038. html
[3] Demerjian, Charlie (2008-12-17), Nvidia chips show underfill problems (http:/ / www. theinquirer. net/ inquirer/ news/ 052/ 1050052/
nvidia-chips-show-underfill-problems), The Inquirer, , retrieved 2009-01-30
[4] Introduction to Flip Chip: What, Why, How (http:/ / www. flipchips. com/ tutorial01. html)

Further reading
• Wikihowto: Guide to IC packages (
• “Challenges in the Assembly of Large Die, High Bump Density Pb-Free Flip Chip Packages”, J. Libres, K.
Robinson , Int’l Electronics Manufacturing Technology Symposium 2007 p. 346
• “Thermal and Mechanical Behaviors of Underfills for Flip-Chip Packaging”, H. Wu, C. Poo, L. Waf, and W. Mee,
Electronics Packaging Technology Conference 2005 p. 842
• “Flip Chip Processing Using Wafer-Applied Underfills”, S. Busch and D. Baldwin [Ga Tech], Electronic
Components and Technology Conference 2005 p. 297
• “The effect of underfill imperfections on the reliability of flip chip modules: FEM simulations and experiments”,
S. Rzepka, F. feustel, E. Meusel, M. Korhonen and C. Li, 1998 Electronic Components and Technology
Conference p. 362
• “Manufacturing Multichip Modules”, p. 391ff, by Rakesh Agarwal and Michael Pecht, in Physical Architecture of
VLSI Systems, ed. Robert J. Hannemann, Allan D. Kraus and Michael Pecht; John Wiley & Sons Inc., New York
• “Solderable Contacts for Flip Chip Integrated Circuit Devices”, William D. Higdon, Susan Mach, and Ralph
Cornell, US Patent 5,547,740, Aug 20, 1996
• “Solder jet printing of micropads and vertical interconnects”, Wallace, D.B.; Hayes, D.J., SMTA National
Symposium, Emerging Technologies. Proceeding of the Technical Program Edina, MN, USA: Surface Mount
Technol. Assoc, 1997. p. 55-61 Conference: Bloomington, MN, USA, 20-23 Oct 1997
• “Advanced solder flip chip processes” , Rinne, G.; Koopman, N.; Magill, P.; Nangalia, S.; Berry, C.; Mis, D.;
Rogers, V.; Adema, G.; Berry, M.; Deane, P. SMI. Surface Mount International. Advanced Electronics
Manufacturing Technologies. Proceedings of The Technical Program Edina, MN, USA: Surface Mount Technol.
Assoc, 1996. p. 282-92 vol.1 of 2 vol. 826 pp. Conference: San Jose, CA, USA, 10-12 Sept 1996
• “Solder Bump Transfer Device for Flip Chip Integrated Circuit Devices”, Shing Yeh, William Higdon, Ralph
Cornell, US Patent 5,607,099 Mar 4, 1997
Flip chip 4

• “Process for Converting a Wire Bond Pad to a Flip Chip Solder Bump Pad and Pad Formed Thereby”, Curt
Erickson, US Patent 5,891,756 April 6, 1999
• “Process for Manufacturing a Multilayer Bumped Semiconductor Device”, Kamaran Manteghi, US Patent
5,863,812 Jan 26, 1999
• “Method of forming solder bumps”, Toshiharu Yanagida , US Patent 5,866,475; Feb. 2, 1999
• “Flip-chip packaging for smart MEMS” , Mayer, F.; Ofner, G.; Koll, A.; Paul, O.; Baltes, H., Proceedings of the
SPIE (1998) vol.3328, p. 183-93. Conference: Smart Structures and Materials 1998: Smart Electronics and
MEMS. San Diego, CA, USA, 2-4 March 1998
• “Wafer bumping technologies. A comparative analysis of solder deposition processes and assembly
considerations”, Patterson, D.S.; Elenius, P.; Leal, J.A., Advances in Electronic Packaging 1997. Proceedings of
the Pacific Rim/ASME International Intersociety Electronic and Photonic Packaging Conference. INTERpack
ASME, 1997. p. 337-51 vol.1Conference: Kohala Coast, HI, USA, 15-19 June 1997
• “Solder Flip Chips Employing Electroless Nickel: An Evaluation of Reliability and Cost”, F. Stepniak , Advances
in Electronic Packaging 1997 p. 353 (EEP Vol 19-1), ASME 1997
• “Zincation characterization for electroless Ni/Au UBM of solder bumping technology”, Tan, Q.; Beddingfield, C.;
Mistry, A.; Mathew, V., Twenty Third IEEE/CPMT International Electronics Manufacturing Technology
Symposium,New York, NY, USA: IEEE, 1998. p. 34; Conference: Austin, TX, USA, 19-21 Oct 1998
• “Solder bumping methods for flip chip packaging”, Rinne, G.A., 1997 Proceedings. 47th Electronic Components
and Technology Conference IEEE, 1997. p. 240 Conference: San Jose, CA, USA, 18-21 May 1997
• “Flip-chip packaging with micromachined conductive polymer bumps”, Oh, K.W.; Ahn, C.H. , Proceedings of 3rd
International Conference on Adhesive Joining and Coating Technology in Electronics Manufacturing 1998,
p. 224 Conference: Binghamton, NY, USA, 28-30 Sept 1998
• “Low cost solder flip chip”, Rinne, G.A.; Magill, P.A. , Proceedings. 3rd International Symposium on Advanced
Packaging Materials Processes, Properties and Interfaces 1997. p. 113 Conference: Braselton, GA, USA, 9-12
March 1997
• “Flip-chip packaging using micromachined conductive polymer bumps and alignment pedestals for MOEMS”,
Oh, K.W.; Ahn, C.H.; Roenker, K.P., IEEE Journal of Selected Topics in Quantum Electronics (Jan.-Feb. 1999)
vol.5, no.1, p. 119

External links
• Flip chip assembly videos (
• Flip chip tutorials (
• Flip Chip Assembly (
• Flip Chip (C4) Benefits (
• Kyocera America, Inc. - White Paper: Flip Chip Challenges (
• An Innovative Approach for Breakthrough Reduction in Flip Chip Package Cost - White Paper (http://www.
• A case for the application of MicroTape (
• Pushing the barriers of wafer level device integration to higher assembly speed (
• Molded Flip Chip - FCmBGA White Paper (
• Molded Flip Chip - FCmBGA White Paper (
Flip chip 5

• Molded Underfill (MUF) Technology for Flip Chip Packages in Mobile Applications - White Paper (http://
Article Sources and Contributors 6

Article Sources and Contributors

Flip chip  Source:  Contributors: Adrger, CryptoDerk, Dancter, Danield101, DragonHawk, Dysprosia, Edgarrabbit, ElectraFlarefire,
EoGuy, Glloq, Hellbus, Hooperbloob, JaGa, Jc3s5h, Jehochman, Jnc, Josh Parris, Julesd, Khym Chanur, Kinema, Maury Markowitz, Okto8, Omegatron, Parikshit Narkhede, Pseudomoi, RJFJR,
RTC, Rmhermen, Secretlondon, SiobhanHansa, Toresbe, Twisp, Wabernat, Woohookitty, YUL89YYZ, Zestee, ZyMOS, 39 anonymous edits

Image Sources, Licenses and Contributors

Image:Flip chip pads.svg  Source:  License: Public Domain  Contributors: User:Twisp
Image:Flip chip bumps.svg  Source:  License: Public Domain  Contributors: User:Twisp
Image:Flip chip flipped.svg  Source:  License: Public Domain  Contributors: User:Twisp
Image:Flip chip mount 1.svg  Source:  License: Public Domain  Contributors: User:Twisp
Image:Flip chip mount 2.svg  Source:  License: Public Domain  Contributors: User:Twisp
Image:Flip chip mount 3.svg  Source:  License: Public Domain  Contributors: User:Twisp
Image:Flip chip mount underfill.svg  Source:  License: Public Domain  Contributors: User:Twisp
Image:Flip chip mount final.svg  Source:  License: Public Domain  Contributors: User:Twisp
Image:Wirebonding.svg  Source:  License: Creative Commons Attribution-Sharealike 2.5  Contributors: CyrilB,
Image:Flip chip side-view.svg  Source:  License: Public Domain  Contributors: User:Twisp

Creative Commons Attribution-Share Alike 3.0 Unported
http:/ / creativecommons. org/ licenses/ by-sa/ 3. 0/