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- Digital Electronics
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Describe with the help of a block diagram the top level functional units of

the computer and their main function at a high level? Describe the basic

program execution model on a Von-Newmann architecture machine with a

block diagram?

finite number of unambiguous steps) and applies the solution on a given input

and gives the resultant output. The solution that can be understood by a

computer is in binary notation and it is a practice for users to write their

solutions in a more friendly English-like yet precise language called high level

programming language that is than converted by the appropriate translator

software to equivalent binary solution. This solution is called the program. A

digital computer can at a very high level be described as a system that has 5

major components to execute the given programs.

• Control Unit

• Memory

• Input

• Output

The Arithmetic Logic Unit (commonly referred to as ALU) and Control Unit

together is usually called the processor because in modern desktops they come

together on one mother board. The input and output units combined are called

the I/O unit.

Arithmetic Logic Unit (ALU):

ALU is the main execution engine of the computer where the actual execution

of the operations takes place. The ALU usually is a hardware combinational

circuit that can perform simple data manipulation & data transfer operations

and a collection of high speed storage elements called registers to hold data

that can be used as input to the combinational circuit to execute the desired

operation. The combinational circuit supports to a minimal level the following

basic operations.

• Data Manipulation Operations

o Arithmetic Operations (ADD, SUBTRACT, INCREMENT, DECREMENT

and so forth)

o Logical Operations (AND, OR, XOR, COM and so forth)

o Shift Operations (LOGICAL, AIRHTMETIC, CIRCULAR left & right

shifts)

Control Unit:

Control Unit is effectively the nervous system of the computer. It coordinates

all activities in the computer. It takes the steps in your solution from memory,

understands what action needs to be taken and than generate signals for all

parts of the computer to do the activities that would in effect execute the

action in the given step. It is responsible to not only facilitate all sub-actions

needed to be done to complete an action but also make sure they are done in

the prescribed order.

Memory:

Memory refers to the electronic memory which works as the primary storage

device for a computer to store all the running programs (code, data, and

temporary stack storage). The processor contacts the memory under the

control of the control unit to get the instructions of the currently executing

program. The processor also contacts the memory to get the data(operands)

needed to execute an instruction and also uses memory as a storage to store

output data coming from the instruction execution. Memory is usually

implement using RAM technology.

Input:

Input components refers to all the input devices and the interface devices that

allow all the input devices connected to a computer to communicate with the

processor and memory to get data from external environment. No meaningful

program can be written without getting some input from the user and similarly

there has to be a way for inputting a given program to the computer for

execution. All these activities are achieved with the help of Input unit of a

computer. The input unit is designed in such a way that we can connect many

number of different input devices to the computer through which input

stimulus can be given to the running programs as and when they ask for it or

are expecting it.

Output:

This is similar to input unit except that this unit helps coordinate computer’s

connection with external environment to give out results/output. A number of

output devices can be connected to the computer using the output unit. Some

devices can act as both input and output devices and hence are part of both

the input and output unit.

This is the most popular and widely used model for building computers. As the

name implies, in this model, the computer takes the program to be executed

from the memory one instruction at a time, decodes/understands the

instructions and than executes the instruction, the steps of which will depend

on what the instruction is. The algorithm for program execution in Von-

Newmann architecture is:

{

1. Get the next instruction to be executed from memory.

2. Decode the instruction.

3. Get the operands needed for the instruction from memory if any.

4. Execute the steps in ALU.

}

below:

The key to program execution is a few special purpose registers that will have

information on the memory location where the next instruction can be located,

current instruction, last memory word read, etc.

PC (Program Counter): Will have the address of the next instruction.

IR (Instruction Register): Will have the current instruction executed.

MAR (Memory Address Register): Having the address of the memory location we

want to read from or write to.

MDR (Memory Data Register): A buffer register which have the data read from

memory or data to be written to memory location identified by MAR.

General Purpose Registers:

Named using convention like R1, R2, etc, there registers will be used to store

actively used data so they are available quickly to the ALU as needed.

Given these components, the algorithm for program execution given above can

be made more specific as below:

1. Operating System will put the address of the first instruction of the

program in PC.

2. The computer does the following.

a. Moves the contents of PC to MAR.

b. Reads the memory word in location pointed by MAR to MDR. At

the same time, PC is incremented by 1, so PC will have the

address of the next instruction.

c. Moves MDR contents to IR.

d. Control unit looks at IR to decode the instruction.

e. To read any operands needed, the address of the operand is

moved to MAR, operand read and stored in a general purpose

register.

f. The instruction is executed by ALU.

g. Go back to step a.

• ALU

• Control Unit

• Memory (read & write)

• Registers

• Input

• Output

• Von-Neumann Architecture

• Stored Program computer

• PC, MAR, MDR, IR

Q2. Discuss the factors influencing the executing time of a given program.

Develop a performance equation for execution time based on the said factors,

and explain in detail some of the techniques that can be used to improve the

execution time of the program by decreasing or increasing the above discussed

performance factors?

Answer. The executing time of a given program for a given input depends

roughly on the following factors assuming that is the only program running on

the computer and there are no other competing processes competing for the

shared resources.

Clock Rate ( R ): The clock rate can be defined as number of small instructions

can be executed by a computer in one second. Clock rate is really number of

clock cycles per second, where each clock cycle is equal to the time taken to

execute one micro-operation. Clock Rate is a measure of the speed of the

underlying hardware in executing the micro-operations as a part of program

execution. This is usually measured in Hertz.

operation that can be executed in one clock cycle. S is actually going to the

average number of steps in all the executable instructions of a given program

for a given input. This parameter gives an indication as to how many clock

cycles are needed on an average per executing instruction for a given program.

instructions in a given program for a given input. This is the count of executed

instruction, not the lines in the program. Example: If an instruction is executed

twice, it is counted as 2 executed instructions.

given program for a certain input. The execution time equation (Performance

Equation) would be:

T = (S X N)/R

Where:

T: Execution time

S: Average number of steps in an executed instruction

N: Total executed instructions

R: Clock Rate

As we can see from above, to improve the execution time (decrease the time

taken to execute the program), we should look for either:

• Reducing S X N

• Increasing R

Increasing R:

• If we can reduce the time taken to execute a micro-operation, the clock

rate to be increased. To reduce the time taken to execute the micro-

operations:

o Hardware advances are coming every day to reduce the

propagation delays in the combinational circuits.

Reducing S X N:

There are two different schools of thought to reduce the values of S X N.

RISC: In this architecture, the idea is that the computer only supports only a

small set of simple instructions. The assumption is, this will reduce the number

of sub-steps (micro-operations) in an instruction. Though, this might cause an

increase in N (given that we only have simple instruction, number of

instructions needed to state a solution would be more), the idea is that simple

instructions support would automatically means optimizations like pipelining

can be implemented much more easily and efficiently leading to reducing the

overall time taken to execute all the instructions.

CISC: In this architecture, the idea is that the computer supports a large

number of instructions ranging from simple to complex. The assumption is, this

will reduce the number of instructions needed in the program. Though, this

might cause an increase in S (Complex instructions have more number of sub-

steps), the idea is that overall S X N will decrease.

to work on more than one instruction at a time effectively reducing the time

taken to execute program (throughput) while still taking the same time for

each instruction. Most modern computers now support pipelining, allowing to

finish more number of instructions in a given time, therefore reducing the

execution time of a program.

having more than one processor enabling us to execute more than one

instruction at a time in parallel. This is distinct from pipelining where we are

not talking about having more than one processor. Using Multiprocessors,

though in theory we can get linear improvement in performance proportional

to the number of processors, in practice we get sub-linear improvement vowing

to communication and distribution overhead. We can achieve super-linear

performance if we combine pipelining with Multiprocessors.

• Execution Time

• Average Number of Steps (S)

• Number of executed instructions (N)

• Clock Rate ®

• T=SXN/R

• RISC

• CISC

• Pipeline & Multiprocessors

Answer: In the quest to improve throughput (the number of

instructions/programs that can be executed) and response time for programs,

the developments have lead two different architecture models.

Multi-processors:

Multi-processors are those computers that employ more than one main-line

processors to increase the number of things that can be done in parallel. The

idea is that the more the number of processors, the more numbers of things

can be done in parallel, increasing the throughput and response time for

programs.

Main Characteristics:

• All processors are connected to a shared memory that is used for

different processors to communicate with each other.

• The complexity of the computer design is high because of the increased

number of connections.

• The communication is parallel in nature because parallel connecting

lines will be there between each processor and memory enabling

transfer of multiple bytes of information in one go.

• More costly because of additional complexity involved.

• Because of shared-memory, multi-processors are also commonly referred

to as shared-memory multi-processors.

• More suitable for tightly coupled processes.

Advantages:

• For processes that communicate a lot, multi-processors systems offer a

great advantage in terms of speed because:

o They communicate using shared memory.

o The communication is parallel

Disadvantages:

• Very costly & complicated.

• Scalability low because the complexity and cost grow many fold for

every unit increase in number of processors and consequently computing

power.

• Low flexibility.

Multi-computers:

Multi-computers is actually a collection of simple computers connected in a

network to be used as a group for parallel processing. The connection is serial

in nature.

Main characteristics:

• Each mode in the collection is an independent computer.

• The different processes running on different computers can

communicate if needed using serial communications through the LAN,

causing communication to be slow but low cost.

• More suitable for loosely-coupled processes that need very little or no

communication.

• No shared memory and communication is done using message passing

through the network. This architecture therefore is also referred to as

message-passing multi-computers.

Advantages:

• Scalable.

• Flexible.

• Low cost.

Disadvantages:

• Communication slow.

• Multiprocessor

o Shared Memory

o Parallel communication

o Fast

o Complex

o Less scalable

o Tightly coupled

• Multi-computers

o Message passing

o Serial communication

o Slow in communication

o Less complex

o Scalable

o Loosely coupled.

base r. Describe algorithm for unsigned number subtraction using (r – 1) and/or

r’s complement. Perform (1011) base 2 – (011) base 2 using 8 bit registers

unsigned arithmetic.

Answer.

(r- 1)’s complement: (r -1)‘s complement for a number x in base r can be

defined as:

y = ((r) power n )– 1 – x;

Where: x is the number for which we want (r – 1) complement,

r is the radix of the number in which x is represented,

n is the number of letters (bits in case of binary and digits in case of

decimal)

y is the (r – 1)’s complement.

x + y = ((r) power n) - 1

9’s (r=10) complement in decimal number system.

n = 3; r = 2; x = 101;

y = 111 – 101

y = 010

as:

y = ((r) power n ) – x;

y is the radix of the number in which x is represented,

n is the number of letters (bits in case of binary and digits in case of

decimal)

y is the (r)’s complement.

x + y = ((r) power n)

(r = 10) complement in decimal number system.

n = 3; r = 2; x = 101;

y = 1000 – 101

y = 011

Algorithm for unsigned binary subtraction of unsigned numbers:

Algorithm:

Step 1: Take 1’s complement of N. [We get 2**n – 1 – N]

Step 2: Add 1 to the result from step 1. [We get 2**n – N]

Step 3: Add result from step 2 to M. [We get M + 2**n – N]

Step 4: The result from step 3, should be analyzed on 2 conditions. When M >=

N (result will be positive) or when N > M (result will be negative).

Step 5: If M >= N, we can see the result in Step 3 as, (M – N) + 2**n. the 2**n

will manifest itself as additional carry, which can be ignored because we are

only interested in computing M – N. After ignoring the additional carry, the rest

of the result is M – N. The fact that there is additional carry indicates that M >=

N. So, when that happens as a result of Step 3, ignore the carry and the result

is your result.

Step 6: If N > M, we can see the result in Step 3 as, 2**n – (N – M). Since the

result would be negative, and we are only representing unsigned numbers, only

the magnitude of the result can be obtained. We know that the result is

negative from the fact that step 3 does not result in additional carry. To get

the magnitude, we have to do step 7 & step 8.

Step 7: Take 1’s complement of result from Step 3. [(2**n – 1) – 2**n + N – M = N

– M – 1]

Step 8: Add 1 to the result from Step 8. [N – M – 1 + 1 = N – M]. So we got the

magnitude of the result, which is a negative number.

M = (00001011) base 2

N = (00000011) base 2

Step 1: Take 1’s complement of N. Do this by reversing 0’s to 1’s and 1’s to 0’s.

N’ = (11111100) base 2

2’s complement of N = (11111101) base 2.

00001011

11111101

-----------

1 00001000

Step 4: There is a carry coming in Step 3. That indicates M > N. In that case,

ignore the carry and the rest is the result.

• r – 1 complement definition

• r complement definition

• M >= N condition

• N > M condition

• Result in 2’s complement form.

Q5. Describe different representation forms for positive and negative binary

numbers. Describe an algorithm that can be used to perform signed binary

arithmetic when negative numbers are stored in 2’s complement form?

Describe overflow and how it can be detected in signed arithmetic? Perform

(100000) base 2 + (100000) base 2 using signed arithmetic in 8 bit registers.

Perform (100000) base 2 – (10) base 2 using signed arithmetic in 8-bit registers.

Answer.

Positive binary numbers are always represented in a computer using signed

magnitude representation. Positive in represented as 0. The most significant

bit in the register will be used to represent the sign and the other bits are used

to represent magnitude in signed magnitude form.

0 0001010

S Magnitude

The 0 to the extreme-left indicates it is a positive number and the remaining

bits indicate 10 which is the magnitude of the number.

Negative binary numbers can be represented using 3 different representation

forms. The 3 different forms are:

• 1’s complement representation

• 2’s complement representation.

positive numbers except that the sign bit (the bit to the extreme left) will be 1

indicating that the sign of the number is negative.

For example: In an 8-bit register -10 as binary is represented (using signed

magnitude representation) as:

1 0001010

S Magnitude

The 1 to the extreme-left indicates it is a negative number and the remaining

bits indicate 10 which is the magnitude of the number.

representation form, the corresponding positive number is taken in signed

magnitude representation and 1’s complement of that number is taken along

with sign bit to indicate the corresponding negative number.

complement representation) as:

11110101

Take +10 in signed magnitude form: 00001010

Take 1’s complement of this: 11110101 [This is -10 in 1’s complement form]

representation form, the corresponding positive number is taken in signed

magnitude representation and 2’s complement of that number is taken along

with sign bit to indicate the corresponding negative number.

complement representation) as:

11110110

Take +10 in signed magnitude form: 00001010

Take 1’s complement of this: 11110101 [This is -10 in 1’s complement form]

Add 1 to get 2’s complement: 11110110 [This is -10 in 2’s complement form]

• Both Signed magnitude and 1’s complement representation forms for

negative numbers have different representations for +0 and -0 which is

confusing since both are mathematically the same.

• Since both signed magnitude and 1’s complement forms use different

forms for -0 and +0, the range of numbers we get is -2**(n – 1) – 1 to

2**(n -1) – 1.

To prevent the above problems, 2’s complement notation is the preferred form

for representing negative binary numbers, because in that -0 and +0 have the

same representation and the range of numbers in 1 higher: -2**(n – 1) to 2**(n –

1) – 1.

complement form:

Both addition & subtraction are the similar because A – B can be written as A +

(-B).

A + B:

• Do binary addition.

• Note the carry into sign-bit (Cin)

• Note the carry out of sign bit. (Cout)

• If (Cin XOR Cout) = 1, there is overflow, result is not valid. Otherwise,

ignore the carry and the rest is the result.

A – B:

• Take 2’s complement of B. Let that be H. Do A + H by following the

above algorithm.

Overflow:

When we do addition or subtraction of signed numbers there is every chance

that the result (when the magnitude is bigger than operands which will

happened when both the operands are of same sign in case of addition and

different signs in case of subtraction) is so big that it cannot be fit in the given

size register. This scenario is called overflow. This is not a problem using paper

and pen because there are no size limitations but is a problem in computers

given finite size of registers.

M = 00100000

N = 00100000

M + N = 01000000

Carry into sign bit = 0, carry out of sign bit = 0. Exclusive or both of these = 0.

So there is no overflow. The result is valid and is (01000000) base 2.

M = 00100000

N = 00000010

1’s of N = 11111101

2’s of N = 11111110

+M = 00100000

M + 2’s N + 1 = 1 00011110

Carry into sign bit = 1, carry out of sign bit = 1; Exclusive or of both = 0. So

there is no overflow. Ignore any carry and the result is (00011110) base 2 = (30)

base 10.

• Signed Magnitude representation

• 1’s complement representation

• 2’s complement representation

• Range of numbers

• Overflow

• Checking for overflow

• Getting magnitude of the number from 2’s complement representation

of negative numbers.

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