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Pulse I–V characterization of a nano-crystalline oxide device with sub-gap density of states

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 Nanotechnology

Nanotechnology 27 (2016) 215203 (7pp) doi:10.1088/0957-4484/27/21/215203

Pulse I–V characterization of a nano-

crystalline oxide device with sub-gap density
of states
Taeho Kim, Ji-Hyun Hur and Sanghun Jeon
Department of Applied Physics, Korea University, 2511, Sejongro, Sejong, 339-700, Korea

E-mail: jeonsh@korea.ac.kr

Received 19 January 2016, revised 10 March 2016

Accepted for publication 30 March 2016
Published 20 April 2016

Abstract
Understanding the charge trapping nature of nano-crystalline oxide semiconductor thin film
transistors (TFTs) is one of the most important requirements for their successful application. In
our investigation, we employed a fast-pulsed I–V technique for understanding the charge
trapping phenomenon and for characterizing the intrinsic device performance of an amorphous/
nano-crystalline indium-hafnium-zinc-oxide semiconductor TFT with varying density of states
in the bulk. Because of the negligible transient charging effect with a very short pulse, the
source-to-drain current obtained with the fast-pulsed I–V measurement was higher than that
measured by the direct-current characterization method. This is because the fast-pulsed I–V
technique provides a charge-trap free environment, suggesting that it is a representative device
characterization methodology of TFTs. In addition, a pulsed source-to-drain current versus time
plot was used to quantify the dynamic trapping behavior. We found that the charge trapping
phenomenon in amorphous/nano-crystalline indium-hafnium-zinc-oxide TFTs is attributable to
the charging/discharging of sub-gap density of states in the bulk and is dictated by multiple trap-
to-trap processes.
Keywords: nanocrystal, oxide semiconductor, carrier transport, sub-gap states

(Some figures may appear in colour only in the online journal)

In the research field of thin film transistors (TFTs), one of the
mainstream technologies involves the use of functional
amorphous oxide semiconductors such as indium-gallium-zinc
oxide, indium-hafnium-zinc-oxide and indium-tin oxide as an
electronically active semiconductor layer. This is because it
provides key benefits such as excellent electronic transport
including high electron mobility (7–120 cm2 V−1 s–1), low
subthreshold slope (∼0.2 V/decade), and low leakage current
(<pA) characteristics, room-temperature process capability,
good uniformity, and superior process compatibility with the
previously reported display technologies [1–6]. Amorphous
oxide semiconductor-based TFTs have attracted much atten-
tion to replace the conventional amorphous and polycrystal-
line silicon TFTs for various display technologies, including
active matrix organic light emitting diodes and active matrix
liquid crystal displays [7–11]. However, an amorphous oxide
semiconductor has a certain level of sub-gap density of states
in the bulk that causes charging and discharging of sub-gap
states depending on the gate bias magnitude and polarity [12–
18]. Thus, the threshold voltage and mobility instabilities of an
oxide TFT remain as the key issues in its successful appli-
cation [19–23].
A fast-pulsed I–V technique has been introduced for
evaluating intrinsic device performance under a charge-trap
free environment in high-κ based metal oxide semiconductor
field effect transistors (MOSFETs), in which charge trapping
occurs mainly inside the gate insulator or at the semi-
conductor-oxide interface within a few microseconds [24–
28]. The fast charging effect leads to a significant increase in
device instabilities including mobility underestimation and
threshold voltage shift [29, 30]. The wide range of charge
trapping makes it difficult to employ a direct-current techni-
que to evaluate the actual device performance, determine the
device parameters, and visualize a complete internal picture

0957-4484/16/215203+07$33.00 1 © 2016 IOP Publishing Ltd Printed in the UK

Nanotechnology 27 (2016) 215203
of the device. The conventional direct-current measurement
technique for MOSFETs and TFTs is time consuming,
requiring several to tens of seconds. Because of a relatively
long bias-sweeping and measurement time, during the tran-
sistor turn-on stage, carriers accumulate in the channel and are
trapped in the shallow-level defects located in the gate di-
electric or interface, resulting in a shift of the threshold
voltage and a reduction in drain current [29, 30]. The fast
transient charging phenomenon has been a major problem for
implementing high-k gate insulators in MOSFET devi-
ces [29, 30].
In this report, we present the dynamic charge trapping
nature of nano-crystalline oxide semiconductor TFTs with
sub-gap density of states in the bulk. In order to achieve this,
we adjusted the hafnium cation concentration in an indium-
hafnium-zinc-oxide semiconductor during the sputtering
process to obtain different sub-gap density of states in the
bulk. Moreover, for characterizing the intrinsic device per-
formance and studying the dynamic nature of charge trapping,
we employed the fast-pulsed I–V technique, which measures
the device characteristics within a few tens of microseconds
and characterizes the TFTs in a trap-free environment. We
found that, in comparison to the direct-current measurement
method, the channel mobility values of the indium-hafnium-
zinc-oxide TFTs extracted by the fast-pulsed I–V technique
were increased by 22%–76% (depending on the bulk density
of the states). In addition, the pulsed source-to-drain current
versus time plot provided an understanding of dynamic
charge trapping in oxide TFTs
A schematic of the fabricated oxide TFT with a bottom-
gated structure is presented in figure 1(a). We used a Mo gate,
source and drain electrodes prepared using the sputtering
process, and a 350 nm thick SiN gate insulator prepared using
plasma enhanced chemical vapor deposition. In order to
prepare an oxide semiconductor with a different density of
states, indium-hafnium-zinc-oxide films with different haf-
nium cation concentrations were prepared using the radio-
frequency co-sputtering method [24]. The composition and
crystal structure of the oxide semiconductor films were
measured using inductively coupled plasma-atomic emission
spectroscopy and diffraction patterns in transmission electron
microscopy, respectively. The concentrations of the hafnium
cation were found to be 4, 7, and 10%. All the prepared oxide
films consisted of nano-crystalline structures in an amorphous
matrix, as verified from the transmission diffraction patterns
in the inset of figure 1(a). A multi-frequency capacitance–
voltage method was used to examine the density of states of
the oxide semiconductor. As the hafnium cation concentration
increased, the acceptor-like density of states increased.
Figure 1(b) displays the direct-current (voltage rise time
of approximately a few seconds) and fast ramp I–V (voltage
rise time of 10, 100, 300, and 500 μs) curves of the indium-
hafnium-zinc-oxide TFT with different hafnium cation con-
centrations. A fast voltage ramp leads to a high source-to-
drain current level, and a steep slope of the I–V curve than
that of the DC I–V is obtained. The fast charging effect during
conventional direct-current measurements was significant due
to relatively long sweep/measurement time, and thus, the
2
T Kim et al
drain current level and mobility values were underestimated
[30–32]. Therefore, as observed in figure 1(c), the mobility
values (μpulse) measured by fast ramp I–V are higher than
those measured by direct-current I–V methods (μdc). The
mobility increase rate (μpulse/μdc) is significantly higher in the
indium-hafnium-zinc-oxide TFT (76%) with 10% hafnium
concentration than in other oxide TFTs with lower hafnium
concentrations (the μpulse/μdc values of oxide TFTs with 7%
and 4% hafnium concentrations are 27% and 22%, respec-
tively), implying that the oxide TFTs with high hafnium
concentrations are defective and likely to be susceptible to
charge trapping issues. This is corroborated by the density of
states in the bulk measured by the multi-frequency capaci-
tance–voltage method presented in figure 1(d). As the haf-
nium cation concentration increases, the acceptor-like density
of states increases [33, 34]. The hafnium concentration-
dependent sub-gap density of states is calculated and pre-
sented in table 1, where NTA is the acceptor-like tail state
density, kTTA is the acceptor-like tail state characteristic
energy, NDA is the acceptor-like deep state density, and kTDA
is the acceptor-like deep state characteristic energy.
In order to further examine the charge trapping
phenomenon, we performed single fast-pulsed I–V measure-
ments. The measurement setup is presented in figure 2(a).
Here, the gate pulse was applied via a pulse generator and the
bias potential at the X node was measured with an oscillo-
scope. Then, the current level was determined depending on
the gate bias [32]. The gate voltage pulse profile (rising and
falling time of 10 μs and a pulse width of 2 ms) is shown in
figure 2(b). The gate pulse starts by discharging the residual
charges trapped in the gate stack. Then, the gate pulse rises as
rapidly as possible to minimize charge trapping. Further, we
measured the source-to-drain current versus gate voltage as
shown in the first step in figures 2(c), (d). When the gate pulse
reaches the plateau region, the transistor is turned on and
some of the channel carriers are trapped, which shifts the
threshold voltage towards the positive gate bias direction and
reduces the drain current (see the second step in figures 2(c),
(d)). During the trace of gate voltage towards the negative
bias direction, another source-to-drain current is measured as
seen in the third step in figures 2(c), (d). During gate pulse
width, charge trapping occurs dominantly. Thus, the mea-
surement results of transient current characteristics with
veering pulse width allow us to determine the trapping time
constants, as shown in figures 3(a)–(c). The transient source-
to-drain current characteristics were measured with rise times
from 10 to 500 μs. Once the gate pulse reaches the plateau
region, the source-to-drain current decays rapidly owing to
the initial charge trapping. Then, after a millisecond, the
current gradually saturates, approaching a certain current
value and follows the typical charge trapping behavior. The
results of our three devices agree with the multiple-trap model
with three trapping time constants calculated using the fol-
lowing equation:
I = A ⋅ Io ⋅ exp ( - t / tA) + B ⋅ Io ⋅ exp ( - t / tB)
+ C Io ⋅ exp ( - t / tC ) .
Nanotechnology 27 (2016) 215203 T Kim et al

Figure 1. (a) Schematic of a bottom-gate oxide TFT. (b) Fast pulsed and direct-current transfer curves of indium-hafnium-zinc-oxide TFTs
with various hafnium cation concentrations. (c) Mobility values (top) of indium-hafnium-zinc-oxide TFTs with different hafnium cation
concentrations measured by fast I–V and direct-current I–V methods. Mobility increase rate (bottom) μfast/μdc for indium-hafnium-zinc-oxide
TFTs. (d) Density of states versus energy for indium-hafnium-zinc-oxide TFTs with various hafnium cation concentrations.

Table 1. Various parameters of sub-gap density of states for indium- from the measured I–V curves was plotted, as presented in
hafnium-zinc-oxide TFTs. figure 4(b). During pulse trace-up, the threshold voltage
Hafnium NTA values of both the oxide TFT and high-κ MOSFET were
metal cation (cm−3 kTTA NDA kTDA relatively insensitive to pulse amplitude. However, during
content ev−1) (eV) (cm−3 eV−1) (eV) pulse trace-down, the threshold voltage of the high-κ based
4% 3 × 1018 0.08 2.8 × 1017 0.5
MOSFET was strongly dependent on pulse amplitude. In
7% 1 × 1019 0.06 5.5 × 1017 0.5 high-κ based MOSFET devices, the pulse amplitude-depen-
10% 5 × 1019 0.05 9 × 1017 0.5 dent threshold voltage shift is mainly due to the charge
trapping inside the gate insulator [35]. The high electric field
applied on the gate for MOSFET with thin gate oxide induces
The trapping time constants for these devices are pre- a significant amount of injection and charge trapping in the
sented in figure 3(d). Here, we should note that the short gate insulator/interface. On the other hand, for oxide TFTs,
trapping time constants (τΑ) are very similar to each other even during pulse-down, the threshold voltages of oxide TFTs
while the long trapping time constants (τC) depend on the are less dependent on pulse amplitude, suggesting that char-
hafnium cation concentration, indicating that the charge ging/discharging is mainly associated with the sub-gap den-
trapping behavior is influenced by the traps that are further sity of states in the bulk. In figure 1(d), we observe that the
away from the interface (in other words, the bulk defects). In acceptor-like density of states in the oxide semiconductor
order to verify this, we performed pulse amplitude-dependent increases with the hafnium metal cation concentration. It is
fast-pulsed I–V measurements for oxide TFTs with different well known that the acceptor-like traps are negatively charged
hafnium cation concentrations together with high-κ based when occupied by electrons and becomes neutral when the
MOSFETs. Here, we varied the range of pulse peaks from states are empty. In our measurement, the acceptor-like den-
2–8 V. The I–V curves during pulse trace-up and trace-down sity of states was associated with the charging/discharging
were measured. Moreover, the threshold voltage extracted phenomenon. When the transistor was turned on by applying

3
Nanotechnology 27 (2016) 215203 T Kim et al

Figure 2. (a) Schematic of single pulse I–V measurement system setup. (b) Gate voltage versus time plot of single pulse I–V measurement
methods. (c) Representative pulsed I–V and (d) transient source-to-drain current versus time plots of indium-hafnium-zinc-oxide TFTs.

Figure 3. (a)–(c) Transient source-to-drain current versus time of indium-hafnium-zinc-oxide TFTs with hafnium concentration of 4%, 7%,
and 10% as a function of rise time from 10 to 500 μs. The red line represents the fitting curve of the three-trap model. (d) Trapping time
constants extracted from the fitting curve of the multiple-trapping model with three trapping time constants.

4
Nanotechnology 27 (2016) 215203 T Kim et al

Figure 4. (a) Pulse amplitude-dependent I–V characteristics of indium-hafnium-zinc-oxide TFTs. (b) Threshold voltage of oxide TFT and
high-κ based MOSFET with pulse amplitude extracted from pulse trace-up and trace-down I–V curves.

Figure 5. (a) Transient source-to-drain current versus time data of indium-hafnium-zinc-oxide TFTs with hafnium concentrations of 4%, 7%,
and 10%% with various charging times from 10 μs to 5 ms. (b) Threshold voltage shift with charging time for indium-hafnium-zinc-oxide
TFTs with hafnium concentration.

a positive gate pulse, the acceptor-like traps were negatively
charged, shifting the threshold voltage towards the positive
gate direction and reducing the drain current. Provided that
the front channel is the foremost carrier transport region, the
acceptor-like defects located in the front channel can cause
fast transient charging.
In order to quantitatively analyze the trapped charge,
transient current versus time data were measured as a function
of charging time ranging from 10 μs to 5 ms and are plotted in
figure 5(a). The reduction in the source-to-drain current with
time is due to the charge trapping effect. From this reduction
of source-to-drain current, the threshold voltage shift (ΔVth)
can be determined using the equation
DVth = DId ⋅ (Vg - Vth) / Id .
From this equation, ΔVth was plotted with respect to
charging time, as shown in figure 5(b). Then, the critical
trapping time (onset time of charge trapping, tc) was deter-
mined. We found that tc decreased with increasing hafnium
cation concentration in the oxide semiconductor (tc at 4%,
7%, and 10% hafnium concentrations in the indium-hafnium-
oxide semiconductor TFT are 1.85 μs, 838 ns, and 509 ns,
respectively). Thus, the hafnium cation concentration appar-
ently influences charge trapping. Initially, the hafnium metal
cation was introduced to improve the photo-bias reliability
characteristics of the indium-hafnium-zinc-oxide TFT
[26, 27]. However, our experimental results showed that the
incorporation of high hafnium cation concentration in the
oxide semiconductor increased the acceptor-like density of
states, resulting in device instability including threshold
voltage shift and mobility underestimation even during
measurement. Thus, further study regarding optimization of
the process, cation concentration, and layer structure is
required in order to meet the specification of both photo-bias
reliability and device instability. Considering of the currently
presented short-pulsed I–V measurement condition and cri-
tical trapping constant of oxide device (figure 5(b)), the
charges may be trapped in the oxide TFT even if using the
pulsed I–V method. Further work will be aimed at minimizing
the rising time using triangular gate pulse measurement (up to
2 V/100 ns), which will be presented elsewhere.

5
Nanotechnology 27 (2016) 215203
In summary, to overcome the limitation of the DC
measurement method, we introduced a fast-pulsed I–V mea-
surement method for evaluating the charge trapping behavior
of the oxide semiconductor TFT with sub-gap density of
states. In our work, we adjusted the acceptor-like density of
states in the oxide semiconductor by varying the metal cation
concentration. We found that high acceptor-like density of
states in oxide semiconductor TFTs results in device
instability including the underestimation of mobility, shift of
the threshold voltage and reduction of the critical trapping
time constant. In a materials and device aspect, this issue
needs to be solved by optimizing the metal cation con-
centration, process and layer structure. In the device char-
acterization aspect, the fast-pulsed measurement method is
effective for measuring the intrinsic device characteristics of
amorphous/nano-crystalline oxide TFTs possessing a certain
number of inherent densities of states.
Acknowledgments
This work was supported by the National Research Founda-
tion of Korea (NRF) grant funded by the Korea government
(MEST) (No. 2014R1A2A2A01006541).
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