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Materials Chemistry and Physics 83 (2004) 217–221

Sintering behavior and electrical properties of porous


(Ba,Sr)(Ti,Sb)O3 ceramics produced by adding corn-starch
Jun-Gyu Kim a,∗ , Young-Jae Kwon a , Jae-Hee Oh b , Won-Seung Cho b ,
Nam-Hee Cho b , Chin Myung Whang b , Yeon-Chul Yoo b
a Institute of Advanced Materials, Inha University, Inchon 402-751, South Korea
b School of Materials Science and Engineering, Inha University, Inchon 402-751, South Korea
Received 9 April 2003; received in revised form 3 September 2003; accepted 12 September 2003

Abstract
Porous (Ba,Sr)(Ti,Sb)O3 ceramics were fabricated by adding corn-starch (1–20 wt.%) and effect of sintering condition on the PTCR
characteristics of the porous ceramics was investigated. The room-temperature electrical resistivity of the (Ba,Sr)(Ti,Sb)O3 ceramics was
decreased and increased with increasing sintering temperature and sintering time, respectively. The former was attributed mainly to the
increase of grain size as well as the partial decrease of the porosity, and the latter was due to the increase of the electrical barrier height
of grain boundaries. The sample sintered at 1450 ◦ C for 1 h showed the excellent PTCR characteristics, i.e. the lowest room-temperature
resistivity (8.4 × 10  cm) with the high ratio of maximum resistivity to minimum resistivity (6.3 × 105 ).
© 2003 Elsevier B.V. All rights reserved.
Keywords: Porous semiconducting (Ba,Sr)(Ti,Sb)O3 ; PTCR; Sintering temperature; Sintering time

1. Introduction due to the presence of pores in the porous ceramics, which


are more favorable to form surface acceptor states compared
The positive temperature coefficient of resistivity (PTCR) with ordinary dense ceramics [20]. Porous thermistors show
characteristics are observed around the Curie points of better heat resistance than dense ones, and thus can be used
semiconducting barium titanates and their mechanism have for overcurrent protectors in electric circuits [16]. In this
been successfully explained by a well accepted barrier-layer study, porous (Ba,Sr)(Ti,Sb)O3 ceramics were fabricated by
model [1–11]. PTCR characteristics originate from the ex- adding corn-starch (1–20 wt.%) and effect of sintering con-
istence of an electrical potential barrier arising from the dition on the PTCR characteristic of the porous ceramics was
presence of a two-dimensional surface layer of acceptor investigated.
state, e.g., segregated acceptor ions, or adsorbed oxygen at
the grain boundaries [8,10]. The PTCR characteristics can
be controlled by various factors such as dopant concen-
2. Experimental procedure
tration, sintering temperature, sintering time and cooling
rate, etc. [12,13]. These factors are further found cause
for changing the PTCR characteristics of BaTiO3 ceramics The (Ba,Sr)(Ti,Sb)O3 ceramic powder consisting of
through the variation of the room-temperature resistivity highly pure BaTiO3 , 0.1 mol% Sb2 O3 and 30 mol% SrO
and microstructure. (Kyoritsu Yogyo Co. Ltd., Japan) was utilized. The mean
It is well known that the addition of transition metal ions, particle size and ferroelectric Curie temperature of the pow-
e.g., Mn, Fe and Cr, causes a pronounced enhancement of der were 1.0 ␮m and 55 ◦ C, respectively. The corn-starch
the PTCR characteristic of BaTiO3 . Porous semiconduct- (Shinyo Pure Chemicals Co. Ltd., Japan), with amounts
ing BaTiO3 has been reported to exhibit large PTCR ef- ranging from 1 to 20 wt.% was added to the (Ba,Sr)(Ti,Sb)O3
fects [14–19]. Oxygen can adsorb at the grain boundaries powder and then mixed in a mortar for 1 h. The mixed
powders were pelletized at a pressure of 40 MPa resulting
in green compacts of dimension: 15 mm × 12 mm × 27 mm.
∗ Corresponding author. Tel.: +82-32-860-8682; fax: +82-32-862-5546. The green compacts were sintered at 1300–1450 ◦ C for
E-mail address: jgkim@munhak.inha.ac.kr (J.-G. Kim). 0.5–10 h in air. The samples were heated up to the sintering

0254-0584/$ – see front matter © 2003 Elsevier B.V. All rights reserved.
doi:10.1016/j.matchemphys.2003.09.021
218 J.-G. Kim et al. / Materials Chemistry and Physics 83 (2004) 217–221

Table 1 Table 2
Summary of the samples prepared in this study Porosity and grain size of the samples A, B, C, D2, E and F
Sample Corn-starch Sintering condition Sample Porosity (%) Grain size (␮m)
content (wt.%)
Temperature (◦ C) Time (h) A 7.2 4.8
B 11.1 3.8
A 0 1350 1 C 21.1 3.6
B 1 1350 1 D2 26.3 3.4
C 5 1350 1 E 32.1 3.2
D1 10 1300 1 F 44.0 3.1
D2 10 1350 1
D3 10 1400 1
D4 10 1450 1
D5 10 1350 0.5 [9]. The porosity of the (Ba,Sr)(Ti,Sb)O3 ceramics contain-
D6 10 1350 2
ing the corn-starch increased with increasing corn-starch
D7 10 1350 4
D8 10 1350 10 content. This can be explained by the fact that the cavities
E 15 1350 1 formed due to the burning-out of corn-starch during sinter-
F 20 1350 1 ing act as the sites of the pore generation.
Fig. 1 shows the effect of temperature on the electri-
cal resistivity of the (Ba,Sr)(Ti,Sb)O3 ceramics containing
temperature with a rate of 3 ◦ C min−1 , and cooled with various amount of corn-starch. All (Ba,Sr)(Ti,Sb)O3 ce-
a rate of 10 ◦ C min−1 from the sintering temperature to ramics showed PTCR behavior in which the PTCR jump
300 ◦ C, and then furnace cooled. was slightly increased with increasing corn-starch content.
A commercial ohmic paste (Ag-7 mass% Ni) of ∼10 ␮m Namely, the PTCR jump of the (Ba,Sr)(Ti,Sb)O3 ceramics
thickness was spread on two opposite sides of the sintered containing corn-starch was 1–2 orders higher than that of
samples (15 mm × 12 mm). After the paste was dried at (Ba,Sr)(Ti,Sb)O3 ceramics without corn-starch. Since the
room-temperature, Ag paste of ∼10 ␮m thickness was ap- high-temperature (150–200 ◦ C) electrical resistivity for the
plied to the ohmic paste layers. The samples were baked at samples C, D2, E and F is higher than the measuring limit
580 ◦ C for 5 min with a heating rate of 10 ◦ C min−1 in air. (108  cm) of the multi-meter used, the high resistivity
Subsequently, copper wire leads of 0.58 mm diameter were (>108  cm) cannot be measured and is not seen in this
joined to the central portion of the surfaces of baked samples figure. The enhancement in the PTCR jump is due to the
with solder (Pb-2 mass% Sn). Pastes with Ga-40 mass% In porosity and can be explained by the barrier model pro-
composite were also spread for capacitance–applied voltage posed by Heywang [8,11]. However, the room-temperature
(C–V) and complex impedance measurements. The samples
obtained in this study are summarized in Table 1.
The microstructure of the (Ba,Sr)(Ti,Sb)O3 ceramics was
analyzed by scanning electron microscopy (SEM: S-4200,
Hitachi). The average grain size and porosity of the ce-
ramics were estimated by the line-intersection method and
porosimetry, respectively. The electrical resistance was
measured with a digital multi-meter under air atmosphere.
Capacitance–voltage (C–V) characteristics were measured
with an impedance analyzer at room-temperature in a fre-
quency of 10 kHz in order to calculate the electrical poten-
tial barrier of grain boundaries and the donor concentration
of grains.

3. Results and discussion

Table 2 shows the porosity and grain size of (Ba,Sr)-


(Ti,Sb)O3 ceramics containing various amounts of corn-
starch. The porosity increased and the grain size decreased
with increasing corn-starch content. For example, the poros-
ity and grain size of the sample A is 7.2% and 4.8 ␮m, re-
spectively, while it is 32.1% and 3.2 ␮m, respectively, for the
sample E. These porous ceramics are advantageous to oxi- Fig. 1. Electrical resistivity as a function of temperature for the
dize grain boundaries and to produce surface acceptor states (Ba,Sr)(Ti,Sb)O3 ceramics containing various content of corn-starch.
J.-G. Kim et al. / Materials Chemistry and Physics 83 (2004) 217–221 219

Fig. 2. Electrical resistivity as a function of temperature for the various Fig. 3. Electrical resistivity as a function of temperature for the various
(Ba,Sr)(Ti,Sb)O3 ceramics containing corn-starch of 10 wt.% sintered at (Ba,Sr)(Ti,Sb)O3 ceramics containing corn-starch of 10 wt.% sintered at
1300–1450 ◦ C for 1 h. 1350 ◦ C for 0.5–10 h.

increasing sintering temperature, while the increase in the


electrical resistivity of the porous (Ba,Sr)(Ti,Sb)O3 ce-
sintering time slightly decreased and increased the porosity
ramics containing corn-starch is higher than that of the
and grain size, respectively. For example, the porosity and
(Ba,Sr)(Ti,Sb)O3 ceramics without corn-starch.
grain size of the samples D1 and D4 were 28.5, 22.6% and
In order to reduce the room-temperature resistivity of the
3.2, 6.2 ␮m, respectively, while those were 26.7, 25.0% and
(Ba,Sr)(Ti,Sb)O3 ceramics containing corn-starch, the sam-
3.3, 4.2 ␮m, respectively, for the sample D5 and D8.
ples were sintered at various temperature (1300–1450 ◦ C
The grain size study was confirmed by the fractured sur-
for 1 h) and time (0.5–10 h at 1350 ◦ C). The electrical
face observations. Fig. 4 shows the SEM micrographs of the
resistivity–temperature relation for the (Ba,Sr)(Ti,Sb)O3
fractured surfaces for the various (Ba,Sr)(Ti,Sb)O3 ceramics
ceramics containing corn-starch of 10 wt.% sintered at
containing corn-starch of 10 wt.% sintered at 1350–1450 ◦ C
1300–1450 ◦ C is shown in Fig. 2. The room-temperature
(a–c) for 2–10 h (d–f). It is confirmed that the grain size in-
electrical resistivity of the (Ba,Sr)(Ti,Sb)O3 ceramics de-
creased with increasing sintering temperature and time.
creased with increasing sintering temperature. The sample
The donor concentration of grains (Nd ) and electrical bar-
D4 sintered at 1450 ◦ C showed the lowest room-temperature
rier height of grain boundaries (Φ) of the (Ba,Sr)(Ti,Sb)O3
resistivity (8.4 × 10  cm) with the high ratio of maximum
ceramics were calculated using the following equation
resistivity to minimum resistivity (6.3 × 105 ).
[21]:
Fig. 3 shows the electrical resistivity–temperature
variations of the (Ba,Sr)(Ti,Sb)O3 ceramics containing    
1 1 2 2(Φ + qV)
corn-starch of 10 wt.% sintered at 1350 ◦ C for 0.5–10 h. − = , (1)
C 2C0 q 2 εs N d
The room-temperature electrical resistivity of the (Ba,Sr)
(Ti,Sb)O3 ceramics increased with increasing sintering time.
The result obtained is consistent with previous study [13]. Table 3
In order to investigate the reason for the decrease and in- Porosity and grain size of the samples D1–D8
crease of room-temperature electrical resistivity of the sam- Sample Porosity (%) Grain size (␮m)
ples, with increasing sintering temperature and sintering
time, the average grain size, porosity, donor concentration D1 28.5 3.2
D2 26.3 3.4
of grains (Nd ) and electrical barrier height of grain bound- D3 24.1 4.5
aries (Φ) of the samples were calculated. Table 3 shows D4 22.6 6.2
the porosity and grain size of (Ba,Sr)(Ti,Sb)O3 ceramics D5 26.7 3.3
containing corn-starch of 10 wt.% sintered at various differ- D6 26.1 3.5
D7 25.5 4.1
ent temperature and time. It is found that the porosity and
D8 25.0 4.2
grain size largely decreased and increased, respectively, with
220 J.-G. Kim et al. / Materials Chemistry and Physics 83 (2004) 217–221

Fig. 4. SEM micrographs of the fractured surfaces for the samples: (a) D2; (b) D3; (c) D4; (d) D6; (e) D7; (f) D8.

where C is the capacitance per unit area of a grain bound- are shown in Fig. 5. The calculated donor concentrations of
ary, C0 the capacitance at zero applied voltage, εs the di- grains and the electrical potential barriers of grain bound-
electric constant of (Ba,Sr)(Ti,Sb)O3 , V the applied voltage aries for the samples are summarized in Table 4. One can
per grain boundary and q the electronic charge. If the bar- note that the donor concentration of grains did not almost
rier model of grain boundary region is acceptable, plotting change, but the electrical barrier height of grain boundaries
the left-hand term of Eq. (1) with the applied voltage yields for the samples slightly decreased and largely increased, re-
a straight line. From Eq. (1), Nd and Φ can be calculated spectively, with increasing sintering temperature and sinter-
from the slope of the line and the intercept of the line on the ing time. A large increase in the electrical barrier height of
voltage axis, respectively. In this measurement, the ceram- grain boundaries of the samples most probably due to the
ics were assumed to be composed of uniform cubic grains oxidation of grain boundaries. The porous ceramics are ad-
with an average grain size. The capacitance–applied voltage vantage to oxidize grain boundaries [9]. This suggests that
variations at room-temperature for the samples D2 and D4 oxygen is adsorbed at the grain boundaries during sintering
J.-G. Kim et al. / Materials Chemistry and Physics 83 (2004) 217–221 221

was investigated. The room-temperature electrical resis-


tivity of the (Ba,Sr)(Ti,Sb)O3 ceramics decreased and in-
creased with increasing sintering temperature and sintering
time, respectively. The sample sintered at 1450 ◦ C for 1 h
showed the excellent PTCR characteristics, i.e. the low-
est room-temperature resistivity (8.4 × 10  cm) with the
high ratio of maximum resistivity to minimum resistivity
(6.3 × 105 ). It was noted that the porosity and grain size
largely/slightly decreased and increased, respectively, with
increasing sintering temperature/time. A decrease in the
room-temperature resistivity with increasing sintering tem-
perature is attributed mainly to the increase of grain size
as well as the partial decrease of the porosity, while an
increase in the room-temperature resistivity with increasing
sintering time is due to the increase of the electrical barrier
Fig. 5. Capacitance–applied voltage relation at room-temperature for the height of grain boundaries. The porous (Ba,Sr)(Ti,Sb)O3
samples D2 and D4. ceramics produced by adding corn-starch can be utilized
for ceramic humidity and gas sensors.
Table 4
Calculated donor concentrations and electrical potential barriers of the
samples at 25 ◦ C Acknowledgements
Sample Donor concentration of Electrical potential barrier of
grains, Nd (no. cm−3 ) grain boundaries, Φ (eV) This work was supported by Korea Research Foundation
D1 3.65 × 1018 0.259 Grant (KRF-2001-005-E00009).
D2 4.33 × 1018 0.074
D3 4.68 × 1018 0.030
D4 5.31 × 1018 0.014 References
D5 4.58 × 1018 0.050
D6 3.27 × 1018 0.340
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D8 1.67 × 1018 1.721
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