Beruflich Dokumente
Kultur Dokumente
Abstract
Porous (Ba,Sr)(Ti,Sb)O3 ceramics were fabricated by adding corn-starch (1–20 wt.%) and effect of sintering condition on the PTCR
characteristics of the porous ceramics was investigated. The room-temperature electrical resistivity of the (Ba,Sr)(Ti,Sb)O3 ceramics was
decreased and increased with increasing sintering temperature and sintering time, respectively. The former was attributed mainly to the
increase of grain size as well as the partial decrease of the porosity, and the latter was due to the increase of the electrical barrier height
of grain boundaries. The sample sintered at 1450 ◦ C for 1 h showed the excellent PTCR characteristics, i.e. the lowest room-temperature
resistivity (8.4 × 10 cm) with the high ratio of maximum resistivity to minimum resistivity (6.3 × 105 ).
© 2003 Elsevier B.V. All rights reserved.
Keywords: Porous semiconducting (Ba,Sr)(Ti,Sb)O3 ; PTCR; Sintering temperature; Sintering time
0254-0584/$ – see front matter © 2003 Elsevier B.V. All rights reserved.
doi:10.1016/j.matchemphys.2003.09.021
218 J.-G. Kim et al. / Materials Chemistry and Physics 83 (2004) 217–221
Table 1 Table 2
Summary of the samples prepared in this study Porosity and grain size of the samples A, B, C, D2, E and F
Sample Corn-starch Sintering condition Sample Porosity (%) Grain size (m)
content (wt.%)
Temperature (◦ C) Time (h) A 7.2 4.8
B 11.1 3.8
A 0 1350 1 C 21.1 3.6
B 1 1350 1 D2 26.3 3.4
C 5 1350 1 E 32.1 3.2
D1 10 1300 1 F 44.0 3.1
D2 10 1350 1
D3 10 1400 1
D4 10 1450 1
D5 10 1350 0.5 [9]. The porosity of the (Ba,Sr)(Ti,Sb)O3 ceramics contain-
D6 10 1350 2
ing the corn-starch increased with increasing corn-starch
D7 10 1350 4
D8 10 1350 10 content. This can be explained by the fact that the cavities
E 15 1350 1 formed due to the burning-out of corn-starch during sinter-
F 20 1350 1 ing act as the sites of the pore generation.
Fig. 1 shows the effect of temperature on the electri-
cal resistivity of the (Ba,Sr)(Ti,Sb)O3 ceramics containing
temperature with a rate of 3 ◦ C min−1 , and cooled with various amount of corn-starch. All (Ba,Sr)(Ti,Sb)O3 ce-
a rate of 10 ◦ C min−1 from the sintering temperature to ramics showed PTCR behavior in which the PTCR jump
300 ◦ C, and then furnace cooled. was slightly increased with increasing corn-starch content.
A commercial ohmic paste (Ag-7 mass% Ni) of ∼10 m Namely, the PTCR jump of the (Ba,Sr)(Ti,Sb)O3 ceramics
thickness was spread on two opposite sides of the sintered containing corn-starch was 1–2 orders higher than that of
samples (15 mm × 12 mm). After the paste was dried at (Ba,Sr)(Ti,Sb)O3 ceramics without corn-starch. Since the
room-temperature, Ag paste of ∼10 m thickness was ap- high-temperature (150–200 ◦ C) electrical resistivity for the
plied to the ohmic paste layers. The samples were baked at samples C, D2, E and F is higher than the measuring limit
580 ◦ C for 5 min with a heating rate of 10 ◦ C min−1 in air. (108 cm) of the multi-meter used, the high resistivity
Subsequently, copper wire leads of 0.58 mm diameter were (>108 cm) cannot be measured and is not seen in this
joined to the central portion of the surfaces of baked samples figure. The enhancement in the PTCR jump is due to the
with solder (Pb-2 mass% Sn). Pastes with Ga-40 mass% In porosity and can be explained by the barrier model pro-
composite were also spread for capacitance–applied voltage posed by Heywang [8,11]. However, the room-temperature
(C–V) and complex impedance measurements. The samples
obtained in this study are summarized in Table 1.
The microstructure of the (Ba,Sr)(Ti,Sb)O3 ceramics was
analyzed by scanning electron microscopy (SEM: S-4200,
Hitachi). The average grain size and porosity of the ce-
ramics were estimated by the line-intersection method and
porosimetry, respectively. The electrical resistance was
measured with a digital multi-meter under air atmosphere.
Capacitance–voltage (C–V) characteristics were measured
with an impedance analyzer at room-temperature in a fre-
quency of 10 kHz in order to calculate the electrical poten-
tial barrier of grain boundaries and the donor concentration
of grains.
Fig. 2. Electrical resistivity as a function of temperature for the various Fig. 3. Electrical resistivity as a function of temperature for the various
(Ba,Sr)(Ti,Sb)O3 ceramics containing corn-starch of 10 wt.% sintered at (Ba,Sr)(Ti,Sb)O3 ceramics containing corn-starch of 10 wt.% sintered at
1300–1450 ◦ C for 1 h. 1350 ◦ C for 0.5–10 h.
Fig. 4. SEM micrographs of the fractured surfaces for the samples: (a) D2; (b) D3; (c) D4; (d) D6; (e) D7; (f) D8.
where C is the capacitance per unit area of a grain bound- are shown in Fig. 5. The calculated donor concentrations of
ary, C0 the capacitance at zero applied voltage, εs the di- grains and the electrical potential barriers of grain bound-
electric constant of (Ba,Sr)(Ti,Sb)O3 , V the applied voltage aries for the samples are summarized in Table 4. One can
per grain boundary and q the electronic charge. If the bar- note that the donor concentration of grains did not almost
rier model of grain boundary region is acceptable, plotting change, but the electrical barrier height of grain boundaries
the left-hand term of Eq. (1) with the applied voltage yields for the samples slightly decreased and largely increased, re-
a straight line. From Eq. (1), Nd and Φ can be calculated spectively, with increasing sintering temperature and sinter-
from the slope of the line and the intercept of the line on the ing time. A large increase in the electrical barrier height of
voltage axis, respectively. In this measurement, the ceram- grain boundaries of the samples most probably due to the
ics were assumed to be composed of uniform cubic grains oxidation of grain boundaries. The porous ceramics are ad-
with an average grain size. The capacitance–applied voltage vantage to oxidize grain boundaries [9]. This suggests that
variations at room-temperature for the samples D2 and D4 oxygen is adsorbed at the grain boundaries during sintering
J.-G. Kim et al. / Materials Chemistry and Physics 83 (2004) 217–221 221