ACA assignment

Submitted by: Mansi

1081012017
CSE-2

Multifunctional arithmetic pipeline

An  arithmetic  pipeline  divides  an  arithmetic  problem  into  various  subproblems  for 
execution  in  various  pipeline  segments.  It  is  used  for  floating-point  operations, 
multiplication,  and  various  other  computations.  The  process  or  flowchart  arithmetic 
pipeline for floating-point addition is shown in the diagram.

Floating-point addition using arithmetic pipeline :

The following sub-operations are performed in this case:

1. Compare the exponents.
2. Align the mantissa.
3. Add or subtract the mantissa.
4. Normalize the result

First of all the two exponents are compared and the larger of two exponents is
chosen as the result exponent. The difference in the exponents then decides how
many times we must shift the smaller exponent to the right. Then after shifting of
exponent, both the mantissa get aligned. Finally, the addition of both numbers takes
place followed by normalization of the result in the last segment.

Example:
Let us consider two numbers,
X=0.3214*10^3 and Y=0.4500*10^2

Explanation:
First of all the two exponents are subtracted to give 3-2=1. Thus 3 becomes the
exponent of result and the smaller exponent is shifted 1 time to the right to give
Y=0.0450*10^3
Finally, the two numbers are added to produce
Z=0.3664*10^3
As the result is already normalized the result remains the same
Superscalar pipeline
Superscalar architecture is a method of parallel computing used in many processors.
In a superscalar computer, the central processing unit (CPU) manages multiple
instruction pipelines to execute several instructions concurrently during a clock cycle.
This is achieved by feeding the different pipelines through a number of execution
units within the processor. To successfully implement a superscalar architecture, the
CPU's instruction fetching mechanism must intelligently retrieve and delegate
instructions. Otherwise, pipeline stalls may occur, resulting in execution units that are
often idle.

The superscalar technique is traditionally associated with several identifying

characteristics (within a given CPU):
● Instructions are issued from a sequential instruction stream
● The CPU dynamically checks for ​data dependencies between instructions
at run time (versus software checking at ​compile time​)
● The CPU can execute multiple instructions per clock cycle

Fig : Super pipeline Performance

To visualize how this works, consider a hospital surgical unit that consists of areas
for admittance, surgery, and recovery. Patients can move in only one direction, from
admittance to recovery, and it takes the same amount of time to go through each of
the areas. Assume the admitting area can handle three patients at a time and there
are three surgical teams, each of which can work on a single patient. Also, assume
the recovery area has an indeterminate number of beds but can accommodate only
one person per bed. When the unit is working correctly, the admitting area processes
three patients at a time, sends one to each of the teams, and immediately processes
another three patients. Even though the surgical teams can handle only one patient
at a time, because there are three of them, they will have passed their charges on by
the time the new ones arrive. The paths the three patients take are analogous to
instructions flowing through three pipelines in a CPU clock cycle. The admitting area
is like a fetching mechanism, the surgery teams are like execution units, and the
recovery room is like the registers or cache to which the units write their results.

To illustrate the kind of problems that can occur in superscalar architectures,

consider what would happen if the staff of the admitting area in the example was not
very competent. For example, if they passed a patient in need of a kidney transplant
to a surgical team before the donor’s kidney was available, the team wouldn't be able
to go to work. Suddenly, there would be a bottleneck at the admitting area because
only two surgical teams would be available for new patients. Another bottleneck
could occur if a surgical team tried to assign a patient to an already occupied bed in
the recovery area. Again, a bottleneck would appear because the team would not be
available until the bed was emptied and the team could move the current patient into
it. Stalls like this happen in processors when an execution unit tries to perform a task
that is dependent on the results of as yet uncalculated instructions. This is why it is
important that CPUs carefully manage the order in which they process instructions.