Real Time Implementation of Space Vector Pulse

Width Modulation using Arduino DUE board

Zine El Abidine Kherroubi Fethi Akel
ParisTech - Renault Foundation Development Unit of Solar Equipments
Email: znbd.kherroubi@gmail.com (UDES)/EPST-CDER
Bou-Ismail, Tipaza, Algeria.
Email: akel.fethielt@gmail.com
Mostefa Kermadi
and El Madjid Berkouk
Laboratory of Process Control
National Polytechnic School of Algiers, Algeria.
Emails: mostefa.kermadi@g.enp.edu.dz
emberkouk@yahoo.fr

Abstract—In this paper, a real-time digital implementation of
a two level space vector pule width modulation (SVPWM) algo-
rithm is carried out using ARDUINO DUE development board.
The main contribution in this work is that the implementation
was performed by using directly the internal PWM module of
the ARM cortex M3 processor of the ARDUINO DUE. By mean
of this, the computation time and the resources utilization of
the processor are greatly reduced. The other contribution is that
this implementation may reduce power losses and harmonics by
minimizing the number of switching and generating symmetrical
signals. To validate the implemented algorithm, an experimental
validation of the SVPWM for two level inverters is carried out
by using a SEMIKRON multi-function converter. The results ob-
tained from the experimentation are closer to that of simulation,
which confirms the validity of the implemented algorithm.
Index Terms—Space vector pulse width modulation (SVPWM),
Two Level DC/AC converter, Arduino DUE, Development board,
Implementation.
[6] using Arduino UNO Board. In this paper, the SVPWM is
implemented using the internal PWM module of the Arduino
DUE board. Then, the output signals of the DUE board are
used to control the SEMIKRON SEMISTACK–IGBT Voltage
Source Inverter (VSI). The experimental results are discussed
and compared to the simulation results in order to verify the
validity and performances of the developed algorithm.
II. S TRUCTURE AND M ODELING OF T HE DC/AC
C ONVERTER
In this section, a dynamic analytic model of the Voltage
Source Inverter (VSI) is developed in its original three-phase
abc frame. Then, this model is transformed into a stationary
(α, β) reference frame. The structure of the converter is shown
in Fig. 1.
ii Bras 1 Bras 2 Bras 3

I. I NTRODUCTION
The DC/AC converter has attracted and still attracts an S1 S2 S3
impressive number of research works [1]. All approaches have
ia ib ic
advantages and disadvantages, and will compromise various Vdc a b c
attributes such as harmonic generation, complexity, efficiency,
flexibility, reliability, safety, modularity and cost. At present, S4 S5 S6
Carrier Based Modulation (CBM) and space vector modulation
(SVM) have been considered as the most popular modulation
strategies for power converters [2] due to their operation at M
fixed frequency. In this case of CBM, the output voltage of
vaN vbN vcN
each leg (of three legs) of the converter is determined through
the comparison of a modulating, high frequency saw tooth
waveform and the desired sinusoidal voltage. This is done N
independently for each leg. An alternative method to Carrier Fig. 1: Two level VSI with transistors IGBT
Based Modulation, Space-Vector Modulation (SVM) has been
proposed in many publications [3],[4]. The SVM method The converter consists of three phase legs, which can
features a higher level of DC bus voltage utilization compared connect the corresponding load terminals to the positive (P)
to the conventional CBM. It also offers flexibility in its digital or negative (N) bars of the converter. Each leg includes two
implementation by providing several optimization parameters, switches that are complementary. Each IGBT and its anti-
such as enabling different approaches to place space-vectors parallel diode is modeled by single bidirectional switch Si .
and the number and arrangement of samples in each cycle. The Hence, we define three variables that depend on switches states
most widely known SVM are based on generating eight volt- of each leg.
age vectors in the Park reference frame.In our previous works, • Leg 1:
an overview of Arduino development platform is presented in Sa =0 if S1 is on and S4 is off;
[5]. Furthermore, a real time implementation is performed in Sa =1 if S1 is off and S4 is on.

978-1-5090-3474-1/16/$31.00 ©2016 IEEE 3576

 • Leg 2:
Sb =0 if S2 is on and S5 is off;
Sb =1 if S2 is off and S5 is on.
• Leg 3:
Sc =0 if S3 is on and S6 is off;
Sc =1 if S3 is off and S6 is on.
The complete model (1) of the VSI in the abc frame is given
:    
vaN 2 −1 −1  Sa 
 Vdc 
 vbN  =  −1 2 −1  
 
S  (1)
  3   b 
vcN −1 −1 2 Sc Fig. 2: Actives voltage vectors of the VSI
Then, the position of the reference vector and the sector in
Since there are three phases and each phase features two
which it is located are can be determined. A lookup table
control actions, there are 23 = 8 different switching states.
is used for determining the switching vectors. The output
Hence, a voltage space vector is defined as :
voltage vector VS is the result of the vectorial sum of the two
2 adjacent actives vectors Vα and Vβ with theirs corresponding
VS = (vaN + avbN + a2 vcN ) = |VS |.ejαs (2)
3 duty cycles dα and dβ .
Where
2π
a = ej 3

|VS | is the module, αs is the vector in the stationary frame

α, β.
By using the system (1) and the equation (2), the switching
configurations and the corresponding line-to-neutral voltage,
the module of the space vector and its angle have been reported
into Table I.

Vecteurs [Sa Sb Sc ] vaN vbN vcN |VS | αS

V1 [1 0 0] 2Vdc
3
− V3dc − V3dc 2Vdc
3
0

V2 [1 1 0] Vdc Vdc
− 2V3dc 2Vdc π Fig. 3: Voltage vector in a sector
3 3 3 3

V3 [0 1 0] − V3dc 2Vdc
3
− V3dc 2Vdc
3
2π
3
The projection of VS on Vα and Vβ gives the vectors Vx ,
Vdc Vdc Vy in such a way that :
V4 [0 1 1] − 2V3dc 3 3
2Vdc
3
π
V x = Vα d α
(
V5 [0 0 1] − V3dc − V3dc 2Vdc
3
2Vdc
3
− 4π
3
(3)
V6 [1 0 1] Vdc
3
− 2V3dc Vdc
3
2Vdc
3
− 5π
3
V y = Vβ d β
V0 [0 0 0] 0 0 0 0 -
The resolution of these equations yields :
V7 [1 1 1] 0 0 0 0 - √ Vs
dα = 3 sin(60◦ − θv ) (4)
TABLE I: Switching states of the VSI Vdc
√ Vs
A. Space Vector Pulse Width Modulation Control dβ = 3 sin(θv ) (5)
Vdc
Space Vector PWM uses specific sequences of the Switching
states of the VSI. This technique has shown good perfor- Where θv is the angle of the reference space vector voltage
mances and generates relatively fewer harmonics in the output in the sector where it located on. dα and dβ with tα = dα Te
voltage. The implementation involves sector identification, and tβ = dβ Te are respectively the times of application of
calculation of switching times and determination of switching actives vectors Vα , Vβ . t0 = Te − tα − tβ is the time of
vectors and optimum switching sequence selection for the VSI application of the zero vector V0 . The mean value of the
voltage vectors [7]. output vector for the switching period Te is defined as :
The three phases reference voltage compose the voltage VS = Vα d α + Vβ dβ .
space vector VS in the stationary frame (α, β). The VSI is The power losses in the converter may be reduced by
controlled by applying active vectors of Table I in calculated minimizing the number of switching sequences for each
times duration. The eight voltage vectors are reported in the switching period. The harmonic of the output voltage may be
(α, β) reference frame and presented by a hexagonal shape as reduced also by generating symmetrical signals, To do this,
shown in Fig. 2. the switching sequences for each sector is arranged as below

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Fig. 4: Switching sequences for sector 1
Fig. 5: Switching sequences for sector 2
Fig. 6: Switching sequences for sector 3
Fig. 7: Switching sequences for sector 4
Fig. 8: Switching sequences for sector 5
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Fig. 9: Switching sequences for sector 6
III. E XPERIMENTAL S ETUP :
To validate the developed SVPWM algorithm, the exper-
imental setup represented in Fig. 10 is used. It consists of
a two level VSI SEMIKRON SEMISTACK–IGBT, Arduino
DUE development board, R-L balanced three-phase load and
measurement devices.
Fig. 10: Materiel used for the experimental set-up
A. Arduino DUE development board :
Fig. 11 represents the Arduino DUD development board.
This latter is built around Atmel SAM3X8E ARM Cortex-M3
CPU. It is the first Arduino board based on a 32-bit ARM core
microcontroller[8]. It contains 54 digital input/output pins (of
which 12 can be used as PWM outputs), 12 analog inputs,
4 UARTs (hardware serial ports), a 84 MHz clock, an USB
OTG capable connection, 2 DAC (digital to analog), 2 TWI, a
power jack, an SPI header, a JTAG header, a reset button and
an erase button [9]. The DUE has a 32-bit ARM core that can
outperform typical 8-bit microcontroller boards.
Fig. 11: Arduino DUE development board
 In order to generate symmetrical signals, PWM built-in IV. E XPERIMENTAL R ESULTS :
module of the DUE, which is represented in Fig . 12, is con-
figured to center aligned mode[8]. Furthermore, the interrupt The switching signals delivered from the DUE PWM chan-
service routine (ISR) is used to update the duty-cycle of each nels are used to control the SEMIKRON-VSI through an
output that drives the inverter switches. interface circuit. The SEMIKRON-VSI uses IGBT switches
PWM_CCNTx
Center Aligned
CALG(PWM_CMRx) = 1
controlled by the semikron drivers SKHI22A. The interface
CPRD(PWM_CPRDx) circuit is used to adapt the 3.3V output voltage of the DUE to
CDTY(PWM_CDTYx)
the 15V input voltage of the driver. As shown in Figs. 15-20,
Period the switching signals with a sampling frequency of 4 KHz are
Output Waveform OCx
CPOL(PWM_CMRx) = 0
symmetrical thus proving the validation of the implemented
Output Waveform OCx
CPOL(PWM_CMRx) = 1 algorithm.
Counter Event
CHIDx(PWM_ISR)
CES(PWM_CMRx) = 0
Counter Event
CHIDx(PWM_ISR)
CES(PWM_CMRx) = 1

Fig. 12: Arduino DUE built-in PWM module

Fig. 13 shows the diagram of the developed algorithm. This
implementation uses the the integrated PWM hardware module
in the SAM3X8E microcontroller, and this in turns set free the
CPU, optimizes the execution time and allows increasing the
sampling frequency as high as possible.
Fig. 15: Switching signals for sector 1

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Fig. 13: The two level SVPWM diagram

Fig. 16: Switching signals for sector 2
B. SEMIKRON SEMISTACK–IGBT inverter
The power section of the experimental setup is constructed
around the two level inverter SEMISTACK-IGBT produced
by SEMIKRON manufacturer (Figure 14). This didactic de-
vice can be used to emulate many industriel applications as:
three-phase inverter, braking chopper, Buck converter, Boost
converter, single-phase inverter, single-phase and three-phase
rectifier [10].

Fig. 17: Switching signals for sector 3

Fig. 14: SEMIKRON inverter Fig. 18: Switching signals for sector 4

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 Fig. 19: Switching signals for sector 5
Fig. 20: Switching signals for sector 6
To validate the experimental results obtained by an R-L load,
the output voltages of the VSI are analyzed and compared to
that obtained from simulation.
A. R-L load :
The VSI is connected to a three-phase R-L load with R=15
Ω and L=3 mH, a DC bus of 30 V, a sampling frequency of
4 KHz and a reference voltage of 15 V. Fig. 21 shows the
spectral analysis of the line to neutral point of the load output
voltage Van .
Fig. 21: Output voltage Van with its specter
Fig. 22 shows that the output voltage is periodic with period
of 0.02 ms. It takes five different values: + 20 V (+ 2Vdc /3),
+ 10 V (+ Vdc /3), 0 V, - 10 V (- Vdc /3) and - 20 V (- 2Vdc /3).
The current ia is filtered by the inductance so that it takes
sinusoidal form of a 50 Hz.
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Fig. 22: Output voltage Van with current ia
The plot in Fig. 23 shows the normalized fundamental
curve of the output voltage ( f undamental
Vdc /2
of Van
) versus the
V
normalized reference voltage (r= Vdcref/2 ). It shown that the curve
√
is linear from 0 to r= 2 3 3 ≈ 1.15 where the saturation is appear
clearly.
Fig. 23: The normalized fundamental curve.
The plot in Fig. 24 shows the total harmonic distortion
V
(THD%) versus the normalized reference voltage ( Vdcref/2 ). It is
observed that r decreases when THD% increases. The THD%
is inversely proportional to r.
Fig. 24: The total harmonic distortion (THD%)
In the previous plots (Fig. 23 and Fig. 24), a small deviation
between the simulation and experimental results is observed.
This is due mainly to the voltage drop across the switches and
the assumption that the three-phase load is perfectly balanced,
which is not true in reality.
 B. Sampling frequency impact:
To verify the Arduino board limitation, a several imple-
mentations with different sampling frequencies are carried out.
For instance, the output voltage for 1 KHz and 10 KHz are
visualized respectively in Fig. 25 and Fig. 26.
Fig. 25: Output voltage Van for sampling frequency of 1 KHz
Fig. 26: Output voltage Van for sampling frequency of 10 KHz
Fig. 27: Fundamental of the output voltage versus sampling
frequency
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Fig. 28: Output voltage frequency versus sampling frequency
Fig. 27 shows the fundamental of the output voltage. Fig.
28 shows and the frequency of the output voltage versus the
sampling frequency. From previous results, it is observed that
the experimental results coincide with that of simulation until
a sampling frequency of 7 KHz; which is the limitation of the
implementation.
V. C ONCLUSION
In this paper, a space vector pulse-width modulation
technique has been studied and simulated under MAT-
LAB/SIMULINK environment. A real-time implementation
using Arduino DUE, the first board based on a 32-bit ARM
processor, has been presented. Then, the implemented algo-
rithm has been validated using an experimental setup built
around SEMIKRON inverter. The experimental results ob-
tained are similar to that of simulation; which confirms the
validity of the proposed algorithm. The developed algorithm
shows a good performance with a power losses and harmonics
reduction and resources optimization. The variation of the
sampling frequency shows a limitation of 7 KHz.
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