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This IGBT is ideal for many high voltage switching • Temperature Compensating SABER™ Model
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applications operating at high frequencies where low
conduction losses are essential. This device has been • Related Literature
optimized for high frequency switch mode power - TB334 “Guidelines for Soldering Surface Mount
Symbol
C
FAIRCHILD SEMICONDUCTOR IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS
4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,587,713
4,598,461 4,605,948 4,620,211 4,631,564 4,639,754 4,639,762 4,641,162 4,644,637
4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690 4,794,432 4,801,986
4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606 4,860,080 4,883,767
4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951 4,969,027
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. Pulse width limited by maximum junction temperature.
NOTES:
2. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending
at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement
of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss.
3. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. EON1 is the turn-on loss of the IGBT only. EON2
is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same TJ as the IGBT. The diode type is specified in
Figure 20.
DIE CAPABILITY
80 100
PACKAGE LIMIT 80
60
60
40
40
20
20
0
0
25 50 75 100 125 150 0 100 200 300 400 500 600 700
TC , CASE TEMPERATURE (oC) VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 1. DC COLLECTOR CURRENT vs CASE FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA
TEMPERATURE
500
tSC , SHORT CIRCUIT WITHSTAND TIME (µs)
14 450
8 300
ICE , COLLECTOR TO EMITTER CURRENT (A) VGE , GATE TO EMITTER VOLTAGE (V)
100 100
DUTY CYCLE < 0.5%, VGE = 12V
DUTY CYCLE < 0.5%, VGE = 15V
PULSE DURATION = 250µs
PULSE DURATION = 250µs
80 80
60 60
40 40
TJ = 125oC TJ = 125oC
20 20
TJ = 150oC TJ = 25oC TJ = 150oC TJ = 25oC
0 0
0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8
VCE, COLLECTOR TO EMITTER VOLTAGE (V) VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE
1400 800
RG = 3Ω, L = 500µH, VCE = 390V RG = 3Ω, L = 500µH, VCE = 390V
1200 700
600
1000 TJ = 125oC, VGE = 12V, VGE = 15V
500
800 TJ = 125oC, VGE = 12V OR 15V
400
600
300
400 200
FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT EMITTER CURRENT
22 36
RG = 3Ω, L = 500 µH, VCE = 390V RG = 3Ω, L = 500µH, VCE = 390V
td(ON)I, TURN-ON DELAY TIME (ns)
20 32
TJ = 25oC, TJ = 125oC, VGE = 12V
28 TJ = 25oC, TJ = 125oC, VGE = 12V
trI , RISE TIME (ns)
18
24
16
20
14
16
12
TJ = 25oC, TJ = 125oC, VGE = 15V 12
8 4
5 10 15 20 25 30 35 40 5 10 15 20 25 30 35 40
ICE , COLLECTOR TO EMITTER CURRENT (A) ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO
EMITTER CURRENT EMITTER CURRENT
120 80
td(OFF)I , TURN-OFF DELAY TIME (ns)
90 48
60 16
5 10 15 20 25 30 35
40 5 10 15 20 25 30 35 40
ICE , COLLECTOR TO EMITTER CURRENT (A)
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER
EMITTER CURRENT CURRENT
16
ICE, COLLECTOR TO EMITTER CURRENT (A)
240
IG(REF) = 1mA, RL = 15Ω, TJ = 25oC
120 8
TJ = 25oC
VCE = 200V
6
80
TJ = 125oC
4
40 TJ = -55oC
2
0 0
6 7 8 9 10 11
12 0 20 40 60 80 100 120 140 160
VGE, GATE TO EMITTER VOLTAGE (V)
QG , GATE CHARGE (nC)
1.8
RG = 3Ω, L = 500µH, VCE = 390V, VGE = 15V TJ = 125oC, L = 500µH, VCE = 390V, VGE = 15V
1.6 ETOTAL = EON2 + EOFF ETOTAL = EON2 + EOFF
10
1.4
1.2
ICE = 30A
1.0 ICE = 30A
0.8 1
ICE = 20A
0.6 ICE = 20A
FIGURE 15. TOTAL SWITCHING LOSS vs CASE FIGURE 16. TOTAL SWITCHING LOSS vs GATE RESISTANCE
TEMPERATURE
3 2.0
CIES ICE = 30A
1 COES 1.8
ICE = 10A
CRES
0 1.7
0 20 40 60 80 100 8 9 10 11 12 13 14 15 16
VCE, COLLECTOR TO EMITTER VOLTAGE (V) VGE, GATE TO EMITTER VOLTAGE (V)
FIGURE 17. CAPACITANCE vs COLLECTOR TO EMITTER FIGURE 18. COLLECTOR TO EMITTER ON-STATE VOLTAGE
VOLTAGE vs GATE TO EMITTER VOLTAGE
ZθJC , NORMALIZED THERMAL RESPONSE
100
0.5
0.2
0.1
10-1 t1
0.05
PD
0.02
t2
0.01
DUTY FACTOR, D = t1 / t2
10-2 PEAK TJ = (PD X ZθJC X RθJC) + TC
SINGLE PULSE
HGTG20N60A4D
DIODE TA49372
90%
VGE 10%
EON2
L = 500 µH EOFF
VCE
RG = 3Ω
DUT 90%
+ 10%
ICE
VDD = 390V td(OFF)I trI
- tfI
td(ON)I
FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT FIGURE 21. SWITCHING TEST WAVEFORMS
PC = (VCE x ICE)/2.
5. Gate Voltage Rating - Never exceed the gate-voltage
rating of VGEM. Exceeding the rated VGE can result in EON2 and EOFF are defined in the switching waveforms
permanent damage to the oxide layer in the gate region. shown in Figure 21. E ON2 is the integral of the
6. Gate Termination - The gates of these devices are
instantaneous power loss (ICE x VCE) during turn-on and
essentially capacitors. Circuits that leave the gate
EOFF is the integral of the instantaneous power loss
open-circuited or floating should be avoided. These
(ICE x VCE) during turn-off. All tail losses are included in the
conditions can result in turn-on of the device due to
calculation for EOFF; i.e., the collector current equals zero
voltage buildup on the input capacitor due to leakage
(ICE = 0).
currents or pickup.
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DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE
SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS,
SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
As used herein:
1. Life support devices or systems are devices or systems 2. A critical component is any component of a life support
which, (a) are intended for surgical implant into the body, device or system whose failure to perform can be
or (b) support or sustain life, or (c) whose failure to perform reasonably expected to cause the failure of the life support
when properly used in accordance with instructions for use device or system, or to affect its safety or effectiveness.
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Rev. I19