PD - 97213C

IRFB3207ZPbF
IRFS3207ZPbF
Applications
l High Efficiency Synchronous Rectification in
IRFSL3207ZPbF
SMPS HEXFET® Power MOSFET
l Uninterruptible Power Supply D VDSS 75V
l High Speed Power Switching
RDS(on) typ. 3.3m:
l Hard Switched and High Frequency Circuits
max. 4.1m:
G
ID (Silicon Limited) 170Ac
Benefits S ID (Package Limited) 120A
l Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness D D
l Fully Characterized Capacitance and D

Avalanche SOA
l Enhanced body diode dV/dt and dI/dt
S
Capability S S D
D G G
G
TO-220AB D2Pak TO-262
IRFB3207ZPbF IRFS3207ZPbF IRFSL3207ZPbF

G D S
Gate Drain Source
Absolute Maximum Ratings
Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 170c
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 120c A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 120
IDM Pulsed Drain Current d 670
PD @TC = 25°C Maximum Power Dissipation 300 W
Linear Derating Factor 2.0 W/°C
VGS Gate-to-Source Voltage ± 20 V
dv/dt Peak Diode Recovery f 16 V/ns
TJ Operating Junction and -55 to + 175 °C
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300
(1.6mm from case)
Mounting torque, 6-32 or M3 screw 10lbxin (1.1Nxm)

Avalanche Characteristics
EAS (Thermally limited) Single Pulse Avalanche Energy e 170 mJ
IAR Avalanche Currentd See Fig. 14, 15, 22a, 22b A
EAR Repetitive Avalanche Energy g mJ

Thermal Resistance
Symbol Parameter Typ. Max. Units
RθJC Junction-to-Case k ––– 0.50
RθCS Case-to-Sink, Flat Greased Surface , TO-220 0.50 ––– °C/W
RθJA Junction-to-Ambient, TO-220 k ––– 62
RθJA 2
Junction-to-Ambient (PCB Mount) , D Pak jk ––– 40
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IRFB/S/SL3207ZPbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 75 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.091 ––– V/°C Reference to 25°C, ID = 5mAd
RDS(on) Static Drain-to-Source On-Resistance ––– 3.3 4.1 mΩ VGS = 10V, ID = 75A g
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 150µA
RG(int) Internal Gate Resistance ––– 0.80 ––– Ω
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA VDS = 75V, VGS = 0V
––– ––– 250 VDS = 75V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 280 ––– ––– S VDS = 50V, ID = 75A
Qg Total Gate Charge ––– 120 170 nC ID = 75A
Qgs Gate-to-Source Charge ––– 27 ––– VDS = 38V
Qgd Gate-to-Drain ("Miller") Charge ––– 33 ––– VGS = 10V g
Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 87 ––– ID = 75A, VDS =0V, VGS = 10V
td(on) Turn-On Delay Time ––– 20 ––– ns VDD = 49V
tr Rise Time ––– 68 ––– ID = 75A
td(off) Turn-Off Delay Time ––– 55 ––– RG = 2.7Ω
tf Fall Time ––– 68 ––– VGS = 10V g
Ciss Input Capacitance ––– 6920 ––– pF VGS = 0V
Coss Output Capacitance ––– 600 ––– VDS = 50V
Crss Reverse Transfer Capacitance ––– 270 ––– ƒ = 1.0MHz
Coss eff. (ER) Effective Output Capacitance (Energy Related)i ––– 770 ––– VGS = 0V, VDS = 0V to 60V j
Coss eff. (TR) Effective Output Capacitance (Time Related)h ––– 960 ––– VGS = 0V, VDS = 0V to 60V h

Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 170c A MOSFET symbol D

(Body Diode) showing the

ISM Pulsed Source Current ––– ––– 670 integral reverse G

(Body Diode)di p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 75A, VGS = 0V g
trr Reverse Recovery Time ––– 36 54 ns TJ = 25°C VR = 64V,
––– 41 62 TJ = 125°C IF = 75A
Qrr Reverse Recovery Charge ––– 50 75 nC TJ = 25°C di/dt = 100A/µs g
––– 67 100 TJ = 125°C
IRRM Reverse Recovery Current ––– 2.4 ––– A TJ = 25°C
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 120A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements.
‚ Repetitive rating; pulse width limited by max. junction
temperature.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.033mH
RG = 25Ω, IAS = 102A, VGS =10V. Part not recommended for use
above this value.
„ ISD ≤ 75A, di/dt ≤ 1730A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
… Pulse width ≤ 400µs; duty cycle ≤ 2%.
† Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
‰ Rθ is measured at TJ approximately 90°C.

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 IRFB/S/SL3207ZPbF
1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
8.0V 8.0V
ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
4.8V 4.8V
BOTTOM 4.5V BOTTOM 4.5V

4.5V
100 100

4.5V

≤60µs PULSE WIDTH ≤60µs PULSE WIDTH

Tj = 25°C Tj = 175°C
10 10
0.1 1 10 100 0.1 1 10 100
V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 2.5
ID = 75A

RDS(on) , Drain-to-Source On Resistance

VGS = 10V
ID, Drain-to-Source Current (A)

100 2.0
T J = 175°C (Normalized)

T J = 25°C 1.5
10

1 1.0

VDS = 25V
≤60µs PULSE WIDTH
0.1 0.5
2 3 4 5 6 7 -60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature

100000 12.0
VGS = 0V, f = 1 MHZ
ID= 75A
Ciss = C gs + Cgd, C ds SHORTED
Crss = C gd
VGS, Gate-to-Source Voltage (V)

10.0 VDS= 60V

Coss = Cds + Cgd
VDS= 38V
C, Capacitance (pF)

10000 8.0 VDS= 15V

Ciss

6.0
Coss

1000 4.0
Crss
2.0

100 0.0
1 10 100 0 20 40 60 80 100 120 140
VDS, Drain-to-Source Voltage (V) QG, Total Gate Charge (nC)

Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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 IRFB/S/SL3207ZPbF
1000 10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)

ID, Drain-to-Source Current (A)

T J = 175°C
ISD, Reverse Drain Current (A)

1000
100

100µsec
100

10 T J = 25°C
1msec
10msec
10

DC
1
1
Tc = 25°C
Tj = 175°C
VGS = 0V Single Pulse
0.1 0.1
0.0 0.5 1.0 1.5 2.0 2.5 1 10 100
VSD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area

V(BR)DSS , Drain-to-Source Breakdown Voltage (V)

180 100
Id = 5mA
160 Limited By Package
95
140
ID, Drain Current (A)

120 90

100
85
80

60 80

40
75
20

0 70
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100120140160180
T C , Case Temperature (°C) T J , Temperature ( °C )

Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Drain-to-Source Breakdown Voltage

2.5 700
ID
EAS , Single Pulse Avalanche Energy (mJ)

600 TOP 17A

2.0 30A
500 BOTTOM 102A

1.5
Energy (µJ)

400

1.0 300

200
0.5
100

0.0 0
-10 0 10 20 30 40 50 60 70 80 25 50 75 100 125 150 175
Starting T J , Junction Temperature (°C)
VDS, Drain-to-Source Voltage (V)

Fig 11. Typical COSS Stored Energy Fig 12. Maximum Avalanche Energy vs. DrainCurrent
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 IRFB/S/SL3207ZPbF
1

D = 0.50
Thermal Response ( Z thJC )

0.1 0.20
0.10
R1 R2 R3
R1 R2 R3 Ri (°C/W) τi (sec)
0.05 τJ τC 0.1049 0.000099
τJ τ
τ1 τ2 τ3
0.02 τ1 τ2 τ3 0.2469 0.001345
0.01
0.01 0.1484 0.008469
Ci= τi/Ri
Ci τi/Ri

SINGLE PULSE Notes:

( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000
Duty Cycle =
Single Pulse
Allowed avalanche Current vs avalanche
100 pulsewidth, tav, assuming ∆Tj = 150°C and
0.01
Avalanche Current (A)

Tstart =25°C (Single Pulse)

0.05
10 0.10

1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Τj = 25°C and
Tstart = 150°C.
0.1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)

Fig 14. Typical Avalanche Current vs.Pulsewidth

200 Notes on Repetitive Avalanche Curves , Figures 14, 15:

TOP Single Pulse (For further info, see AN-1005 at www.irf.com)
180 BOTTOM 1.0% Duty Cycle 1. Avalanche failures assumption:
160 ID = 102A Purely a thermal phenomenon and failure occurs at a temperature far in
EAR , Avalanche Energy (mJ)

excess of Tjmax. This is validated for every part type.

140 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
120 4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
100
during avalanche).
80 6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
60 25°C in Figure 14, 15).
40 tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
20 ZthJC(D, tav) = Transient thermal resistance, see Figures 13)

0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25 50 75 100 125 150 175
Iav = 2DT/ [1.3·BV·Zth]
Starting T J , Junction Temperature (°C) EAS (AR) = PD (ave)·tav

Fig 15. Maximum Avalanche Energy vs. Temperature

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IRFB/S/SL3207ZPbF
4.5 20
IF = 30A
4.0
VGS(th) , Gate threshold Voltage (V)

V R = 64V

15 TJ = 25°C
3.5
TJ = 125°C
3.0

IRR (A)
2.5 10

2.0 ID = 150µA
ID = 250µA
1.5 ID = 1.0mA 5
ID = 1.0A
1.0

0.5 0
-75 -50 -25 0 25 50 75 100 125 150 175 200 0 200 400 600 800 1000
T J , Temperature ( °C ) diF /dt (A/µs)

Fig 16. Threshold Voltage vs. Temperature Fig. 17 - Typical Recovery Current vs. dif/dt

20 340
IF = 45A IF = 30A
V R = 64V V R = 64V

15 TJ = 25°C 260 TJ = 25°C

TJ = 125°C QRR (A) TJ = 125°C
IRR (A)

10 180

5 100

0 20
0 200 400 600 800 1000 0 200 400 600 800 1000
diF /dt (A/µs) diF /dt (A/µs)

Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt

340
IF = 45A
V R = 64V

260 TJ = 25°C
TJ = 125°C
QRR (A)

180

100

20
0 200 400 600 800 1000
diF /dt (A/µs)

Fig. 20 - Typical Stored Charge vs. dif/dt

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 IRFB/S/SL3207ZPbF
Driver Gate Drive
D.U.T P.W.
Period D=
P.W.
Period
+

ƒ VGS=10V *
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚
-
„ +
Recovery
Current
Body Diode Forward
Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG VDD Re-Applied

• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• ISD controlled by Duty Factor "D" - Inductor Current
Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

V(BR)DSS
15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
VGS
20V
tp 0.01Ω
I AS

Fig 21a. Unclamped Inductive Test Circuit Fig 21b. Unclamped Inductive Waveforms

LD
VDS VDS
90%
+
VDD -

D.U.T 10%
VGS VGS
Pulse Width < 1µs
Duty Factor < 0.1% td(on) tr td(off) tf

Fig 22a. Switching Time Test Circuit Fig 22b. Switching Time Waveforms
Id
Vds

Vgs

L
VCC
DUT Vgs(th)
0
1K

Qgs1 Qgs2 Qgd Qgodr

Fig 23a. Gate Charge Test Circuit Fig 23b. Gate Charge Waveform
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IRFB/S/SL3207ZPbF

TO-220AB Package Outline (Dimensions are shown in millimeters (inches))

TO-220AB Part Marking Information

(;$03/( 7+,6,6$1,5)
/27&2'(
$66(0%/('21:: ,17(51$7,21$/ 3$57180%(5
,17+($66(0%/</,1(& 5(&7,),(5
/2*2
Note: "P" in assembly line
position indicates "Lead-Free" '$7(&2'(
$66(0%/< <($5 
/27&2'( :((.
/,1(&

TO-220AB packages are not recommended for Surface Mount Application.

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 IRFB/S/SL3207ZPbF

D2Pak (TO-263AB) Package Outline

Dimensions are shown in millimeters (inches)

D2Pak (TO-263AB) Part Marking Information

7+,6,6$1,5)6:,7+ 3$57180%(5
/27&2'( ,17(51$7,21$/
$66(0%/('21:: 5(&7,),(5 )6
,17+($66(0%/</,1(/ /2*2
'$7(&2'(
$66(0%/< <($5 
/27&2'( :((.
/,1(/

25
3$57180%(5
,17(51$7,21$/
5(&7,),(5 )6
/2*2 '$7(&2'(
3 '(6,*1$7(6/($')5((
352'8&7237,21$/
$66(0%/< <($5 
/27&2'(
:((.
$ $66(0%/<6,7(&2'(

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/pkhexfet.html
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IRFB/S/SL3207ZPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)

TO-262 Part Marking Information

(;$03/( 7+,6,6$1,5//
/27&2'( 3$57180%(5
,17(51$7,21$/
$66(0%/('21::
5(&7,),(5
,17+($66(0%/</,1(& /2*2
'$7(&2'(
<($5 
$66(0%/<
/27&2'( :((.
/,1(&

25

3$57180%(5
,17(51$7,21$/
5(&7,),(5
/2*2
'$7(&2'(
3 '(6,*1$7(6/($')5((
$66(0%/<
/27&2'( 352'8&7237,21$/
<($5 
:((.
$ $66(0%/<6,7(&2'(

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/pkhexfet.html
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 IRFB/S/SL3207ZPbF

D2Pak (TO-263AB) Tape & Reel Information

Dimensions are shown in millimeters (inches)

TRR

1.60 (.063)
1.50 (.059)
1.60 (.063)
4.10 (.161) 1.50 (.059)
3.90 (.153) 0.368 (.0145)
0.342 (.0135)

FEED DIRECTION 1.85 (.073) 11.60 (.457)

1.65 (.065) 11.40 (.449) 24.30 (.957)
15.42 (.609)
23.90 (.941)
15.22 (.601)
TRL
1.75 (.069)
10.90 (.429) 1.25 (.049)
10.70 (.421) 4.72 (.136)
16.10 (.634) 4.52 (.178)
15.90 (.626)

FEED DIRECTION

13.50 (.532) 27.40 (1.079)

12.80 (.504) 23.90 (.941)

330.00 60.00 (2.362)

(14.173) MIN.
MAX.

30.40 (1.197)
NOTES : MAX.
1. COMFORMS TO EIA-418. 26.40 (1.039) 4
2. CONTROLLING DIMENSION: MILLIMETER. 24.40 (.961)
3. DIMENSION MEASURED @ HUB.
3
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/pkhexfet.html
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 04/08
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