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IRF9640, RF1S9640SM

Data Sheet July 1999 File Number 2284.2

11A, 200V, 0.500 Ohm, P-Channel Power Features


MOSFETs • 11A, 200V
These are P-Channel enhancement mode silicon-gate
• rDS(ON) = 0.500Ω
power field-effect transistors. They are advanced power
MOSFETs designed, tested, and guaranteed to withstand a • Single Pulse Avalanche Energy Rated
specified level of energy in the breakdown avalanche mode • SOA is Power Dissipation Limited
of operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching • Nanosecond Switching Speeds
converters, motor drivers, relay drivers and as drivers for • Linear Transfer Characteristics
other high-power switching devices. The high input
• High Input Impedance
impedance allows these types to be operated directly from
integrated circuits. • Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Formerly developmental type TA17522.
Components to PC Boards”
Ordering Information Symbol
PART NUMBER PACKAGE BRAND
D
IRF9640 TO-220AB IRF9640

RF1S9640SM TO-263AB RF1S9640


G
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-263AB variant in the tape and reel, i.e., RF1S9640SM9A.
S

Packaging
JEDEC TO-220AB JEDEC TO-263AB
SOURCE
DRAIN
GATE DRAIN
(FLANGE)
DRAIN (FLANGE) GATE
SOURCE

4-33 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
IRF9640, RF1S9640SM

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified


IRF9640, RF1S9640SM UNITS
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS -200 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR -200 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID -11 A
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID -7 A
Pulsed Drain Current (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM -44 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS ±20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD 125 W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W/oC
Single Pulse Avalanche Energy Rating (Note 3, 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS 790 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL 300 oC
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 260 oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to 125oC

Electrical Specifications TC = 25oC, Unless Otherwise Specified


PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS ID = -250µA, VGS = 0V (Figure 10) -200 - - V
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = -250µA -2 - -4 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 µA
VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC - - 250 µA
On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = -10V -11 - - A
Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA
Drain to Source On Resistance (Note 2) rDS(ON) ID = -6A, VGS = -10V (Figures 8, 9) - 0.350 0.500 Ω
Forward Transconductance (Note 2) gfs VDS > ID(ON) x rDS(ON)MAX, ID = -6A (Figure 12) 4 6 - S
Turn-On Delay Time td(ON) VDD = 0.5 x Rated BVDSS, ID ≈ -11A, RG = 9.1Ω - 18 22 ns
Rise Time tr VGS = -10V (Figures 17, 18) - 45 68 ns
RL = 8.4Ω for VDSS = -100V
Turn-Off Delay Time td(OFF) RL = 6.1Ω for VDSS = -75V - 75 90 ns
Fall Time tf MOSFET Switching Times are Essentially Indepen- - 29 44 ns
dent of Operating Temperature
Total Gate Charge Qg(TOT) VGS = -10V, ID = -11A, VDS = 0.8 x Rated BVDSS - 70 90 nC
(Gate to Source + Gate to Drain) Ig(REF) = -1.5mA (Figures 14, 19, 20)
Gate to Source Charge Qgs Gate Charge is Essentially Independent of - 55 - nC
Operating Temperature
Gate to Drain “Miller” Charge Qgd - 15 - nC
Input Capacitance CISS VDS = -25V, VGS = 0V, f = 1MHz - 1100 - pF
Output Capacitance COSS (Figure 11) - 375 - pF
Reverse Transfer Capacitance CRSS - 150 - pF
Internal Drain Inductance LD Measured From the Modified MOSFET - 3.5 - nH
Contact Screw on Tab To Symbol Showing the In-
Center of Die ternal Devices
Measured From the Drain Inductances - 4.5 - nH
D
Lead, 6mm (0.25in) from
Package to Center of Die LD
Internal Source Inductance LS Measured From the Source - 7.5 - nH
Lead, 6mm (0.25in) from G
Header to Source Bonding LS
Pad
S

Thermal Resistance Junction to Case RθJC - - 1.0 oC/W

Thermal Resistance Junction to Ambient RθJA Typical Socket Mount - - 62.5 oC/W

4-34
IRF9640, RF1S9640SM

Source to Drain Diode Specifications


PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET Sym- - - -11 A
bol Showing the Integral D
Pulse Source to Drain Current ISDM - - -44 A
Reverse
(Note 3)
P-N Junction Diode
G

Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = -11A, VGS = 0V (Figure 13) - - -1.5 V
Reverse Recovery Time trr TJ = 150oC, ISD = -11A, dISD/dt = 100A/µs - 300 - ns
Reverse Recovery Charge QRR TJ = 150oC, ISD = -11A, dISD/dt = 100A/µs - 1.9 - µC
NOTES:
2. Pulse Test: Pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 9.8mH, RG = 25Ω, peak IAS = 11A. See Figures 15, 16.

Typical Performance Curves Unless Otherwise Specified

1.2 -15
POWER DISSIPATION MULTIPLIER

1.0
ID, DRAIN CURRENT (A)

0.8 -10

0.6

0.4 -5

0.2

0 0
0 50 100 150 0 50 100 150
TC, CASE TEMPERATURE (oC) TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE
TRANSIENT THERMAL IMPEDANCE

0.5
ZθJC, NORMALIZED

0.2

0.1
0.1 PDM
0.05
0.02 t1
0.01 t2
NOTES:
SINGLE PULSE DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
0.01
10-5 10-4 10-3 10-2 10-1 1 10
t 1, RECTANGULAR PULSE DURATION (s)

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

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IRF9640, RF1S9640SM

Typical Performance Curves Unless Otherwise Specified (Continued)

-100 -50
VGS = -11V VGS = -10V

PULSE DURATION = 80µs


10µs -40 DUTY CYCLE = 0.5% MAX

ID, DRAIN CURRENT (A)


ID, DRAIN CURRENT (A)

100µs
-10 VGS = -9V
1ms -30
VGS = -8V
10ms
OPERATION IN THIS -20
AREA MAY BE 100ms VGS = -7V
-1
LIMITED BY rDS(ON)
DC VGS = -6V
TC = 25oC -10
TJ = MAX RATED VGS = -5V VGS = -4V
SINGLE PULSE
-0.1 0
-1 -10 -100 -1000 0 -10 -20 -30 -40 -50
VDS, DRAIN TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

-20 100
PULSE DURATION = 80µs VGS = -10V VDS ≥ I D(ON) x rDS(ON)
DUTY CYCLE = 0.5% MAX VGS = -8V
PULSE DURATION = 80µs
VGS = -9V VGS = -7V DUTY CYCLE = 0.5% MAX
-16
ID, DRAIN CURRENT (A)

ID, DRAIN CURRENT (A)

-10
-12

VGS = -6V 125oC


-8
25oC
-1.0
-55oC
-4 VGS = -5V

VGS = -4V
0 -0.1
0 -2 -4 -6 -8 -10 0 -2 -4 -6 -8 -10
VDS, DRAIN TO SOURCE VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V)

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

0.8 5µs PULSE TEST VGS = -10V, ID = -6A


2.5
NORMALIZED DRAIN TO SOURCE

PULSE DURATION = 80µs


rDS(ON), DRAIN TO SOURCE

0.7 DUTY CYCLE = 0.5% MAX


VGS = -10V
ON RESISTANCE (Ω)

2.0
0.6
ON RESISTANCE

0.5 1.5

0.4
1.0
0.3
VGS = - 20V
0.2 0.5

0 0.0
0 -15 -30 -45 -60 -75 -40 0 40 80 120 160
ID, DRAIN CURRENT (A) TJ , JUNCTION TEMPERATURE (oC)
NOTE: Heating effect of 5µs pulse is minimal.
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
VOLTAGE AND DRAIN CURRENT RESISTANCE vs JUNCTION TEMPERATURE

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IRF9640, RF1S9640SM

Typical Performance Curves Unless Otherwise Specified (Continued)

1.15 2000
ID = 250µA VGS = 0V, f = 1MHz
NORMALIZED DRAIN TO SOURCE

CISS = CGS + CGD


1.10 CRSS = CGD
1600
COSS ≈ CDS + CGD
BREAKDOWN VOLTAGE

C, CAPACITANCE (pF)
1.05
1200 CISS

1.00

800
0.95

400 COSS
0.90
CRSS

0.85 0
-80 -40 0 40 80 120 160 0 10 20 30 40 50
TJ , JUNCTION TEMPERATURE (oC) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VOLTAGE vs JUNCTION TEMPERATURE

10 -100
PULSE DURATION = 80µs PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX TJ = -55oC DUTY CYCLE = 0.5% MAX
gfs, TRANSCONDUCTANCE (S)

8
ISD, DRAIN CURRENT (A)

TJ = 25oC
TJ = 150oC
TJ = 125oC -10
6

TJ = 25oC
4
-1.0

-0.1
0 -10 -20 -30 -40 -50 -0.4 -0.6 -0.8 -1.0 -1.2 -1.4 -1.6 -1.8
I D , DRAIN CURRENT (A) VSD, SOURCE TO DRAIN VOLTAGE (V)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

0
ID = -11A
VGS, GATE TO SOURCE (V)

-5

VDS = -40V

-10 VDS = -100V


VDS = -160V

0 20 40 60 80
Qg(TOT), Total GATE CHARGE (nC)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

4-37
IRF9640, RF1S9640SM

Test Circuits and Waveforms

VDS
tAV

L 0

VARY tP TO OBTAIN
REQUIRED PEAK IAS RG
-
VDD
+

0V DUT VDD
tP IAS
VGS
VDS
IAS tP
0.01Ω
BVDSS

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

tON tOFF

td(ON) td(OFF)

tr tf
0
RL 10% 10%

DUT - VDS
VDD 90% 90%
RG
VGS + VGS
0
10%

50% 50%
PULSE WIDTH
90%

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

-VDS
CURRENT (ISOLATED
REGULATOR SUPPLY)
0

VDS
DUT
12V
0.2µF 50kΩ
BATTERY
0.3µF
Qgs VGS
D Qgd

Qg(TOT)
G DUT
VDD
0
Ig(REF) S 0
+VDS
IG CURRENT ID CURRENT
SAMPLING SAMPLING
RESISTOR RESISTOR Ig(REF)

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

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IRF9640, RF1S9640SM

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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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