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Syllabus
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LIST OF EXPERIMENTS
CYCLE-I
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1. What is an amplifier?
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Circuit Diagram
Model Graph
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Aim:
To design and construct the current series feedback amplifier and to obtain the following
parameters for with and without feedback (i) Frequency response (ii) Bandwidth (iii) Input and
Output impedance and (iv) Gain .
Design :
Vcc =12 V , Ic = 2mA , RB = 10kΩ, hfe =1 00 , hie =2kΩ
Vce = Vcc /2 = 12/2 = 6V
VE = Vcc /10 =12/10 =1.2 V
IE ≈ Ic = 2mA
RE = VE /IE = 1.cV /2mA = 600Ω
Choose , RE = 560Ω
Vcc = IcRc + Vce +IERE
Rc = (Vcc- Vce- IERE) / Ic
Rc = (12-6-1.2) / 2mA
Rc = 2.4k Ω
Choose , Rc = 2.7k Ω
VBE = VB – VE
VB = VBE +VE
VB = 0.7 + 1.2 = 1.9V
VB = Vcc ( R2/(R1+R2)) =1.9V
R2 /(R1+R2) =1.9V / 12V = 0.158
RB = 10k = R1R2/(R1+R2) =R1(0.158)
VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN
Prepared BY D.Murugesan, S.Marirajan, A.G.Muralikrishna 6
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Tabulation:
(i)Without Feedback:
Vin =
S.No. Frequency Vo Gain = 20 log 10(Vo/Vs)
(Hz) (volts) (dB)
(ii)With Feedback:
Vin =
S.No. Frequency Vo Gain = 20 log 10(Vo/Vs)
(Hz) (volts) (dB)
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R1 =63.157 kΩ
R2 /(R1+R2) = 0.158 => R2 = 11.58kΩ
Choose, R1 =56 kΩ and R2 = 12kΩ
XE = RE/10 =600/10 = 60Ω
CE =1/(2πfXE ) = 26.5μF ( for f=1kHz)
Choose Coupling capacitors C1 =C2 =0.1μF
Without Feedback:
(i) Gain Av = hfeRi / hie = (100*2.7k) /2k
Av = 135
(ii) Input Impedance Ri = (R1║R2) ║hie = 10k║2k
Ri = 1.66kΩ
(iii) Output Impedance Ro = Rc =2.7kΩ
With Feedback:
(i) Gain Avf = Av / (1+ βAv) = 135/(1+0.21*135) =4.6
Avf = 4.6
Where feedback factor β =RE /Rc =560 / 2.7k = 0.21
(ii) Input Impedance Rif = Ri(1+ βAv)
Ri = 48.72kΩ
(iv) Output Impedance Rof = Ro(1+ βAv) = 79.25kΩ
Theory:
To construct an amplifier with precise gain we must employ negative feedback
techniques. This makes the gain to be independent of β and dependent only on the characteristics
of the feedback network. Usually resistors are used to construct feedback networks. When high
input and output impedance and finite gain are required, Current series feedback is employed.
The circuit diagram shows a current series amplifier. It can be seen that a current series feed
back amplifier results in, when the emitter bypass capacitor of the common emitter amplifier is
removed.
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Effect of Feedback :
Output resistance: increases
Input resistance: increases
Gain: Trans conductance amplifier: decreases
Bandwidth: increases
Distortion: Decreases
Procedure :
1. Connect the circuit as per the circuit diagram.
2. Set Vs = 50mV using signal generator.
3. Keeping the input voltage constant vary the frequency from 10Hz to 1MHz in regular
steps and note down the corresponding output voltage.
4. Plot the Graph: gain (dB) Vs frequency.
5. Calculate the bandwidth from Graph.
6. Remove emitter resistance (RE) i.e. feedback loop and follow the same procedures
(1 to 5).
Post Lab Questions:
1. Mention the applications of a feedback amplifier.
2. Differentiate positive feedback and negative feedback.
3. Give the features of negative feedback.
4. Why Current series amplifier is a Transconductance amplifier?
5. A common – emitter circuit without By-pass capacitor is called a negative current
feedback circuit. Justify?
Result :
Thus the Current-Series feedback amplifier was constructed and the observed parameters
are tabulated below:
Amplifier Gain Input Output Impedance Bandwidth
(dB) Impedance (ohms) (Hz)
(ohms)
Without Feedback
With Feedback
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4. Give the feedback factor and open loop gain for voltage shunt amplifier.
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Circuit Diagram
Note: Add one feedback resistor between collector & base terminal of Transistor
Model Graph
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Aim:
To design and construct the voltage-shunt feedback amplifier and to obtain the following
parameters for with and without feedback (i) Frequency response (ii) Bandwidth (iii) Input and
Output impedance and (iv) Gain .
Design:
Vcc =12 V , Ic = 2mA , RB = 10kΩ, hfe =1 00 , hie =2kΩ
Vce = Vcc /2 = 12/2 = 6V
VE = Vcc /10 =12/10 =1.2 V
IE ≈ Ic = 2mA
RE = VE /IE = 1.cV /2mA = 600Ω
Choose , RE = 560Ω
Vcc = IcRc + Vce +IERE
Rc = (Vcc- Vce- IERE) / Ic
Rc = (12-6-1.2) / 2mA
Rc = 2.4k Ω
Choose , Rc = 2.7k Ω
VBE = VB – VE
VB = VBE +VE
VB = 0.7 + 1.2 = 1.9V
VB = Vcc ( R2/(R1+R2)) =1.9V
R2 /(R1+R2) =1.9V / 12V = 0.158
RB = 10k = R1R2/(R1+R2) =R1(0.158)
VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN
Prepared BY D.Murugesan, S.Marirajan, A.G.Muralikrishna 13
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Tabulation :
(i)Without Feedback :
Vin =
S.No. Frequency Vo Gain = 20 log 10(Vo/Vs)
(Hz) (volts) (dB)
(ii)With Feedback :
Vin =
S.No. Frequency Vo Gain = 20 log 10(Vo/Vs)
(Hz) (volts) (dB)
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R1 =63.157 kΩ
R2 /(R1+R2) = 0.158 => R2 = 11.58kΩ
Choose, R1 =56 kΩ and R2 = 12kΩ
XE = RE/10 =600/10 = 60Ω
CE =1/(2πfXE ) = 26.5μF ( for f=1kHz)
Choose Coupling capacitors C1 =C2 =0.1μF
Without Feedback:
(i) Gain Av = hfeRi / hie = (100*2.7k) /2k
Av = 135
(ii) Input Impedance Ri = (R1║R2) ║hie = 10k║2k
Ri = 1.66kΩ
(iii) Output Impedance Ro = Rc =2.7kΩ
With Feedback:
(i) Gain Avf = Av / (1+ βAv) = 135/(1+0.21*135) =4.6
Avf = 4.6
Where feedback factor β =RE /Rc =560 / 2.7k = 0.21
(ii) Input Impedance Rif = Ri(1+ βAv)
Ri = 48.72kΩ
(iii) Output Impedance Rof = Ro(1+ βAv) = 79.25kΩ
Theory:
To construct an amplifier with precise gain we must employ negative feedback
techniques. This makes the gain to be independent of β and dependent only on the characteristics
of the feedback network. It can be seen that a voltage shunt feed back amplifier results in, when
the feedback resistor is connected between collector and emitter of the common emitter
amplifier. The Voltage shunt feedback amplifier is employed when precise gain and low values
of input and output impedances are required.
Effect of Feedback :
Output resistance - decreases, Input resistance - decreases, Gain: Trans – resistance amplifier:
decreases, Bandwidth: increases, Distortion: Decreases
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Procedure :
1. Connect the circuit as per the circuit diagram.
2. Set Vs = 50mV using signal generator.
3. Keeping the input voltage constant vary the frequency from 10Hz to 1MHz in regular
steps and note down the corresponding output voltage.
4. Plot the Graph: gain (dB) Vs frequency.
5. Calculate the bandwidth from Graph.
6. Connect feedback resistor Rf between collector and base of the transistor i.e. feedback
loop and follow the same procedures (1 to 5).
Result :
Thus the Voltage-Shunt feedback amplifier was constructed and the observed parameters
are tabulated below:
Amplifier Gain Input Output Impedance Bandwidth
(dB) Impedance (ohms) (Hz)
(ohms)
Without Feedback
With Feedback
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1. What is an oscillator?
2. Give the difference between an amplifier and an oscillator?
3. What are the constituent parts of an oscillator?
4. State and briefly explain Barkhausen criterion for oscillation?
5. What is the frequency of oscillation for RC oscillator?
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Circuit Diagram
RC Phase Shift Oscillator
Model Graph
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Theory:
In the RC phase shift oscillator, the required phase shift of 180˚ in the feedback loop from
the output to input is obtained by using R and C components, instead of tank circuit. Here a
common emitter amplifier is used in forward path followed by three sections of RC phase
network in the reverse path with the output of the last section being returned to the input of the
amplifier. The phase shift Ф is given by each RC section Ф=tanˉ1 (1/ωRC). In practice R-value
is adjusted such that Ф becomes 60˚. If the value of R and C are chosen such that the given
frequency for the phase shift of each RC section is 60˚. Therefore at a specific frequency
the total phase shift from base to transistor’s around circuit and back to base is exactly 360˚ or
0˚. Thus the Barkhausen criterion for oscillation is satisfied.
Design:
Vcc=12v, Ic=1mA, β=100,RE = 560 Ω
Vce=Vcc/2=6V, Vre=0.1Vcc=1.2V
Vb=Vre+0.7=1.9V,
R1=Vcc/10Ib – R2
=12/(10*20μA) – 10 K =47 K Ω
R2=Vb/10Ib = .9/(10*20μA)=9.5K Ω=10 K Ω
Rc=Vcc-Vce-(IeRe/Ic)
=2.4 K Ω =2.2 KΩ
Fo=1/(2πR √ (6+4(Rc/R)))
C=1/2πRc√ (6+4(Rc/R)))
=1/(6.28*10*10^3*4 √ (6+4(2.2*10^3/10)))
=0.0015 μF
VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN
Prepared BY D.Murugesan, S.Marirajan, A.G.Muralikrishna 20
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Procedure:
Result :
Thus a sine wave with required phase shift is produced using transistor phase shift
oscillator. Thus,
Theoretical Oscillation Frequency = ____________
Practical Oscillation Frequency = ____________
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Circuit Diagram
Model Graph:
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Aim:
To design and construct the Wein bridge oscillator using BJT and to observe the sinusoidal
output waveform.
Theory:
The Wein bridge oscillator employs a balanced Wien bridge as the feedback network.
Two stages CE amplifier provides 360o phase shift to the signal. So the Wien bridge need not
introduce any phase shift to satisfy Barkausen criterion.
The attenuation of the bridges calculated to be 1/3 at resonant frequency. So the amplifier
stage should provide a gain of exactly 3 to make loop gain unity. Since the gain of two stage
amplifier is the product of individual stages, overall gain becomes very high. But the gain will be
trimmed down to 3 by negative feedback network.
The emitter resistors of both stages are kept un bypassed. This provides a current series
feedback which ensures the stability of operating point and reduction of gain. Frequency of
oscillation is given by,
f = 1/2πRC
Design:
Vcc = 12 V , Ic = 2 mA
VRC = 40 % of Vcc = 4.8 V
VRE = 10 % of Vcc = 1.2 V
VCE = 50 % of Vcc = 6 V
Design of Rc :
VRC = Ic x Rc = 4.8 V
Rc = 4.8/2mA = 2.4 kΩ
Use 2.2 kΩ
Design of RE :
VRE = IE x RE = 1.2 V
RE = 1.2/2mA = 600 Ω
Use 560 Ω
Design of R1 and R2 :
IB = IC/ hFE = 2 mA/ 100 = 20 µA.
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Assume the current through R1 = 10 IB and that through R2 = 9 IB to avoid loading potential
divider by the base current.
VR2 = Voltage across R2 = VBE + VRE = 0.7 + 1.2 = 1.9 V
VR2 = 9 IB x R2
R2 = 1.9/9 x 20 µA. = 10.6 k Ω
Use 10 kΩ.
VR1 = Voltage across R1 = Vcc - VR2 = 12 – 1.9 = 10.1 V
VR1 = 10 IB x R1
R1 = 10.1/10 x 20 µA. = 50 kΩ
Use 47 kΩ
Design of Cc:
f = 1/2πCc(R1|| R2|| hFERE) where f = 1 kHz
Substituting , we get Cc = 44 μF
Use 47 μF.
Procedure:
1. Set up the amplifier part of the oscillator and ensure that the transistor is operating as an
amplifier.
2. Connect the feedback network and observe the sine wave on CRO and measure its
amplitude and frequency.
3. Observe the output waveform.
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Review Questions :
Result:
Thus the Wien bridge oscillator was designed and the output waveform was observed.
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1. What is LC oscillator?
2. Give the difference between RC & LC oscillator.
3. How much amount of feedback obtained by the feedback loop?
4. Define damped Oscillations.
5. What are the feedback components present in LC oscillators?
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Circuit Diagram
Hartley Oscillator
Model Graph
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Aim :
To design and construct a Hartley and Colpitts oscillator.
Design:
Vcc =10V, IC =1.2mA, RB =15k Ω
VE = Vcc /10 =10V /10 =1V
IE ≈ Ic =1.2mA
VE = IERE
RE = VE /IE =1V / 1.2mA
RE = 833.33 Ω
Choose , RE =800 Ω
Vcc = IcRC +VCE + VE
Rc = ( Vcc – VCE – VE) /Ic = (10 – 5 – 1) / 1.2mA
Rc =3.3k Ω
Choose , Rc = 3.9kΩ
VBE = VB – VE
VB = VBE + VE = 0.7 +1 =1.7 V
VB = (Vcc *R2)/ (R1+R2) =15k Ω
R2/(R1+R2) = 1.7 /10 = 0.17
R1 = 15k Ω / 0.17 = 88.24k Ω
Choose , R1 = 100k Ω
R2/(R1+R2) = 0.17
R2 =18k Ω, Choose , R2 =12k Ω, Let C1 =C2 = 0.1μF
VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN
Prepared BY D.Murugesan, S.Marirajan, A.G.Muralikrishna 32
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Circuit Diagram
Model Graph
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THEORY:
If gain A of the amplifier is just sufficient to over come the attenuator β of the β -
network. We get sinusoidal oscillations. Mathematically If Aβ is for greater than 1 square wave
results in however, if Aβ is less than 1 no oscillations will occur. The Colpitts and Hartley
Oscillator is a LC oscillator. Generally, LC oscillators are designed to operate in the radio –
frequency range above 1MHz however, they can also be designed to produce oscillations in the
low audio – frequency range. But for low frequency operation, the size of the inductors to be
used become larger and larger as the frequency becomes smaller and smaller and this puts a limit
on the low frequency range of oscillators employing LC – coupling network.
Procedure :
1. Connect the circuit as per the circuit diagram.
2. For the Hartley oscillator adjust the inductance in the tank circuit to get a sinusoidal signal of
desired frequency.
3. For the Colpitts oscillator adjust the capacitance in the tank circuit to get a sinusoidal signal
of desired frequency
4. Plot the output obtained in the linear graph.
Result:
Thus Hartley & Colpitts oscillator is designed and constructed, and the output sine
wave form is observed. Then practical oscillation frequency is calculated & compared with
theoretical oscillation frequency.
Practical frequency =
Theoretical frequency =
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Circuit Diagram
Model Graph:
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Aim:
To design and construct the class-c power amplifier and to plot its frequency response.
Theory:
In a class-c amplifier, the transistor is in the active region for less than half cycle. It
means, conduction takes place for less than one half cycle. This implies that the collector current
of a class-c amplifier is highly non-sinusoidal because current flows in pulses. The load is a
tuned circuit which converts the non-sinusoidal o/p to nearly sinusoidal form. Because of the
flow of collector current less than 1800, the average collector current is much less, if hence losses
are less, so efficiency is very high.
Resonance frequency (fr)=1/2π√LC.
At resonant frequency, the inductance of parallel resonant circuit is very high and is purely
resistive. When the circuit is tuned to the resonant frequency, the voltage across R 1 is maximum
and sinusoidal. The tuned circuit helps in rejecting the harmonics that are developed in the
transistor due to class-C operation.
The class-c tuned power amplifier consists of an LC tuned circuit in the collector of Q.
R1& R2 provides the necessary biasing for Q. C1& C3 are the i/p and o/p coupling capacitors. The
Q point is kept just above the cut-off line on the dc load line. RL is provided to load the
amplifier.
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Procedure:
1. Connect the circuit as for circuit diagram
2. Calculate the theoretical resonant frequency
fr=1/2∏√LC.
3. Connect the i/p signal to the i/p of the amplifier.
4. Keep i/p voltage zero initially and adjust frequency to around resonance frequency (f r)
5. Observe the o/p waveform increase the input ac voltage until we get the maximum
distorted o/p.
6. Vary the frequency in required steps surrounding resonant frequency and note down the
corresponding o/p voltages & calculate gain.
7. Plot the graph between gain and frequency.
Observation:
Vin=____(v)
Result:
Thus single tuned amplifier is designed and constructed for the given operating
frequency and the frequency response is plotted.
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Circuit Diagram
Model Graph
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Aim :
To construct and verify the output waveforms of differentiator and integrator circuit
Components & Equipments Required
S.No COMPONENTS RANGE QUANTITY
1 Resistor 10kΩ 1
2 Capacitor 0.01μF 1
3 AFG (0-1 )MHz 1
4 CRO (0 – 30 )MHz 1
5 Bread Board 1
Theory :
The RC linear network used for wave shaping circuit based on input frequency is
divided as High Pass Filter and Low Pass Filter. The High pass filter acts as differentiator when
the time constant is very low. The Low pass filter circuit with a very high time constant acts as
an integrator.
Procedure
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Circuit Diagram
Integrator
Model Graph
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Result :
Thus the integrator and the differentiator circuit operation is verified for the
square and sine wave input.
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Circuit Diagram
Theoretical Calculation
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ASTABLE MULTIVIBRATOR
Aim: To construct an astable multivibrator circuit and observe the quasi states of the circuit.
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Model Graph
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Theory :.
An Astable Multivibrator has two quasi stable states and it keeps on switching between
these two states by itself. No external triggering signal is needed. The Astable multivibrator
cannot remain indefinitely in any one of the two states .The two amplifier stages of an Astable
multivibrator are regenerative across coupled by capacitors. The astable multivibrator may be to
generate a square wave of period, 1.38RC.
Result:
Thus the quasi states of an Astable multivibrator were observed and the
waveforms are plotted.
Theoretical Time period T =
Practical Time period T =
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Circuit Diagram
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MONOSTABLE MULTIVIBRATOR
Aim : To observe the stable state and quasi stable state voltages in monostable multivibrator.
Design :
Vcc =6V , VBB =-1.5V ,VCE(sat) = 0.3 , VBE = VBE(sat) = 0.7 , hfe =20 , IC(sat) =7mA
Assume Q2 is ON and Q1 is OFF
IC2 = IC(sat) =7mA
IC2 = (Vcc - VCE(sat))/Rc
Rc = (6 - 0.3)/ (7x10-3)
Rc = 814Ω
Choose , Rc = 800Ω
IB(sat) = IC(sat) / hfe = (7x10-3) /20
IB(sat) = 0.35mA
IB1(sat) = IB2(sat) = 0.35mA
IB2 = (Vcc - VCE(sat))/R
R = 106kΩ
Choose, R = 100kΩ
VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN
Prepared BY D.Murugesan, S.Marirajan, A.G.Muralikrishna 51
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Model Graph
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Theory
A monostable multivibrator on the other hand compared to astable, bistable has only one stable
state, the other state being quasi stable state. Normally the multivibrator is in stable state and
when an externally triggering pulse is applied, it switches from the stable to the quasi stable
state. It remains in the quasi stable state for a short duration, but automatically reverse switches
back to its original stable state without any triggering pulse. The monostable multivibrator is also
referred as ‘one shot’ or ‘uni vibrator’ since only one triggering signal is required to reverse the
original stable state. The duration of quasi stable state is termed as delay time (or) pulse width
(or) gate time.
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Procedure
1. Connect the circuit as per the circuit diagram.
2. Verify the stable states of Q1 and Q2
3. Apply the square wave of 4v p-p , 1KHz signal to the base of the transistor Q1.
4. Observe the wave forms at base of each transistor simultaneously.
5. Observe the wave forms at collectors of each transistors simultaneously.
6. Note down the parameters carefully.
7. Note down the time period and compare it with theoretical values.
8. Plot wave forms of Vb1, Vb2, and Vc1 & Vc2 with respect to time
Post lab Questions:
Result:
Thus the Stable state and quasi stable state voltages in monostable multivibrator were
observed.
Theoretical Pulse width =
Practical Pulse width =
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Circuit Diagram:
Positive Peak Clipper
Model Graph
Theoretical Calculations:
Vr = 2v, Vγ=0.6v
When the diode is forward biased Vo =Vr + Vγ = 2v+0.6v = 2.6v
When the diode is reverse biased the Vo=Vi
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Aim: To construct and study the operation of clipper and clamper circuits.
Theory:
The basic action of a clipper circuit is to remove certain portions of the waveform,
above or below certain levels as per the requirements. Thus the circuits which are used to clip off
unwanted portion of the waveform, without distorting the remaining part of the waveform are
called clipper circuits or Clippers. The half wave rectifier is the best and simplest type of clipper
circuit which clips off the positive/negative portion of the input signal. The clipper circuits are
also called limiters or slicers.
Procedure
Clipper Circuit
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Circuit Diagram:
Model Graph
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Theoretical Calculations:
Vr = 2v, Vγ=0.6v
When the diode is forward biased Vo = -(Vr + Vγ) = -(2v+0.6v )= -2.6v
When the diode is reverse biased the Vo=Vi
Procedure
Clamper Circuit
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Circuit Diagram
Positive Clamper
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Circuit Diagram
Negative Clamper
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Result:
Thus the clipper and clamper circuits are designed and the output waveforms are
observed.
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Circuit Diagram:
Model Graph:
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Aim:
To construct a free running blocking oscillator and to generate a triggering pulse of the circuit.
Theory:
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Procedure:
Result:
Thus the triggering pulse of free running blocking oscillator was observed.
Pulse width =
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Circuit Diagram
Model Graph
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BISTABLE MULTIVIBRATOR
Aim : To observe the two stable state voltages in a bistable multivibrator using transistor.
Apparatus Required:
Design :
Vcc = 5V , VBB = -5V ,hfe(min) = 20 , Ic =2mA , VCE(sat) =0.2V
IC1 = (VCC – VCE(sat) ) /Rc
Ic ≈ Ic2 = 2mA
Rc =(Vcc - VCE(sat)) / IC2
Rc= 2.4kΩ
I4 = IC2 /10 = 2mA /10
I4 = 0.2mA
I4 = (VB2 +VBB ) / R2
R2 = 0.715 / 0.2mA
R2 = 28.5 kΩ
Choose, R2 = 27 kΩ
IB(min) = Ic /hfe(min) = 2mA /20 = 0.1mA
IB2 = 1.5 *IB2(min) = 0.15mA
I3 = I4 +IB2 = 0.2mA +0.15mA =0.35mA
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I3 =(Vcc –VB2 ) / R1
R1 =9.88k kΩ
Choose, R1 =10kΩ
Time period T = 2C(R1 ║ R2)
Let C=0.1 μF , T =1.458ms
Procedure
1. Connect the circuit as per the circuit diagram.
2. Verify the stable states of Q1 and Q2
3. Apply the square wave of 4v p-p , 1KHz signal to the base of the transistor Q1.
4. Observe the wave forms at collectors of each transistors simultaneously.
5. Note down the time period and amplitude of the wave at the collector of the transistors
Q1 and Q2.
6. Plot wave forms of Vc1 and Vc2 with respect to time in a linear graph.
Result:
Thus the two Stable state voltages in bistable multivibrator were observed.
Theoretical Time period =
Practical Time period =
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PSPICE Tutorial
I. Opening PSpice
• Find PSpice on the C-Drive. Open Schematics or you can go to PSpice A_D and then
Figure 1
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Aim:
To simulate Tuned Collector Oscillator circuit using PSPICE.
Theory:
Tuned collector oscillation is a type of transistor LC oscillator where the tuned circuit
(tank) consists of a transformer and a capacitor is connected in the collector circuit of the
transistor. Tuned collector oscillator is of course the simplest and the basic type of LC
oscillators. The tuned circuit connected at the collector circuit behaves like a purely resistive
load at resonance and determines the oscillator frequency.The common applications of tuned
collector oscillator are RF oscillator circuits, mixers, frequency demodulators, signal generators
etc.
Procedure:
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Result:
Thus the given tuned collector oscillator circuit was simulated using PSPICE tool and the
output graphs were obtained.
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Model Graph:
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Aim:
To simulate Twin – T Oscillator circuit using PSPICE
Theory:
The "Twin-T" oscillator as it uses two "T" RC circuits operated in parallel. One circuit is
an R-C-R "T" which acts as a low-pass filter. The second circuit is a C-R-C "T" which operates
as a high-pass filter. Together, these circuits form a bridge which is tuned at the desired
frequency of oscillation. The signal in the C-R-C branch of the Twin-T filter is advanced, in the
R-C-R - delayed, so they may cancel one another for frequency
if ;
if it is connected as a negative feedback to an amplifier, and x>2, the amplifier becomes an
oscillator.
Procedure:
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Result:
Thus the given Twin T oscillator circuit was simulated using PSPICE tool and the output
graphs were obtained.
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Circuit Diagram
Model Graph:
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Aim:
To simulate Wein Bridge Oscillator circuit using PSPICE
Theory:
A Wien bridge oscillator is a type of electronic oscillator that generates sine waves. It can
generate a large range of frequencies. The oscillator is based on a bridge circuit originally
developed by Max Wien in 1891 for the measurement of impedances. [1] The bridge comprises
four resistors and two capacitors. The oscillator can also be viewed as a positive gain amplifier
combined with a bandpass filter that provides positive feedback. Automatic gain control,
intentional non-linearity and incidental non-linearity limit the output amplitude in various
implementations of the oscillator.The condition that R1=R2=R and C1=C2=C, the frequency of
oscillation is given by
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Thus the given Wein Bridge oscillator circuit was simulated using PSPICE tool and
output graphs were obtained.
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Circuit Diagram:
Model Graph:
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Aim:
To simulate the Double Tuned and Stagger tuned amplifier using PSPICE
Theory:
Double-Tuned Amplifier
A double-tuned amplifier is a tuned amplifier with transformer coupling between the
amplifier stages in which the inductances of both the primary and secondarywindings are tuned
separately with a capacitor across each. The scheme results in a wider bandwidth and
steeper skirts than a single tuned circuit would achieve.
There is a critical value of transformer coupling coefficient at which the frequency
response of the amplifier is maximally flat in the passband and the gain is maximum at
the resonant frequency. Designs frequently use a coupling greater than this (over-coupling) in
order to achieve an even wider bandwidth at the expense of a small loss of gain in the centre of
the passband.
Cascading multiple stages of double-tuned amplifiers results in a reduction of the
bandwidth of the overall amplifier. Two stages of double-tuned amplifier have 80% of the
bandwidth of a single stage. An alternative to double tuning that avoids this loss of bandwidth
is staggered tuning. Stagger-tuned amplifiers can be designed to a prescribed bandwidth that is
greater than the bandwidth of any single stage. However, staggered tuning requires more stages
and has lower gain than double tuning.
Stagger Tuned amplifier:
Staggered tuning is a technique used in the design of multi-stage tuned amplifiers
whereby each stage is tuned to a slightly different frequency. In comparison to synchronous
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tuning (where each stage is tuned identically) it produces a wider bandwidth at the expense of
reduced gain.
Procedure:
Result:
Thus the given Double tuned and stagger tuned amplifier circuit was simulated using
PSPICE tool and output were obtained.
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Circuit Diagram:
Model Graph:
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Aim:
To simulate the Bistable multivibrator using PSPICE
Theory:
The Bistable Multivibrator is another type of two state device similar to the Monostable
Multivibrator we looked at in the previous tutorial but the difference this time is that both states
are stable.
Procedure:
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Result:
Thus the given Bistable multivibrator circuit was simulated using PSPICE tool and output
were obtained.
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Circuit Diagram:
Model Graph:
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Aim:
To simulate the Schmitt trigger using PSPICE
Theory:
Schmitt trigger is a comparator circuit with hysteresis implemented by applying positive
feedback to the noninverting input of a comparator or differential amplifier. It is an active circuit
which converts an analog input signal to a digital output signal. The circuit is named a "trigger"
because the output retains its value until the input changes sufficiently to trigger a change. In the
non-inverting configuration, when the input is higher than a chosen threshold, the output is high.
When the input is below a different (lower) chosen threshold the output is low, and when the
input is between the two levels the output retains its value. This dual threshold action is
called hysteresis and implies that the Schmitt trigger possesses memory and can act as a bistable
multivibrator (latch or flip-flop). There is a close relation between the two kinds of circuits: a
Schmitt trigger can be converted into a latch and a latch can be converted into a Schmitt trigger.
Schmitt trigger devices are typically used in signal conditioning applications to remove noise
from signals used in digital circuits, particularly mechanical contact bounce. They are also used
in closed loop negative feedback configurations to implement relaxation oscillators, used
in function generators and switching power supplies.
Procedure:
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3. Select R,C components from the Analog.olb and edit the values as per the circuit
diagram.
4. Select Transistor Q2N2222 from bipolar.olb
5. For the DC supply select VDC from source.olb and edit the value as 12V for VCC
6. Connect the placed components by using the option Place->wire.
7. Pspice -> New Simulation profile -> name->create
8. Analysis ->Time Domain
9. Enter Run to time and maximum step size value.
10. Pspice-> Run.
11. Plot->Add plot to window, two plot windows will be displayed.
12. Keep the cursor in the first plot window , Trace-> Add Trace ->V(Q1:b),V(Q2:b).
13. Keep the cursor in the second plot window ,Trace-> Add Trace ->(Q1:c),V(Q2:c).
Result:
Thus the given Schmitt trigger circuit was simulated using PSPICE tool and output were
obtained.
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Circuit Diagram:
Model Graph:
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Result:
Thus the given Monostable multivibrator circuit was simulated using PSPICE tool and
output graphs were obtained.
VEC/ECE/LM/II/IV/EC6411 CIRCUIT & SIMULATION INTEGRATED LAB/2015-2016/EVEN
Prepared BY D.Murugesan, S.Marirajan, A.G.Muralikrishna 110
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Circuit Diagram:
Model Graph:
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Aim : To construct and verify the truth table of CMOS Inverter using PSpice .
Tools Required:
Procedure:
1. Open Orcad-> Capture CIS ->File->New-> Project
2. Place->Part , select the required components for the circuit to be designed from the
library.
3. Select MbreakP and MbreakN from breakout.lib.
4. For the input Vin, select VPULSE from source.lib. Set V1=5v, V2=0v, TD=0,
TR=0,TF=0,PW=0.5u, PER= 1u.
5. Connect the placed components by using the option Place->wire.
6. Pspice -> New Simulation profile -> name->create
7. Analysis ->Time Domain
8. Enter ,Run to time and maximum step size value.
9. Pspice-> Run.
10. Create three plot windows , Plot->Add plot to window.
11. Keep the cursor in the first plot window , Trace-> Add Trace ->select input Vin.
12. Keep the cursor in the second plot window ,Trace-> Add Trace ->select output (drain of
M2)
Result:
Thus the CMOS Inverter was constructed using PSpice and the truth table was verified.
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Aim : To simulate a differential amplifier in common mode and in difference mode using
PSpice and verify the output waveforms.
Tools Required :
Procedure:
1. Open Orcad-> Capture CIS ->File->New-> Project
2. Place->Part , select the required components for the circuit to be designed from the
library.
3. Select R,C components from the Analog.olb and edit the values as per the circuit
diagram.
4. Select Transistor Q2N2222 from bipolar.olb
5. For the DC supply select VDC from source.olb and edit the value as 6V for VCC and -6V
for VEE.
6. For the Analog input select VSIN from source.olb , for the common mode edit the value
for V1 as VOFF =0 , VAMPL = 10mV , FREQ =1k and for V2 as OFF =0 , VAMPL =
10mV , FREQ =1k.
7. For the Analog input select VSIN from source.olb , for the difference mode edit the value
for V1 as VOFF =0 , VAMPL = 10mV , FREQ =1k and for V2 as OFF =0 , VAMPL = 0
, FREQ =1k.
8. Connect the placed components by using the option Place->wire.
9. Place the differential voltage probe across the collectors of the two transistors.
10. Pspice -> New Simulation profile -> name->create
11. Analysis ->Time Domain
12. Enter Run to time and maximum step size value.
13. Pspice-> Run.
14. View the output for differential mode and common mode.
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