PackardBell EasyNote ML65 QUANTA PB5, PB6

1 2 3 4 5 6 7 8
VCC_CORE
http://hobi-elektronika.net
PB5/6 Block Diagram 01
CLOCK GENERATOR
+1.5V
Intel CK505
PENRYN ICS9LPR363
Page 2
A
+1.05V uFCPGA A
CRT
Page 20
Page 3,4
+1.25V
INT MIC LCD PANEL FSB(667/800MHZ) CRT
Page 19 Page 19
HDMI
VGA CONNECTOR
+1.8VSUS LCD/LED
+1.8V CRT Page 18
PCI-E 16X Lan
NB
+3VPCU CANTIGA
+3V_S5 LVDS DDRII-SODIMM1
533/ 667 MHZ DDR II
+3VSUS SATA
DDRII-SODIMM2
SATA - HDD Page 5,7,8,9,10,11 Page 16, 17
+3V
Page 22
+5VPCU
+5V_S5 SATA
+5V SATA - ODD DMI(x2/x4) MINI CARD-4
+SMDDR_VTERM Page 22 ROBSON
(FTB) Page 25
B +SMDDR_VREF SATA B
eSATA PCIE-4
Page 22 PCI-Express
PCIE-6 PCIE-3 PCIE-1 PCIE-5
MINI CARD-1 MINI CARD-2 LAN

NEW CARD
WLAN UMA TV/ROBSON RTL8102
USB-5 USB 2.0 SB Page 25 Page 25 Page 27 Page 26
WLAN
Page 25 ICH9M
USB-3 PCI Bus
Camera
Page 19
USB-2
Azalia
Bluetooth Page 12, 13, 14, 15
Page 26
OZ129
Page 24
USB-9
New Card LPC 32.768KHz
Page 27
4 IN 1 1394
C USB-7 C
M/B USB2 Page 24 Page 24
Page 27
USB-6 ITE8512 VGA

M/B USB
Page 27
Board
Page 28
USB-8
TV/ROBSON
Page 25 USB
Board
Daughter
Touch Pad Board
Port-A
HP T/P Key FLASH Board
FAN CIR
Page 30 Board Board ROM
Port-B AUDIO CODEC Page 3 Page 26 Page 26 Page 28 Page 28
ALC268/ALC272
Function
MIC JACK Page 29 Board
Page 30
D D
INT SPK SPK AMP

Page 29 Page 29
PROJECT : PB5/6
Quanta Computer Inc.
Size Document Number Rev
Block Diagram 1A
Date: Friday, March 21, 2008 Sheet 1 of 35

1 2 3 4 5 6 7 8
5 4 3 2 1
Clock Generator
http://hobi-elektronika.net VCCP_VDD
PBY160808T-301Y-N_6 L50 VCCP

02
VCC3 L41 PBY160808T-301Y-N_6 C507 0.1u/10V_4 C553 C544 C540 C543 C528 C532 C537 C545
*10u/10V_6 10u/10V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4

C535
C88 0.1u/10V_4
10u/10V_6
C521 10u/10V_6
D C84 0.1u/10V_4 U8 D
VDD_CK_VDD_PCI 2 48
C542 0.1u/10V_4 VDD_CK_VDD_48 VDD_PCI IO_VOUT
9 VDD_48
VDD_CK_VDD_PCI 16 64 CGCLK_SMB
VDD_CK_VDD_REF VDD_PLL3 SCLK CGDAT_SMB
61 VDD_REF SDA 63 BOM Option Table
C515 0.1u/10V_4 VDD_CK_VDD_PCI
CK505 PM_STPPCI#
39 VDD_SRC SRC5/PCI_STOP# 38 PM_STPPCI# 14 Reference Description
VDD_CK_VDD_CPU 55 37 PM_STPCPU# PM_STPCPU# 14 To SB
VDD_CPU SRC5#/CPU_STOP#
CLK_CPU_BCLK_R RP14
IV@ INT VGA
VCCP_VDD 12 VDD_96_IO CPU0 54 1 2 0X2 CLK_CPU_BCLK 3
C93 0.1u/10V_4 20 53 CLK_CPU_BCLK#_R 3 4 To CPU
VDD_PLL3_IO CPU0# CLK_CPU_BCLK# 3 EV@ EXT VGA
26 VDD_SRC_IO_1
45 51 CLK_MCH_BCLK_R RP12 1 2 0X2
VDD_SRC_IO_3 CPU1 CLK_MCH_BCLK 5
36 50 CLK_MCH_BCLK#_R 3 4 To NB
VDD_SRC_IO_2 CPU1# CLK_MCH_BCLK# 5
49 VDD_CPU_IO
47 CLK_PCIE_MINI3_R RP10 1 2 IV@0X2
SRC8/ITP CLK_PCIE_MINI3 24
46 CLK_PCIE_MINI3#_R 3 4 To ROBSON
SRC8#/ITP# CLK_PCIE_MINI3# 24
PCLK_DEBUG R118 56 PCLK_DEBUG_R 1 35 CLK_PCIE_3GPLL#_R RP3 1 2 0X2
24 PCLK_DEBUG PCI0/CR#_A SRC10# CLK_PCIE_3GPLL# 6
34 CLK_PCIE_3GPLL_R 3 4 To NB
SRC10 CLK_PCIE_3GPLL 6
T36 R114 33_4 PCLK_PCM_R 3 PCI1/CR#_B CLK_MCH_OE#_R R74 475/F_4
SRC11/CR#_H 33 CLK_MCH_OE# 6
PCLK_OZ129 R110 33_4 PCLK_OZ129_R 4 32 NEW_CLKREQ#_R R73 475/F_4 NEW_CLKREQ# 24
25 PCLK_OZ129 PCI2/TME SRC11#/CR#_G
C101 33p/50V_4 CG_XIN R109 10K_4 PCI_CLK_SIO_R 5 30 CLK_PCIE_NEW_R RP2 3 4 0X2
PCI3 SRC9 CLK_PCIE_NEW 24
31 CLK_PCIE_NEW_R# 1 2 To New Card
SRC9# CLK_PCIE_NEW# 24
2
Y2 PCLK_EC R107 33_4 PCLK_EC_R 6 VCC3

28 PCLK_EC PCI4/SRC5_EN
CL=20p 44 CLK_PCIE_MINI2_R RP8 1 2 0X2
SRC7/CR#_F CLK_PCIE_MINI2 24
14.318MHZ PCLK_ICH R101 33_4 PCLK_ICH_R 7 43 CLK_PCIE_MINI2#_R 3 4 To TV
13 PCLK_ICH PCIF5/ITP_EN SRC7#/CR#_E CLK_PCIE_MINI2# 24
PM_STPPCI# R76 2.2K_4
1
C100 33p/50V_4 CG_XOUT CG_XIN 60 41 CLK_PCIE_MINI_R RP6 1 2 0X2

XTAL_IN SRC6 CLK_PCIE_MINI 24
40 CLK_PCIE_MINI#_R 3 4 To WLAN
SRC6# CLK_PCIE_MINI# 24
CG_XOUT 59 PM_STPCPU# R75 2.2K_4
XTAL_OUT CLK_PCIE_LAN_R RP4
SRC4 27 3 4 0X2 CLK_PCIE_LAN 23
R86 33_4 FSA 10 28 CLK_PCIE_LAN#_R 1 2 To LAN
14 CLKUSB_48 USB_48/FSA SRC4# CLK_PCIE_LAN# 23
NEW_CLKREQ#_R R560 10K_4
C CLK_BSEL0 R91 2.2K_4 FSB CLK_PCIE_ICH_R RP5 C
57 FSB/TEST/MODE SRC3/CR#_C 24 3 4 0X2 CLK_PCIE_ICH 13
25 CLK_PCIE_ICH#_R 1 2 To SB
SRC3#/CR#_D CLK_PCIE_ICH# 13
FSC 62
CLK_BSEL1 REF0/FSC/TESTSEL CLK_PCIE_SATA_R RP7
SRC2/SATA 21 3 4 0X2 CLK_PCIE_SATA 12
8 22 CLK_PCIE_SATA#_R 1 2 To SB
VSS_PCI SRC2#/SATA# CLK_PCIE_SATA# 12
11 VSS_48
CLK_BSEL2 R111 10K_4 15 17 DREFSSCLK_R
VSS_IO SRC1/SE1 DREFSSCLK#_R
19 VSS_PLL3 SRC1#/SE2 18
R108 33_4 52
14 14M_ICH VSS_CPU
23 13 DREFCLK_R RP13 3 4 0
VSS_SRC1 SRC0/DOT96 DREFCLK 6
29 14 DREFCLK#_R 1 2 To NB
VSS_SRC2 SRC0#/DOT96# DREFCLK# 6
42 VSS_SRC3
58 VSS_REF CKPWRGD/PWRDWN# 56 CK_PWRGD 14
ICS9LPRS365BGLFT
ICS9LPRS365 RTM875T-606 R520 10K_4 PCLK_OZ129 <MAIN>:ICS9LPRS365BGLFT QCI:ALPRS365K13

VCC3
(ALPRS365K13) (AL000875K06) PULL HIGH PULL DOWN
<SECOND>:SLG8SP512TTR: QCI:AL8SP512K05
PCI2/TME R113 *10K_4
Pin 4 PCI2/TME internal PD NO OVERCLOCKING (default) NORMAL RUN
PCI-3/SRC5_EN PIN37/38 IS
Pin 5 PCI-3 internal PD PIN37/38 IS SRC5 PCI_STOP/CPU_STOP (default) R521 *10K_4 PCLK_EC DREFSSCLK_R RP9 1 2 IV@0X2
VCC3 DREFSSCLK 6
HIGH 27MHz DREFSSCLK#_R 3 4 To NB
PCI-4/27M_SEL PIN 17/18 LOW SRC DREFSSCLK# 6
Pin 6 PCI-4/27M_SEL internal PD PIN 17/18 IS 27MHz IS SRC/DOT (default) R106 10K_4
3 4 CLK_MXM 20
PCIF-5/ITP_EN 1 2 To VGA Card
PCIF-5/ITP_EN internal PD RP11 EV@0X2 CLK_MXM# 20
Pin 7 PIN 46/47 IS CPUITP PIN 46/47 IS SRC8 (default)
VCC3 R526 *10K_4 PCLK_ICH
R100 10K_4
B B
VCC3
FREQ. SEL TABLE

Clock Gen I2C Q7 R127
2
R87 0_4 CLK_BSEL0 RHU002N06 10K_4
3 CPU_BSEL0 MCH_BSEL0 6
3 1 CGDAT_SMB PCLK_OZ129 C506 10p
14,24 SDATA CGDAT_SMB 17
VCCP R88 *56_4
PCLK_EC C508 10p

BSEL Frequency Select Table R89 1K_4 VCC3
FSC FSB FSA Frequency CLKUSB_48 C87 10p
0 0 0 266Mhz Q8 R134 14M_ICH C95 10p

R95 0_4 CLK_BSEL1
2
RHU002N06 10K_4
0 0 1 133Mhz PCLK_ICH C512 10p
R93 *0_4 3 1 CGCLK_SMB
14,24 SCLK CGCLK_SMB 17
A PCLK_DEBUG C505 22p A
0 1 1 166Mhz
VCCP R94 1K_4
0 1 0 200Mhz
1 1 0 400Mhz R112 0_4 CLK_BSEL2

1 1 1 Reserved R116 *0_4 PROJECT : PB5/6

1 0 1 100Mhz VCCP R117 1K_4 Quanta Computer Inc.
1 0 0 333Mhz CLK GEN 1A
Date: Friday, May 30, 2008 Sheet 2 of 35

5 4 3 2 1
5 4 3 2 1
5 H_A#[3..16]
U29A
http://hobi-elektronika.net 03
H_A#3 J4 H1 H_ADS# U29B
A[3]# ADS# H_ADS# 5
ADDR GROUP_0
H_A#4 L5 E2 H_BNR#
A[4]# BNR# H_BNR# 5 5 H_D#[0..15] H_D#[32..47] 5
H_A#5 L4 G5 H_BPRI# H_D#0 E22 Y22 H_D#32
A[5]# BPRI# H_BPRI# 5 D[0]# D[32]#
H_A#6 K5 H_D#1 F24 AB24 H_D#33
H_A#7 A[6]# H_DEFER# H_D#2 D[1]# D[33]# H_D#34
M3 A[7]# DEFER# H5 H_DEFER# 5 E26 D[2]# D[34]# V24
DATA GRP 0
H_A#8 N2 F21 H_DRDY# H_D#3 G22 V26 H_D#35
A[8]# DRDY# H_DRDY# 5 D[3]# D[35]#
DATA GRP 2
H_A#9 J1 E1 H_DBSY# H_D#4 F23 V23 H_D#36
A[9]# DBSY# H_DBSY# 5 D[4]# D[36]#
H_A#10 N3 H_D#5 G25 T22 H_D#37
H_A#11 A[10]# H_BREQ# ZS2 Default no use this function H_D#6 D[5]# D[37]# H_D#38
P5 A[11]# BR0# F1 H_BREQ# 5 E25 D[6]# D[38]# U25
H_A#12 P2 H_D#7 E23 U23 H_D#39
A[12]# D[7]# D[39]#
CONTROL
H_A#13 L2 D20 H_IERR# R67 56_4 VCCP H_D#8 K24 Y25 H_D#40
H_A#14 A[13]# IERR# H_INIT# H_D#9 D[8]# D[40]# H_D#41
D
P4 A[14]# INIT# B3 H_INIT# 12 G24 D[9]# D[41]# W22 D
H_A#15 P1 H_D#10 J24 Y23 H_D#42
H_A#16 A[15]# H_LOCK# H_D#11 D[10]# D[42]# H_D#43
R1 A[16]# LOCK# H4 H_LOCK# 5 J23 D[11]# D[43]# W24
H_ADSTB#0 M1 H_D#12 H22 W25 H_D#44
5 H_ADSTB#0 ADSTB[0]# D[12]# D[44]#
C1 H_CPURST# H_D#13 F26 AA23 H_D#45
5 H_REQ#[0..4] RESET# H_CPURST# 5 D[13]# D[45]#
H_REQ#0 K3 F3 H_RS#0 H_D#14 K22 AA24 H_D#46 BOM Option Table
REQ[0]# RS[0]# H_RS#0 5 D[14]# D[46]#
H_REQ#1 H2 F4 H_RS#1 H_D#15 H23 AB25 H_D#47
REQ[1]# RS[1]# H_RS#1 5 D[15]# D[47]#
H_REQ#2 K2 G3 H_RS#2 H_DSTBN#0 J26 Y26 H_DSTBN#2
H_REQ#3 REQ[2]# RS[2]# H_TRDY#
H_RS#2 5 5 H_DSTBN#0
H_DSTBP#0 DSTBN[0]# DSTBN[2]# H_DSTBP#2
H_DSTBN#2 5 Reference Description
J3 REQ[3]# TRDY# G2 H_TRDY# 5 5 H_DSTBP#0 H26 DSTBP[0]# DSTBP[2]# AA26 H_DSTBP#2 5
H_REQ#4 L1 H_DINV#0 H25 U22 H_DINV#2
REQ[4]# H_HIT#
5 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 5 N/A N/A
5 H_A#[17..35] HIT# G6 H_HIT# 5
H_A#17 Y2 E4 H_HITM#
A[17]# HITM# H_HITM# 5 5 H_D#[16..31] H_D#[48..63] 5
H_A#18 U5 H_D#16 N22 AE24 H_D#48
H_A#19 A[18]# XDP_BPM#0 T11 H_D#17 D[16]# D[48]# H_D#49
R3 A[19]# BPM[0]# AD4 K25 D[17]# D[49]# AD24
ADDR GROUP_1
H_A#20 W6 AD3 XDP_BPM#1 T7 H_D#18 P26 AA21 H_D#50
H_A#21 A[20]# BPM[1]# XDP_BPM#2 T6 H_D#19 D[18]# D[50]# H_D#51
U4 A[21]# BPM[2]# AD1 R23 D[19]# D[51]# AB22
H_A#22 Y5 AC4 XDP_BPM#3 T9 Connect it to CPU DBR# is for ITP debug port H_D#20 L23 AB21 H_D#52
A[22]# BPM[3]# D[20]# D[52]#
DATA GRP 1
XDP/ITP SIGNALS
H_A#23 U1 AC2 XDP_BPM#4 T10 or CPU interposer (like ICE) to reset the system H_D#21 M24 AC26 H_D#53
A[23]# PRDY# D[21]# D[53]#
DATA GRP 3
H_A#24 R4 AC1 XDP_BPM#5 T5 H_D#22 L22 AD20 H_D#54
H_A#25 A[24]# PREQ# XDP_TCK H_D#23 D[22]# D[54]# H_D#55
T5 A[25]# TCK AC5 M23 D[23]# D[55]# AE22
H_A#26 T3 AA6 XDP_TDI H_D#24 P25 AF23 H_D#56
H_A#27 A[26]# TDI XDP_TDO H_D#25 D[24]# D[56]# H_D#57
W2 A[27]# TDO AB3 P23 D[25]# D[57]# AC25
H_A#28 W5 AB5 XDP_TMS H_D#26 P22 AE21 H_D#58
H_A#29 A[28]# TMS XDP_TRST# H_D#27 D[26]# D[58]# H_D#59
Y4 A[29]# TRST# AB6 T24 D[27]# D[59]# AD21
H_A#30 U2 C20 XDP_DBRESET# R68 0_4 SYS_RST# VCCP H_D#28 R24 AC22 H_D#60
A[30]# DBR# SYS_RST# 14 D[28]# D[60]#
H_A#31 V4 H_D#29 L25 AD23 H_D#61
H_A#32 A[31]# H_D#30 D[29]# D[61]# H_D#62
W3 A[32]# T25 D[30]# D[62]# AF22
H_A#33 AA4 THERMAL H_D#31 N25 AC23 H_D#63
H_A#34 A[33]# R40 H_DSTBN#1 D[31]# D[63]# H_DSTBN#3
AB2 A[34]# 5 H_DSTBN#1 L26 DSTBN[1]# DSTBN[3]# AE25 H_DSTBN#3 5
H_A#35 AA3 D21 H_PROCHOT#_D 1K/F_4 H_DSTBP#1 M26 AF24 H_DSTBP#3
A[35]# PROCHOT# 5 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 5
H_ADSTB#1 V1 A24 H_THERMDA H_DINV#1 N24 AC20 H_DINV#3
5 H_ADSTB#1 ADSTB[1]# THERMDA 5 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 5
B25 H_THERMDC
H_A20M# THERMDC H_GTLREF COMP0 R48 27.4/F_6
12 H_A20M# A6 A20M# AD26 GTLREF COMP[0] R26 Layout note:
ICH
H_FERR# A5 C7 CPU_PM_THRMTRIP# CPU_TEST1 C23 MISC U26 COMP1 R47 54.9/F_4 comp0,2: Zo=27.4ohm, L<0.5"
12 H_FERR# FERR# THERMTRIP# T25 TEST1 COMP[1]
H_IGNNE# C4 CPU_TEST2 D25 AA1 COMP2 R43 27.4/F_6
12 H_IGNNE# IGNNE# T23 TEST2 COMP[2] comp1,3: Zo=55ohm, L<0.5"
R39 CPU_TEST3 C24 Y1 COMP3 R44 54.9/F_4
T22 TEST3 COMP[3]
C R578 0_4 D5 2K/F_4 CPU_TEST4 AF26 C
12 H_STPCLK# STPCLK# T12 TEST4
H_INTR C6 H CLK CPU_TEST5 AF1 E5 ICH_DPRSTP#
12 H_INTR LINT0 T8 TEST5 DPRSTP# ICH_DPRSTP# 6,12,31
H_NMI B4 A22 CLK_CPU_BCLK CPU_TEST6 A26 B5 H_DPSLP#
12 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 2 T24 TEST6 DPSLP# H_DPSLP# 12
H_SMI# A3 A21 CLK_CPU_BCLK# CPU_TEST7 C3 D24 H_DPWR#
12 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 2 T21 TEST7 DPWR# H_DPWR# 5
CPU_BSEL0 B22 D6 H_PWRGD
2 CPU_BSEL0 BSEL[0] PWRGOOD H_PWRGD 12
T19 M4 CPU_BSEL1 B23 D7 H_CPUSLP#
RSVD[01] 2 CPU_BSEL1 BSEL[1] SLP# H_CPUSLP# 5
T18 N5 Layout note: CPU_BSEL2 C21 AE6 PSI#
RSVD[02] 2 CPU_BSEL2 BSEL[2] PSI# PSI# 31
T15 T2 H_GTLREF: Zo=55 ohm,L<0.5"
T13 RSVD[03] Penryn_1p0
V3 2/3*VCCP+-2%
RSVD[04]
RESERVED
T158 B2
T159 RSVD[05]
D2 RSVD[06]
T26 D22 Layout note:
T160 RSVD[07]
D3 ICH_DPRSTP# , Daisy Chain
T20 RSVD[08]
F6 (SB>PowerIC>NB>CPU)
RSVD[09]
Penryn_1p0
Thermal Trip VCCP VCCP

XDP CPU Thermal monitor
3
VCCP
VCC3 VCC3 VCC3
2 Q29 R580 D31 Reserve 1K for XDP function VCCP

6,14,31 DELAY_VR_PWRGOOD
1
R581 R561 200_6 LM86VCC C554 0.1u/10V_4

FDV301N *10K_4 *BAS316 XDP_TDO R32 *51/F_4
2
*51/F_4 XDP_TDI R33 56_4
B B
XDP_TMS R34 54.9/F_4 Q22 R562 R568
1
20,28,35 MBCLK 3 1
2
XDP_TCK R36 56_4 10K_4 10K_4

VCCP H_CPURST# XDP_TRST# R35 56_4 RHU002N06 U27
C562 7 4
SDAT OVT
2
*1u/16V_6 2ND_MBCLK# 8 H_THERMDA
SCLK
ALERT 6
R572 20,28,35 MBDATA 3 1 2ND_MBDATA# 1
Q26 VCC C555
DXP 2
2
56.2/F_4 MMBT3904 Q24 RHU002N06

5 3 2200p/50V_4
CPU_PM_THRMTRIP# SYS_SHDN# GND DXN
1 3 SYS_SHDN# 30
G780 H_THERMDC
NS LM95245 PU this pin ADDRESS: 98H
R571 *0_4 PM_THRMTRIP# VCC3 R563 *10K_4
PM_THRMTRIP# 6,12
14,29 THERM_ALERT# R565 0_4 THERM_ALERT#_R

No use Thermal trip CPU side still PU 56ohm.
Use Thermal trip can share PU at SB side
VCC3 R566 10K_4
VCC3 R569 330_4
Processor hot
2
3 1 THER_SHD#
30 SYS_SHDN#
VCCP Q23 MMBT3904
No use PROCHOT CPU side still PU 56ohm.

Use PROCHOT to optional receiver CPU side PU
R71 68ohm and through isolat 2.2K ohm to receiver
A side A
56_4
H_PROCHOT#_D R70 *0_4

H_PROCHOT# 31
PROJECT : PB5/6
CPU(1/2) HOST BUS 1A

5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net BOM Option Table

Reference Description 04
N/A N/A
Need NC 20PCS 10u before A1 BOM released(A0 all stuff)
Place these parts reference Layout Note:

D to Intel demo board. VCC_CORE D
Inside CPU center cavity in 2 rows
U29D
A4 P6 VCC_CORE VCC_CORE
VSS[001] VSS[082]
A8 VSS[002] VSS[083] P21
A11 P24 U29C
VSS[003] VSS[084] VCCP_CPU
A14 VSS[004] VSS[085] R2 A7 VCC[001] VCC[068] AB20
A16 VSS[005] VSS[086] R5 A9 VCC[002] VCC[069] AB7
A19 R22 C586 C588 C35 C591 C27 C573 C599 C38 C59 A10 AC7
VSS[006] VSS[087] VCC[003] VCC[070]
A23 VSS[007] VSS[088] R25 A12 VCC[004] VCC[071] AC9
AF2 T1 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 A13 AC12
VSS[008] VSS[089] VCC[005] VCC[072] C52 C41 C48
B6 VSS[009] VSS[090] T4 A15 VCC[006] VCC[073] AC13
B8 VSS[010] VSS[091] T23 A17 VCC[007] VCC[074] AC15
B11 T26 A18 AC17 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
VSS[011] VSS[092] VCC_CORE VCC[008] VCC[075]
B13 VSS[012] VSS[093] U3 A20 VCC[009] VCC[076] AC18
B16 VSS[013] VSS[094] U6 B7 VCC[010] VCC[077] AD7
B24 VSS[016] VSS[097] V2 B12 VCC[013] VCC[080] AD12
C5 V5 B14 AD14 VCCP_CPU
VSS[017] VSS[098] VCC[014] VCC[081]
C8 VSS[018] VSS[099] V22 B15 VCC[015] VCC[082] AD15
C11 V25 C593 C46 C54 C39 C594 C597 C45 C31 C26 B17 AD17
VSS[019] VSS[100] VCC[016] VCC[083]
C14 VSS[020] VSS[101] W1 B18 VCC[017] VCC[084] AD18
C16 W4 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 B20 AE9
VSS[021] VSS[102] VCC[018] VCC[085] C34 C57 C36
C19 VSS[022] VSS[103] W23 C9 VCC[019] VCC[086] AE10
C2 VSS[023] VSS[104] W26 C10 VCC[020] VCC[087] AE12
C22 Y3 C12 AE13 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
VSS[024] VSS[105] VCC_CORE VCC[021] VCC[088]
C25 VSS[025] VSS[106] Y6 C13 VCC[022] VCC[089] AE15
D1 VSS[026] VSS[107] Y21 C15 VCC[023] VCC[090] AE17
D4 VSS[027] VSS[108] Y24 C17 VCC[024] VCC[091] AE18
D8 VSS[028] VSS[109] AA2 C18 VCC[025] VCC[092] AE20
C
D11 VSS[029] VSS[110] AA5 D9 VCC[026] VCC[093] AF9 C
D13 VSS[030] VSS[111] AA8 D10 VCC[027] VCC[094] AF10
D19 AA14 C658 C589 C598 C32 C29 C574 C61 C28 C37 C595 D14 AF14
VSS[032] VSS[113] VCC[029] VCC[096]
D26 AA19 0.1u 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 D17 AF17 VCCP_CPU VCCP
VSS[034] VSS[115] VCC[031] VCC[098]
E3 VSS[035] VSS[116] AA22 D18 VCC[032] VCC[099] AF18
E6 VSS[036] VSS[117] AA25 E7 VCC[033] VCC[100] AF20
E8 VSS[037] VSS[118] AB1 E9 VCC[034]
E11 AB4 VCC_CORE E10 G21 CPU_G21 R51 0_4 R564 0_1206
VSS[038] VSS[119] VCC[035] VCCP[01]
E14 VSS[039] VSS[120] AB8 E12 VCC[036] VCCP[02] V6
E16 VSS[040] VSS[121] AB11 E13 VCC[037] VCCP[03] J6
E19 AB13 E15 K6 + C556
VSS[041] VSS[122] VCC[038] VCCP[04] VCCP Bulk CAP
E21 VSS[042] VSS[123] AB16 E17 VCC[039] VCCP[05] M6
E24 AB19 E18 J21 270u/2V_7343 close to Pin
VSS[043] VSS[124] VCC[040] VCCP[06]
F5 VSS[044] VSS[125] AB23 E20 VCC[041] VCCP[07] K21
F8 AB26 C659 C587 C592 C585 C583 C584 C596 C572 C590 C571 F7 M21
VSS[045] VSS[126] VCC[042] VCCP[08]
F11 VSS[046] VSS[127] AC3 F9 VCC[043] VCCP[09] N21
F13 AC6 0.1u 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 10u/10V_8 F10 N6
VSS[047] VSS[128] VCC[044] VCCP[10]
F16 VSS[048] VSS[129] AC8 F12 VCC[045] VCCP[11] R21
F19 VSS[049] VSS[130] AC11 F14 VCC[046] VCCP[12] R6
F2 VSS[050] VSS[131] AC14 F15 VCC[047] VCCP[13] T21
F22 AC16 F17 T6 VCC1.5
VSS[051] VSS[132] VCC[048] VCCP[14]
F25 VSS[052] VSS[133] AC19 F18 VCC[049] VCCP[15] V21
G4 AC21 VCC_CORE F20 W21
VSS[053] VSS[134] VCC[050] VCCP[16]
G1 VSS[054] VSS[135] AC24 AA7 VCC[051]
G23 AD2 AA9 B26 +VCCA_PROC R69 0_6
VSS[055] VSS[136] VCC[052] VCCA[01]
G26 VSS[056] VSS[137] AD5 AA10 VCC[053] VCCA[02] C26
H3 VSS[057] VSS[138] AD8 AA12 VCC[054]
H6 AD11 C44 C58 VCC_CORE Bulk CAPs place AA13 AD6 H_VID0 31
C78 C72
VSS[058] VSS[139] + + VCC[055] VID[0]
H21 VSS[059] VSS[140] AD13 to BOT of CPU centeral AA15 VCC[056] VID[1] AF5 H_VID1 31
B H24 AD16 330u/2.5V_7343 330u/2.5V_7343 AA17 AE5 0.01u/16V_4 10u/10V_8 B
VSS[060] VSS[141] VCC[057] VID[2] H_VID2 31 Place 0.01u
J2 VSS[061] VSS[142] AD19 AA18 VCC[058] VID[3] AF4 H_VID3 31
J5 AD22 AA20 AE3 H_VID4 31
near pin-B26
VSS[062] VSS[143] VCC[059] VID[4]
J22 VSS[063] VSS[144] AD25 AB9 VCC[060] VID[5] AF3 H_VID5 31
J25 VSS[064] VSS[145] AE1 AC10 VCC[061] VID[6] AE2 H_VID6 31
K1 VSS[065] VSS[146] AE4 AB10 VCC[062]
K4 VSS[066] VSS[147] AE8 AB12 VCC[063]
K23 VSS[067] VSS[148] AE11 AB14 VCC[064] VCCSENSE AF7
K26 VSS[068] VSS[149] AE14 AB15 VCC[065]
L3 VSS[069] VSS[150] AE16 AB17 VCC[066]
L6 VSS[070] VSS[151] AE19 AB18 VCC[067] VSSSENSE AE7
L21 AE23 VCC_CORE
VSS[071] VSS[152] Penryn_1p0
L24 VSS[072] VSS[153] AE26
M2 VSS[073] VSS[154] A2 .
M5 AF6 R586
Penryn CPU Power Status and max current table
VSS[074] VSS[155]
M22 VSS[075] VSS[156] AF8
M25 AF11 100/F_6
VSS[076] VSS[157]
N1 VSS[077] VSS[158] AF13 POWER PLANE S0 S3 S4/S5 Voltage I(max) Note
N4 VSS[078] VSS[159] AF16
N23 VSS[079] VSS[160] AF19 VCC_CORE O X X VID 47A Standard Voltage CPU VCCSENSE 31
N26 VSS[080] VSS[161] AF21
P3 VSS[081] VSS[162] A25 VCC_CORE O X X VID 50A SV Design Target VSSSENSE 31
VSS[163] AF25
VCC_CORE O X X VID TBD Extreme Edition CPU
Penryn_1p0 R587 Layout Note:
. O X X 67A EE Design Target Route VCCSENSE and VSSSENSE traces at
VCC_CORE VID 100/F_6 27.4 Ohms with 50 mil spacing.
VCCA O X X +1.5V 130mA Place PU and PD within 1 inch of CPU.
VCCP O X X +1.05V 4.5A Before VCC Stable

A A
VCCP O X X +1.05V 2.5A After VCC Stable
(See Penryn EMTS Rev:1.0 Table7,8 for voltage and current)

(See Penryn EMTS Rev:1.0 Table-3 for VID table)
PROJECT : PB5/6
CPU(2/2) POWER 1A

5 4 3 2 1
5 4 3 2 1
05
H_A#[3..16] 3
U26A
A14 H_A#3
3 H_D#[0..15] H_A#_3
H_D#0 F2 C15 H_A#4
H_D#1 H_D#_0 H_A#_4 H_A#5
G8 H_D#_1 H_A#_5 F16
H_D#2 F8 H13 H_A#6
D H_D#3 H_D#_2 H_A#_6 H_A#7 D
E6 H_D#_3 H_A#_7 C18 BOM Option Table
H_D#4 G2 M16 H_A#8
H_D#5 H_D#_4 H_A#_8 H_A#9
H6 H_D#_5 H_A#_9 J13 Reference Description
H_D#6 H2 P16 H_A#10
H_D#7 H_D#_6 H_A#_10 H_A#11
F6 H_D#_7 H_A#_11 R16 N/A N/A
H_D#8 D4 N17 H_A#12
H_D#9 H_D#_8 H_A#_12 H_A#13
H3 H_D#_9 H_A#_13 M13
H_D#10 M9 E17 H_A#14
H_D#11 H_D#_10 H_A#_14 H_A#15
M11 H_D#_11 H_A#_15 P17
H_D#12 J1 F17 H_A#16
H_D#_12 H_A#_16 H_A#[17..35] 3
H_D#13 J2 G20 H_A#17
H_D#14 H_D#_13 H_A#_17 H_A#18
N12 H_D#_14 H_A#_18 B19
H_D#15 J6 J16 H_A#19
3 H_D#[16..31] H_D#_15 H_A#_19
H_D#16 P2 E20 H_A#20
H_D#17 H_D#_16 H_A#_20 H_A#21
L2 H_D#_17 H_A#_21 H16
VCCP 0.3125*VCCP H_D#18 R2 J20 H_A#22
H_D#19 H_D#_18 H_A#_22 H_A#23
W:10,S:20 , L<0.5" N9 H_D#_19 H_A#_23 L17
H_D#20 L6 A17 H_A#24
H_D#21 H_D#_20 H_A#_24 H_A#25
M5 H_D#_21 H_A#_25 B17
H_D#22 J3 L16 H_A#26
R538 H_D#23 H_D#_22 H_A#_26 H_A#27
N2 H_D#_23 H_A#_27 C21
H_D#24 R1 J17 H_A#28
221/F_4 H_D#25 H_D#_24 H_A#_28 H_A#29
N5 H_D#_25 H_A#_29 H20
H_D#26 N6 B18 H_A#30
H_SWING H_D#27 H_D#_26 H_A#_30 H_A#31
P13 H_D#_27 H_A#_31 K17
H_D#28 N8 B20 H_A#32
C H_D#29 H_D#_28 H_A#_32 H_A#33 C
L7 H_D#_29 H_A#_33 F21
R530 C509 H_D#30 N10 K21 H_A#34
H_D#31 H_D#_30 H_A#_34 H_A#35
3 H_D#[32..47] M3 H_D#_31 H_A#_35 L20
100/F_4 0.1u/10V_4 H_D#32 Y3
H_D#33 H_D#_32 H_ADS#
AD14 H_D#_33 H_ADS# H12 H_ADS# 3
H_D#34 Y6 B16 H_ADSTB#0
H_D#_34 H_ADSTB#_0 H_ADSTB#0 3
H_D#35 Y10 G17 H_ADSTB#1
H_D#_35 H_ADSTB#_1 H_ADSTB#1 3
H_D#36 Y12 A9 H_BNR#
H_D#_36 H_BNR# H_BNR# 3
H_D#37 Y14 F11 H_BPRI#
H_D#_37 H_BPRI# H_BPRI# 3
H_D#38 Y7 G12 H_BREQ#
HOST
H_D#_38 H_BREQ# H_BREQ# 3
H_D#39 W2 E9 H_DEFER#
H_D#_39 H_DEFER# H_DEFER# 3
H_D#40 AA8 B10 H_DBSY#
H_D#_40 H_DBSY# H_DBSY# 3
H_D#41 Y9 AH7 CLK_MCH_BCLK
H_D#_41 HPLL_CLK CLK_MCH_BCLK 2
W:10,S:20 , L<0.5" H_D#42 AA13 AH6 CLK_MCH_BCLK#
H_D#_42 HPLL_CLK# CLK_MCH_BCLK# 2
H_D#43 AA9 J11 H_DPWR#
H_D#_43 H_DPWR# H_DPWR# 3
H_D#44 AA11 F9 H_DRDY#
H_D#_44 H_DRDY# H_DRDY# 3
H_D#45 AD11 H9 H_HIT#
H_D#_45 H_HIT# H_HIT# 3
H_D#46 AD10 E12 H_HITM#
H_D#_46 H_HITM# H_HITM# 3
H_RCOMP H_D#47 AD13 H11 H_LOCK#
3 H_D#[48..63] H_D#_47 H_LOCK# H_LOCK# 3
H_D#48 AE12 C9 H_TRDY#
H_D#_48 H_TRDY# H_TRDY# 3
H_D#49 AE9
R128 H_D#50 H_D#_49
AA2 H_D#_50
H_D#51 AD8
24.9/F_4 H_D#52 H_D#_51
AA3 H_D#_52 H_DINV#[3..0] 3
H_D#53 AD3 J8 H_DINV#0
H_D#54 H_D#_53 H_DINV#_0 H_DINV#1
AD7 H_D#_54 H_DINV#_1 L3
B H_D#55 H_DINV#2 B
AE14 H_D#_55 H_DINV#_2 Y13
H_D#56 AF3 Y1 H_DINV#3
H_D#57 H_D#_56 H_DINV#_3
AC1 H_D#_57 H_DSTBN#[3..0] 3
H_D#58 AE3 L10 H_DSTBN#0
H_D#59 H_D#_58 H_DSTBN#_0 H_DSTBN#1
AC3 H_D#_59 H_DSTBN#_1 M7
H_D#60 AE11 AA5 H_DSTBN#2
H_D#61 H_D#_60 H_DSTBN#_2 H_DSTBN#3
AE8 H_D#_61 H_DSTBN#_3 AE6
H_D#62 AG2 H_D#_62 H_DSTBP#[3..0] 3
H_D#63 AD6 L9 H_DSTBP#0
VCCP H_D#_63 H_DSTBP#_0 H_DSTBP#1
2/3*VCCP H_DSTBP#_1 M8
W:10,S:20 , L<0.5" AA6 H_DSTBP#2
H_SWING H_DSTBP#_2 H_DSTBP#3
C5 H_SWING H_DSTBP#_3 AE5
H_RCOMP E3 H_RCOMP H_REQ#[0..4] 3
R539 B15 H_REQ#0
H_REQ#_0 H_REQ#1
H_REQ#_1 K13
1K/F_4 F13 H_REQ#2
H_REQ#_2 H_REQ#3
H_REQ#_3 B13
H_AVREF H_CPURST# C12 B14 H_REQ#4
3 H_CPURST# H_CPURST# H_REQ#_4
H_CPUSLP# E11
3 H_CPUSLP# H_CPUSLP# H_RS#[2..0] 3
B6 H_RS#0
R534 R522 0_4 H_DVREF H_RS#_0 H_RS#1
H_RS#_1 F12
C8 H_RS#2
2K/F_4 H_AVREF H_RS#_2
A11 H_AVREF
H_DVREF B11 H_DVREF
CANTIGA_1p2
A A
PROJECT : PB5/6
NB (1/7) HOST 1A

5 4 3 2 1
5 4 3 2 1
BOM Option Table
T50
MCH_RSVD1
MCH_RSVD2
M36
N36
U26B
RSVD1
AP24 M_CLK_DDR0
Reference
IV@
Description
INT VGA 06
T53 RSVD2 SA_CK_0 M_CLK_DDR0 17 EV@ EXT VGA
DDR CLK/ CONTROL/COMPENSATION

MCH_RSVD3 R33 AT21 M_CLK_DDR1
T30 RSVD3 SA_CK_1 M_CLK_DDR1 17
MCH_RSVD4 T33 AV24 M_CLK_DDR3
T58
MCH_RSVD5 RSVD4 SB_CK_0 M_CLK_DDR4
M_CLK_DDR3 17 IHM@ INT HDMI
T64 AH9 RSVD5 SB_CK_1 AU20 M_CLK_DDR4 17
MCH_RSVD6 AH10
T62
MCH_RSVD7 RSVD6 M_CLK_DDR#0
EV_IV@ EV&IV diff. value
T60 AH12 RSVD7 SA_CK#_0 AR24 M_CLK_DDR#0 17
MCH_RSVD8 AH13 AR21 M_CLK_DDR#1
T61 RSVD8 SA_CK#_1 M_CLK_DDR#1 17
MCH_RSVD9 K12 AU24 M_CLK_DDR#3
T49 RSVD9 SB_CK#_0 M_CLK_DDR#3 17
AV20 M_CLK_DDR#4
SB_CK#_1 M_CLK_DDR#4 17
BC28 M_CKE0
SA_CKE_0 M_CKE0 16,17
AY28 M_CKE1 U26C
SA_CKE_1 M_CKE1 16,17
MCH_RSVD14 T24 AY36 M_CKE3 L<0.5" , If PCIE not support
T57 RSVD14 SB_CKE_0 M_CKE3 16,17 +1.05V_VCC_PEG
BB36 M_CKE4 LVDS I/F still connect to +VCC_PEG
SB_CKE_1 M_CKE4 16,17
RSVD
D MCH_RSVD15 B31 D
T37 RSVD15
BA17 M_CS#0 INT_LVDS_PWM L32
SA_CS#_0 M_CS#0 16,17 19 INT_LVDS_PWM L_BKLT_CTRL
MCH_RSVD17 M1 AY16 M_CS#1 INT_LVDS_BLON G32 T37 EXP_A_COMPX R153 49.9/F_4
T51 RSVD17 SA_CS#_1 M_CS#1 16,17 19 INT_LVDS_BLON L_BKLT_EN PEG_COMPI
AV16 M_CS#2 L_CTRL_CLK M32 T36
SB_CS#_0 M_CS#2 16,17 L_CTRL_CLK PEG_COMPO
AR13 M_CS#3
SB_CS#_1 M_CS#3 16,17
MCH_RSVD20 AY21 L_CTRL_DATA M33
T72 RSVD20 L_CTRL_DATA PEG_RXN[15:0] 20
BD17 M_ODT0 INT_LVDS_EDIDCLK K33 H44 PEG_RXN0
SA_ODT_0 M_ODT0 16,17 19 INT_LVDS_EDIDCLK L_DDC_CLK PEG_RX#_0
AY17 M_ODT1 INT_LVDS_EDIDDATA J33 J46 PEG_RXN1
SA_ODT_1 M_ODT1 16,17 11,19 INT_LVDS_EDIDDATA L_DDC_DATA PEG_RX#_1
MCH_RSVD21 B2 BF15 M_ODT2 L44 PEG_RXN2
T38 RSVD21 SB_ODT_0 M_ODT2 16,17 PEG_RX#_2
MCH_RSVD22 BG23 AY13 M_ODT3 L40 PEG_RXN3
T74 RSVD22 SB_ODT_1 M_ODT3 16,17 PEG_RX#_3
MCH_RSVD23 BF23 INT_LVDS_DIGON M29 N41 PEG_RXN4
T76 RSVD23 19 INT_LVDS_DIGON L_VDD_EN PEG_RX#_4
MCH_RSVD24 BH18 BG22 M_RCOMP LVDS_IBG C44 P48 PEG_RXN5
T156 RSVD24 SM_RCOMP LVDS_IBG PEG_RX#_5
MCH_RSVD25 BF18 BH21 M_RCOMP# LVDS_VBG B43 N44 PEG_RXN6
T75 RSVD25 SM_RCOMP# T31 LVDS_VBG PEG_RX#_6
LVDS_VREFH E37 T43 PEG_RXN7
SM_RCOMP_VOH LVDS_VREFL LVDS_VREFH PEG_RX#_7 PEG_RXN8
SM_RCOMP_VOH BF28 E38 LVDS_VREFL PEG_RX#_8 U43
LVDS
BH28 SM_RCOMP_VOL INT_TXLCLKOUT- C41 Y43 PEG_RXN9
SM_RCOMP_VOL 19 INT_TXLCLKOUT- LVDSA_CLK# PEG_RX#_9
INT_TXLCLKOUT+ C40 Y48 PEG_RXN10
19 INT_TXLCLKOUT+ LVDSA_CLK PEG_RX#_10
AV42 SM_VREF INT_TXUCLKOUT- B37 Y36 PEG_RXN11
SM_VREF 19 INT_TXUCLKOUT- LVDSB_CLK# PEG_RX#_11
AR36 SM_PWROK INT_TXUCLKOUT+ A37 AA43 PEG_RXN12
SM_PWROK 19 INT_TXUCLKOUT+ LVDSB_CLK PEG_RX#_12
BF17 SM_REXT SM_DRAMRST# only for AD37 PEG_RXN13
SM_REXT MCH_SM_DRAMRST# DDR3.(DDR2 NC). INT_TXLOUT0- PEG_RX#_13 PEG_RXN14
SM_DRAMRST# BC36 T71 19 INT_TXLOUT0- H47 LVDSA_DATA#_0 PEG_RX#_14 AC47
INT_TXLOUT1- E46 AD39 PEG_RXN15
19 INT_TXLOUT1- LVDSA_DATA#_1 PEG_RX#_15
B38 DREFCLK INT_TXLOUT2- G40
DPLL_REF_CLK DREFCLK 2 19 INT_TXLOUT2- LVDSA_DATA#_2 PEG_RXP[15:0] 20
A38 DREFCLK# INT_TXLOUT3- A40 H43 PEG_RXP0
GRAPHICS
DPLL_REF_CLK# DREFCLK# 2 T35 LVDSA_DATA#_3 PEG_RX_0
E41 DREFSSCLK J44 PEG_RXP1
DPLL_REF_SSCLK DREFSSCLK 2 PEG_RX_1
F41 DREFSSCLK# INT_TXLOUT0+ H48 L43 PEG_RXP2
DPLL_REF_SSCLK# DREFSSCLK# 2 19 INT_TXLOUT0+ LVDSA_DATA_0 PEG_RX_2
INT_TXLOUT1+ D45 L41 PEG_RXP3
19 INT_TXLOUT1+ LVDSA_DATA_1 PEG_RX_3
ME JTAG
F43 CLK_PCIE_3GPLL INT_TXLOUT2+ F40 N40 PEG_RXP4
CLK
PEG_CLK CLK_PCIE_3GPLL 2 19 INT_TXLOUT2+ LVDSA_DATA_2 PEG_RX_4
AL34 E43 CLK_PCIE_3GPLL# INT_TXLOUT3+ B40 P47 PEG_RXP5
ME_JTAG_TCK PEG_CLK# CLK_PCIE_3GPLL# 2 T33 LVDSA_DATA_3 PEG_RX_5
N43 PEG_RXP6
JTAG_TDI INT_TXUOUT0- PEG_RX_6 PEG_RXP7
T65 AK34 ME_JTAG_TDI 19 INT_TXUOUT0- A41 LVDSB_DATA#_0 PEG_RX_7 T42
INT_TXUOUT1- H38 U42 PEG_RXP8
DMI_TXN[3:0] 13 19 INT_TXUOUT1- LVDSB_DATA#_1 PEG_RX_8
AN35 AE41 DMI_TXN0 INT_TXUOUT2- G37 Y42 PEG_RXP9
ME_JTAG_TDO DMI_RXN_0 19 INT_TXUOUT2- LVDSB_DATA#_2 PEG_RX_9
AE37 DMI_TXN1 INT_TXUOUT3- J37 W47 PEG_RXP10
DMI_RXN_1 T52 LVDSB_DATA#_3 PEG_RX_10
JTAG_TMS AM35 AE47 DMI_TXN2 Y37 PEG_RXP11
T67 ME_JTAG_TMS DMI_RXN_2 PEG_RX_11
AH39 DMI_TXN3 INT_TXUOUT0+ B42 AA42 PEG_RXP12
DMI_RXN_3 19 INT_TXUOUT0+ LVDSB_DATA_0 PEG_RX_12
INT_TXUOUT1+ G38 AD36 PEG_RXP13
DMI_TXP[3:0] 13 19 INT_TXUOUT1+ LVDSB_DATA_1 PEG_RX_13
AE40 DMI_TXP0 INT_TXUOUT2+ F37 AC48 PEG_RXP14
DMI_RXP_0 19 INT_TXUOUT2+ LVDSB_DATA_2 PEG_RX_14
PCI-EXPRESS
MCH_BSEL0 T25 AE38 DMI_TXP1 INT_TXUOUT3+ K37 AD40 PEG_RXP15
2 MCH_BSEL0 CFG_0 DMI_RXP_1 T54 LVDSB_DATA_3 PEG_RX_15
MCH_BSEL1 R25 AE48 DMI_TXP2
2 MCH_BSEL1 CFG_1 DMI_RXP_2 PEG_TXN[15:0] 20
MCH_BSEL2 P25 AH40 DMI_TXP3 J41 C_PEG_TXN0 C497 EV@0.1u/10V_4 PEG_TXN0
2 MCH_BSEL2 CFG_2 DMI_RXP_3 PEG_TX#_0
MCH_CFG_3 P20 M46 C_PEG_TXN1 C121 EV@0.1u/10V_4 PEG_TXN1
T48 CFG_3 DMI_RXN[3:0] 13 PEG_TX#_1
MCH_CFG_4 P24 AE35 DMI_RXN0 TV IF (Disable) INT_TV_COMP F25 M47 C_PEG_TXN2 C495 EV@0.1u/10V_4 PEG_TXN2
C T55 CFG_4 DMI_TXN_0 TVA_DAC PEG_TX#_2 C
11 MCH_CFG_5 MCH_CFG_5 C25 AE43 DMI_RXN1 INT_TV_Y/G H25 M40 C_PEG_TXN3 C137 EV@0.1u/10V_4 PEG_TXN3
MCH_CFG_6 CFG_5 DMI_TXN_1 DMI_RXN2 INT_TV_C/R TVB_DAC PEG_TX#_3 C_PEG_TXN4 C490 EV@0.1u/10V_4 PEG_TXN4
11 MCH_CFG_6 N24 CFG_6 DMI_TXN_2 AE46 K25 TVC_DAC PEG_TX#_4 M42
TV
11 MCH_CFG_7 MCH_CFG_7 M24 AH42 DMI_RXN3 R48 C_PEG_TXN5 C148 EV@0.1u/10V_4 PEG_TXN5
MCH_CFG_8 CFG_7 DMI_TXN_3 INT_TV_RNT PEG_TX#_5 C_PEG_TXN6 C487 EV@0.1u/10V_4 PEG_TXN6
T40 E21 CFG_8 DMI_RXP[3:0] 13 H24 TV_RTN PEG_TX#_6 N38
CFG
MCH_CFG_9 DMI_RXP0 C_PEG_TXN7 C158 EV@0.1u/10V_4 PEG_TXN7

DMI
11 MCH_CFG_9 C23 CFG_9 DMI_TXP_0 AD35 PEG_TX#_7 T40
11 MCH_CFG_10 MCH_CFG_10 C24 AE44 DMI_RXP1 U37 C_PEG_TXN8 C484 EV@0.1u/10V_4 PEG_TXN8
MCH_CFG_11 CFG_10 DMI_TXP_1 DMI_RXP2 PEG_TX#_8 C_PEG_TXN9 C164 EV@0.1u/10V_4 PEG_TXN9
T46 N21 CFG_11 DMI_TXP_2 AF46 PEG_TX#_9 U40
11 MCH_CFG_12 MCH_CFG_12 P21 AH43 DMI_RXP3 TV_DCONSEL_0 C31 Y40 C_PEG_TXN10 C481 EV@0.1u/10V_4 PEG_TXN10
MCH_CFG_13 CFG_12 DMI_TXP_3 TV_DCONSEL_1 TV_DCONSEL_0 PEG_TX#_10 C_PEG_TXN11 C170 EV@0.1u/10V_4 PEG_TXN11
11 MCH_CFG_13 T21 CFG_13 E32 TV_DCONSEL_1 PEG_TX#_11 AA46
MCH_CFG_14 R20 AA37 C_PEG_TXN12 C476 EV@0.1u/10V_4 PEG_TXN12
T59 CFG_14 PEG_TX#_12
MCH_CFG_15 M20 AA40 C_PEG_TXN13 C174 EV@0.1u/10V_4 PEG_TXN13
T43 CFG_15 PEG_TX#_13
11 MCH_CFG_16 MCH_CFG_16 L21 AD43 C_PEG_TXN14 C468 EV@0.1u/10V_4 PEG_TXN14
MCH_CFG_17 CFG_16 PEG_TX#_14 C_PEG_TXN15 C179 EV@0.1u/10V_4 PEG_TXN15
T41 H21 CFG_17 PEG_TX#_15 AC46
MCH_CFG_18 P29
GRAPHICS VID
T56 CFG_18 PEG_TXP[15:0] 20

11 MCH_CFG_19 MCH_CFG_19 R28 CRT I/F INTB E28 J42 C_PEG_TXP0 C498 EV@0.1u/10V_4 PEG_TXP0
MCH_CFG_20 CFG_19 CRT_BLUE PEG_TX_0 C_PEG_TXP1 C120 EV@0.1u/10V_4 PEG_TXP1
11 MCH_CFG_20 T28 CFG_20 GFX_VID_0 B33 T32 PEG_TX_1 L46
B32 INTG G28 M48 C_PEG_TXP2 C493 EV@0.1u/10V_4 PEG_TXP2
GFX_VID_1 T34 CRT_GREEN PEG_TX_2
G33 M39 C_PEG_TXP3 C132 EV@0.1u/10V_4 PEG_TXP3
GFX_VID_2 T47 PEG_TX_3
F33 INTR J28 M43 C_PEG_TXP4 C491 EV@0.1u/10V_4 PEG_TXP4
GFX_VID_3 T42 CRT_RED PEG_TX_4
VGA
R99 0_4 PM_SYNC#_R R29 E33 R47 C_PEG_TXP5 C145 EV@0.1u/10V_4 PEG_TXP5
14 PM_SYNC# PM_SYNC# GFX_VID_4 1 PEG_TX_5
R528 0_4 ICH_DPRSTP#_R B7 CRT_IRTN G29 N37 C_PEG_TXP6 C489 EV@0.1u/10V_4 PEG_TXP6
3,12,31 ICH_DPRSTP# PM_DPRSTP# CRT_IRTN PEG_TX_6
17 PM_EXTTS#0 PM_EXTTS#0 R147 0_4 PM_EXTTS#0_1_EC_R N33 T39 C_PEG_TXP7 C153 EV@0.1u/10V_4 PEG_TXP7
PM_EXTTS#1 R143 0_4 TS#DIMM0_1_R PM_EXT_TS#_0 INT_CRT_DDCCLK PEG_TX_7 C_PEG_TXP8 C485 EV@0.1u/10V_4 PEG_TXP8
17 PM_EXTTS#1 P32 PM_EXT_TS#_1 18 INT_CRT_DDCCLK H32 CRT_DDC_CLK PEG_TX_8 U36
PM
R203 0_4 AT40 C34 INT_CRT_DDCDAT J32 U39 C_PEG_TXP9 C161 EV@0.1u/10V_4 PEG_TXP9
3,14,31 DELAY_VR_PWRGOOD PWROK GFX_VR_EN T39 18 INT_CRT_DDCDAT CRT_DDC_DATA PEG_TX_9
R186 100_4 RST_IN#_MCH AT11 INT_HSYNCR140 IV@30.1/F_4HSYNC_G J29 Y39 C_PEG_TXP10 C483 EV@0.1u/10V_4 PEG_TXP10
13 PLT_RST#_NB RSTIN# 18 INT_HSYNC CRT_HSYNC PEG_TX_10
3,12 PM_THRMTRIP# R141 *0_4 THRMTRIP#_R T20 CRTIREF E29 Y46 C_PEG_TXP11 C168 EV@0.1u/10V_4 PEG_TXP11
R104 0_4 DPRSLPVR_R THERMTRIP# INT_VSYNCR148 IV@30.1/F_4VSYNC_G CRT_TVO_IREF PEG_TX_11 C_PEG_TXP12 C480 EV@0.1u/10V_4 PEG_TXP12
14,31 PM_DPRSLPVR R32 DPRSLPVR 18 INT_VSYNC L29 CRT_VSYNC PEG_TX_12 AA36
AA39 C_PEG_TXP13 C173 EV@0.1u/10V_4 PEG_TXP13
CL_CLK0 PEG_TX_13 C_PEG_TXP14 C469 EV@0.1u/10V_4 PEG_TXP14
CL_CLK AH37 CL_CLK0 14 For IV @ Connect to 30.1ohm PEG_TX_14 AD42
AH36 CL_DATA0 HSYNC/VSYNC serial R place close to NB AD46 C_PEG_TXP15 C177 EV@0.1u/10V_4 PEG_TXP15
TP_MCH_NC1 CL_DATA MPWROK
CL_DATA0 14 For EV@ NC PEG_TX_15
T153 BG48 AN36 MPWROK 14
NB Thermal trip pin TP_MCH_NC2 NC_1 CL_PWROK CL_RST#0
T146 BF48 AJ35 CL_RST#0 14
NC_2 CL_RST#
ME
No use Thermal trip NB side can T143 TP_MCH_NC3 BD48 AH34 MCH_CLVREF_R CANTIGA_1p2
TP_MCH_NC4 NC_3 CL_VREF
NC.(NB has ODT) T139 BC48
TP_MCH_NC5 NC_4
T152 BH47
TP_MCH_NC6 NC_5 DDPC_CTRL for HDMI port C
T80 BG47
PM_DPRSTP# TP_MCH_NC7 NC_6 DDPC_CTRLCLK SDVO_CTRL for HDMI port B
T154 BE47 N28 T29
The Daisy chain topology should TP_MCH_NC8 NC_7 DDPC_CTRLCLK DDPC_CTRLDATA
T145 BH46 M28 DDPC_CTRLDATA 11
TP_MCH_NC9 NC_8 DDPC_CTRLDATA SDVO_CTRLCLK
be routed from ICH9M to IMVP , T78 BF46 G36 T45
NC_9 SDVO_CTRLCLK
NC
then to (G)MCH and CPU, in that T151 TP_MCH_NC10 BG45 E36 SDVO_CTRLDATA
NC_10 SDVO_CTRLDATA SDVO_CTRLDATA 11
order. T144 TP_MCH_NC11 BH44 K36 CLK_MCH_OE#
NC_11 CLKREQ# CLK_MCH_OE# 2
T150 TP_MCH_NC12 BH43 H36 MCH_ICH_SYNC#
NC_12 ICH_SYNC# MCH_ICH_SYNC# 14
B T149 TP_MCH_NC13 BH6 B
MISC
TP_MCH_NC14 NC_13
T142 BH5
TP_MCH_NC15 NC_14 TSATN#
T138 BG4 B12 Close U3030
TP_MCH_NC16 NC_15 TSATN#
T148 BH3
TP_MCH_NC17 NC_16
T73 BF3
TP_MCH_NC18 NC_17 NOTE:
T155 BH2
TP_MCH_NC19 NC_18 INTR L48 0@IV
T77 BG2 B28 If (G)MCH's HD Audio signals are connected to ICH9M for INT_CRT_RED 18
NC_19 HDA_BCLK T162
T157 TP_MCH_NC20 BE2 B30 iHDMI, VCCHDA and VCCSUSHDA on ICH9M should be
NC_20 HDA_RST# T163
T141 TP_MCH_NC21 BG1 B29 only on 1.5V. These power pins on ICH9M can be supplied INTG L49 0@IV INT_CRT_GRN 18
NC_21 HDA_SDI T164
T137 TP_MCH_NC22 BF1 C29 with 3.3V if and only if (G)MCH's HDA is not connected to
NC_22 HDA_SDO T165
T147 TP_MCH_NC23 BD1 A28 ICH9M. Consequently, only 1.5V audio/modem codecs can INTB L47 0@IV INT_CRT_BLU 18
HDA
NC_23 HDA_SYNC T166

T140 TP_MCH_NC24 BC1 be used on the platform.
TP_MCH_NC25 NC_24
T44 F1 NC_25 C549 C550 C551 C552 C548 C547
CANTIGA_1p2
*5.6P *5.6P *5.6P *5.6P *5.6P *5.6P
<Checklist ver0.8> IV&EV Dis/Enable LVDS setting(See DG 1.0 P190 Table 103)
Check list note : CL_REF=0.35V SM_VREF.Default use voltage divider for poor layout cause +SMDDR_VREF not
VCCP If TSATN# is not used, then it must be terminated
meet spec.And Intel circuit PU/PD is 1K,But Check list PU/PD is 10K. with a 56-ȍ pull-up resistor to VCCP. VCCP LVDS_VREFH
R122 IV@0_4 For IV @ 0ohm
LVDS_VREFL
TSATN#
For EV@ NC
56_4 R529
R166 R202 0_6 SMDDR_VREF
For IV @ 2.37K/F
1K/F_4 VCC3 R120 IV@2.37K/F_4 LVDS_IBG
For EV@ NC
MCH_CLVREF_R SM_VREF R189 *10K/F_4 +1.8VSUS_GMCH CLK_MCH_OE# 10K_4 R102
VCC3 R79 IV@10K_4 L_CTRL_CLK For IV @ 2.37K 10K
PM_EXTTS#0 10K_4 R152
L_CTRL_DATA
For EV@ NC
C136 R170 R80 IV@10K_4
R195 PM_EXTTS#1 10K_4 R149
0.1u/10V_4 511/F_6 *10K/F_4
IV&EV Dis/Enable CRT setting(See DG 1.0 P190 Table 103) Dis TV/En CRT( See DG1.0 P208 Table 118)
SM_REXT R199 499/F_4
R130 *EV@0_4 INT_CRT_DDCCLK For IV @ NC R125 EV_IV@75_4 INT_TV_COMP For IV @ 75ohm to GND
A A
R136 *EV@0_4 INT_CRT_DDCDAT R132 EV_IV@75_4 INT_TV_Y/G
For EV@ 0ohm to GND or NC For EV@ 0ohm to GND
SM_PWROK only for DDR3.(DDR2 PD only) R139 EV_IV@75_4 INT_TV_C/R
+1.8VSUS_GMCH +1.8VSUS_GMCH R495 1K/F_4 SM_RCOMP_VOH R137 *EV@0_4 HSYNC_G For IV @ NC

+1.8VSUS_GMCH HWPG_1.8V 28,33
R145 *EV@0_4 VSYNC_G For IV @ 0ohm to GND
For EV@ 0ohm to GND or NC TV_DCONSEL_0
C465 C464 R124 0_4
TV_DCONSEL_1
For EV@ 0ohm to GND
R500 R185 R121 0_4
R492 R491 0.01u/16V_4 2.2u/6.3V_6 *12K/F_4
3.01K/F_4 R129 EV_IV@150/F_4 INTB For IV @ Connect to 150ohm/F
80.6/F_4 *20/F_4 R131 EV_IV@150/F_4 INTG
SM_PWROK INTR
For EV@ Connect to 0ohm GND
R135 EV_IV@150/F_4
M_RCOMP M_RCOMP# SM_RCOMP_VOL IV&EV Dis/Enable PLL setting(See DG 1.0 P190 Table 103)
PROJECT : PB5/6
R184
R497 R496 R488 C461 C458 10K/F_6 DREFCLK R535 EV@0_4
For IV @ Connect to 1.02K/F DREFCLK# R523 EV@0_4 For IV @ NC Quanta Computer Inc.
*20/F_4 80.6/F_4 1K/F_4 0.01u/16V_4 2.2u/6.3V_6 R119 EV_IV@1K/F_4 CRTIREF DREFSSCLK R126 EV@0_4
For EV@ Connect to 0ohm GND DREFSSCLK#
For EV@ 0ohm to GND
R133 EV@0_4 Size Document Number Rev
Layout Note :See DG1.0 P180
NB(2/7) 1A
Date: Wednesday, June 04, 2008 Sheet 6 of 35

5 4 3 2 1
5 4 3 2 1

07
Reference Description
N/A N/A
D D
U26D U26E
17 M_A_DQ[0..7] 17 M_B_DQ[0..7]
M_A_DQ0 AJ38 BD21 M_A_BS#0 M_B_DQ0 AK47 BC16 M_B_BS#0
SA_DQ_0 SA_BS_0 M_A_BS#0 16,17 SB_DQ_0 SB_BS_0 M_B_BS#0 16,17
M_A_DQ1 AJ41 BG18 M_A_BS#1 M_B_DQ1 AH46 BB17 M_B_BS#1
M_A_DQ2 AN38 AT25 M_A_BS#2 M_B_DQ2 AP47 BB33 M_B_BS#2
M_A_DQ3 AM38 M_B_DQ3 AP46
M_A_DQ4 SA_DQ_3 M_A_RAS# M_B_DQ4 SB_DQ_3
AJ36 SA_DQ_4 SA_RAS# BB20 M_A_RAS# 16,17 AJ46 SB_DQ_4
M_A_DQ5 AJ40 BD20 M_A_CAS# M_B_DQ5 AJ48 AU17 M_B_RAS#
SA_DQ_5 SA_CAS# M_A_CAS# 16,17 SB_DQ_5 SB_RAS# M_B_RAS# 16,17
M_A_DQ6 AM44 AY20 M_A_WE# M_B_DQ6 AM48 BG16 M_B_CAS#
SA_DQ_6 SA_WE# M_A_WE# 16,17 SB_DQ_6 SB_CAS# M_B_CAS# 16,17
M_A_DQ7 AM42 M_B_DQ7 AP48 BF14 M_B_WE#
17 M_A_DQ[8..15] SA_DQ_7 17 M_B_DQ[8..15] SB_DQ_7 SB_WE# M_B_WE# 16,17
M_A_DQ8 AN43 M_B_DQ8 AU47
M_A_DQ9 SA_DQ_8 M_B_DQ9 SB_DQ_8
AN44 SA_DQ_9 AU46 SB_DQ_9
M_A_DQ10 AU40 M_B_DQ10 BA48
SA_DQ_10 M_A_DM[0..7] 17 SB_DQ_10
M_A_DQ11 AT38 AM37 M_A_DM0 M_B_DQ11 AY48
SA_DQ_11 SA_DM_0 SB_DQ_11 M_B_DM[0..7] 17
M_A_DQ12 AN41 AT41 M_A_DM1 M_B_DQ12 AT47 AM47 M_B_DM0
M_A_DQ13 SA_DQ_12 SA_DM_1 M_A_DM2 M_B_DQ13 SB_DQ_12 SB_DM_0 M_B_DM1
AN39 SA_DQ_13 SA_DM_2 AY41 AR47 SB_DQ_13 SB_DM_1 AY47
M_A_DQ14 AU44 AU39 M_A_DM3 M_B_DQ14 BA47 BD40 M_B_DM2
17 M_A_DQ[16..23] AU42 SA_DQ_15 SA_DM_4 BB12 17 M_B_DQ[16..23] BC47 SB_DQ_15 SB_DM_3 BF35
M_A_DQ16 AV39 AY6 M_A_DM5 M_B_DQ16 BC46 BG11 M_B_DM4
AY44 SA_DQ_17 SA_DM_6 AT7 BC44 SB_DQ_17 SB_DM_5 BA3
A
M_A_DQ18 BA40 AJ5 M_A_DM7 M_B_DQ18 BG43 AP1 M_B_DM6
B
M_A_DQ19 SA_DQ_18 SA_DM_7 M_B_DQ19 SB_DQ_18 SB_DM_6 M_B_DM7
BD43 SA_DQ_19 M_A_DQS[0..7] 17 BF43 SB_DQ_19 SB_DM_7 AK2
M_A_DQ20 AV41 AJ44 M_A_DQS0 M_B_DQ20 BE45
SA_DQ_20 SA_DQS_0 SB_DQ_20 M_B_DQS[0..7] 17
C M_A_DQ21 AY43 AT44 M_A_DQS1 M_B_DQ21 BC41 AL47 M_B_DQS0 C
M_A_DQ22 SA_DQ_21 SA_DQS_1 M_A_DQS2 M_B_DQ22 SB_DQ_21 SB_DQS_0 M_B_DQS1
BB41 SA_DQ_22 BA43 BF40 AV48
MEMORY
M_A_DQ23 SA_DQS_2 M_A_DQS3 M_B_DQ23 SB_DQ_22 SB_DQS_1 M_B_DQS2
MEMORY
17 M_A_DQ[24..31] BC40 SA_DQ_23 SA_DQS_3 BC37 17 M_B_DQ[24..31] BF41 SB_DQ_23 SB_DQS_2 BG41
M_A_DQ24 AY37 AW12 M_A_DQS4 M_B_DQ24 BG38 BG37 M_B_DQS3
BD38 SA_DQ_25 SA_DQS_5 BC8 BF38 SB_DQ_25 SB_DQS_4 BH9
M_A_DQ26 AV37 AU8 M_A_DQS6 M_B_DQ26 BH35 BB2 M_B_DQS5
AT36 SA_DQ_27 SA_DQS_7 AM7 M_A_DQS#[0..7] 17 BG35 SB_DQ_27 SB_DQS_6 AU1
M_A_DQ28 AY38 AJ43 M_A_DQS#0 M_B_DQ28 BH40 AN6 M_B_DQS7
SA_DQ_28 SA_DQS#_0 SB_DQ_28 SB_DQS_7 M_B_DQS#[0..7] 17
M_A_DQ29 BB38 AT43 M_A_DQS#1 M_B_DQ29 BG39 AL46 M_B_DQS#0
M_A_DQ30 SA_DQ_29 SA_DQS#_1 M_A_DQS#2 M_B_DQ30 SB_DQ_29 SB_DQS#_0 M_B_DQS#1
AV36 SA_DQ_30 SA_DQS#_2 BA44 BG34 SB_DQ_30 SB_DQS#_1 AV47
M_A_DQ31 AW36 BD37 M_A_DQS#3 M_B_DQ31 BH34 BH41 M_B_DQS#2
17 M_A_DQ[32..39] SA_DQ_31 SA_DQS#_3 17 M_B_DQ[32..39] SB_DQ_31 SB_DQS#_2
M_A_DQ32 BD13 AY12 M_A_DQS#4 M_B_DQ32 BH14 BH37 M_B_DQS#3
AU11 SA_DQ_33 SA_DQS#_5 BD8 BG12 SB_DQ_33 SB_DQS#_4 BG9
M_A_DQ34 BC11 AU9 M_A_DQS#6 M_B_DQ34 BH11 BC2 M_B_DQS#5
BA12 AM8 BG8 AT2
SYSTEM
M_A_DQ36 SA_DQ_35 SA_DQS#_7 M_B_DQ36 SB_DQ_35 SB_DQS#_6 M_B_DQS#7
SYSTEM
AU13 SA_DQ_36 M_A_A[0..14] 16,17 BH12 SB_DQ_36 SB_DQS#_7 AN5
M_A_DQ37 AV13 BA21 M_A_A0 M_B_DQ37 BF11
SA_DQ_37 SA_MA_0 SB_DQ_37 M_B_A[0..14] 16,17
M_A_DQ38 BD12 BC24 M_A_A1 M_B_DQ38 BF8 AV17 M_B_A0
M_A_DQ39 SA_DQ_38 SA_MA_1 M_A_A2 M_B_DQ39 SB_DQ_38 SB_MA_0 M_B_A1
17 M_A_DQ[40..47] BC12 SA_DQ_39 SA_MA_2 BG24 17 M_B_DQ[40..47] BG7 SB_DQ_39 SB_MA_1 BA25
M_A_DQ40 BB9 BH24 M_A_A3 M_B_DQ40 BC5 BC25 M_B_A2
BA9 SA_DQ_41 SA_MA_4 BG25 BC6 SB_DQ_41 SB_MA_3 AU25
M_A_DQ42 AU10 BA24 M_A_A5 M_B_DQ42 AY3 AW25 M_B_A4
AV9 SA_DQ_43 SA_MA_6 BD24 AY1 SB_DQ_43 SB_MA_5 BB28
M_A_DQ44 BA11 BG27 M_A_A7 M_B_DQ44 BF6 AU28 M_B_A6
BD9 SA_DQ_45 SA_MA_8 BF25 BF5 SB_DQ_45 SB_MA_7 AW28
M_A_DQ46 AY8 AW24 M_A_A9 M_B_DQ46 BA1 AT33 M_B_A8
17 M_A_DQ[48..55] BA6 SA_DQ_47 SA_MA_10 BC21 17 M_B_DQ[48..55] BD3 SB_DQ_47 SB_MA_9 BD33
M_A_DQ48 M_A_A11 M_B_DQ48 M_B_A10
DDR
B
AV5 SA_DQ_48 SA_MA_11 BG26 AV2 SB_DQ_48 SB_MA_10 BB16 B
DDR
M_A_DQ49 AV7 BH26 M_A_A12 M_B_DQ49 AU3 AW33 M_B_A11
AT9 SA_DQ_50 SA_MA_13 BH17 AR3 SB_DQ_50 SB_MA_12 AY33
M_A_DQ51 AN8 AY25 M_A_A14 M_B_DQ51 AN2 BH15 M_B_A13
M_A_DQ52 SA_DQ_51 SA_MA_14 M_B_DQ52 SB_DQ_51 SB_MA_13 M_B_A14
AU5 SA_DQ_52 AY2 SB_DQ_52 SB_MA_14 AU33
M_A_DQ53 AU6 M_B_DQ53 AV1
AT5 SA_DQ_54 AP3 SB_DQ_54
M_A_DQ55 AN10 M_B_DQ55 AR1
17 M_A_DQ[56..63] SA_DQ_55 17 M_B_DQ[56..63] SB_DQ_55
M_A_DQ56 AM11 M_B_DQ56 AL1
AM5 SA_DQ_57 AL2 SB_DQ_57
M_A_DQ58 AJ9 M_B_DQ58 AJ1
AJ8 SA_DQ_59 AH1 SB_DQ_59
M_A_DQ60 AN12 M_B_DQ60 AM2
AM13 SA_DQ_61 AM3 SB_DQ_61
M_A_DQ62 AJ11 M_B_DQ62 AH3
AJ12 SA_DQ_63 AJ3 SB_DQ_63
CANTIGA_1p2 CANTIGA_1p2
A A
PROJECT : PB5/6
DDRII 1A

5 4 3 2 1
5 4 3 2 1
BOM Option Table
Reference
IV@
Description
INT VGA 08
EV@ EXT VGA
+1.8VSUS_GMCH 1.8VSUS
+1.8VSUS_GMCH +VGFX_CORE_INT
R208 0_1206
U26F U26G
VCCP
D AP33 W28 C463 C462 C163 + C156 D

VCC_SM_1 VCC_AXG_NCTF_1
AG34 VCC_1 AN33 VCC_SM_2 VCC_AXG_NCTF_2 V28 Close to GMCH
AC34 BH32 W26 10u/6.3V_8 10u/6.3V_8 0.1u/10V_4 330u/2.5V_7343
VCC_2 VCC_SM_3 VCC_AXG_NCTF_3
AB34 VCC_3 BG32 VCC_SM_4 VCC_AXG_NCTF_4 V26
AA34 VCC_4 BF32 VCC_SM_5 VCC_AXG_NCTF_5 W25
Y34 VCC_5 BD32 VCC_SM_6 VCC_AXG_NCTF_6 V25
V34 VCC_6 BC32 VCC_SM_7 VCC_AXG_NCTF_7 W24
U34 VCC_7 BB32 VCC_SM_8 VCC_AXG_NCTF_8 V24
AM33 BA32 W23 VCCP
AK33 VCC_9 AY32 VCC_SM_10 VCC_AXG_NCTF_10 V23
AJ33 VCC_10 AW32 VCC_SM_11 VCC_AXG_NCTF_11 AM21
AG33 VCC_11 AV32 VCC_SM_12 VCC_AXG_NCTF_12 AL21
AF33 VCC_12 AU32 VCC_SM_13 VCC_AXG_NCTF_13 AK21
AT32 W21 C122 C135 C131 C127 + C91
VCC_SM_14 VCC_AXG_NCTF_14
AE33 VCC_13 AR32 VCC_SM_15 VCC_AXG_NCTF_15 V21
VCCP
VCC CORE
0.1u/10V_4 0.22u/6.3V_4 0.22u/6.3V_4 22u/6.3V_8 270u/2V_7343
POWER
AC33 VCC_14 AP32 VCC_SM_16 VCC_AXG_NCTF_16 U21
AA33 VCC_15 AN32 VCC_SM_17 VCC_AXG_NCTF_17 AM20
Y33 VCC_16 BH31 VCC_SM_18 VCC_AXG_NCTF_18 AK20
W33 BG31 W20 R172 IV@0_0402
V33 VCC_18 BF31 VCC_SM_20 VCC_AXG_NCTF_20 U20
U33 BG30 AM19 Close to GMCH R154 IV@0_0402
AH28 VCC_20 BH29 VCC_SM_22 VCC_AXG_NCTF_22 AL19
AF28 BG29 AK19 R164 IV@0_0402
VCC_21 VCC_SM_23 VCC_AXG_NCTF_23 +VGFX_CORE_INT
AC28 VCC_22 BF29 VCC_SM_24 VCC_AXG_NCTF_24 AJ19
AA28 BD29 AH19 R169 IV@0_0402
VCC SM
AJ26 VCC_24 BC29 VCC_SM_26 VCC_AXG_NCTF_26 AG19 See Page 9 EV&IV table
AG26 BB29 AF19 R155 IV@0_1206
AE26 VCC_26 BA29 VCC_SM_28 VCC_AXG_NCTF_28 AE19
AC26 AY29 AB19 R519 IV@0_1206
VCC_27 VCC_SM_29 VCC_AXG_NCTF_29 C128 C112 C124 C143 C111 C133
AH25 VCC_28 AW29 VCC_SM_30 VCC_AXG_NCTF_30 AA19
AG25 AV29 Y19 R163 R167 R165
VCC_29 VCC_SM_31 VCC_AXG_NCTF_31 IV@0.47u/6.3V_4 IV@1u/16V_6 IV@10u/10V_8 IV@10u/6.3V_8 IV@0.1u/10V_4 IV@0.1u/10V_4
AF25 VCC_30 AU29 VCC_SM_32 VCC_AXG_NCTF_32 W19
AG24 AT29 V19 EV@0_6 EV@0_6 EV@0_6
AJ23 VCC_32 AR29 VCC_SM_34 VCC_AXG_NCTF_34 U19
AH23 VCCP AP29 AM17
VCC_33 VCC_SM_35 VCC_AXG_NCTF_35 DR8
POWER
C AF23 AK17 C
VCC_34 VCC_AXG_NCTF_36 DR9
VCC_NCTF_1 AM32 BA36 VCC_SM_36/NC VCC_AXG_NCTF_37 AH17
T32 VCC_35 VCC_NCTF_2 AL32 BB24 VCC_SM_37/NC VCC_AXG_NCTF_38 AG17
VCC_NCTF_3 AK32 BD16 VCC_SM_38/NC VCC_AXG_NCTF_39 AF17
R156 AJ32 BB21 AE17 Place close to the GMCH
VCC_NCTF_4 VCC_SM_39/NC VCC_AXG_NCTF_40 +VGFX_CORE_INT
0_4 VCC_NCTF_5 AH32 AW16 VCC_SM_40/NC VCC_AXG_NCTF_41 AC17 and different location
VCC_NCTF_6 AG32 AW13 VCC_SM_41/NC VCC_AXG_NCTF_42 AB17
VCC_NCTF_7 AE32 AT13 VCC_SM_42/NC VCC_AXG_NCTF_43 Y17
VCC_NCTF_8 AC32 VCC_AXG_NCTF_44 W17
AA32 +VGFX_CORE_INT V17
VCC GFX NCTF

VCC_NCTF_9 VCC_AXG_NCTF_45
VCC_NCTF_10 Y32 VCC_AXG_NCTF_46 AM16
W32 Y26 AL16 + C92 + C85
VCC_NCTF_11 VCC_AXG_1 VCC_AXG_NCTF_47
VCC_NCTF_12 U32 AE25 VCC_AXG_2 VCC_AXG_NCTF_48 AK16
AM30 AB25 AJ16 IV@330u/2.5V_7343 IV@330u/2.5V_7343
VCC_NCTF_14 AL30 AA25 VCC_AXG_4 VCC_AXG_NCTF_50 AH16
VCC_NCTF_15 AK30 AE24 VCC_AXG_5 VCC_AXG_NCTF_51 AG16
VCC_NCTF_16 AH30 AC24 VCC_AXG_6 VCC_AXG_NCTF_52 AF16 Close to GMCH
VCC_NCTF_17 AG30 AA24 VCC_AXG_7 VCC_AXG_NCTF_53 AE16
VCC_NCTF_18 AF30 Y24 VCC_AXG_8 VCC_AXG_NCTF_54 AC16
VCC_NCTF_19 AE30 AE23 VCC_AXG_9 VCC_AXG_NCTF_55 AB16
VCC_NCTF_20 AC30 AC23 VCC_AXG_10 VCC_AXG_NCTF_56 AA16
VCC_NCTF_21 AB30 AB23 VCC_AXG_11 VCC_AXG_NCTF_57 Y16
VCC_NCTF_22 AA30 AA23 VCC_AXG_12 VCC_AXG_NCTF_58 W16
VCC_NCTF_23 Y30
W30
AJ21
AG21
VCC_AXG_13 VCC_AXG_NCTF_59 V16
U16 NB Power Status and max current table(1/3)
VCC NCTF
VCC_NCTF_25 V30 AE21 VCC_AXG_15 POWER PLANE S0 S3 S4/S5 Voltage I(max) Note
VCC_NCTF_26 U30 AC21 VCC_AXG_16
VCC_NCTF_27 AL29 AA21 VCC_AXG_17 VCC(EXT_VGA) O X X +1.05V 2178mA
VCC_NCTF_28 AK29 Y21 VCC_AXG_18
VCC_NCTF_29 AJ29 AH20 VCC_AXG_19 VCC(INT_VGA) O X X +1.05V 2899mA
VCC_NCTF_30 AH29 AF20 VCC_AXG_20
VCC_NCTF_31 AG29 AE20 VCC_AXG_21 VCC_AXG O X X +1.05V 8700mA Graphics Core
VCC_NCTF_32 AE29 AC20 VCC_AXG_22
VCC_NCTF_33 AC29 AB20 VCC_AXG_23 VCC_SM(800) O O X +1.8VSUS 3A (DDRII-667) 2.6A
VCC_NCTF_34 AA29 AA20 VCC_AXG_24
B B
VCC_NCTF_35 Y29 T17 VCC_AXG_25 VCC_SM(Standby) O O X +1.8VSUS 1mA Self Refresh during S3
VCC_NCTF_36 W29 T16 VCC_AXG_26
VCC_NCTF_37 V29 AM15 VCC_AXG_27
VCC_NCTF_38 AL28 AL15 VCC_AXG_28 (See NB EDS Rev:1.0 Section 10.1 for max current)
VCC_NCTF_39 AK28 AE15 VCC_AXG_29
VCC_NCTF_40 AL26 AJ15 VCC_AXG_30 (See NB EDS Rev:1.0 Section 12.2 for DC voltage)
VCC_NCTF_41 AK26 AH15 VCC_AXG_31
VCC_NCTF_42 AK25 AG15 VCC_AXG_32
VCC_NCTF_43 AK24 AF15 VCC_AXG_33
VCC_NCTF_44 AK23 AB15 VCC_AXG_34
AA15 VCC_AXG_35
VCC GFX
Y15 VCC_AXG_36
V15 VCC_AXG_37
U15 VCC_AXG_38 Close to each pins
AN14 VCC_AXG_39 1.8V Internal connect to power
AM14 VCC_AXG_40
CANTIGA_1p2 U14 AV44
VCC_AXG_41 VCC_SM_LF1
VCC SM LF
T14 VCC_AXG_42 VCC_SM_LF2 BA37

VCC_SM_LF3 AM40
VCC_SM_LF4 AV21
VCC_SM_LF5 AY5
VCC_SM_LF6 AM10
+VGFX_CORE_INT BB13
VCC_SM_LF7
C169 C150 C165 C162 C140 C167 C160
R174 IV@10/F_6 AJ14
R173 IV@10/F_6 VCC_AXG_SENSE 0.1u/10V_4 0.1u/10V_4 0.22u/6.3V_4 0.22u/6.3V_4 0.47u/10V_6 1u/16V_6 1u/16V_6
AH14 VSS_AXG_SENSE
1. Route VCC_AXG_SENSE and VSS_AXG_SENSE differentially

2. VCC_AXG_SENSE PU to +VGFX_CORE_INT with 10ohm
A and VSS_AXG_SENSE PD with 10ohm for Intel suggest CANTIGA_1p2
A
PROJECT : PB5/6
NB(4/7) VCC ,NCTF 1A

5 4 3 2 1
5 4 3 2 1
+3V_A_TV_CRT +3V_A_TV_CRT
http://hobi-elektronika.net BOM Option Table 09
L44 IV@BLM18PG181SN1D_6 +3V_A_DAC_BG +3V_A_CRT_DAC Reference Description
VCC3
C538 C517 C510 R536 C529 C533
IV@ INT VGA
IV@10u/10V_8 IV@0.1u/10V_4 IV@0.01u/16V_4 EV@0_4 IV@0.1u/10V_4 IV@0.01u/16V_4

EV@ EXT VGA
IHM@ INT HDMI
DR1
DR7
D D
VCCP L46 IV@0_8 VCCP L13 IV@0_8 +1.05VM_DPLLA
R559 R123
C546 + C539 C86 + C99
EV@0_4 EV@0_4
IV@220u/2.5V_7343 IV@0.1u/10V_4 IV@220u/2.5V_7343 IV@0.1u/10V_4
DR11 DR10
VCCP
U26H
+1.05VM_DPLLB
VTT_1 U13
VTT_2 T13
VCCP R188 0_6 +1.05VM_MCH_PLL2 R168 0_6 +1.05VM_HPLL +3V_A_CRT_DAC B27 VCCA_CRT_DAC_1 VTT_3 U12 C123 C501 C500 C502 + C504
A26 VCCA_CRT_DAC_2 VTT_4 T12
C125 C129 U11 0.47u/6.3V_4 2.2u/6.3V_6 4.7u/10V_6 4.7u/10V_6 270u/2V_7343
VTT_5
VTT_6 T11
4.7u/10V_6 0.1u/10V_4 +3V_A_DAC_BG A25 U10
CRT
VCCA_DAC_BG VTT_7
B25 VSSA_DAC_BG VTT_8 T10
VTT_9 U9
VTT_10 T9
VTT_11 U8
L18 0_6 +1.05VM_MPLL +1.05VM_DPLLA F47 VCCA_DPLLA VTT_12 T8
U7
VTT
+1.05VM_DPLLB VTT_13 +1.05VM_AXF L42 0.1uh_6
L48 VCCA_DPLLB VTT_14 T7 VCCP
VTT_15 U6
+1.05VM_HPLL AD1 T6 C513 C531
PLL
VCCA_HPLL VTT_16
VTT_17 U5
R187 *0.5/F_6 +1.05VM_MPLL_RC +1.05VM_MPLL AE1 VCCA_MPLL VTT_18 T5 1u/6.3V_4 *10u/10V_8
VTT_19 V3
C134 C142 U3
+1.8VSUS_TXLVDS VTT_20
J48 VCCA_LVDS VTT_21 V2
0.1u/10V_4 *22u/6.3V_8 U2
A LVDS
C530 VTT_22
J47 VSSA_LVDS VTT_23 T2
VTT_24 V1
IV@1000p/50V_4
VTT_25 U1 +1.8VSUS_VCC_SM_CK L37 1uh_8 +1.8VSUS_GMCH
VCC1.5 R514 0_8 +1.5V_VCCA_PEG_BG AD48

VCCA_PEG_BG C459
VCCP R194 0_6 +1.05VM_A_SM C488 1/F_4 R498 +1.8VSUS_SMCK_RC
0.1u/10V_4
A PEG
C172 C154 C155 C151 C152 0.1u/10V_4
C C
+ +1.05VM_PEGPLL AA48 C466
100u/10V_7343 *10u/6.3V_8 10u/6.3V_8 4.7u/10V_6 1u/6.3V_4 VCCA_PEG_PLL
10u/10V_8
+1.05VM_A_SM AR20 VCCA_SM_1

AP20 VCCA_SM_2
AN20
AR17
AP17
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
POWER +1.8VSUS_TXLVDS L45 IV@0.1uh_6 1.8VSUS
AN17 VCCA_SM_6
VCCP R175 0_6 +1.05VM_A_SM_CK AT16 VCCA_SM_7
AR16 R548 C522 C514
A SM
VCCA_SM_8
AP16 VCCA_SM_9
C157 C149 C144 EV@0_4 IV@1000p/50V_4 IV@10u/6.3V_8
*2.2u/6.3V_6 10u/6.3V_8 0.1u/10V_4 DR3 VCCP

DR4
2
+1.05VM_A_SM_CK AP28 D30
VCCA_SM_CK_1 +1.05VM_AXF
AN28 VCCA_SM_CK_2 VCC_AXF_1 B22
R545 IV@0_6 +3V_TV_DAC AP25 B21 BAT54
AXF
VCC3 VCCA_SM_CK_3 VCC_AXF_2
AN25 A21
1
VCCA_SM_CK_4 VCC_AXF_3
AN24 VCCA_SM_CK_5
C523 C516 R525 AM28 VCCA_SM_CK_NCTF_1 R551 10_4 +1.05V_SD
AM26
A CK
IV@0.1u/10V_4 IV@0.01u/16V_4 EV@0_4 VCCA_SM_CK_NCTF_2
AM25 VCCA_SM_CK_NCTF_3
AL25 BF21 +1.8VSUS_VCC_SM_CK
VCCA_SM_CK_NCTF_4 VCC_SM_CK_1 +3V_VCC_HV 0_6 R547
DR5 AM24 BH20
SM CK
VCCA_SM_CK_NCTF_5 VCC_SM_CK_2 VCC3
AL24 VCCA_SM_CK_NCTF_6 VCC_SM_CK_3 BG20
AM23 BF20 C525
VCCA_SM_CK_NCTF_7 VCC_SM_CK_4
AL23 VCCA_SM_CK_NCTF_8 0.1u/10V_4
VCC1.5 R541 IHM@0_6 +1.5V_VCC_HDA VCC_TX_LVDS K47 +1.8VSUS_TXLVDS +1.05V_VCC_PEG

+3V_TV_DAC B24
C520 R527 VCCA_TV_DAC_1 +3V_VCC_HV
FOR iHDMI HDA I/F only IF iHDMI not used,HDA A24 VCCA_TV_DAC_2 VCC_HV_1 C35
+1.05V_VCC_PEG
TV
B35 R518 0_8 VCCP
IHM@0.1u/10V_4 EV@0_4 connect ot GND(DG1.0 P277) VCC_HV_2
A35
HV
VCC_HV_3 C109 C108
DR12 +1.5V_VCC_HDA A32 + C503
VCC_HDA
HDA
V48 +1.05V_VCC_PEG 4.7u/10V_6 10u/6.3V_8
VCC_PEG_1 220u/2.5V_7343
VCC_PEG_2 U48
B V47 B
PEG
VCC_PEG_3
VCC_PEG_4 U47
+1.5V_TVDAC
D TV/CRT
VCC1.5 R546 0_6 +1.5V_TVDAC M25 U46
VCCD_TVDAC VCC_PEG_5
+1.5V_QDAC L28
C518 C524 VCCD_QDAC +1.05V_VCC_DMI +1.05V_VCC_DMI R158 0_8
VCC_DMI_1 AH48 +1.05V_VCC_PEG
+1.05VM_MCH_PLL2 AF1 AF48
0.1u/10V_4 0.01u/16V_4 VCCD_HPLL VCC_DMI_2 C471
AH47
DMI
+1.05VM_PEGPLL VCC_DMI_3
AA47 VCCD_PEG_PLL VCC_DMI_4 AG47
0.1u/10V_4
C130
+1.8VSUS_DLVDS M38 VCCD_LVDS_1
LVDS
0.1u/10V_4 L37 A8 *91nh_32X25
VCCD_LVDS_2 VTTLF1 L38
VTTLF2 L1 VCCP
+1.5V_QDAC
VTTLF
VCC1.5 L43 IV@BLM18PG181SN1D_6 AB2
VTTLF3 C478
C119 C107 C102 C467 +
C536 C519 C511 R537 *220u/2.5V_7343 Del it to save space?
CANTIGA_1p2 0.47u/6.3V_4 0.47u/6.3V_4 0.47u/6.3V_4 *10u/10V_8
IV@10u/6.3V_8 IV@0.1u/10V_4 IV@0.01u/16V_4 EV@0_4
DR6
NB Power Status and max current table(2/3)(NB left side) EXT&INT VGA Power Plane Option table NB Power Status and max current table(3/3)(NB Right side)
POWER PLANE S0 S3 S4/S5 Voltage I(max) Note POWER PLANE EXT VGA INT VGA MARK POWER PLANE S0 S3 S4/S5 Voltage I(max) Note
VCCP L40 BLM18PG181SN1D_6 +1.05VM_PEGPLL VCCA_CRT_DAC O X X +3.3V 73mA VCCA_CRT_DAC GND +3V DR1 VTT O X X +1.05V 852mA FSB at 1067MHz
C494 C496 O X X GND DR2 O X X
VCCA_DAC_BG +3.3V 5mA VCCD_LVDS +1.8VSUS VCCA_AXF +1.05V 322mA
0.1u/10V_4 0.1u/10V_4 O X X GND DR3 O O X
VCCA_DPLLA +1.05V 64.8mA VCC_TX_LVDS +1.8VSUS VCC_SM_CK(800) +1.8VSUS 124mA (DDRII-667) 120mA
VCCA_DPLLB O X X +1.05V 64.8mA VCCA_LVDS GND +1.8VSUS DR4 VCC_TX_LVDS O O X +1.8VSUS 119mA
VCCA_HPLL O X X +1.05V 24mA VCCD_TVDAC +1.5V +1.5V VCC_HV O X X +3V 106mA
R515 1/F_4 +1.05VM_PEGPLL_RC VCCA_MPLL O X X +1.05V 139.2mA VCCA_TV_DAC GND +3V DR5 VCC_PEG O X X +1.05V 1782mA
C499 O O X GND DR6 O X X
VCCA_LVDS +1.8VSUS 13.2mA VCCD_QDAC +1.5V VCC_DMI +1.05V 456mA
10u/10V_8 O X X GND DR7
VCCA_PEG_BG +1.5V 414uA VCCA_DAC_BG +3V
A (See NB EDS Rev:1.0 Section 10.1 for max current) A
VCCA_PEG_PLL O X X +1.05V 50mA VCC_AXG GND +1.05V DR8 Page 8
(See NB EDS Rev:1.0 Section 12.2 for DC voltage)
VCCA_SM(DDRII-800) O X X +1.05V 720mA (DDRII-667) 480mA VCC_AXG_NCTF GND +1.05V DR9 Page 8
1.8VSUS R552 IV@0_6 +1.8VSUS_DLVDS VCCA_SM_CK(800) O X X +1.05V 26mA (DDRII-667) 24mA VCCA_DPLLA GND +1.05V DR10
VCCA_TV_DAC O X X +3.3V 79mA VCCA_DPLLB GND +1.05V DR11
C534 R540
VCC_HDA O X X +1.5V 50mA VCC_HDA GND +1.5V DR12 For iHDMI
IV@1u/6.3V_4 EV@0_4
VCCD_TVDAC O X X +1.5V 35mA
DR2 EXT VGA->Disable TV/CRT/LVDS/HDMI(See DG 1.0 P190 Table 103)
VCCD_QDAC O X X +1.5V 125uA PROJECT : PB5/6
INT VGA->Disable TV/Enable CRT( See DG1.0 P208 Table 118)
O X X
VCCD_HPLL +1.05V 157mA
INT VGA->Disable HDMI(See DG 1.0 P277 section 3.10.4) Quanta Computer Inc.
VCCD_PEG_PLL O X X +1.05V 50mA Size Document Number Rev
VCCD_LVDS O O X +1.8VSUS 60mA NB(5/7) POWER 1A
Date: Thursday, April 24, 2008 Sheet 9 of 35

5 4 3 2 1
5 4 3 2 1
AU48
AR48
U26I
VSS_1 VSS_100 AM36

AE36
BG21
L12
AW21
U26J
VSS_199
VSS_200
VSS_297
VSS_298
AH8
Y8
L8
10
VSS_2 VSS_101 VSS_201 VSS_299
AL48 VSS_3 VSS_102 P36 AU21 VSS_202 VSS_300 E8
BB47 VSS_4 VSS_103 L36 AP21 VSS_203 VSS_301 B8
AW47 VSS_5 VSS_104 J36 AN21 VSS_204 VSS_302 AY7
AN47 VSS_6 VSS_105 F36 AH21 VSS_205 VSS_303 AU7
AJ47 VSS_7 VSS_106 B36 AF21 VSS_206 VSS_304 AN7
AF47 VSS_8 VSS_107 AH35 AB21 VSS_207 VSS_305 AJ7
D
AD47 VSS_9 VSS_108 AA35 R21 VSS_208 VSS_306 AE7 D
AB47 VSS_10 VSS_109 Y35 M21 VSS_209 VSS_307 AA7
Y47 VSS_11 VSS_110 U35 J21 VSS_210 VSS_308 N7
T47 VSS_12 VSS_111 T35 G21 VSS_211 VSS_309 J7
N47 VSS_13 VSS_112 BF34 BC20 VSS_212 VSS_310 BG6
L47 VSS_14 VSS_113 AM34 BA20 VSS_213 VSS_311 BD6
G47 VSS_15 VSS_114 AJ34 AW20 VSS_214 VSS_312 AV6
BD46 VSS_16 VSS_115 AF34 AT20 VSS_215 VSS_313 AT6
BA46 VSS_17 VSS_116 AE34 AJ20 VSS_216 VSS_314 AM6 BOM Option Table
AY46 VSS_18 VSS_117 W34 AG20 VSS_217 VSS_315 M6
AV46 VSS_19 VSS_118 B34 Y20 VSS_218 VSS_316 C6 Reference Description
AR46 VSS_20 VSS_119 A34 N20 VSS_219 VSS_317 BA5
AM46 VSS_21 VSS_120 BG33 K20 VSS_220 VSS_318 AH5 N/A N/A
V46 VSS_22 VSS_121 BC33 F20 VSS_221 VSS_319 AD5
R46 VSS_23 VSS_122 BA33 C20 VSS_222 VSS_320 Y5
P46 VSS_24 VSS_123 AV33 A20 VSS_223 VSS_321 L5
H46 VSS_25 VSS_124 AR33 BG19 VSS_224 VSS_322 J5
F46 VSS_26 VSS_125 AL33 A18 VSS_225 VSS_323 H5
BF44 VSS_27 VSS_126 AH33 BG17 VSS_226 VSS_324 F5
AH44 VSS_28 VSS_127 AB33 BC17 VSS_227 VSS_325 BE4
AD44 VSS_29 VSS_128 P33 AW17 VSS_228
AA44 L33 AT17 BC3
Y44
U44
VSS_30
VSS_31
VSS_32
VSS_129
VSS_130
VSS_131
H33
N32
R17
M17
VSS_229
VSS_230
VSS_231
VSS VSS_327
VSS_328
VSS_329
AV3
AL3
T44 K32 H17 R3
M44
F44
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
F32
C32
C17
VSS_232
VSS_233
VSS_330
VSS_331
VSS_332
P3
F3
BC43 VSS_36 VSS_135 A31 BA16 VSS_235 VSS_333 BA2
AV43 VSS_37 VSS_136 AN29 VSS_334 AW2
AU43 VSS_38 VSS_137 T29 AU16 VSS_237 VSS_335 AU2
C AM43 VSS_39 VSS_138 N29 AN16 VSS_238 VSS_336 AR2 C
J43 VSS_40 VSS_139 K29 N16 VSS_239 VSS_337 AP2
C43 VSS_41 VSS_140 H29 K16 VSS_240 VSS_338 AJ2
BG42 VSS_42 VSS_141 F29 G16 VSS_241 VSS_339 AH2
AY42 VSS_43 VSS_142 A29 E16 VSS_242 VSS_340 AF2
AT42 VSS_44 VSS_143 BG28 BG15 VSS_243 VSS_341 AE2
AN42 VSS_45 VSS_144 BD28 AC15 VSS_244 VSS_342 AD2
AJ42 VSS_46 VSS_145 BA28 W15 VSS_245 VSS_343 AC2
AE42 VSS_47 VSS_146 AV28 A15 VSS_246 VSS_344 Y2
N42 VSS_48 VSS_147 AT28 BG14 VSS_247 VSS_345 M2
L42 VSS_49 VSS_148 AR28 AA14 VSS_248 VSS_346 K2
BD41 VSS_50 VSS_149 AJ28 C14 VSS_249 VSS_347 AM1
AU41 VSS_51 VSS_150 AG28 BG13 VSS_250 VSS_348 AA1
AM41 VSS_52 VSS_151 AE28 BC13 VSS_251 VSS_349 P1
AH41 VSS_53 VSS_152 AB28 BA13 VSS_252 VSS_350 H1
AD41 VSS_54 VSS_153 Y28
AA41 P28 U24 MCH_VSS_351 R160 0_4
VSS_55 VSS_154 VSS_351 MCH_VSS_352 R159 0_4
Y41 VSS_56 VSS_155 K28 AN13 VSS_255 VSS_352 U28
U41 H28 AJ13 U25 MCH_VSS_353 R151 0_4
VSS_57 VSS_156 VSS_256 VSS_353 MCH_VSS_354 R157 0_4
T41 VSS_58 VSS_157 F28 AE13 VSS_257 VSS_354 U29
M41 C28 N13 AJ6 MCH_VSS_355 R178 0_4
VSS_59 VSS_158 VSS_258 VSS_355
G41 VSS_60 VSS_159 BF26 L13 VSS_259
B41 VSS_61 VSS_160 AH26 G13 VSS_260 VSS_NCTF_1 AF32
BG40 VSS_62 VSS_161 AF26 E13 VSS_261 VSS_NCTF_2 AB32
BB40 VSS_63 VSS_162 AB26 BF12 VSS_262 VSS_NCTF_3 V32
AV40 VSS_64 VSS_163 AA26 AV12 VSS_263 VSS_NCTF_4 AJ30
AN40 VSS_65 VSS_164 C26 AT12 VSS_264 VSS_NCTF_5 AM29
H40 VSS_66 VSS_165 B26 AM12 VSS_265 VSS_NCTF_6 AF29
E40 BH25 AA12 AB29
VSS NCTF
VSS_67 VSS_166 VSS_266 VSS_NCTF_7
B
AT39 VSS_68 VSS_167 BD25 J12 VSS_267 VSS_NCTF_8 U26 B
AM39 VSS_69 VSS_168 BB25 A12 VSS_268 VSS_NCTF_9 U23
AJ39 VSS_70 VSS_169 AV25 BD11 VSS_269 VSS_NCTF_10 AL20
AE39 VSS_71 VSS_170 AR25 BB11 VSS_270 VSS_NCTF_11 V20
N39 VSS_72 VSS_171 AJ25 AY11 VSS_271 VSS_NCTF_12 AC19
L39 VSS_73 VSS_172 AC25 AN11 VSS_272 VSS_NCTF_13 AL17
B39 VSS_74 VSS_173 Y25 AH11 VSS_273 VSS_NCTF_14 AJ17
BH38 VSS_75 VSS_174 N25 VSS_NCTF_15 AA17
BC38 VSS_76 VSS_175 L25 Y11 VSS_275 VSS_NCTF_16 U17
BA38 VSS_77 VSS_176 J25 N11 VSS_276
AU38 VSS_78 VSS_177 G25 G11 VSS_277 VSS_SCB_1 BH48
AH38 E25 C11 BH1
VSS SCB
VSS_79 VSS_178 VSS_278 VSS_SCB_2
AD38 VSS_80 VSS_179 BF24 BG10 VSS_279 VSS_SCB_3 A48
AA38 VSS_81 VSS_180 AD12 AV10 VSS_280 VSS_SCB_4 C1
Y38 VSS_82 VSS_181 AY24 AT10 VSS_281
U38 VSS_83 VSS_182 AT24 AJ10 VSS_282 VSS_SCB_6 A3
T38 VSS_84 VSS_183 AJ24 AE10 VSS_283
J38 VSS_85 VSS_184 AH24 AA10 VSS_284 NC_26 E1
F38 VSS_86 VSS_185 AF24 M10 VSS_285 NC_27 D2
C38 VSS_87 VSS_186 AB24 BF9 VSS_286 NC_28 C3
BF37 VSS_88 VSS_187 R24 BC9 VSS_287 NC_29 B4
BB37 VSS_89 VSS_188 L24 AN9 VSS_288 NC_30 A5
AW37 VSS_90 VSS_189 K24 AM9 VSS_289 NC_31 A6
AT37 VSS_91 VSS_190 J24 AD9 VSS_290 NC_32 A43
AN37 VSS_92 VSS_191 G24 G9 VSS_291 NC_33 A44
AJ37 F24 B9 B45
NC
VSS_93 VSS_192 VSS_292 NC_34
H37 VSS_94 VSS_193 E24 BH8 VSS_293 NC_35 C46
C37 VSS_95 VSS_194 BH23 BB8 VSS_294 NC_36 D47
BG36 VSS_96 VSS_195 AG23 AV8 VSS_295 NC_37 B47
BD36 VSS_97 VSS_196 Y23 AT8 VSS_296 NC_38 A46
A AK15 VSS_98 VSS_197 B23 NC_39 F48 A
AU36 VSS_99 VSS_198 A23 NC_40 E48
NC_41 C48
NC_42 B48
CANTIGA_1p2 A47
NC_43
CANTIGA_1p2 PROJECT : PB5/6
NB(6/7) VSS 1A
5 4 3 2 1
5 4 3 2 1
North Bridge Strap Pin Configuration Table http://hobi-elektronika.net

(See DG 1.0 P295 Table 184)
(See NB EDS 1.0 P187 Table 74)
11
Pin Name Strap description Configuration PU<4.02K> PD <2.21K> Note
D CFG[2:0] FSB Frequency Select [000]= FSB 1066MHz [010] = FSB 800MHz [011] = FSB 667MHz See Page 2 FSB selection table D
CFG[4:3] Reserved
DMI X2 Select 0 = DMI X2 R115 *4.02K/F_4

CFG5 6 MCH_CFG_5
1 = DMI X4(Default)
iTPM Host Interface 0 = iTPM Host Interface is enabled R146 *10K/F_4 Enable iTPM
CFG6 6 MCH_CFG_6
1 = iTPM Host Interface is disabled(Default)
0 = AMT Firmware will use TLS cipher suite with no confidentiality R142 *4.02K/F_4
CFG7 ME TLS Confidentiality 6 MCH_CFG_7
1 = AMT Firmware will use TLS cipher suite with confidentiality(Default) BOM Option Table
Reference Description
CFG8 Reserved
N/A N/A
PCI Express Graphics 0 = Reverse Lanes R549 *4.02K/F_4

CFG9 6 MCH_CFG_9
Lane Reversal 1 = Normal operation(Default)
PCIE Loopback enable 0 = Enabled R550 *4.02K/F_4

C CFG10 6 MCH_CFG_10 C
1 = Disabled (Default)
CFG11 Reserved
ALLZ 0 = ALLZ mode enable R144 *4.02K/F_4

CFG12 6 MCH_CFG_12
1 = disable(Default)
XOR 0 = XOR mode enable R150 *4.02K/F_4

CFG13 6 MCH_CFG_13
1 = disable(Default)
CFG[15:14] Reserved
FSB Dynamic ODT 0 = Dynamic ODT disable R138 *4.02K/F_4

CFG16 6 MCH_CFG_16
1 = Dynamic ODT Enable(Default)
CFG[18:17] Reserved
DMI Lane Reversal 0 = Normal (Default) R85 *4.02K/F_4

B CFG19 6 MCH_CFG_19 VCC3 B
1 = Lanes Reversed
0 = Only Digital Display port (SDVO/DP/iHDMI) or PCIE is

Digital Display Port
operational (Default) R84 *4.02K/F_4
CFG20 (SDVO/DP/iHDMI) 6 MCH_CFG_20 VCC3
1 = Digital Display port (SDVO/DP/iHDMI) and PCIE are operating
Concurrent with PCIE
simultaneously via PEG port
SDVO Present 0 = No SDVO/HDMI/DP Device Present(Default) R92 *2.2K/F_4

SDVO_CTRLDATA 6 SDVO_CTRLDATA VCC3
1 = SDVO/HDMI/DP Device present
L_DDC_DATA Local Flat Panel(LFP) Present 0 = LFP Disable(Default) R103 *2.2K/F_4

6,19 INT_LVDS_EDIDDATA VCC3
1 = LFP Card Present;PCIE disable
DDPC_CTRLDATA Digital Display Present 0 = Digital display(HDMI/DP) device absent(Default) R90 *2.2K/F_4
6 DDPC_CTRLDATA VCC3
1 = Digital display(HDMI/DP) device present
Enable iTPM Table

A A
PAGE Net Name PU & PD NOTE

11 MCH_CFG_6 PD 10K to GND NB Strap pin
13 SPI_MOSI PU 20K to +3V_S5 SB Strap pin PROJECT : PB5/6
14 CLGPIO5 PU 10K to +3V_S5 SB Strap pin Quanta Computer Inc.
NB(7/7) STRAP 1A

5 4 3 2 1
5 4 3 2 1
RTC CRYSTAL
BOM Option Table
Layout note:
C325 10p/50V_4 CLK_32KX1 U22A

LDRQ0/1# : Internal PU
DPRSTP# , Daisy Chain
(SB>Power>NB>CPU)
Reference
IHM@
Description
INT HDMI 12
CLK_32KX1 C23 K5 LAD0
RTCX1 FWH0/LAD0 LAD0 24,28
2
1
CLK_32KX2 C24 K4 LAD1
RTCX2 FWH1/LAD1 LAD1 24,28
R335 L6 LAD2
32.768KHZ FWH2/LAD2 LAD2 24,28 +1.05V_ICH_IO
CLEAR_CMOS A25 K2 LAD3
Y4 RTCRST# FWH3/LAD3 LAD3 24,28 VCC3
RTC
LPC
10M_6 SRTC_RST# F20
SM_INTRUDER# SRTCRST# LFRAME#
C22 K3 LFRAME# 24,28
3
4
C324 10p/50V_4 CLK_32KX2 INTRUDER# FWH4/LFRAME#
B22 J3 LDRQ#0 GATEA20 R289 8.2K_4
D INTVRMEN LDRQ0# T120 +1.05V_ICH_IO D
ICH_INTVRMEN A22 J1 LDRQ#1 R459 R226
LAN100_SLP LDRQ1#/GPIO23 T93
*56_4 *56_4 RCIN# R294 10K_4
E25 N7 GATEA20 GATEA20 28
GLAN_CLK A20GATE H_A20M#
A20M# AJ27 H_A20M# 3
C13 R457
LAN_RSTSYNC
RESET JUMP F14
DPRSTP# AJ25
AE23
H_DPRSTP#_R
H_DPSLP#_R
R458
R233
0_4
0_4
ICH_DPRSTP# 3,6,31 56_4
LAN / GLAN
LAN_RXD0 DPSLP# H_DPSLP# 3
G13 LAN_RXD1
D14 AJ26 H_FERR#_R R473 56_4 H_FERR#
VCCRTC LAN_RXD2 FERR# H_FERR# 3
An RC delay circuit with a time delay in the range
of 18 ms to 25 ms should be provided D13 AD22 H_PWRGD
LAN_TXD0 CPUPWRGD H_PWRGD 3
D12 LAN_TXD1
R425 20K_6 CLEAR_CMOS E13 AF25 H_IGNNE#
CLEAR_CMOS 28 LAN_TXD2 IGNNE# H_IGNNE# 3
CPU
1
C395 ICH_GPIO56 B10 AE22 H_INIT#

GPIO56 INIT# H_INIT# 3 +1.05V_ICH_IO
G2 AG25 H_INTR
INTR H_INTR 3
1u/6.3V_4 *SHORT_ PAD B28 L3 RCIN# RCIN# 28
GLAN_COMP GLAN_COMPI RCIN#
B27
2
GLAN_COMPO H_NMI
NMI AF23 H_NMI 3
HDA_BIT_CLK_R AF6 AF24 H_SMI#_R R219 0_4 H_SMI# R218
HDA_BIT_CLK SMI# H_SMI# 3
HDA_SYNC_R AH4 56_4
VCCRTC HDA_SYNC H_STPCLK#
STPCLK# AH27 H_STPCLK# 3
HDA_RST#_R AE7 HDA_RST# H_THERMTRIP_R R456 56_4 H_THERMTRIP_RR R217 *0_4 PM_THRMTRIP#
THRMTRIP# AG26 PM_THRMTRIP# 3,6
R316 20K_6 SRTC_RST# ACZ_SDIN0 AF4
21 ACZ_SDIN0 HDA_SDIN0
HDA_SDIN1 AG4 AG27 ICH_TP12
HDA_SDIN1 TP12 T136
1
HDA_SDIN2
IHDA
T168 AH3 Layout note:
C317 G1 T167 HDA_SDIN3 HDA_SDIN2
AE5 HDA_SDIN3 PU R needs to placed within 2" of ICH9-M,
1u/6.3V_4 *SHORT_ PAD T85 AH11 SATA_RXN4_C series R must be placed within 2"of PU R w/o stub.
HDA_SDOUT_R SATA4RXN SATA_RXP4_C
AG5 AJ11
2
HDA_SDOUT SATA4RXP SATA_TXN4_C

SATA4TXN AG12
ICH_GPIO33 AG7 AF12 SATA_TXP4_C
C T133 ICH_GPIO34 HDA_DOCK_EN#/GPIO33 SATA4TXP C
AE8 HDA_DOCK_RST#/GPIO34
T87 AH9 SATA_RXN5_C
SATA_LED# SATA5RXN SATA_RXP5_C
AG8 SATALED# SATA5RXP AJ9
T86
SATA_RXN0_C AJ16
SATA5TXN AE10
AF10
SATA_TXN5_C
SATA_TXP5_C SATA I/F
SATA_RXP0_C SATA0RXN SATA5TXP SATA_RXN0 C440 3900p/25V_4 SATA_RXN0_C
AH16
SATA
SATA0RXP 26 SATA_RXN0
SATA_TXN0_C AF17 AH18 CLK_PCIE_SATA# SATA_RXP0 C439 3900p/25V_4 SATA_RXP0_C
SATA0TXN SATA_CLKN CLK_PCIE_SATA# 2 26 SATA_RXP0
VCCRTC SATA_TXP0_C AG17 SATA0TXP SATA_CLKP AJ18 CLK_PCIE_SATA
CLK_PCIE_SATA 2 To SATA HDD 26 SATA_TXN0
SATA_TXN0 C437 3900p/25V_4 SATA_TXN0_C
(DG 1.0 Table-292) SATA_TXP0 C438 3900p/25V_4 SATA_TXP0_C
26 SATA_TXP0
R424 1M_4 SM_INTRUDER# SATA_RXN1_C AH13 AJ7
Internal VRM enabled for SATA_RXP1_C SATA1RXN SATARBIAS# SATA_RBIAS_PN
AJ13 SATA1RXP SATARBIAS AH7
R317 332K/F_4 ICH_INTVRMEN VccSus1_05, VccSus1_5, SATA_TXN1_C AG14
SATA_TXP1_C SATA1TXN SATA_RXN1 C436 3900p/25V_4 SATA_RXN1_C
VccCL1_5, VccLAN1_05 and AF14 26 SATA_RXN1
SATA1TXP R468 SATA_RXP1 C435 3900p/25V_4 SATA_RXP1_C
VccCL1_05. 26 SATA_RXP1
ICH9M REV 1.0 To SATA HDD1 26 SATA_TXN1
SATA_RBIAS_PN<0.5".Avoid routing 24.9/F_4 SATA_TXP1 C434 3900p/25V_4 SATA_TXP1_C
26 SATA_TXP1
next to clock/high speed signals
RVCC3 BIT_CLK_AUDIO
R327 10K_4 ICH_GPIO56

26 SATA_RXN4 SATA_RXN4 C360 3900p/25V_4 SATA_RXN4_C
26 SATA_RXP4 SATA_RXP4 C359 3900p/25V_4 SATA_RXP4_C
To SATA ODD 26 SATA_TXN4
R462 SATA_TXP4 C362 3900p/25V_4 SATA_TXP4_C
26 SATA_TXP4
0
VCC1.5
R311 24.9/F_4 GLAN_COMP 24.9 Ohm pull up to 1.5V for 27 SATA_RXN5 SATA_RXN5 C629 3900p/25V_4 SATA_RXN5_C
GLAN_COMPI/O is required, no C432 27 SATA_RXP5 SATA_RXP5 C630 3900p/25V_4 SATA_RXP5_C
matter intel LAN is used or not. 10p To eSATA 27 SATA_TXN5
SATA_TXP5 C627 3900p/25V_4 SATA_TXP5_C
B 27 SATA_TXP5 B
HD Audio I/F(CODEC& iHDMI) RTC BATTERY

3VPCU VCCRTC
R613 1K_4 R614 0
HDA_SDOUT_R R476 33_4 2 1
ACZ_SDOUT_AUDIO 21 CLEAR_CMOS 28
D26 RB500V
R_3VRTC 2 1
D27 RB500V
HDA_SYNC_R R442 33_4 C394
ACZ_SYNC_AUDIO 21
HDA_RST#_R R466 33_4
ACZ_RST#_AUDIO 21
1u/10V_6
R417
HDA_BIT_CLK_R R464 33_4 1K_4 5VPCU

BIT_CLK_AUDIO 21
South Bridge Strap Pin (1/3)
RTC_N02 1 3 R428 8.66K/F_4 R432 8.66K/F_4
Pin Name Strap description Sampled Configuration PU/PD Q17

MMBT3904
2
R431
0 = The Flash Descriptor Security will be overridden.
HDA_DOCK_EN/ Flash Descriptor Security This strap should only be enabled in manufacturing
PWROK 1 = The security measures defined CN11 4.7K_4
GPIO33 Override Strap environments using an external pull-up resistor.
in the Flash Descriptor will be in effect 3 1
3 1
4 4 2 2
A RTC_N03 R430 15K_4 A
PCI Express Lane Reversal 53261-0290

SATALED# PWROK Internal PU 85204-0200-2P-L
(Lanes 1-4)
ICH_TP3 HDA_SDOUT Description

TP3 XOR Chain Entrance PWROK 14 ICH_TP3
ICH_TP3 R299 *1K_4 PROJECT : PB5/6
0 0 RSVD
0 1 Enter XOR Chain Quanta Computer Inc.
XOR Chain Entrance /PCI Express*
HDA_SDOUT Port Config 1 bit 1(Port 1-4) PWROK 1 0 Normal opration(Default) HDA_SDOUT_R R467 *1K_4 +3V_HDA_IO_ICH Size Document Number Rev
SB(1/4) HOST 1A
1 1 Set PCIE port config bit 1 PU VCC1.5
5 4 3 2 1
5 4 3 2 1
BOM Option Table
PCI/PCI-E/USB/DMI/SPI Reference Description
25 AD[0..31]
IV@
EV@
INT VGA
EXT VGA 13
U22B U22D
AD0 D11 F1 REQ0# N29 V27 DMI_RXN0
AD0 REQ0# REQ0# 25 24 PCIE_RXN1 PERN1 DMI0RXN DMI_RXN0 6
AD1 GNT0# DMI_RXP0
C8 AD1 PCI GNT0# G4 GNT0# 25 24 PCIE_RXP1 N28 PERP1 DMI0RXP V26 DMI_RXP0 6
Direct Media Interface

AD2 D9 B6 REQ1# T113 24 PCIE_TXN1 C274 0.1u/10V_4 PCIE_TXN1_C P27 U29 DMI_TXN0
AD2 REQ1#/GPIO50 PETN1 DMI0TXN DMI_TXN0 6
AD3 E12 A7 GNT1# 24 PCIE_TXP1 C271 0.1u/10V_4 PCIE_TXP1_C P26 U28 DMI_TXP0
AD3 GNT1#/GPIO51 T102 PETP1 DMI0TXP DMI_TXP0 6
AD4 E9 F13 REQ2#
AD4 REQ2#/GPIO52 T110
AD5 C9 F12 GNT2# T92 L29 Y27 DMI_RXN1
D AD5 GNT2#/GPIO53 24 PCIE_RXN2 PERN2 DMI1RXN DMI_RXN1 6 D
AD6 E10 E6 REQ3# L28 Y26 DMI_RXP1
AD6 REQ3#/GPIO54 T103 24 PCIE_RXP2 PERP2 DMI1RXP DMI_RXP1 6
AD7 B7 F6 GNT3# 24 PCIE_TXN2 C285 0.1u/10V_4 PCIE_TXN2_C M27 W29 DMI_TXN1
AD7 GNT3#/GPIO55 T104 PETN2 DMI1TXN DMI_TXN1 6
AD8 C7 24 PCIE_TXP2 C278 0.1u/10V_4 PCIE_TXP2_C M26 W28 DMI_TXP1
AD8 PETP2 DMI1TXP DMI_TXP1 6
AD9 C5 D8 CBE0#
AD9 C/BE0# CBE0# 25
AD10 G11 B4 CBE1# J29 AB27 DMI_RXN2
AD10 C/BE1# CBE1# 25 24 PCIE_RXN3 PERN3 DMI2RXN DMI_RXN2 6
AD11 F8 D6 CBE2# CBE2# 25 J28 AB26 DMI_RXP2
AD11 C/BE2# 24 PCIE_RXP3 PERP3 DMI2RXP DMI_RXP2 6
PCI-Express
AD12 F11 A5 CBE3# CBE3# 25 24 PCIE_TXN3 C296 0.1u/10V_4 PCIE_TXN3_C K27 AA29 DMI_TXN2
AD12 C/BE3# PETN3 DMI2TXN DMI_TXN2 6
AD13 E7 24 PCIE_TXP3 C300 0.1u/10V_4 PCIE_TXP3_C K26 AA28 DMI_TXP2
AD13 PETP3 DMI2TXP DMI_TXP2 6
AD14 A3 D3 IRDY#
AD14 IRDY# IRDY# 25 +1.5V_PCIE_ICH
AD15 D2 E3 PAR G29 AD27 DMI_RXN3
AD15 PAR PAR 25 24 PCIE_RXN4 PERN4 DMI3RXN DMI_RXN3 6
AD16 F10 R1 PCIRST# G28 AD26 DMI_RXP3
AD16 PCIRST# PCIRST# 24,25,28 24 PCIE_RXP4 PERP4 DMI3RXP DMI_RXP3 6
AD17 D5 C6 DEVSEL# 24 PCIE_TXN4 C302 0.1u/10V_4 PCIE_TXN4_C H27 AC29 DMI_TXN3
AD17 DEVSEL# DEVSEL# 25 PETN4 DMI3TXN DMI_TXN3 6
AD18 D10 E4 PERR# 24 PCIE_TXP4 C304 0.1u/10V_4 PCIE_TXP4_C H26 AC28 DMI_TXP3
AD18 PERR# PETP4 DMI3TXP DMI_TXP3 6
AD19 B3 C2 LOCK# R247
AD20 AD19 PLOCK# SERR# CLK_PCIE_ICH#
F7 AD20 SERR# J4 E29 PERN5 DMI_CLKN T26 CLK_PCIE_ICH# 2 24.9/F_4
AD21 C3 A4 STOP# E28 T25 CLK_PCIE_ICH
AD21 STOP# STOP# 25 PERP5 DMI_CLKP CLK_PCIE_ICH 2
AD22 F3 F5 TRDY# F27
AD22 TRDY# TRDY# 25 PETN5
AD23 F4 D7 FRAME# F26 AF29
AD23 FRAME# FRAME# 25 PETP5 DMI_ZCOMP
AD24 C1 AF28 DMI_IRCOMP_R
AD25 AD24 PLT_RST-R# DMI_IRCOMP
G7 AD25 PLTRST# C14 23 PCIE_RXN6 C29 PERN6/GLAN_RXN
AD26 H7 D4 PCLK_ICH PCLK_ICH 2 C28 AC5 USBP0-
AD26 PCICLK 23 PCIE_RXP6 PERP6/GLAN_RXP USBP0N USBP0- 27
AD27 D1 R2 PCI_PME# 23 PCIE_TXN6 C309 0.1u/10V_4 PCIE_TXN6_C D27 AC4 USBP0+
AD27 PME# PCI_PME# 25 PETN6/GLAN_TXN USBP0P USBP0+ 27
AD28 G5 23 PCIE_TXP6 C308 0.1u/10V_4 PCIE_TXP6_C D26 AD3 USBP1-
AD28 PETP6/GLAN_TXP USBP1N USBP1- 27
AD29 H6 AD2 USBP1+
AD29 USBP1P USBP1+ 27
AD30 G1 T100 SPI_CLK D23 AC1 USBP2-
AD30 SPI_CLK USBP2N USBP2- 27
AD31 H3 T99 SPI_CS0# D24 AC2 USBP2+
AD31 SPI_CS0# USBP2P USBP2+ 27
T95 SPI_CS1# F23 AA5 USBP3-
SPI_CS1#/GPIO58/CLGPIO6 USBP3N USBP3- 27
USBP3+
R435 0_4 INTA#_R J5
Interrupt I/F H4 INTE# T108 SPI_MOSI D25
USBP3P AA4
AB2 USBP4-
USBP3+ 27
25 INTA# PIRQA# PIRQE#/GPIO2 SPI_MOSI USBP4N USBP4- 19
SPI
R434 *0_4 INTB#_R E1 K6 INTF# T101 SPI_MISO E23 AB3 USBP4+
PIRQB# PIRQF#/GPIO3 SPI_MISO USBP4P USBP4+ 19
T91 INTC#_R J6 F2 INTG# AA1 USBP5-
PIRQC# PIRQG#/GPIO4 USBP5N USBP5- 27
T109 INTD#_R C4 G2 INTH# USBOC#0 N4 AA2 USBP5+
C PIRQD# PIRQH#/GPIO5 T98 OC0#/GPIO59 USBP5P USBP5+ 27 C
USBOC#1 N5 W5 USBP6-
OC1#/GPIO40 USBP6N USBP6- 24
ICH9M REV 1.0 USBOC#2 USBP6+
USBOC#3
N6
P6
OC2#/GPIO41 USB USBP6P W4
Y3 USBP7-
USBP6+ 24
USBOC#4 M1 Y2 USBP7+
OC4#/GPIO43 USBP7P USBP7+ 24
USBOC#5 N2 W1 USBP8-
USBOC#6 M4 W2 USBP8+
USBOC#7 M3 V2 USBP9-
USBOC#8 N3 V3 USBP9+
R346 0_4 GFXRST# USBOC#9 N1 U5 USBP10- T123
GFXRST# 20 OC9#/GPIO45 USBP10N
USBOC#10 P5 U4 USBP10+ T124
USBOC#11 OC10#/GPIO46 USBP10P USBP11- T126
P3 OC11#/GPIO47 USBP11N U1
PLT_RST-R# R345 0_4 PLT_RST#_NB
PLT_RST#_NB 6 PCI ROUTING USBP11P U2 USBP11+ T125
TABLE IDSEL INTERUPT DEVICE USBRBIAS_PN AG2 USBRBIAS

AG1 USBRBIAS#
VCC3
REQ0# / GNT0# AD17 INTA#/INTB# OZ129T R244 ICH9M REV 1.0
REQ1# / GNT1# AD20 INTC#/INTD# CB1410 22.6/F_4
C450
0.1u/50V_6
U13
5
2
4 PLTRST#
PLTRST# 23,24
1
R344
TC7SH08FU R411
3
100K_4 *100K_6
B B
South Bridge Strap Pin (2/3) PCI PULL-UP USBOC# PULL-UP
Pin Name Strap description Sampled Configuration PU/PD RP48

VCC3
RP45
FRAME# 6 5 USBOC#7 6 5 3VSUS
PCI Express Port 0 = Default IRDY# 7 4 INTB#_R USBOC#1 7 4 USBOC#6
HDA_SYNC PWROK LOCK# 8 3 STOP# USBOC#0 8 3 USBOC#2
Config 1 bit 0 (Port 1-4) 1 = Setting bit 0 REQ2# 9 2 REQ1# USBOC#3 9 2 USBOC#5
VCC3 10 1 DEVSEL# 3VSUS 10 1 USBOC#4
PCI Express Port 0 = Setting bit 2 8.2K_10P8R

10K_10P8R
GNT2# / GPIO53 PWROK
Config 2 bit 2 (Port 5-6) 1 = Default
0 = DMI for ESI-compatible VCC3 RP38

GNT1# / GPIO51 ESI Strap(Server Only) PWROK RP47
USBOC#9 8 7
1 = Default 3VSUS
INTH# 6 5 USBOC#8 6 5
REQ0# 7 4 INTG# USBOC#11 4 3
8 3 REQ3# USBOC#10 2 1
0 = "top-block swap" mode 9 2 PERR#
GNT3# / GPIO55 Top-Block Swap Override PWROK GNT3# R330 *1K_4 VCC3 10 1 INTD#_R 10K_8P4R
1 = Default
8.2K_10P8R
A
Disable iTPM A
Integrated TPM Enable 0 = INT TPM disable(Default)
SPI_MOSI CLPWROK SPI_MOSI R331 *20K_4 3VSUS
1 = INT TPM enable
VCC3
RP46
PCI_GNT#0 SPI_CS#1 Boot Location INTC#_R 6 5
GNT0# Boot BIOS Selection 0 PWROK GNT0# R306 *1K_4 7 4 INTA#_R
INTF# 8 3 SERR# PROJECT : PB5/6
0 1 SPI(Default) 9 2 INTE#
10 1 TRDY#
VCC3
1 0 PCI 8.2K_10P8R
SPI_CS1# / SPI_CS1# R302 *1K_4 Size Document Number Rev
Boot BIOS Selection 1 CLPWROK
GPIO58 / CLGPIO6 SB (2/4) PCIE/PCI/USB 1A
1 1 LPC
5 4 3 2 1
5 4 3 2 1
RVCC3
R301 2.2K_4 SCLK
U22C
N/A N/A
R343 2.2K_4 SDATA SCLK G16 SMBCLK AH23 BOARD_ID3
2,24 SCLK SATA0GP/GPIO21
SDATA A13 SMBDATA AF19 BOARD_ID2
2,24 SDATA SATA1GP/GPIO19
R341 10K_4 ICH_GPIO60 ICH_GPIO60 E17 LINKALERT#/GPIO60/CLGPIO4 AE21 ICH_GPIO36
SATA
GPIO
SATA4GP/GPIO36
SMB
SMB_CLK_ME C17 SMLINK0 AD20 ICH_GPIO37
R340 10K_4 SMB_CLK_ME SMB_DATA_ME SATA5GP/GPIO37
B18 SMLINK1
H1 14M_ICH
CLK14 14M_ICH 2
R338 10K_4 SMB_DATA_ME RI# F19 AF3 CLKUSB_48 VCC3
Clocks
RI# CLK48 CLKUSB_48 2
R319 10K_4 RI# T121 SUS_STAT# R4 P1 SUSCLK T122
D SUS_STAT#/LPCPD# SUSCLK D
SYS_RST# G19 ICH_GPIO36 R266 10K_4
3 SYS_RST# SYS_RESET#
R337 10K_4 SYS_RST# C16 SUSBR# R323 0_4 SUSB#
SLP_S3# SUSB# 28
PM_SYNC# M6 E16 SUSCR# R324 0_4 SUSC# ICH_GPIO37 R222 10K_4
6 PM_SYNC# PMSYNC#/GPIO0 SLP_S4# SUSC# 28
R339 10K_4 SMB_ALERT# G17 SLP_S5#
SMB_ALERT# SLP_S5# T94 RVCC3
A17 SMBALERT#/GPIO11
R619 *10K_4 WP# C10 ICH_GPIO26
VCC3 R620 0 STPPCI# S4_STATE#/GPIO26 T105 PM_BATLOW# R325 8.2K_4
2 PM_STPPCI# A14 STP_PCI#
R621 0 STPCPU#
SYS GPIO
E19 G20 ICH_PWROK
2 PM_STPCPU# STP_CPU# PWROK
R342 10K_4 STPPCI# DNBSWON# R280 10K_4
CLKRUN# L4 M2 PM_DPRSLPVR_R R441 0_4 PM_DPRSLPVR
25 CLKRUN# CLKRUN# DPRSLPVR/GPIO16 PM_DPRSLPVR 6,31
R320 10K_4 STPCPU#
PCIE_WAKE# E20 B13 PM_BATLOW# PM_LAN_ENABLE_R R336 0_4
Power MGT
23,24 PCIE_WAKE# WAKE# BATLOW# PM_BATLOW# 28
R298 8.2K_4 CLKRUN# SERIRQ M5
28 SERIRQ SERIRQ
THERM_ALERT# AJ23 R3 DNBSWON#
RVCC3 3,29 THERM_ALERT# THRM# PWRBTN# DNBSWON# 28
VR_PWRGD_CLKEN D21 D20 PM_LAN_ENABLE_R R318 *0_4 PM_RSMRST#_R
R297 10K_4 PCIE_WAKE# VRMPWRGD LAN_RST#
ICH_TP11 A20 D22 PM_RSMRST#_R
VCC3 T116 TP11 RSMRST#
KBSMI# AG19 R5 CK_PWRGD
28 KBSMI# GPIO1 CK_PWRGD CK_PWRGD 2
R286 10K_4 SERIRQ Port_C# AH21
T82 GPIO6
AG21 R6 ECPWROK R285 0_4
T161 GPIO7 CLPWROK MPWROK 6
R220 8.2K_4 THERM_ALERT# SCI# A21 VCC3 VCC3
28 SCI# GPIO8
C12 B16 SLP_M#
19 BLON GPIO12 SLP_M#
R215 10K_4 KBSMI# ICH_GPIO13 C21 T111
T90 GPIO13
BOARD_ID0 AE18 F24 CL_CLK0
GPIO17 CL_CLK0 CL_CLK0 6
BOARD_ID1 K1 B19 CL_CLK1 R427 R288
GPIO18 CL_CLK1 T112
T83 AF8 GPIO20
R334 *10K_4 SCI# BOARD_ID4 AJ22 F22 CL_DATA0 3.24K/F_6 *3.24K/F_6
SCLOCK/GPIO22 CL_DATA0 CL_DATA0 6
WP# A9 C19 CL_DATA1
Controller Link
28 WP#
GPIO
R440 10K_4 ICH_GPIO35 GPIO27 CL_DATA1 T106 CL_VREF0_SB CL_VREF1_SB
T115 D19 GPIO28
ICH_GPIO35 L1 C25 CL_VREF0_SB
R253 10K_4 ICH_GPIO38 ICH_GPIO38 SATACLKREQ#/GPIO35 CL_VREF0 CL_VREF1_SB
AE19 SLOAD/GPIO38 CL_VREF1 A19
C ICH_GPIO39 C399 R426 C289 R290 C
AG22 SDATAOUT0/GPIO39
R243 10K_4 ICH_GPIO39 ICH_GPIO48 AF21 F21 CL_RST#0
T84 SDATAOUT1/GPIO48 CL_RST0# CL_RST#0 6
DMI_TERM_SEL AH24 D18 CL_RST#1 0.1u/10V_4 453/F_4 *0.1u/10V_4 *453/F_4
CLGPIO5 GPIO49 CL_RST1# T96
A8 GPIO57/CLGPIO5
A16 ICH_GPIO24
SPKR MEM_LED/GPIO24 HDPACT
SCI#(PU to MAIN or S5) 21 SPKR M7 SPKR GPIO10/SUS_PWR_ACK C18 HDPACT
RVCC3 R221 0_4 MCH_ICH_SYNC#_R AJ24 C11 ICH_GPIO14
leakage issue 6 MCH_ICH_SYNC# MCH_SYNC# GPIO14/AC_PRESENT
ICH_TP3 B21 C20 SWI#
12 ICH_TP3 TP3 WOL_EN/GPIO9
SCI# ICH_TP8
MISC
R350 10K_4 AH20
T81 TP8
ICH_TP9 AJ20
T135 TP9
ICH_TP10 AJ21
T134 TP10
RVCC3 ICH9M REV 1.0 RVCC3
Enable iTPM(PU to PCU or S5?)
R329 *10K_4 CLGPIO5
R328 100/F_4 ICH_GPIO24 R322 *10K_4
HDPACT R321 *10K_4
ICH_GPIO14 R326 10K_4

VCC3
SWI# R293 10K_4
28 SWI#
R236 *10K_4 MCH_ICH_SYNC#_R
R312 *10K_4
RVCC3
VCC3 C341
C339 DELAY_VR_PWRGOOD need PU 2K to +3V.

B 0.1u/16V_4 B
ZS2 PU at power side(NEED CHECK PWR CKT)
0.1u/10V_4
5
DELAY_VR_PWRGOOD 1 U18
3,6,31 DELAY_VR_PWRGOOD
4 ICH_PWROK
ECPWROK 2 R478 *0_4
U17 19,28 ECPWROK
TC7SH08FU
3
1 5 R373 100K_4 R375
VR_PWRGD_CK410# 2 10K_4
31 VR_PWRGD_CK410#
3 4 VR_PWRGD_CLKEN C637 Q19
MMBT3906
1000P
NC7SZ04 R369 PM_RSMRST#_R 3 1 RSMRST# 28
100K_4
2
R477
10K_4 R472 4.7K_4 RVCC3
2
D29
3 BAV99
1
2
Board ID Table
South Bridge Strap Pin (3/3) BOARD_ID3 of TE1M always keep
low, TE1 hasn't support TV VCC3 VCC3 VCC3 VCC3 VCC3 3
D28
BAV99
A Pin Name Strap description Sampled Configuration PU/PD Board ID ID4 ID3 ID2 ID1 ID0 R455 A
1
R227 R461 R224 R436 R267 2.2K_4
NEW CARD H *10K_4 *10K_4 *10K_4 *10K_4 *10K_4
CARD BUS L
GPIO20 Reserved PWROK
BOARD_ID4 BOARD_ID3 BOARD_ID2 BOARD_ID1 BOARD_ID0
CCFL Panel H
LED Panel L
0 = Default W/ G-SENSOR H PROJECT : PB5/6
SPKR No Reboot PWROK SPKR R291 *1K_4 VCC3 W/O G-SENSOR L R239 R460 R216 R437 R258
1 = No Reboot mode
W/ TV H *10K_4 *10K_4 *10K_4 *10K_4 *10K_4 Quanta Computer Inc.
0 = for desktop applications W/O TV L Size Document Number Rev
DMI Termination 1 = for mobile applications
GPIO49 PWROK DMI_TERM_SEL R241 *1K_4
W/ HDMI H SB(3/4) GPIO 1A
Voltage Internal PU W/O HDMI L Date: Friday, May 30, 2008 Sheet 14 of 35
5 4 3 2 1
5 4 3 2 1

N/A N/A
U22F
VCCRTC VCCRTC A23 A15 +1.05V_ICH R276 0_8 VCCP
VCCRTC VCC1_05[1]
VCC1_05[2] B15
C313 C312 +SB_V5REF A6 C15 C265 C286
V5REF VCC1_05[3] U22E
VCC1_05[4] D15
0.1u/10V_4 0.1u/10V_4 +5VPCU_ICH_V5REF_SUS AE1 E15 0.1u/10V_4 0.1u/10V_4 AA26 H5
V5REF_SUS VCC1_05[5] VSS[1] VSS[107]
VCC1_05[6] F15 AA27 VSS[2] VSS[108] J23
AA24 VCC1_5_B[1] VCC1_05[7] L11 AA3 VSS[3] VSS[109] J26
AA25 VCC1_5_B[2] VCC1_05[8] L12 AA6 VSS[4] VSS[110] J27
AB24 L14 +1.5V_ICH_VCCDMIPLL L26 1uh_6 VCC1.5 AB1 AC22
VCC1_5_B[3] VCC1_05[9] VSS[5] VSS[111]
AB25 VCC1_5_B[4] VCC1_05[10] L16 AA23 VSS[6] VSS[112] K28
AC24 L17 C272 C273 AB28 K29
D D24 VCC1_5_B[5] VCC1_05[11] VSS[7] VSS[113] D
VCC3 2 1 BAT54 AC25 VCC1_5_B[6] VCC1_05[12] L18 AB29 VSS[8] VSS[114] L13
AD24 M11 0.01u/16V_4 10u/10V_8 AB4 L15
C315 VCC1_5_B[7] VCC1_05[13] VSS[9] VSS[115]
AD25 VCC1_5_B[8] VCC1_05[14] M18 AB5 VSS[10] VSS[116] L2
AE25 VCC1_5_B[9] VCC1_05[15] P11 AC17 VSS[11] VSS[117] L26
VCC5 R332 10/F_6 0.1u/10V_4 AE26 P18 AC26 L27
VCC1_5_B[10] VCC1_05[16] VSS[12] VSS[118]
AE27 VCC1_5_B[11] VCC1_05[17] T11 AC27 VSS[13] VSS[119] L5
AE28 T18 +1.05V_ICH_DMI R282 0_6 +1.05V_ICH AC3 L7
VCC1_5_B[12] VCC1_05[18] VSS[14] VSS[120]
AE29 U11 AD1 M12
CORE
VCC1_5_B[13] VCC1_05[19] C275 C276 VSS[15] VSS[121]
F25 VCC1_5_B[14] VCC1_05[20] U18 AD10 VSS[16] VSS[122] M13
G25 VCC1_5_B[15] VCC1_05[21] V11 AD12 VSS[17] VSS[123] M14
3VPCU D21 2 1 BAT54 H24 V12 4.7u/10V_6 10u/6.3V_8 AD13 M15
VCC1_5_B[16] VCC1_05[22] VSS[18] VSS[124]
H25 VCC1_5_B[17] VCC1_05[23] V14 AD14 VSS[19] VSS[125] M16
C216 J24 V16 AD17 M17
VCC1_5_B[18] VCC1_05[24] +1.05V_ICH_IO VSS[20] VSS[126]
J25 VCC1_5_B[19] VCC1_05[25] V17 AD18 VSS[21] VSS[127] M23
5VPCU R257 10/F_6 0.1u/10V_4 K24 V18 AD21 M28
VCC1_5_B[20] VCC1_05[26] +1.05V_ICH_IO R275 0_6 VSS[22] VSS[128]
K25 VCC1_5_B[21] VCCP AD28 VSS[23] VSS[129] M29
L23 VCC1_5_B[22] VCCDMIPLL R29 AD29 VSS[24] VSS[130] N11
L24 VCC1_5_B[23] AD4 VSS[25] VSS[131] N12
L25 W23 C247 C254 C234 AD5 N13
VCC1_5_B[24] VCC_DMI[1] VSS[26] VSS[132]
M24 VCC1_5_B[25] VCC_DMI[2] Y23 AD6 VSS[27] VSS[133] N14
+1.5V_PCIE_ICH M25 0.1u/10V_4 0.1u/10V_4 4.7u/10V_6 AD7 N15
VCC1_5_B[26] VSS[28] VSS[134]
N23 VCC1_5_B[27] V_CPU_IO[1] AB23 AD9 VSS[29] VSS[135] N16
VCC1.5 L23 1 2 BLM21PG221SN1D_8 +1.5V_PCIE_ICH N24 AC23 AE12 N17
VCC1_5_B[28] V_CPU_IO[2] VSS[30] VSS[136]
N25 VCC1_5_B[29] AE13 VSS[31] VSS[137] N18
P24 AG29 +3V_DMI_ICH R469 0_6 VCC3 AE14 N26
+ C263 C219 C277 C287 VCC1_5_B[30] VCC3_3[1] VSS[32] VSS[138]
P25 VCC1_5_B[31] AE16 VSS[33] VSS[139] N27
VCCA3GP
R24 AJ6 +3V_SATA_ICH C431 AE17 P12
220u/2.5V_7343 10u/6.3V_8 10u/6.3V_8 2.2u/6.3V_6 VCC1_5_B[32] VCC3_3[2] VSS[34] VSS[140]
R25 VCC1_5_B[33] AE2 VSS[35] VSS[141] P13
R26 AC10 0.1u/10V_4 AE20 P14
VCC1_5_B[34] VCC3_3[7] VSS[36] VSS[142]
R27 VCC1_5_B[35] AE24 VSS[37] VSS[143] P15
T24 VCC1_5_B[36] VCC3_3[3] AD19 AE3 VSS[38] VSS[144] P16
T27 AF20 R470 0_6 AE4 P17
VCCP_CORE
VCC1_5_B[37] VCC3_3[4] VCC3 VSS[39] VSS[145]
T28 VCC1_5_B[38] VCC3_3[5] AG24 AE6 VSS[40] VSS[146] P2
T29 AC20 +3V_VCCPCORE_ICH C441 AE9 P23
VCC1_5_B[39] VCC3_3[6] VSS[41] VSS[147]
U24 VCC1_5_B[40] AF13 VSS[42] VSS[148] P28
U25 B9 0.1u/10V_4 AF16 P29
VCC1_5_B[41] VCC3_3[8] VSS[43] VSS[149]
V24 VCC1_5_B[42] VCC3_3[9] F9 AF18 VSS[44] VSS[150] P4
V25 VCC1_5_B[43] VCC3_3[10] G3 AF22 VSS[45] VSS[151] P7
U23 G6 +3V_PCI_ICH AH26 R11
VCC1_5_B[44] VCC3_3[11] R269 0_6 VSS[46] VSS[152]
W24 VCC1_5_B[45] VCC3_3[12] J2 VCC3 AF26 VSS[47] VSS[153] R12
C C
PCI
W25 VCC1_5_B[46] VCC3_3[13] J7 AF27 VSS[48] VSS[154] R13
K23 K7 +3V_HDA_IO_ICH C230 AF5 R14
VCC1_5_B[47] VCC3_3[14] VSS[49] VSS[155]
Y24 VCC1_5_B[48] AF7 VSS[50] VSS[156] R15
Y25 AJ4 +3V_HDA_IO_ICH 0.1u/10V_4 AF9 R16
VCC1_5_B[49] VCCHDA VSS[51] VSS[157]
AG13 VSS[52] VSS[158] R17
VCC1.5 R259 0_8 +1.5V_SATA_ICH L22 10uh_8 +1.5V_APLL_ICH AJ19 AJ3 +3V_VCCSUSHDA AG16 R18
VCCSATAPLL VCCSUSHDA VSS[53] VSS[159]
AG18 VSS[54] VSS[160] R28
C213 C208 AC16 AC8 +TP_VCCSUS1_05_ICH_1 T89 R315 0_8 VCC3 AG20 T12
VCC1_5_A[1] VCCSUS1_05[1] +TP_VCCSUS1_05_ICH_2 T97 VSS[55] VSS[161]
AD15 VCC1_5_A[2] VCCSUS1_05[2] F17 AG23 VSS[56] VSS[162] T13
10u/10V_8 1u/6.3V_4 AD16 C301 C288 C297 AG3 T14
VCC1_5_A[3] VSS[57] VSS[163]
ARX
AE15 AD8 +TP_VCCSUS1_5_ICH_1 T88 AG6 T15
VCC1_5_A[4] VCCSUS1_5[1] 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 VSS[58] VSS[164]
AF15 VCC1_5_A[5] AG9 VSS[59] VSS[165] T16
AG15 F18 +VCCSUS1_5_INT_ICH AH12 T17
+1.5V_SATA_ICH VCC1_5_A[6] VCCSUS1_5[2] VSS[60] VSS[166]
AH15 VCC1_5_A[7] AH14 VSS[61] VSS[167] T23
AJ15 VCC1_5_A[8] AH17 VSS[62] VSS[168] B26
C291 A18 +3VPCU_ICH C298 R232 0_6 AH19 U12
VCCPSUS
VCCSUS3_3[1] VCC1.5 VSS[63] VSS[169]
AC11 VCC1_5_A[9] VCCSUS3_3[2] D16 AH2 VSS[64] VSS[170] U13
1u/6.3V_4 AD11 D17 0.1u/10V_4 C207 AH22 U14
VCC1_5_A[10] VCCSUS3_3[3] VSS[65] VSS[171]
AE11 VCC1_5_A[11] VCCSUS3_3[4] E22 AH25 VSS[66] VSS[172] U15
ATX
AF11 0.1u/10V_4 AH28 U16
VCC1_5_A[12] VSS[67] VSS[173]
AG10 VCC1_5_A[13] AH5 VSS[68] VSS[174] U17
+1.5V_SATA_ICH AG11 AF1 AH8 AD23
VCC1_5_A[14] VCCSUS3_3[5] R231 0_6 VSS[69] VSS[175]
AH10 VCC1_5_A[15] RVCC1.5 AJ12 VSS[70] VSS[176] U26
C238 AJ10 T1 AJ14 U27
VCC1_5_A[16] VCCSUS3_3[6] C210 VSS[71] VSS[177]
VCCSUS3_3[7] T2 AJ17 VSS[72] VSS[178] U3
1u/6.3V_4 AC9 T3 AJ8 V1
VCC1_5_A[17] VCCSUS3_3[8] 0.1u/10V_4 VSS[73] VSS[179]
VCCSUS3_3[9] T4 B11 VSS[74] VSS[180] V13
AC18 VCC1_5_A[18] VCCSUS3_3[10] T5 B14 VSS[75] VSS[181] V15
+1.5V_SATA_ICH AC19 T6 B17 V23
VCC1_5_A[19] VCCSUS3_3[11] R308 0_6 VSS[76] VSS[182]
VCCPUSB
VCCSUS3_3[12] U6 RVCC3 B2 VSS[77] VSS[183] V28
AC21 VCC1_5_A[20] VCCSUS3_3[13] U7 B20 VSS[78] VSS[184] V29
V6 +3VPCU_USB_ICH R279 0_8 B23 V4
VCCSUS3_3[14] VSS[79] VSS[185]
G10 VCC1_5_A[21] VCCSUS3_3[15] V7 B5 VSS[80] VSS[186] V5
VCC1.5 R268 0_8 +1.5V_USB_ICH G9 W6 C220 C267 C266 B8 W26
VCCSUS3_3[17] W7 C26 VSS[82] VSS[188] W27
C261 AC12 Y6 0.022u/16V_4 0.022u/16V_4 0.1u/10V_4 C27 W3
VCC1_5_A[23] VCCSUS3_3[18] Check list: VSS[83] VSS[189]
AC13 VCC1_5_A[24] VCCSUS3_3[19] Y7 E11 VSS[84] VSS[190] Y1
0.1u/10V_4 AC14 T7 0.1U for Pin AF1 E14 Y28
E18 VSS[86] VSS[192] Y29
AJ5 G22 +VCCCL1_05_INT_ICH E2 Y4
B VCCUSBPLL VCCCL1_05 VSS[87] VSS[193] B
E21 VSS[88] VSS[194] Y5
+1.5V_USB_ICH AA7 G23 +VCCCL1_5_INT_ICH E24 AG28
VCC1_5_A[26] VCCCL1_5 VSS[89] VSS[195]
USB CORE
AB6 VCC1_5_A[27] E5 VSS[90] VSS[196] AH6

C262 AB7 A24 C293 C292 C299 E8 AF2
VCC1_5_A[28] VCCCL3_3[1] VSS[91] VSS[197]
AC6 VCC1_5_A[29] VCCCL3_3[2] B24 F16 VSS[92] VSS[198] B25
0.1u/10V_4 AC7 *0.1u/10V_4 *0.1u/10V_4 0.1u/10V_4 F28
VCC1_5_A[30] VSS[93]
F29 VSS[94] VSS_NCTF[1] A1
A10 VCCLAN1_05[1] G12 VSS[95] VSS_NCTF[2] A2
C322 0.1u/10V_4 +VCCLAN1_05_INT_ICH A11 G14 A28
VCCLAN1_05[2] VSS[96] VSS_NCTF[3]
G18 VSS[97] VSS_NCTF[4] A29
A12 VCCLAN3_3[1] G21 VSS[98] VSS_NCTF[5] AH1
VCC3 R347 0_6 +3VM_VCCPAUX B12 +3VM_VCCCL3_ICH R313 0_6 VCC3 G24 AH29
VCCLAN3_3[2] VSS[99] VSS_NCTF[6]
G26 VSS[100] VSS_NCTF[7] AJ1
C314 +1.5V_ICH_GLANPLL_R A27 G27 AJ2
VCCGLANPLL VSS[101] VSS_NCTF[8]
G8 VSS[102] VSS_NCTF[9] AJ28
GLAN POWER
0.1u/10V_4 D28 H2 AJ29

VCCGLAN1_5[1] VSS[103] VSS_NCTF[10]
D29 VCCGLAN1_5[2] H23 VSS[104] VSS_NCTF[11] B1
E26 VCCGLAN1_5[3] H28 VSS[105] VSS_NCTF[12] B29
+1.5V_PCIE_ICH E27 H29
VCCGLAN1_5[4] VSS[106]
+SB_VCCGLAN3_3 A26 ICH9M REV 1.0
VCCGLAN3_3
VCC1.5 L29 1uh_6 ICH9M REV 1.0
C310 C311
10u/10V_8 2.2u/6.3V_6
SB Power Status and max current table(1/2)(SB left side) SB Power Status and max current table(2/2)(SB right side)
POWER PLANE S0 S3 S4/S5 Voltage I(max) Note POWER PLANE S0 S3 S4/S5 Voltage I(max) Note
+1.5V_PCIE_ICH VCCRTC X X X +VCCRTC 6uA 6uA@G3 VCC1_05 O X X +1.05V 1.634A
C239 O X X O X X
V5REF +5V 2mA VCCDMIPLL +1.5V 23mA
4.7u/10V_6 O O O 2mA O X X
V5REF_SUS +5V_S5 1mA@S3/S4/S5 VCC_DMI +1.05V 48mA
VCC1_5_B O X X +1.5V 646mA V_CPU_IO O X X +1.05V 2mA
A VCCSATAPLL O X X +1.5V 47mA VCC3_3 O X X +3V 308mA A

R433 0_6 O X X O X X
VCC3 VCC1_5_A +1.5V 1.342A VCCHDA +1.5V 11mA
VCCUSBPLL O X X +1.5V 11mA VCCSUSHDA O O O +1.5V_S5 11mA 1mA@S3/S4/S5
VCCLAN1_05 O X X +1.05V X Powered by Vcc1_05 in S0 VCCSUS1_05 O O O +1.05V X Powered by Vcc1_05 in S0
VCCLAN3_3 O X X +3V 19mA Tied to +3V,not +3VSUS VCCSUS1_5 O O O +1.5V X Powered by Vcc1_5_A in S0
VCCGLANPLL O X X +1.5V 23mA VCCSUS3_3 O O O +3VSUS 212mA 52mA@S3/S4/S5
VCCGLAN1_5 O X X +1.5V 80mA VCCCL1_05 O X X +1.05V X Powered by Vcc1_05 in S0 PROJECT : PB5/6
VCCGLAN3_3 O X X +3V 1mA VCCCL1_5 O X X +1.5V X Powered by Vcc1_5_A in S0
VCCCL3_3 O X X +3V 19mA Tied to +3V,not +3VSUS Size Document Number Rev
Note:VCCSUS1_05 , VCCSUS1_5 are powered by VccSus3_3 in S3/S4/S5 SB(4/4) POWER 1A

5 4 3 2 1
1 2 3 4 5 6 7 8
DDR2 Dual channel A/B PULL UP http://hobi-elektronika.net BOM Option Table

Reference
N/A
Description
N/A 16
A A
M_A_A[14..0]
M_A_A[14..0] 7,17
M_B_A[14..0]
M_B_A[14..0] 7,17
DDRII A CHANNEL DDRII B CHANNEL
SMDDR_VTERM SMDDR_VTERM
C225 C197 C201 C202 C259 C198 C280 C257 C284 C282 C199 C226 C256 C227 C223 C224 C221 C283 C250 C260 C258 C222 C196 C281 C200 C279
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
Place one cap close to every 2 pull-up resistor terminated to SMDDR_VTERM
B B
M_A_A3 RP21 1 2 56X2 SMDDR_VTERM

M_A_A1 3 4
M_A_A9 RP22 1 2 56X2 M_A_A7 RP25 1 2 56X2 SMDDR_VTERM

M_A_A5 3 4 M_A_A6 3 4
M_A_A2 RP28 1 2 56X2 RP37 1 2 56X2

6,17 M_CKE3
M_A_A4 3 4 7,17 M_B_BS#2 3 4
M_A_A11 RP26 1 2 56X2 RP18 1 2 56X2

6,17 M_ODT1
6,17 M_CKE1 3 4 6,17 M_CS#1 3 4
RP23 1 2 56X2
6,17 M_CKE0
M_A_A8 3 4 6,17 M_ODT3 RP31 1 2 56X2
7,17 M_B_BS#0 3 4
M_A_A12 RP24 1 2 56X2

3 4 M_A_A10 RP20 1 2 56X2
7,17 M_A_BS#2
7,17 M_A_BS#0 3 4
RP27 1 2 56X2
7,17 M_A_BS#1
M_A_A0 3 4 RP19 1 2 56X2
7,17 M_A_CAS#
7,17 M_A_WE# 3 4
C C
RP30 1 2 56X2
6,17 M_CS#0
7,17 M_A_RAS# 3 4
M_B_A10 RP33 1 2 56X2 SMDDR_VTERM

7,17 M_B_WE# 3 4 7,17 M_B_CAS# RP32 1 2 56X2
6,17 M_CS#3 3 4
M_B_A3 RP34 1 2 56X2

M_B_A1 3 4 M_B_A6 RP43 1 2 56X2
6,17 M_CKE4 3 4
RP40 1 2 56X2
7,17 M_B_BS#1
M_B_A0 3 4 6,17 M_ODT2 RP39 1 2 56X2
7,17 M_B_RAS# 3 4
M_B_A7 RP42 1 2 56X2

M_B_A11 3 4 6,17 M_ODT0 RP29 1 2 56X2
M_A_A13 3 4
M_B_A8 RP35 1 2 56X2

M_B_A5 3 4 M_B_A13 RP44 1 2 56X2
6,17 M_CS#2 3 4
M_B_A2 RP41 1 2 56X2

M_B_A4 3 4
M_B_A9 RP36 1 2 56X2

D M_B_A12 3 4 M_B_A14 R287 56_4 SMDDR_VTERM D
M_A_A14 R254 56_4 SMDDR_VTERM

PROJECT : PB5/6
DDR RES. ARRAV 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
DDR II DIMM Socket http://hobi-elektronika.net

BOM Option Table
7 M_B_DQ[0..7]
M_A_DM[0..7] 7
M_A_DQS[0..7] 7
7
7
7
7
M_A_DQ[0..7]
M_A_DQ[8..15]
M_A_DQ[16..23]
M_A_DQ[24..31]
7
7
7
7
M_B_DQ[8..15]
M_B_DQ[16..23]
M_B_DQ[24..31]
M_B_DQ[32..39]
M_B_DM[0..7] 7
M_B_DQS[0..7] 7
M_B_DQS#[0..7] 7
Reference
N/A
Description
N/A 17
M_A_DQS#[0..7] 7 7 M_A_DQ[32..39] 7 M_B_DQ[40..47] M_B_A[0..14] 7,16
M_A_A[0..14] 7,16 7 M_A_DQ[40..47] 7 M_B_DQ[48..55]
7 M_A_DQ[48..55] 7 M_B_DQ[56..63]
7 M_A_DQ[56..63]
SMDDR_VREF_DIMM SMDDR_VREF_DIMM
1.8VSUS 1.8VSUS
1.8VSUS 1.8VSUS
CN16 CN14
A A
1 VREF VSS46 2 1 VREF VSS46 2
3 4 M_A_DQ4 3 4 M_B_DQ4
M_A_DQ1 VSS47 DQ4 M_A_DQ0 M_B_DQ1 VSS47 DQ4 M_B_DQ5 1.8VSUS
5 DQ0 DQ5 6 5 DQ0 DQ5 6
M_A_DQ5 7 8 M_B_DQ0 7 8
DQ1 VSS15 M_A_DM0 DQ1 VSS15 M_B_DM0
9 VSS37 DM0 10 9 VSS37 DM0 10
M_A_DQS#0 11 12 M_B_DQS#0 11 12
M_A_DQS0 DQS#0 VSS5 M_A_DQ7 M_B_DQS0 DQS#0 VSS5 M_B_DQ6
13 DQS0 DQ6 14 13 DQS0 DQ6 14
15 16 M_A_DQ6 15 16 M_B_DQ3
M_A_DQ2 VSS48 DQ7 M_B_DQ2 VSS48 DQ7 + C372 C445 C449 C408 C409 C448
17 DQ2 VSS16 18 17 DQ2 VSS16 18
M_A_DQ3 19 20 M_A_DQ13 M_B_DQ7 19 20 M_B_DQ12
DQ3 DQ12 M_A_DQ9 DQ3 DQ12 M_B_DQ13 330u/2.5V_3528 2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6
21 VSS38 DQ13 22 21 VSS38 DQ13 22
M_A_DQ8 23 24 M_B_DQ9 23 24
M_A_DQ12 DQ8 VSS17 M_A_DM1 M_B_DQ8 DQ8 VSS17 M_B_DM1
25 DQ9 DM1 26 25 DQ9 DM1 26
27 VSS49 VSS53 28 27 VSS49 VSS53 28
M_A_DQS#1 29 30 M_CLK_DDR0 M_B_DQS#1 29 30 M_CLK_DDR3
DQS#1 CK0 M_CLK_DDR0 6 DQS#1 CK0 M_CLK_DDR3 6 VCC3
M_A_DQS1 31 32 M_CLK_DDR#0 M_B_DQS1 31 32 M_CLK_DDR#3 1.8VSUS
DQS1 CK0# M_CLK_DDR#0 6 DQS1 CK0# M_CLK_DDR#3 6
33 VSS39 VSS41 34 33 VSS39 VSS41 34
M_A_DQ15 DQ10 DQ14 M_A_DQ11 M_B_DQ10 DQ10 DQ14 M_B_DQ14
37 DQ11 DQ15 38 37 DQ11 DQ15 38
39 40 39 40 C229 C232 C410 C237 C206 C194
VSS50 VSS54 VSS50 VSS54
PC4800 DDR2 SDRAM
41 42 41 42 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 2.2u/6.3V_6 0.1u/10V_4

M_A_DQ17 VSS18 VSS20 M_A_DQ16 M_B_DQ19 VSS18 VSS20 M_B_DQ20
43 DQ16 DQ20 44 43 DQ16 DQ20 44
DQ17 DQ21 DQ17 DQ21
PC4800 DDR2 SDRAM

47 VSS1 VSS6 48 47 VSS1 VSS6 48
M_A_DQS#2 49 50 PM_EXTTS#0 PM_EXTTS#0 6 M_B_DQS#2 49 50 PM_EXTTS#1 PM_EXTTS#1 6
M_A_DQS2 DQS#2 NC3 M_A_DM2 M_B_DQS2 DQS#2 NC3 M_B_DM2
SO-DIMM (200P)
51 DQS2 DM2 52 51 DQS2 DM2 52

53 54 53 54 SMDDR_VREF_DIMM
55 DQ18 DQ22 56 55 DQ18 DQ22 56
DQ19 DQ23 DQ19 DQ23
SO-DIMM (200P)
59 VSS22 VSS24 60 59 VSS22 VSS24 60
M_A_DQ25 61 62 M_A_DQ29 M_B_DQ28 61 62 M_B_DQ25 C255 C253
63 DQ25 DQ29 64 63 DQ25 DQ29 64
B 0.1u/10V_4 2.2u/6.3V_6 B
65 VSS23 VSS25 66 65 VSS23 VSS25 66
M_A_DM3 67 68 M_A_DQS#3 M_B_DM3 67 68 M_B_DQS#3
DM3 DQS#3 M_A_DQS3 DM3 DQS#3 M_B_DQS3
69 NC4 DQS3 70 69 NC4 DQS3 70
71 VSS9 VSS10 72 71 VSS9 VSS10 72
75 DQ27 DQ31 76 75 DQ27 DQ31 76
77 VSS4 VSS8 78 77 VSS4 VSS8 78
M_CKE0 79 80 M_CKE1 M_CKE3 79 80 M_CKE4
6,16 M_CKE0 CKE0 CKE1 M_CKE1 6,16 6,16 M_CKE3 CKE0 CKE1 M_CKE4 6,16
81 VDD7 VDD8 82 81 VDD7 VDD8 82
83 NC1 A15 84 83 NC1 A15 84
M_A_BS#2 85 86 M_A_A14 M_B_BS#2 85 86 M_B_A14
7,16 M_A_BS#2 A16_BA2 A14 7,16 M_B_BS#2 A16_BA2 A14
87 VDD9 VDD11 88 87 VDD9 VDD11 88
M_A_A12 89 90 M_A_A11 M_B_A12 89 90 M_B_A11
M_A_A9 A12 A11 M_A_A7 M_B_A9 A12 A11 M_B_A7
91 A9 A7 92 91 A9 A7 92
M_A_A8 93 94 M_A_A6 M_B_A8 93 94 M_B_A6
A8 A6 A8 A6 1.8VSUS
95 VDD5 VDD4 96 95 VDD5 VDD4 96
M_A_A5 97 98 M_A_A4 M_B_A5 97 98 M_B_A4
M_A_A3 A5 A4 M_A_A2 M_B_A3 A5 A4 M_B_A2
99 A3 A2 100 99 A3 A2 100
M_A_A1 101 102 M_A_A0 M_B_A1 101 102 M_B_A0
A1 A0 A1 A0
103 VDD10 VDD12 104 103 VDD10 VDD12 104
M_A_A10 105 106 M_A_BS#1 M_B_A10 105 106 M_B_BS#1 + C336 C444 C406 C446 C411 C447
A10/AP BA1 M_A_BS#1 7,16 A10/AP BA1 M_B_BS#1 7,16
7,16 M_A_BS#0 M_A_BS#0 107 108 M_A_RAS# 7,16 M_B_BS#0 M_B_BS#0 107 108 M_B_RAS#
BA0 RAS# M_A_RAS# 7,16 BA0 RAS# M_B_RAS# 7,16
M_A_WE# 109 110 M_CS#0 M_B_WE# 109 110 M_CS#2 330u/2.5V_3528 2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6
7,16 M_A_WE# WE# S0# M_CS#0 6,16 7,16 M_B_WE# WE# S0# M_CS#2 6,16
111 VDD2 VDD1 112 111 VDD2 VDD1 112
M_A_CAS# 113 114 M_ODT0 M_B_CAS# 113 114 M_ODT2
7,16 M_A_CAS# CAS# ODT0 M_ODT0 6,16 7,16 M_B_CAS# CAS# ODT0 M_ODT2 6,16
M_CS#1 115 116 M_A_A13 M_CS#3 115 116 M_B_A13
6,16 M_CS#1 S1# A13 6,16 M_CS#3 S1# A13
117 VDD3 VDD6 118 117 VDD3 VDD6 118
M_ODT1 119 120 M_ODT3 119 120
6,16 M_ODT1 ODT1 NC2 6,16 M_ODT3 ODT1 NC2 VCC3
121 122 121 122 1.8VSUS
123 DQ32 DQ36 124 123 DQ32 DQ36 124
DQ33 DQ37 DQ33 DQ37
127 VSS26 VSS28 128 127 VSS26 VSS28 128
M_A_DQS#4 129 130 M_A_DM4 M_B_DQS#4 129 130 M_B_DM4 C233 C231 C236 C235 C251 C252
C M_A_DQS4 DQS#4 DM4 M_B_DQS4 DQS#4 DM4 C
131 DQS4 VSS42 132 131 DQS4 VSS42 132
133 134 M_A_DQ39 133 134 M_B_DQ39 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 2.2u/6.3V_6 0.1u/10V_4
M_A_DQ35 VSS2 DQ38 M_A_DQ38 M_B_DQ38 VSS2 DQ38 M_B_DQ35
135 DQ34 DQ39 136 135 DQ34 DQ39 136
M_A_DQ34 137 138 M_B_DQ34 137 138
DQ35 VSS55 M_A_DQ44 DQ35 VSS55 M_B_DQ45
139 VSS27 DQ44 140 139 VSS27 DQ44 140
M_A_DQ41 DQ40 DQ45 M_B_DQ40 DQ40 DQ45
143 DQ41 VSS43 144 143 DQ41 VSS43 144
145 146 M_A_DQS#5 145 146 M_B_DQS#5
M_A_DM5 VSS29 DQS#5 M_A_DQS5 M_B_DM5 VSS29 DQS#5 M_B_DQS5 SMDDR_VREF_DIMM
147 DM5 DQS5 148 147 DM5 DQS5 148
149 VSS51 VSS56 150 149 VSS51 VSS56 150
153 DQ43 DQ47 154 153 DQ43 DQ47 154
155 156 155 156 C203 C204
157 DQ48 DQ52 158 157 DQ48 DQ52 158
M_A_DQ48 159 160 M_A_DQ52 M_B_DQ49 159 160 M_B_DQ53 0.1u/10V_4 2.2u/6.3V_6
DQ49 DQ53 DQ49 DQ53
161 VSS52 VSS57 162 161 VSS52 VSS57 162
163 164 M_CLK_DDR1 163 164 M_CLK_DDR4
NCTEST CK1 M_CLK_DDR1 6 NCTEST CK1 M_CLK_DDR4 6
165 166 M_CLK_DDR#1 165 166 M_CLK_DDR#4
VSS30 CK1# M_CLK_DDR#1 6 VSS30 CK1# M_CLK_DDR#4 6
M_A_DQS#6 167 168 M_B_DQS#6 167 168
M_A_DQS6 DQS#6 VSS45 M_A_DM6 M_B_DQS6 DQS#6 VSS45 M_B_DM6
169 DQS6 DM6 170 169 DQS6 DM6 170
171 VSS31 VSS32 172 171 VSS31 VSS32 172
175 DQ51 DQ55 176 175 DQ51 DQ55 176
177 VSS33 VSS35 178 177 VSS33 VSS35 178
M_A_DQ60 DQ56 DQ60 M_A_DQ57 M_B_DQ57 DQ56 DQ60 M_B_DQ61 SMDDR_VREF_DIMM
181 DQ57 DQ61 182 181 DQ57 DQ61 182
183 VSS3 VSS7 184 183 VSS3 VSS7 184
M_A_DM7 185 186 M_A_DQS#7 M_B_DM7 185 186 M_B_DQS#7
DM7 DQS#7 M_A_DQS7 DM7 DQS#7 M_B_DQS7
187 VSS34 DQS7 188 187 VSS34 DQS7 188
M_A_DQ58 189 190 M_B_DQ59 189 190
M_A_DQ59 DQ58 VSS36 M_A_DQ62 M_B_DQ62 DQ58 VSS36 M_B_DQ63 R272 0_6
191 DQ59 DQ62 192 191 DQ59 DQ62 192 SMDDR_VREF
193 194 M_A_DQ63 193 194 M_B_DQ58
DDRDAT_SMB VSS14 DQ63 DDRDAT_SMB VSS14 DQ63
195 SDA VSS13 196 2 CGDAT_SMB 195 SDA VSS13 196
D DDRCLK_SMB 197 198 R252 10K_4 DDRCLK_SMB 197 198 R439 10K_4 R273 *10K_4 R223 *10K_4 1.8VSUS D
SCL SA0 2 CGCLK_SMB SCL SA0
VCC3 VCC3 199 200 R251 10K_4 VCC3 VCC3 199 200 R438 10K_4
VDD(SPD) SA1 VDD(SPD) SA1
DDR2_5.6H DDR2_10.1H VCC3
CH-A SPD ADDRESS:?????? PROJECT : PB5/6

CH-A SPD ADDRESS:??????
DDR SO-DIMM 1A

1 2 3 4 5 6 7 8
5 4 3 2 1
VCC3 VCC5
HDMI R355 R358 R599

EV@2K
R600
EV@2K
DVI 18
2
EV@10K_4 EV@10K_4
EXT_HDMI_DDCDAT 1 3 DDC5DAT
20 EXT_HDMI_DDCDAT
Q13
EV@RHU002N06
VCC3
DVI-I
2
EXT_HDMI_DDCCLK 1 3 DDC5CLK
20 EXT_HDMI_DDCCLK
D
Q33
For EMI D
EV@RHU002N06
Modify AMD commend R1 100 CN19
20 EXT_DVITX2N 1 1
R627 499/F_4 HDMICLK-_C 2
20 EXT_DVITX2P 2
R626 499/F_4 HDMICLK+_C 3 C1 CRT_R1
Close HDMI connector Co-Layout R629 499/F_4 HDMITX0N_C
4
5
3
4
C1
C2 CRT_G1
HDMITX0P_C CRT_DDCCLK 5 C2
swap R628 499/F_4 6 6
L55 *HDM@WCM2012-90 CRT_DDCDATA 7 C3 CRT_B1
HDMITX2N_C R632 499/F_4 HDMITX1N_C VSYNC1 7 C3
20 EXT_HDMITX2N 4 3 VCC5 8 8
20 EXT_HDMITX2P 1 2 HDMITX2P_C R631 499/F_4 HDMITX1P_C 9
20 EXT_DVITX1N 9
R637 100 R630 10
20 EXT_DVITX1P 10
2
L51 *HDM@WCM2012-90 100K_4 R2 100 11
HDMITX1P_C R633 499/F_4 HDMITX2N_C 11
20 EXT_HDMITX1P 4 3 12 12
1 2 HDMITX1N_C 1 3 R634 499/F_4 HDMITX2P_C 13 C4 HSYNC1
20 EXT_HDMITX1N 13 C4
R638 100 CRT_VCC 14
L52 *HDM@WCM2012-90 14
15 15
20 EXT_HDMITX0N 4 3 HDMITX0N_C DVI_HPD R590 10K 16 C5
HDMITX0P_C Q38 16 C5
20 EXT_HDMITX0P 1 2 Close to connector 20 EXT_DVITX0N 17 17
R639 100 RHU002N06 18
20 EXT_DVITX0P 18
L53 *HDM@WCM2012-90 R7 100 19
HDMICLK+_C 19
20 EXT_HDMICLK+ 4 3 20 20
1 2 HDMICLK-_C 21
20 EXT_HDMICLK- 21
R640 100 R8 100 22 22
20 EXT_DVICLK+ 23 23
20 EXT_DVICLK- 24 24
25
26
27
28
29
30
CN25 DVI-I_CNN dvi-070939fr029s237pr-c-30p-v
25
26
27
28
29
30
A:(8/23) Change footprint from 0402 to 0603 DVI_HPD P/N:DFDS29FR019
20 DVI_HPD
HDMITX2P_C 1
R601 HDM@0_6 HDMITX2P_C D2+
20 EXT_HDMITX2P 2 D2 Shield
R602 HDM@0_6 HDMITX2N_C HDMITX2N_C 3
20 EXT_HDMITX2N
HDMITX1P_C 4
D2- Activate: H 1/3 Modify
R594 HDM@0_6 HDMITX1P_C D1+ R591
R593 HDM@0_6 HDMITX1N_C HDMITX1N_C 6 20
20 EXT_HDMITX1N D1- SHELL1
HDMITX0P_C 7 21 *100K
R595 HDM@0_6 HDMITX0P_C R617 0 D0+ SHELL2
C R596 HDM@0_6 HDMITX0N_C HDMITX0N_C 9 22 C
20 EXT_HDMITX0N D0- SHELL3
HDMICLK+_C 10 23
R598 HDM@0_6 HDMICLK+_C CK+ SHELL4
20 EXT_HDMICLK+ 11 CK Shield
R597 HDM@0_6 HDMICLK-_C HDMICLK-_C 12
20 EXT_HDMICLK- CK-
13 CE Remote
14 NC
C633 C634 HDMI_SCL 15
C622 C621 HDMI_SDA DDC CLK
16 DDC DATA
*22P/50V_4 *22P/50V_4 *22P/50V_4 *22P/50V_4 D38 F1 17
HDMIC_5V GND
VCC5 2 1 18 +5V
19 HP DET
CH501
DDC5CLK L2 0 HDMI_SCL C1 HDM@HDMI-C12816-119A5-L

DDC5DAT L3 0 HDMI_SDA 20 HDMI_HPD
0.1U
C626 C625
*10P/50V *10P/50V
CRT PORT VCC5
VCC3 VCC5 VCC3

5
C18 .1U/10V
1
R9 U3
R19 D2
2
2.2K 10K VSYNC 2 4VSYNCL VSYNC1 3 DA204U VSYNC1

L6
DDCDAT 1 3 DDC_DATA CRT_DDCDATA *AHCT1G125DCH BLM11A121S
L5 VCC3
2
B BLM11A121S R22 0 B
2N7002E-T1-E3
1
Q2
D5
VCC3 VCC5 HSYNC1 3 DA204U HSYNC1
L8
5
C16 C15 BLM11A121S C4 C7

R14 U4 *AHCT1G125DCH
2
R18 *10P *10P 10P 10P
2
2.2K 10K HSYNC 2 4HSYNCL

DDCCLK 1 3 DDC_CLK CRT_DDCCLK
L4
BLM11A121S PTC:DK100TPU028
2N7002E-T1-E3 R21 0
Q1
VCC3 VCC3 VCC3 CRT_VCC
L9 DKZ00TFU101
D4
1
1
FBM2125HM330 F2
D3 D1 D6 1 2 1 2 VCC5
3 DA204U 3 DA204U 3 DA204U
POLY_SWITCH RC1206
CH501H
close to NB & VGA connector C3
2
2
R542 EV@0_4 CRT_R *0.1U
20 EXT_VGA_RED
R543 EV@0_4 CRT_G
16
20 EXT_VGA_GRN
CN22
R544 EV@0_4 CRT_B
20 EXT_VGA_BLU
6
R531 EV@0_4 HSYNC CRT_R L7 MLB-160808-0070B-N3 CRT_R1 1 11
20 EXT_HSYNC
7
R532 EV@0_4 VSYNC CRT_G L1 MLB-160808-0070B-N3 CRT_G1 2 12 CRT_DDCDATA
20 EXT_VSYNC
8
R533 EV@0_4 DDCCLK CRT_B L10 MLB-160808-0070B-N3 CRT_B1 3 13 HSYNC1
20 EXT_CRT_DDCCLK
9
R524 EV@0_4 DDCDAT C10 C5 C19 4 14 VSYNC1
20 EXT_CRT_DDCDAT
R13 R3 R20 10
C11 C2 C8 5 15 CRT_DDCCLK
A 150/F 150/F 150/F A
5.6P 5.6P 5.6P 5.6P 5.6P 5.6P P/N:DFDS15FR084
R81 IV@0_4
6 INT_CRT_RED
17
R82 IV@0_4
6 INT_CRT_GRN
R83 IV@0_4 DSUB-070549FR015SX03CX-15P-V
6 INT_CRT_BLU
R96 IV@0_4
6 INT_HSYNC
R97 IV@0_4
6 INT_VSYNC
6 INT_CRT_DDCCLK
R98 IV@0_4 PROJECT : PB5/6
R105 IV@0_4
6 INT_CRT_DDCDAT Quanta Computer Inc.
DVI / CRT / HDMI 1A
Date: Monday, June 23, 2008 Sheet 18 of 35

5 4 3 2 1
1 2 3 4 5 6 7 8
http://hobi-elektronika.net LCD TYPE CONNECTOR

6 INT_TXUCLKOUT+
6 INT_TXUCLKOUT-
6 INT_TXUOUT0+
IV@0X2 3
1
IV@0X2 3
4
2
4 RN8
RN11 TXUCLKOUT+
TXUCLKOUT-
TXUOUT0+ HALL SENSOR VIN 0

R567 INVCC0
19
1
6 INT_TXUOUT0- 1 2 TXUOUT0- C559 C557
R72 100K_4 +
6 INT_TXUOUT1+ IV@0X2 3 4 RN5 TXUOUT1+ 3VPCU 8/13 Change Size To 1206
6 INT_TXUOUT1- 1 2 TXUOUT1- 10u/25V_1206 1000P_4
2
6 INT_TXUOUT2+ IV@0X2 3 4 RN2 TXUOUT2+
6 INT_TXUOUT2- 1 2 TXUOUT2-
1 2 LID# 28
A
10/22 update p/n From DFHS40FS825 to DFWF40MS000 A
MR1
C71 EC2648-B3-F
3
EV@0X2 2 1 RN12 0.1u/10V_4 CN3
20 EXT_LVDS_TXUCK#
4 3 INVCC0 LCD_VCC
20 EXT_LVDS_TXUCK 1 2
EV@0X2 2 RN7 3 4 LCD_EDIDDATA
20 EXT_LVDS_TXU#0 1 5 6
4 3 VCC3 LCD_EDIDCLK
20 EXT_LVDS_TXU0 7 8
CCD_POWER CCD_POWER LCD_VADJ
EV@0X2 2 RN3 R58 0_4 MIC_GND_R 9 10
4 3 INT_MIC R57 0_4 Analog MIC_R USBP4+_C
20 EXT_LVDS_TXU1 21 INT_MIC 13 14
DISPON USBP4-_C
EV@0X2 2 RN1 15 16
4 3 TXLCLKOUT+ TXUCLKOUT+
20 EXT_LVDS_TXU2 19 20
TXLCLKOUT- TXUCLKOUT-
21 22
C66 TXLOUT0+ 23 24 TXUOUT0+
TXLOUT0- 25 26 TXUOUT0-
22p/50V_4 27 28
TXLOUT1+ 29 30 TXUOUT1+
IV@0X2 3 TXLCLKOUT- 33 34
6 INT_TXLCLKOUT- 4 RN16 35 36
6 INT_TXLCLKOUT+ 1 2 TXLCLKOUT+ TXLOUT2+ TXUOUT2+
IV@0X2 3 TXLOUT2- 39 40
6 INT_TXLOUT2- 4 RN6 41 42
1 2 TXLOUT2+
6 INT_TXLOUT2+
IV@0X2 3 4 RN13 TXLOUT0- 11/01 add stitch cap for LVDS ACES_88242-40XX_LVDS
6 INT_TXLOUT0-
1 2 TXLOUT0+
6 INT_TXLOUT0+
IV@0X2 3 4 RN9 TXLOUT1-
6 INT_TXLOUT1- VCC3 VCC3
1 2 TXLOUT1+
6 INT_TXLOUT1+
LCD PANEL MODULE

B C70 C77 B
EV@0X2 2 1 RN15 0.1u/10V_4 0.1u/10V_4
20 EXT_LVDS_TXLCK
20 EXT_LVDS_TXLCK# 4 3 EMI CAP
EV@0X2 2 1 RN14
20 EXT_LVDS_TXL0
20 EXT_LVDS_TXL#0 4 3
CCD_POWER C68 0.1u/10V_4
EV@0X2 2 1 RN10
20 EXT_LVDS_TXL1
VCC3
EV@0X2 2 1 RN4 LCD_VCC C69 0.1u/10V_4
20 EXT_LVDS_TXL2 VCC3
4 3 Q4
20 EXT_LVDS_TXL#2
R49 0_8
C60 0.1U 6 1 LCD_VCC C558 0.1u/10V_4
R583 *0 IN OUT
4 2 C67
IN GND C53 C50 100p/50V_4
EV@0_4 R556 3 1 DIGON_R 3 5 LCD_EDIDDATA
20 EXT_DISP_ON ON/OFF GND 10U/10V 0.1U
IV@0_4 R553 Q30
6 INT_LVDS_DIGON
2N7002E AAT4280IGU-2-T1
2
R584 C569 C65 100p/50V_4
10K *0.1u/10V_4
A:(8/20) Remove switch IC, Modify ckt to original ckt VCC3 LCD_EDIDCLK
3VPCU VCC5
C62 100p/50V_4
R53 LCD_VADJ
2.2K R585
Q31 10K
2
2N7002E
R555 LCD_EDIDCLK
20 EXT_LVDS_PNLCLK
EV@0_4
14,28 ECPWROK 1 3NB_PWRGD_5V
R554
6 INT_LVDS_EDIDCLK
IV@0_4
VCC3
C C
R55
LCD_VADJ
2.2K
R577 0_4
28 ADJ
R558 EV@0_4 LCD_EDIDDATA
20 EXT_LVDS_PNLDAT
R557 IV@0_4 C63 *0.1u/10V_4
6,11 INT_LVDS_EDIDDATA
R574 *0_4
6 INT_LVDS_PWM
BTO USBP4-_C RP1 2

CCD@0_4P2R_S
1
VCC3 USBP4- 13
USBP4+_C 4 3 USBP4+ 13
CAMERA MODULE *CCD@DLW21HN900SQ2L

4
1
4 3 3
2
R575 0_8 CCD_POWER VCC5 R579 1 2
10K L12
VCC5 1 3 CCD_POWER BAS316 D36 C564 0.1U

14 BLON VCC3
C566 10u/10V_8 BAS316 D32
+
28 LID#
5
Q28 R576
2
*CCD@AO3413 C567 *CCD@1000p_4 *CCD@4.7K_4 BAS316 D33 2

14,28 ECPWROK
4 DISPON
D C560 *CCD@0.1u/10V_4 IV@0_4 R56 1 D
6 INT_LVDS_BLON
U6
A:(8/30) Follow TE1, no stuff 1000p,0.1u EV@0_4 R54 TC7SH08FU
20 EXT_LVDS_BLON
3
3
2 R52
CCD_POWERON 28
10K
Q27 PROJECT : PB5/6

1
*CCD@DTC144EU

A:(11/27) Camera module power VCC5 or VCC3?
LCD CONN& CAREMA 1A

1 2 3 4 5 6 7 8
5 4 3 2 1
A:(8/18) update VGA conn footprint base on Allan information
A:(8/23) update VGA conn pin-define (change pin 1 location)
CN18
PEG_TXN15 PEG_RXN15 VCC3
20
6 PEG_TXN15 2 2 1 1 PEG_RXN15 6
PEG_TXP15 4 3 PEG_RXP15
6 PEG_TXP15 4 3 PEG_RXP15 6
6 6 5 5
PEG_TXN14 PEG_RXN14
6 PEG_TXN14
PEG_TXP14
8
10
8 7 7
9 PEG_RXP14
PEG_RXN14 6 Close CN27 R517
12 12 11 11 EV@4.7K_4
PEG_TXN13 14 13 PEG_RXN13 Q21
6 PEG_TXN13 14 13 PEG_RXN13 6 For EMI
2
PEG_TXP13 16 15 PEG_RXP13 EV@RHU002N06
18 17 C97 4.7P
PEG_TXN12 18 17 PEG_RXN12 VGA_MBCLK
6 PEG_TXN12 20 20 19 19 PEG_RXN12 6 3,28,35 MBCLK 3 1
PEG_TXP12 22 21 PEG_RXP12 EXT_DVITX2N
6 PEG_TXP12 22 21 PEG_RXP12 6 EXT_DVITX2N 18
24 23 EXT_DVITX2P
D 24 23 EXT_DVITX2P 18 D
PEG_TXN11 26 25 PEG_RXN11 C98 4.7P VCC3
6 PEG_TXN11 26 25 PEG_RXN11 6
30 29 EXT_DVITX1N
30 29 EXT_DVITX1N 18
PEG_TXN10 32 31 PEG_RXN10 EXT_DVITX1P
6 PEG_TXN10 32 31 PEG_RXN10 6 EXT_DVITX1P 18
PEG_TXP10 34 33 PEG_RXP10 C527 4.7P R516
36 36 35 35 EV@4.7K_4
PEG_TXN9 38 37 PEG_RXN9 EXT_DVITX0N Q20
6 PEG_TXN9 38 37 PEG_RXN9 6 EXT_DVITX0N 18
2
PEG_TXP9 40 39 PEG_RXP9 EXT_DVITX0P EV@RHU002N06
6 PEG_TXP9 40 39 PEG_RXP9 6 EXT_DVITX0P 18
42 41 C526 4.7P
PEG_TXN8 42 41 PEG_RXN8 VGA_MBDATA
6 PEG_TXN8 44 44 43 43 PEG_RXN8 6 3,28,35 MBDATA 3 1
PEG_TXP8 46 45 PEG_RXP8 EXT_DVICLK+ EXT_DVICLK+ 18
48 47 EXT_DVICLK- EXT_DVICLK- 18
PEG_TXN7 48 47 PEG_RXN7
6 PEG_TXN7 50 50 49 49 PEG_RXN7 6
54 54 53 53
60 60 59 59
PEG_TXN5 62 61 PEG_RXN5 3VSUS VCC3 VCCP VIN
6 PEG_TXN5 62 61 PEG_RXN5 6 C541
PEG_TXP5 64 63 PEG_RXP5 VGA_R L16 0 EXT_VGA_RED 18
66 66 65 65
PEG_TXN4 68 67 PEG_RXN4 VGA_G L15 0 EXT_VGA_GRN 18
PEG_TXP4 70 69 PEG_RXP4 C404 C396 C316 C23 C582 C619
6 PEG_TXP4 70 69 PEG_RXP4 6 0.1u/10V
72 71 VGA_B L14 0 EXT_VGA_BLU 18
PEG_TXN3 72 71 PEG_RXN3 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V
6 PEG_TXN3 74 74 73 73 PEG_RXN3 6
78 77 C113 C105 C106 C104 C103 C110
6 PEG_TXN2 80 80 79 79 PEG_RXN2 6
C 84 84 83 83 C
PEG_TXN1 86 85 PEG_RXN1 *5.6P *5.6P *5.6P *5.6P *5.6P *5.6P VCC_CORE
90 90 89 89
96 95 C25 C64 C81 C600 C24 C30
EXT_CRT_DDCCLK 96 95 CLK_MXM#
18 EXT_CRT_DDCCLK 98 98 97 97 CLK_MXM# 2
EXT_CRT_DDCDAT 100 99 CLK_MXM 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V
18 EXT_CRT_DDCDAT 100 99 CLK_MXM 2
102 102 101 101
EXT_HDMI_DDCCLK 104 103
18 EXT_HDMI_DDCCLK 104 103 GFXRST# 13
EXT_HDMI_DDCDAT 106 105
18 EXT_HDMI_DDCDAT 106 105 DVI_HPD 18
108 108 107 107 MAINON 28,32,33,34
EXT_LVDS_PNLCLK 110 109
19 EXT_LVDS_PNLCLK 110 109 GFXPG 28
EXT_LVDS_PNLDAT 112 111 VGA_MBDATA 5VSUS VCC5
19 EXT_LVDS_PNLDAT 112 111
114 113 VGA_MBCLK
VGA_R 114 113
116 116 115 115 EXT_LVDS_BLON 19
118 118 117 117 EXT_DISP_ON 19
VGA_G 120 119 C492 C400 C126 C609 C9 C570
120 119 HDMI_HPD 18
122 122 121 121
VGA_B 124 123 EXT_HSYNC 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V
124 123 EXT_HSYNC 18
126 125 EXT_VSYNC
126 125 EXT_VSYNC 18
EXT_LVDS_TXL#2 128 127
EXT_LVDS_TXL2 130 129 EXT_LVDS_TXU#2
19 EXT_LVDS_TXL2 130 129 EXT_LVDS_TXU#2 19
132 131 EXT_LVDS_TXU2
132 131 EXT_LVDS_TXU2 19
19 EXT_LVDS_TXL1 136 135 EXT_LVDS_TXU#1 19
138 137 EXT_LVDS_TXU1 H15 H9 H10 H4 H2 H7 H13 H16 H21 H31 H29 H30 H25
B 19 EXT_LVDS_TXL0 142 141 EXT_LVDS_TXU#0 19 B
144 143 EXT_LVDS_TXU0
EXT_LVDS_TXLCK# 146 145
19 EXT_LVDS_TXLCK# 146 145
EXT_LVDS_TXLCK 148 147 EXT_LVDS_TXUCK#
19 EXT_LVDS_TXLCK 148 147 EXT_LVDS_TXUCK# 19
150 149 EXT_LVDS_TXUCK
EXT_LVDS_TXUCK 19
1
150 149
152 152 151 151
EXT_DVITX1N 154 153 EXT_DVICLK-
EXT_DVITX1P 154 153 EXT_DVICLK+
156 156 155 155
EXT_DVITX2N 158 157 EXT_DVITX0N
EXT_DVITX2P 158 157 EXT_DVITX0P
160 160 159 159
162 162 161 161
EXT_HDMICLK- 164 163 0.5A H27 H19 H18 H11 H20 H14 H22 H26 H23 H24 H8 H17 H5
18 EXT_HDMICLK- 164 163 VCC5
EXT_HDMICLK+ 166 165
18 EXT_HDMICLK+ 166 165
168 168 167 167
EXT_HDMITX2N 170 169
18 EXT_HDMITX2N 170 169
EXT_HDMITX2P 172 171
18 EXT_HDMITX2P 172 171
EXT_HDMITX1N
174 174 173 173 VCC3 1.5A
18 EXT_HDMITX1N 176 175
1
18 EXT_HDMITX1P 178 178 177 177
180 179 A:(9/14) no stuff for A-stage
EXT_HDMITX0N 180 179
18 EXT_HDMITX0N 182 182 181 181
18 EXT_HDMITX0P 184 183 VCC3 VCC5 VIN
186 186 185 185
188 187 H1 H28 H3 H6 H12 PAD2 PAD1 H32
*0_6 R78 188 187
190 190 189 189 *0_6 R77
VIN 192 192 191 191 VIN
194 193 4A C90 C89 C96 C94 C83 C82
A:(9/14) no stuff for A-stage 194 193
196 196 195 195
198 197 EV@0.1u/10V_4 *0.1u/50V_6 S8-90RCG S8-90RCG
1
198 197
200 199
1
200 199
A A
EV@QT00200A-5120T-9F EV@0.1u/10V_4 EV@10u/6.3V_6 EV@10u/6.3V_6 *0.1u/50V_6
PROJECT : PB5/6
MXM CONNECTOR 1A
Date: Friday, June 06, 2008 Sheet 20 of 35

5 4 3 2 1
5 4 3 2 1
Codec(ALC272)
21
C140,C144 for ALC272, CPLS HP-L 22
NC @ALC268 CPLS HP-R 22 R219,R224 for ALC268, SYSTEM MIC
NC @ALC272
CPLS HP-R R256 0_4 VREFOUT_R VREFOUT_R 22
22 HP-JD
R544 for ALC272, R246 MIC2-VREFO VREFOUT_L
NC @ALC268 VREFOUT_L 22
C249 .1U_4
5.1K/F AGND 0_4 R214,R215 at ALC268 0 ohm, ALC272 NC
R271 AREF C248 10U_6 AGND
Speaker
AOUTL
D 22 AOUTL D
C228 C246
AOUTR +5V_ADO VCC5 AVDD_5V
22 AOUTR
2.2u 2.2u
R292
MIC2-VREFO BK2125HS330_8
U23 C290 C407
36
35
34
33
32
31
30
29
28
27
26
25
R281 0_4 .1U/16V_4
10U/10V_8
FRONT-R
HPOUT-R
VREF
FRONT-L
CBN
AVSS1
Sense B
CPVEE
CBP
AVDD1
MIC1-VREFO
HPOUT-L
R244 for ALC272,
NC @ALC268
22 SubWoofer 37 MONO-OUT LINE1-R 24
+5V_ADO 38 AVDD2 LINE1-L 23

AVDD_5V AVDD_5V
AOUT-EXT-L 39 22 MIC1-R C418 2.2U-6.3V_6 MIC1-R1 AGND
AOUT-EXT-L LOUT2-L MIC1-R MIC1-R1 22
AGND R248 20K/F_6 ALC268_JDREF 40 21 MIC1-L C417 2.2U-6.3V_6 MIC1-L1

JDREF MIC1-L MIC1-L1 22
C303 C412 C305 C397
AOUT-EXT-R 41 20 C421 *.1U_4
AOUT-EXT-R LOUT2-R LINE2-VREFO 10U/10V_8
.1U/10V_4 10U/10V_8 .1U/10V_4
42 19 C420 .1U_4
AGND
43
AVSS2
NC
ALC272 MIC2-VREFO
LINE1-VREFO 18 C419 *.1U_4

AGND
D37 BAS316 AGND AGND SPEAKER CON.
14
15
23
U21
6
8
T130 44 17 C416 2.2U-6.3V_6 2.2K R284 MIC2-VREFO
DMIC-CLK3/4 MIC2-R AOUTL C403 2.2U/10V_8 AOUL_G1432 R305 12K_6 1 20
GND
LVDD
RVDD
NC
NC
NC
T132 C415 2.2U-6.3V_6 R283 2.2K_4 LIN1 VOL
45 SPDIFO2 MIC2-L 16 INT_MIC 19
AOUTR C402 2.2U/10V_8 AOUR_G1432R309 12K_6 18 C318 C319 AGND
T131 RIN1
C 46 DMIC-CLK1/2 LINE2-R 15 C
INSPKL+ R295 11K_4 2 13 AGND 120P 120P CON4
EAPD R245 0_4 EAPD_47 C405 330P_4 LIN2 IN1/IN2
28 EAPD 47 14 17
DMIC-1/2/GPIO0
DMIC-3/4/GPIO1
EAPD LINE2-L INSPKR+ R314 11K_4 RIN2 INSPKR+ L30 CX8HS241006 INSPKR+N 6
ROUT+ 19 4
T129 48 SENSEA C401 330P_4 INSPKR- L31 CX8HS241006 INSPKR-N
SDATA-OUT
SPDIFO1 Sense A 13 ROUT- 12 3

24 INSPKL+ L33 CX8HS241006 INSPKL+N
SDATA-IN
DVDD-IO
LOUT+ 2
PCBEEP
RESET#
BIT-CLK
R277 20K/F_4 MIC1-JD C398 4.7U/10V_8 16 7 INSPKL- L32 CX8HS241006 INSPKL-N
DVDD2
DVSS1 MIC1-JD 22 RBYPASS LOUT- 1
SYNC
DVSS
AGND C413 4.7U/10V_8 3 LBYPASS C320 C321 5
THRMPAD
R278 *39.2K/F_4 HP-JD R_L_SPEAKERS
HP-JD 22
GND/HS
GND/HS
GND/HS
GND/HS
ALC268 AGND R304 0_4 SHDN_G1432 5 120P 120P
1
10
11
12
SHDN
AVDD_5V R310 10K_4 MUTE 11 AGND
MUTE AGND AGND
C414 1u BEEP G1432
25
22
21
10
9
VCC3 T128
3
T127 -AZ_RST_C
ACZ_RST#_AUDIO 12
Q32
R446 0_6 +AZA_VDD ACZ_SYNC_AUDIO 2 DTC144EUA
ACZ_SYNC_AUDIO 12 22,28 VOLMUTE#
AGND
C430 C428 C427 C424 VCC1.5
10U-6.3V_8 .1U_4 10U-6.3V_8 .1U_4
1
ACZ_SDIN268 R444 22_4 ACZ_SDIN0 UMT_213-3-1_3
ACZ_SDIN0 12
BA144EUAZ04
*10P_4 C425
BIT_CLK R445 0_4

BIT_CLK_AUDIO 12
C426 *10P_4
B B
ACZ_SDOUT_AUDIO
ACZ_SDOUT_AUDIO 12
R249 0_6
R429 *0_6
R270 0_6
VCC5 +5V_ADO
Q18 L21
2N7002
R450 47K_4 R333 *0_6
3 1 BEEP TI201209G121_8_3A C268 C215 C264 C218
14 SPKR
.1U_4 .1U_4 .1U_4 10U-6.3V_8
AGND
2
R449 C429
10K_4 1000P
28 ENBEEP
AGND
U24
R471 *0_4 +5V_268_VEN 1 4
SHDN VO
2 GND R452
3 5 *36K_4
VIN SET
C442 C193 *G913-C
A .1U_4 10U-6.3V_8 A
R451
*12K_4
Vout =1.25(1+R71/R72) PROJECT : PB5/6
R242 0_6
AGND Quanta Computer Inc.
AGND Size Document Number Rev
ALC272/AMP 1A

5 4 3 2 1
5 4 3 2 1
Subwoofer
LM358 Power
+5VA
U16
VCC5
22
4 OUT IN 3
GND 2
C332 C335 R366 C338
0.1U 10U 5 1 0.1U
SET SHDN
29.4K/F G923
D D
RC0603 AL000923003
AGND
R367 Vout=Vset{1+R(pin4,pin5)/R(pin5,gnd)}
10K/F Vset=1.25V
RC0603 Vout=1.25(1+29.4K/10K)=4.925V
Vout=1.25(1+28.7K/10K)=4.8375V
Cutoff:770Hz
AGND Vout=1.25(1+27K/10K)=4.625V C389 4700P/25V 0 R401
2nd order low pass filter(338HZ) WF_CF
Mixer & 1nd order low pass filter(338HZ) C356

0 R392
R419 R418
C357 1 2WF_GAIN 1 2
0.1U 22K/F 22K/F AGND
0.1U
21 SubWoofer
R422 Cutoff:8.8Hz U19
C638
120P
C639
120P
R396 +5VA *0_4 R420 12K
1 2 C343 FIL2_OUT C392 1U 1 2 2 4 SPK_WF+
6.2K 5VAMP IN OUT+ CON5
1
AGND
5VAMP 10K R403
SPK_WF-
2 WIRE-TO-BOARD 5V 2A
0.1U OUT- 12
C391 WF_SHDN# 10 5VAMP
AGND SHDN#
8
C350 1U 1 2
21 AOUTL
R377 12K 2 - 10K 0.1U 8 L35 VCC5
FIL2_OUT R402 R416 1 VDD
1 AUD_AMP_MUTE# 2 0 PVDD1 5 BLM21PG600SN1D(60,3A)
1
C358 1U 1 2 3 + 11
21 AOUTR R390 R380 PVDD2
R397 12K 6 - U15A 9 C379 C375 C378 C327 C390 C388
LMV358MM MUTE 0.1U 0.1U 0.1U 10U 10U 22U/10V
7 1 2 1 2
2
3
R372 1K 5
PGND1
PGND2
+
+5VA
U15B Q16 7
GND
WF_BIAS
CS21003J949 LMV358MM 6.2K 620K C352 VOLMUTE# DTC144EUA C374 BIAS

21,28 VOLMUTE# 2
R368 1000P *1U AGND
1K C340 AGND C373 MAX9711
1
3
1U 1U
1
AGND UMT_213-3-1_3
BA144EUAZ04
AGND AGND AGND AGND AGND
C C
AGND
HP
SYSTEM MIC
21 VREFOUT_L
D23 BAS316
R296 Normal Open Jack
4.7K_4 SUYIN=010188FR006G128JL
B B
1
MIC1-L1 R300 1K MIC-L L27 0_6 MIC_L 2
21 MIC1-L1
6
MIC1-R1 R307 1K MIC-R L28 0_6 MIC_R 3
21 MIC1-R1
4
MIC1-JD 5
R303
7
8
4.7K_4 C306 C294 C307 C295 CN13
R357 64
CPLS HP-R 21 21 VREFOUT_L
D22 BAS316 *47P_4 *47P_4 *47P_4 *47P_4
HP_R
R356 64 AGND AGND AGND AGND AGND

CPLS HP-L 21 21 VREFOUT_R
HP_L
21 MIC1-JD
Normal Open Jack

HEADPHONE
AGND
AGND C245
SUYIN=010188FR006G128JL
*39P_4 C244 39P_4
1
HP_L R265 0 L24 10_6 LINEOUTL 2
6
HP_R R274 0 L25 10_6 LINEOUTR 3
AGND
4
AGND C270 5
A A
*39P_4 C269 39P_4
7
8
CON6
21 HP-JD 1 3
AGND
Q10
*AO3403
2
R448 0_4 R447 *10K_4 VCC3

PROJECT : PB5/6
Audio JACK /Woofer 1A

5 4 3 2 1
5 4 3 2 1
LAN_REALTEK_RTL8102E C603 C616 C615 C604
RVCC3
23
0.1U 0.1U 0.1U 0.1U
D GND D
For RTL8102EL, use this block. * C684 and C685 are for U2 EVDD12 pin 19.
L11
DVDD12 0_6 R25 0_4
CTRL12A CTRL12A_L EVDD12
R29 0_6 CTRL12/VDD
Change L51 to 0 ohm C610 C605 C611 C612

0.1U 0.1U 1U
in RTL8102EL 10U/10V R28
application. Remove R1 & R2
GND 0_4 in RTL8102EL GND
application.
Note 1: The Trace length
between L1 and 8111DL's Pin
1 must be within 0.5 cm. C5
and C8 to L1 must be within DVDD12
0.5cm. Refer to Layout guide
for more detail.
C614 C617 C606 C602 C601
0.1U 0.1U 0.1U 0.1U 0.1U
C GND C
RVCC3 Remove R5 and R6 in RTL8102EL RVCC3
application.
C607 R589 RVCC3_ROM
C608
0.1U 10U/10V *0_4 R23 R24
R31 RVCC3 *10K 3.6K

2.49K/F R588 U1 *AT93C46
*0_4 EEDO 4 3 EEDI
DO DI
CTRL12/VDD
CTRL12/VDD
CTRL15/VDD33
C631 C623 7 NC
GND R6 *0_4 R5 *0 6 1 EECS
ORG CS EE_CLK
CLK_LAN_X2
CLK_LAN_X1
DVDD12
8 2
CTRL12A
VCC SK
RVCC3
RVCC3
0.1U
RSET
5 GND
GND
0.1U C6
C632 C613
*0.1U R26
0.01uF 10K
0.01uF 27P/50V_4 C14 CLK_LAN_X1 U2
48
47
46
45
44
43
42
41
40
39
38
37
C620
1
R603 0_4 Y1
GND
RSET
VCTR12DVDDSR
NC/VDDSR
NC/ENSWREG
VCTRL12A/SROUT12
CKTAL2
CKTAL1
NC/AVDD33
NC/LV_PLL
LED0
VDD33
1000P/3KV_1808 25MHz/20pF/25ppm
R592 0_4 VCC3

2
27P/50V_4 C20 CLK_LAN_X2

RVCC3 1 36 DVDD12
BG625000486 MDI0+ AVDD33 DVDD12 EE_CLK
2 MDIP0 LED1/EESK 35
MDI0- 3 34 EEDI
LAN_GND LAN_GND XTL-5_3X3_2-3_8-1_2H DVDD12 MDIN0 LED2/EEDI EEDO
4 NC/FB12 LED3/EEDO 33
MDI1+ 5 32 EECS R11
B MDI1- MDIP1 EECS GND B
6 MDIN1 GND 31 1K_4
GND 7 RTL8102EL/8111DL DVDD12 30 DVDD12
T1 MDI2+ GND RVCC3 R12 15K
8 NC/MDIP2 VDD33 29
T3 MDI2- 9 28 ISOLATEB
DVDD12 NC/MDIN2 ISOLATEB PERSTB
10 DVDD12/AVDD12 PERSTB 27 PLTRST# 13,24
T2 MDI3+ 11 26 PCIE_WAKE#
NC/MDIP3 LANWAKEB PCIE_WAKE# 14,24
T4 MDI3- 12 25 CLKREQB
NC/MDIN3 CLKREQB VCC3
NC/SMDATA
REFCLK_N
REFCLK_P
NC/SMCLK
10K R10
DVDD12
EVDD12
CLKREQB
HSON
EGND
HSOP
HSIN
HSIP
GND
EVDD12
DVDD12 13
14
15
16
17
CLK_PCIE_LAN# 18
19
20
21
22
23
24
U30
NS681686
CLK_PCIE_LAN
GND
R27 MDI1+ RJ45_MX1+ CON9
GND
1 RD+ RX+ 16
*CXM11A20001 MDI1- MCT1 8

2 RD- CT 14 7 10
RJ45_MX1-
C22 RJ45_MX1- 6 9
3 CT RX- 15 5
0.01U
EVDD12
MDI0+ RJ45_MX0- RJ45_MX1+ 4
7 TD+ TX- 9 3 13 PCIE_TXP6
RJ45_MX0-
2 13 PCIE_TXN6
MDI0- 8 11 MCT0 RJ45_MX0+ LAN_GND
TD- CMT 1
2 CLK_PCIE_LAN
C21 6 10 RJ45_MX0+
CT TX+ 2 CLK_PCIE_LAN#
RJ45-C100F8-100B-8P-L
0.01U
A R16 R15 A
75/F 75/F
C12 C17 0.1U/10V_4
RJ45_TER PCIE_RXP6_C
13 PCIE_RXP6
PCIE_RXN6_C
DB0VC1LAN07 (NS681686) 1000P/3KV_1808
13 PCIE_RXN6
C13 0.1U/10V_4
PROJECT : PB5/6
LAN_REALTEK_RTL8102EL 1A

5 4 3 2 1
5 4 3 2 1
VCC1.5
VCC3
A:(8/18) Due to EC assign Pin111 to other function
Remove uR_SOUT_CR from EC
A:(8/23) Remove uR_SWD from EC
MINI-Card I (WLAN)
CN9
C386 C383 C382
0.001u/50V_40.1u/10V_4 10u/10V_8
C380
0.1u/10V_4
C381
10u/10V_8
RVCC3 24
51 52 VCC3 R250
Reserved +3.3V
49 Reserved GND 50 EV@4.7K_4
47 48 VCC1.5 Q12
Debug(PCIRST#) +1.5V
2
45 46 EV@RHU002N06
R394 0_4 Debug(PCICLK) LED_WPAN# A:(9/12) Add WIMAX LED
43 GND LED_WLAN# 44
41 42 WiMAX_LED#_A R410 *10K VCC3 2,14 SCLK 3 1 PCLK_SMB
+3.3Vaux LED_WWAN#
39 +3.3Vaux GND 40
R393 0_4 37 38 USBP7+_C R408 0_4
D GND USB_D+ USBP7+ 13 D
35 36 USBP7-_C R407 0_4 RVCC3
GND USB_D- USBP7- 13
R395 0_4 PCIE_TXP0_WLAN 33 34
13 PCIE_TXP2 PETp0 GND
R381 0_4 PCIE_TXN0_WLAN 31 32 PDAT_SMB
13 PCIE_TXN2 PETn0 SMB_DATA
29 30 PCLK_SMB
C351 0.1u/10V_4 GND SMB_CLK R255
27 GND +1.5V 28 VCC1.5 PLTRST# 13,23
PCIE_RXP0_WLAN 25 26 EV@4.7K_4
13 PCIE_RXP2 PERp0 GND
PCIE_RXN0_WLAN 23 24 VCC3 Q11
13 PCIE_RXN2 PERn0 +3.3Vaux
2
C355 0.1u/10V_4 21 22 PLTRST# EV@RHU002N06
PCLK_DEBUG GND PERST#
2 PCLK_DEBUG 19 Reserved W_DISABLE# 20
PCIRST# R384 0_4 17 18 2,14 SDATA 3 1 PDAT_SMB
13,25,28 PCIRST# Reserved GND
15 16 LAD0
R383 0_4 CLK_PCIE_MINI_C GND Reserved LAD1 LAD0 12,28
2 CLK_PCIE_MINI 13 REFCLK+ Reserved 14
R382 0_4 CLK_PCIE_MINI_C# 11 12 LAD2 LAD1 12,28
2 CLK_PCIE_MINI# REFCLK- Reserved
9 10 LAD3 LAD2 12,28
GND Reserved LFRAME# LAD3 12,28
7 CLKREQ# Reserved 8
*2N7002E-LF 5 6 LFRAME# 12,28
Q15 Reserved +1.5V VCC1.5
3 4
ROBSON
GND
GND
WLAN_WAKE# Reserved GND
14,23 PCIE_WAKE# 3 1 1 WAKE# +3.3V 2 VCC3
C15706-190A1-L
53
54
VCC3
H=9mm
2
R391 *10K_4 CN15

51 Reserved +3.3V 52 VCC3
49 Reserved GND 50
47 Debug(PCIRST#) +1.5V 48 VCC1.5
45 Debug(PCICLK) LED_WPAN# 46
R234 *0_4 43 44
PCIRST# GND LED_WLAN#
41 +3.3Vaux LED_WWAN# 42
39 40 R264 *0_4
R235 0_4 +3.3Vaux GND USBP9+_C R260 0_4
37 GND USB_D+ 38 USBP9+ 13
C640 35 36 USBP9-_C R261 0_4
GND USB_D- USBP9- 13
1000P PCIE_TXP3 R238 0_4 PCIE_TXP3_C 33 34
13 PCIE_TXP3 PETp0 GND
PCIE_TXN3 R230 0_4 PCIE_TXN3_C 31 32 R262 *0_4 PDAT_SMB
13 PCIE_TXN3 PETn0 SMB_DATA
29 30 R263 *0_4 PCLK_SMB
C209 0.1u/10V_4 GND SMB_CLK
27 28
MINI-Card II (TV) 13 PCIE_RXP3
PCIE_RXP3
PCIE_RXN3
PCIE_RXP3_C
PCIE_RXN3_C
25
GND
PERp0
+1.5V
GND 26
VCC1.5
R404
PLTRST# 13,23
10K
C
13 PCIE_RXN3 23 PERn0 +3.3Vaux 24 VCC3 VCC3 C
C212 0.1u/10V_4 21 22 PLTRST#
GND PERST#
19 Reserved W_DISABLE# 20 WLSW 28
17 18 D25 1SS355
Reserved GND
CN10 15 16
R228 0_4 CLK_PCIE_MINI3_C GND Reserved
51 Reserved +3.3V 52 VCC3 2 CLK_PCIE_MINI3 13 REFCLK+ Reserved 14
49 50 R225 0_4 CLK_PCIE_MINI3_C# 11 12
Reserved GND 2 CLK_PCIE_MINI3# REFCLK- Reserved
47 Debug(PCIRST#) +1.5V 48 VCC1.5 9 GND Reserved 10
45 Debug(PCICLK) LED_WPAN# 46 7 CLKREQ# Reserved 8
43 GND LED_WLAN# 44 5 Reserved +1.5V 6 VCC1.5
41 42 3 4
GND
GND
+3.3Vaux LED_WWAN# R415 0_4 Reserved GND
39 +3.3Vaux GND 40 1 WAKE# +3.3V 2 VCC3
37 38 USBP10+_C R414 0_4
GND USB_D+ USBP8+ 13
35 36 USBP10-_C R413 0_4 C15725-180A5-L
USBP8- 13
53
54
PCIE_TXP1 R379 0_4 PCIE_TXP1_TV GND USB_D-
33 34
13
13
PCIE_TXP1
PCIE_TXN1
PCIE_TXN1 R378 0_4 PCIE_TXN1_TV 31
PETp0
PETn0
GND
SMB_DATA 32 PDAT_SMB
PCLK_SMB
H=8mm
29 GND SMB_CLK 30
C354 0.1u/10V_4 27 28 VCC1.5
PCIE_RXP1 PCIE_RXP1_TV GND +1.5V
13 PCIE_RXP1 25 PERp0 GND 26
PCIE_RXN1 PCIE_RXN1_TV 23 24 VCC3
13 PCIE_RXN1 PERn0 +3.3Vaux
C353 0.1u/10V_4 21 22 PLTRST#
GND PERST# PLTRST# 13,23
19 20 RF_EN_TV R412 *10K VCC3
Reserved W_DISABLE#
17 Reserved GND 18
15 GND Reserved 16
R387 0_4 CLK_PCIE_MINI2_C 13 14
2 CLK_PCIE_MINI2 REFCLK+ Reserved VCC3 VCC3
R386 0_4 CLK_PCIE_MINI2_C# 11 12 PDAT_SMB R406 0 C385 10p
2 CLK_PCIE_MINI2# REFCLK- Reserved
9 GND Reserved 10
7 CLKREQ# Reserved 8
5 6 VCC1.5 PCLK_SMB R405 0 C384 10p
Reserved +1.5V
3 4
GND
GND
Reserved GND A:(8/29) follow EMI suggestion, reserve RC termination C422 C243 C423 C240 C241 C242
1 WAKE# +3.3V 2 VCC3
*10U/10V/X5R_8 *0.1u/10V_4 *0.1u/10V_4 *10U/10V/X5R_8 *0.1u/10V_4 *0.1u/10V_4
C15725-180A5-L
53
54
H=8mm
B B
A:(9/7) per TI FAE suggestion:

(1)Please keep all Input and Output capacitor value > 4.8uF (0.1uF +4.7uF) New card
(2)Please put these caps closed to IC CN4
(3)R4101(pin 19,OC#) value should change to 2k ohm.
New Card's Power Switch 26 GND1 GND29 29
25 30
NEW CARD'S POWER SWITCH 13
13
PCIE_TXP4
PCIE_TXN4 24
PETp0 GND30
PETn0
QCI PN Vendor 23 GND2
CPPE# : ( Internal Pull Up , active low when card support PCIE ) 13 PCIE_RXP4 22 PERp0
AL000577001 GMT 13 PCIE_RXN4 21 PERn0
CPUSB# : ( Internal Pull Up , active low when card support USB ) 20 GND3
AL027C10003 OMC 2 CLK_PCIE_NEW 19 REFCLK+
RVCC3
SHDN# : ( Internal Pull Up ) 2 CLK_PCIE_NEW#
CPPE#
18 REFCLK-
AL005538001 Ricoh 17 CPPE#
R64 NEW Card_CLKREQ#
H=0.8mm 2 NEW_CLKREQ# 16 CLKREQ#
2
PDAT_SMB R62 NEW@0_4 NEW_SMDATA U5 AL002231000 TI NEW@0_4 +NEW_3V 15
+NEW_3V +3.3V1
VCC3 2 3.3VIN 3.3VOUT 3 14 +3.3V2
4 5 Q6 PERST# 13
3.3VIN 3.3VOUT *NEW@DTC144EU +NEW_3VAUX PERST#
12 +3.3VAUX
RVCC3 17 15 +NEW_3VAUX PCIE_WAKE# 3 1 11
AUXIN AUXOUT 14,23 PCIE_WAKE# +NEW_1.5V WAKE#
10 +1.5V1
VCC1.5 12 11 +NEW_1.5V 9
1.5VIN 1.5VOUT NEW_SMDATA +1.5V2
14 1.5VIN 1.5VOUT 13 8 SMB_DATA
R63 NEW_SMCLK 7
PLTRST# T17 T28 SMB_CLK
13,23 PLTRST# 6 SYSRST# STBY# 1 6 RESERVED1
Thermal GND
20 10 CPPE# NEW@0_4 T27 5

T14 SHDN# CPPE# CPUSB# CPUSB# RESERVED2
CPUSB# 9 4 CPUSB#
PCLK_SMB R61 NEW@0_4 NEW_SMCLK RCLKEN 18 R60 NEW@0_4 USBP6+_C 3
VCC3 RCLKEN 13 USBP6+ USB_D+
R46 *10K 16 8 PERST#_R R50 NEW@28.7K/F_4 PERST# R59 NEW@0_4 USBP6-_C 2
NC PERST# 13 USBP6- USB_D-
T16 7 19 1
GND OC# GND4
A A:(8/23) change to another SMBus channel. NEW@OZ27C10LN-C1 C56 A
RVCC3
21
SCL1/SDA1 is dedicated SMbus interface for ASF devices only. R45 NEW@47K_4 NEW@3300p/50V_4 B:(9/27) Change from +3V_S5 to +3V VCC3 NEW@130801-1
RVCC3
5
U7 1 NEW Card_CLKREQ# *NEW@10K_4 R65
NEW_CLKREQ# 4 RVCC3 Header 130801-1 DFHD26MR074
2 *NEW@10K_4 R66
VCC3 *NEW@NC7SZ32P5X
3 Ejector 131851-V FBBL5001010
RVCC3 VCC1.5
3
+NEW_3VAUX +NEW_3V +NEW_1.5V
C42 C47 C51 PROJECT : PB5/6
C33 C49 C43 C40 2 RCLKEN
NEW@0.1u/10V_4
NEW@0.1u/10V_4NEW@4.7u/6.3V_6 C74 C79 C75 C76 C80 C73 (0918) Reserve CLKREQ#
NEW@0.1u/10V_4 NEW@0.1u/10V_4NEW@0.1u/10V_4
NEW@4.7u/6.3V_6
circuit to NEW_CLKREQ# of Quanta Computer Inc.
NEW@0.1u/10V_4 NEW@4.7u/6.3V_6
NEW@0.1u/10V_4NEW@0.1u/10V_4 NEW@4.7u/6.3V_6
NEW@0.1u/10V_4 *NEW@2N7002E
clock generator Size Document Number Rev
1
A:(9/7) per TI FAE suggestion: Q5
(1)Please keep all Input and Output capacitor value > 4.8uF (0.1uF +4.7uF)
MINI CARD/NEW CARD 1A
5 4 3 2 1
A B C D E
CARD READER http://hobi-elektronika.net

CARDREADER POWER
25
3VRUN
C460 C473 C472

VCC_XD
4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 VCC3 U11 30mil
RT9711BPF
2 8 VCC_XD
IN1 OUT3 VCC_XD
4 3 7 C451 C452 C454 4
VCC3 L36 BK1608HS220_6 VCC1.8 IN2 OUT2
OUT1 6
C453 MC_PWR_3V# 4 0.01u_4 0.01u_4 0.01u_4
EN#
1 GND
1u/16V_8 9 5 *10K_4 R482 VCC3
C159 C457 C477 C474 C166 C486 GND-C OC#
4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4
U25
102
103
122
120
125
OZ129T
26
56
67
73
79
81
14
15
91
92
7
AD[0..31]
13 AD[0..31]
PCI_VCC
PCI_VCC
3.3VCCD
3.3VCCD
3.3VCCD
3.3VCCD
3.3VCCA
3.3VCCA
3.3VCCA
3.3VCCA
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
AD31 19
AD30 AD31 C479 15p_4
20 AD30
AD29 21 78 R505 5.9K/F_4
AD29 REF
2
AD28 22 Y5 24.576MHz
AD27
AD26
AD25
23
24
AD28
AD27
AD26
XI
XO
83
84
1394_XIN
1394_XOUT 4 IN 1 CONN
25
1
AD24 AD25 TPBIAS0 C482 15p_4
REQ0# AD17 AD23
27 AD24 TPBIAS 76
TPA0P
29 AD23 TPA+ 75
GNT0# INTA# AD22 30 74 TPA0N H=1.2mm Better than 50ppm
AD21 AD22 TPA- TPB0P VCC_XD VCC_XD
31 AD21 TPB+ 72
AD20 32 71 TPB0N VCC3 R494 *10K CON7
AD17 R510 100/F_4 OZ129_IDSEL AD19 AD20 TPB-
34 AD19
AD18 35 1 11 SD_D3_C 47 R485 SD_D3
AD17 AD18 MC_PWR_3V# MS_BS R508 47 MS_BS_1# MS-GND1 SD-CD/DAT3 SD_CMD_C 47 R490 SD_CMD
36 AD17 MC_3V# 4 2 MS-BS SD-CMD 12
AD16 37 113 SD/MS_CLK_C R487 47 SD/MS_CLK MS_D1 R506 47 MS_D1_C 3 13
AD15 AD16 SD/MS_CLK SD_D3 MS_D0 R504 47 MS_D0_C MS-D1 SD-GND1
The 100ohm is that reduce the notice form PCI signal AD14
47 AD15 SD_D3 111
SD_D2 MS_D2 MS_D2_C
4 MS-SDIO(D0) SD-VDD 14
SD/MS_CLK
48 112 R503 47 5 15
AD13 AD14 SD_D2 SD_D1 C475 MS_CD# R501 47 MS_INS MS-D2 SD-CLK
49 AD13 SD_D1 107 6 MS-INS SD-GND2 16
AD12 50 108 SD_D0 22P MS_D3 R493 47 MS_D3_C 7 17 SD_D0_C 47 R511 SD_D0
AD11 AD12 SD_D0 SD_CMD SD/MS_CLK MS-D3 SD-DAT0 SD_D1_C 47 R512 SD_D1
3
51 AD11 SD_CMD 110 8 MS-SCLK SD-DAT1 18 3
AD10 52 117 SM_WPI#/SD_WP 9 19 SD_D2_C 47 R481 SD_D2
AD9 AD10 SM_WPI#/SD_WP SD_CD# MS-VCC SD-DAT2
53 AD9 SD_CD# 114 10 MS-GND2
AD8 54
AD7 AD8 MS_D1
57 AD7 MS_D1/XD_D7 95
AD6 58 93 VCC3 R479 *10K SD_CD_C 20 22 SD_SW 47 R513 SM_WPI#/SD_WP
AD5 AD6 XD_D6 SD-SW(RSV) SD-SW(WP)
59 AD5 XD_D5 89 21 SD-SW(GND) SD-SW(WP-GND) 23
AD4 60 87 SD_CD# R480 47
AD3 AD4 XD_D4 MS_BS
61 AD3 MS_BS/XD_D3 88
AD2 62 90 MS_D0
AD1 AD2 MS_D0/XD_D2 MS_D2
63 AD1 MS_D2/XD_D1 94
AD0 64 96 MS_D3 VCC_XD VCC_XD Molex47265-0001-CARD-READER
AD0 MS_D3/XD_D0
XD_CE# 119
13 CBE3# 28 C/BE3# XD_R/B# 100
13 CBE2# 38 C/BE2# XD_CLE 118 Supporting MMC/SD/MS Cards
13 CBE1# 46 C/BE1# XD_ALE 109
13 CBE0# 55 C/BE0# XD_WE# 105 Molex P/N:DFHD23MS0B6
101 C183 C178
OZ129_IDSEL XD_RE#
5 IDSEL XD_WPO# 98 TTN P/N:DDFHD23MS0A8
45 99 MS_CD# 0.1U 0.1U
2 PCLK_OZ129 PCI_CLK MS_CD#
13 DEVSEL# 42 DEVSEL# XD_CD# 97
13 FRAME# 39 FRAME#
13 IRDY# 40 IRDY#
13 TRDY# 41 TRDY# NC1 2
13 STOP# 43 STOP# NC2 8
13 PAR 44 PAR NC6 9
13 REQ0# 17 REQ# NC7 10
13 GNT0# 18 GNT# NC5 13
13,24,28 PCIRST# 1 PCI_RST# NC3 126
INTA# 11 127
13 INTA#
13 PCI_PME#
14 CLKRUN#
PCI_PME#
CLKRUN#
3
6
INTA#
PME#
CLKRUN#
NC4
NC8 128
1394
106 MEDIA_ACTV TEST0 85
TEST1 86
AGND
AGND
AGND
AGND
AGND
AGND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2 MEDIA_LED: 1=Enable MEDIA_LED activity(Default) 2
TPBIAS0 C470 1394@1u/10V_4

H=1.6mm
12
16
33
66
68
104
115
116
121
123
124
65
69
70
77
80
82
L39 0_6
R502 R499 L56
4 4 3 3
1 1 2 2
1394@56.2/F_4 1394@56.2/F_4
*1394@CL-2M2012-121JT
RN17
TPA0P 1 2 L1394_TPA0+ CN24
As close as TPA0N 3 4 L1394_TPA0- 5
possible to JM380 L1394_TPB0- 1
1394@0_4P2R_S L1394_TPA0- 3
L1394_TPA0+ 4
RN18 L1394_TPB0+ 2 6
PCLK_OZ129 TPB0N 3 4 L1394_TPB0-
TPB0P 1 2 L1394_TPB0+
1394@C13141-10405-L
1394@0_4P2R_S
R483
R486 R489 L57
*22_4 1 2 These 1394 signals are high speed
1394@56.2/F_4 1394@56.2/F_4 1 2
4 4 3 3 differential pairs and must be kept equal
1394_COM *1394@CL-2M2012-121JT length with a differential impedance (Zo)
C455 of 110ohms.
C456
*22p_4 R484
1394@270p/25V_4
1394@5.1K/F_4
1 1
Reserve EMI
PROJECT : PB5/6
OZ129 ( CARD READER / 1394) 1A

A B C D E
5 4 3 2 1
1.8VSUS
VCC5
26
C364 0.01u/16V_4
C366 0.01u/16V_4
C363 0.01u/16V_4
D C365 0.01u/16V_4 D
1.8VSUS C641 0.1u/16V_4
C642 0.1u/16V_4
C643 0.1u/16V_4
C644 0.1u/16V_4
CN8
14
SATA ODD +1.8VSUS_GMCH C645 0.1u/16V_4
GND14 C646 0.1u/16V_4

5VPCU
GND1 1
2 SATA_TXP4 12 C647 0.1u/16V_4
RXP
RXN 3 SATA_TXN4 12
4 C648 0.1u/16V_4
GND2
TXN 5 SATA_RXN4 12
6 C649 0.1u/16V_4
TXP SATA_RXP4 12
GND3 7
8 R398 1K_4 Device Present

DP
+5V 9
10 +5VSATA_ODD R370 0_8 5VSATA
+5V
RSVD 11
GND 12
13 C370 C371 C369 C368 C367
GND
15 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 10u/10V_8
GND15
C18534-11305-L
C C
SATA HDD
CN7
2'nd SATA HDD A:(9/5) update footprint
23 A:(9/13) update footprint
GND23 CN17
GND1 1 GND23 23
RXP 2 SATA_TXP0 12
RXN 3 SATA_TXN0 12 GND1 1
B GND2 4 RXP 2 SATA_TXP1 12 B
TXN 5 SATA_RXN0 12 RXN 3 SATA_TXN1 12
TXP 6 SATA_RXP0 12 GND2 4
GND3 7 TXN 5 SATA_RXN1 12
TXP 6 SATA_RXP1 12
GND3 7
8 +3.3VSATA1 R376 BK2125HM241 VCC3
3.3V
3.3V 9
10 8 +3.3VSATA2 R161 BK2125HM241 VCC3
3.3V C348 C349 C654 3.3V
GND 11 3.3V 9
GND 12 3.3V 10
13 4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 11 C114 C115 C655
GND GND
5V 14 GND 12
15 13 4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4
5V +5VSATA1 R374 BK2125HM241 GND
5V 16 5VSATA 5V 14
GND 17 5V 15
18 16 +5VSATA2 R162 BK2125HM241 VCC5
RSVD C345 C346 C344 C657 5V
GND 19 GND 17
12V 20 RSVD 18
21 0.1u/10V_4 0.1u/10V_4 10u/10V_8 0.1u/10V_4 19 C117 C118 C116 C656
12V GND
12V 22 12V 20
21 0.1u/10V_4 0.1u/10V_4 10u/10V_8 0.1u/10V_4
12V
GND24 24 12V 22
SA@127043FR022GX51ZR 24
GND24
SA@127043FR022XX27ZR
A A
PROJECT : PB5/6
SATA / HyberFLASH 1A
Date: Monday, June 02, 2008 Sheet 26 of 35

5 4 3 2 1
5 4 3 2 1
http://hobi-elektronika.net CN5
1 GND1
R349 0_4 USBP5-_C 2
13 USBP5+ USB_D+
R351 0_4 USBP5+_C 3
13 USBP5- USB_D-
4 RSVD
BT_AVTIVE_R 5 +5V_TP TPDATA_1
T118 BT_AVTIVE(PIO5)
HW_RADIO_DIS# 6 TPCLK_1
L34 WLAN_ACTIVE_R HW_RADIO_DIS#
T117 7 WLAN_ACTIVE(PIO6)
VCC3 BT_VCC 8 C211
BLUELED +3.3V C205 C195 C214
T114 9 LED
MNB-201209-0060P-N2Q 10 4.7u/10V_8 0.1u/10V_4 *10P_4 *10P_4
CN20 GND2
1 C387 BLUETOOTH
GND1 R605 0_4 SATA_TXP5 .1U_4
TXP 2 SATA_TXP5 12
D
R604 0_4 SATA_TXN5 CON2 D
TXN 3 SATA_TXN5 12
8 4 L20 1 2 BLM18PG181SN1D_6 +5V_TP 6
GND GND2 VCC5 6
9 5 R606 0_4 SATA_RXN5 5
GND RXN SATA_RXN5 12 5
10 6 R607 0_4 SATA_RXP5 R237 0_4 TPDATA_1 4
GND RXP SATA_RXP5 12 28 TPDATA 4
11 7 R240 0_4 TPCLK_1 3
GND GND3 28 TPCLK 3
VCC3 2
GND 2
1 1
E-SATA C217
ESATA-CD013C0EA-7P-L-H T/P_Board
R348 *100p/50V_4
4.7K AFNXX0-N2G1V-6P-R-kw3
DFHS06FS178
HW_RADIO_DIS#
3
R618 0 Q14
28 BT_ON 2 DTC144EUA
VCC3
1
UMT_213-3-1_3
BA144EUAZ04
R635
*4.7K
1
VCC5 2
5VPCU 3
4
28 RF_SW 5
28 RF_LED 6
28 TP_ON 7
28 TP_LED# 8
28 PWRLED# 9
C C
28 NBSWON# 10
ANT_GND 11
12
CN2
TOUCH PAD 12P
3
CN1
GND 2
GND
1 ANT 1
SIG SIG
GND 3
GND DFHS01FS000
MMCX-25-10904-T-3P
DFHD01MS381 25-501A0-L
2
ANT_GND CN23 5VPCU
NBSWON# PWRLED#
ANT_GND C576 C55 C581
R4 0
0.1u/10V_4 1000p/50V_4 1000p/50V_4
ANT_GND
DKZ00TFU101
F3 VCC5
5VSUS 1 2 USBVCC0 USBVCC0 TP_LED# TP_ON
POLY_SWITCH RC1206 C575 C580 C579

+ C624
C650 C618 100U/6.3V-3528 0.1u/10V_4 1000p/50V_4 1000p/50V_4
0.1U 0.1U
RF_LED RF_SW
C578 C577
B B
RP49 CN21
0_4P2R_S USBVCC0 1000p/50V_4 1000p/50V_4
USBP3-_C 1 5
13 USBP3- 2 1 2 6
4 3 USBP3+_C
13 USBP3+ 3 7
4 8
1
C635 C636
*47P/50V *47P/50V USBVCC0 USBVCC0 USB
*DLW21HN900SQ2L
2
4 4 3 3
1
1 1 2 2
D34 D35
L54 3 DA204U 3 DA204U
2
5VUSB 1
C331 2
C651 C652 C653 C328 3
0.1u 1000P 1000P 0.1u *10u/10V_8 R352 0_4 USBP2+_C 4
13 USBP2+ 5
R359 0_4 USBP2-_C
13 USBP2- 6
R353 0_4 USBP1+_C 7
13 USBP1+ 8
R360 0_4 USBP1-_C
13 USBP1- 9
R354 0_4 USBP0+_C 10
13 USBP0+ 11
R361 0_4 USBP0-_C
13 USBP0- 12
CN6
USB_CONN
A A
PROJECT : PB5/6
ESATA/SW/ TP/ USB /BT/TV 1A

5 4 3 2 1
5 4 3 2 1
VCC3
R207
10K_4
VCC3 R214 10K_4
D14 BAS316 HWPG

30 SYS_HWPG
3VPCU EC_3AVCC L17 BK1608HS121-T 3VPCU VCC3 R213 *10K_4
C138 C139 EC_3VSTBY L19 BK1608HS121-T 3VPCU D12 BAS316

32 HWPG_1.05V
C182
C175 C171 C146 C186 C181 C141 1000P/16V_4 0.1U
0.1U 3VPCU
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U D11 EV@BAS316
D 20 GFXPG D
T66
R636 EV@10K_4
T63
T69
D10 EV@BAS316
MY16 29 34 HWPG_1.5V
MBCLK R200 4.7K_4
MY17 29
HWPG MBDATA R201 4.7K_4
VOLMUTE# 21,22
D9 EV@BAS316
SUSC# 14 6,33 HWPG_1.8V
NBSWON# R206 10K
VCCRTC
27 NBSWON#
RSMRST# 14
WLSW R209 10K
VRON 31 24 WLSW
VCC3 3VPCU
ECPWROK 14,19
MAINON 20,32,33,34
SUSON 33,34
LPCPD# R210 *10K
RVCC_ON 34
MY16
MY17
CHG# 35
PCLK_EC
R211 C185
C191 *22
*10P 0.1U RVCC3
114
121
127
107
11
26
50
92
74
84
83
82
56
57
33
19
20
99
98
97
96
95
94
93
3
10 110 MBCLK VCC5 SWI# R608 10K
VCC
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VBAT
AVCC
VSTBY
GPE3/ISCLK
GPE2/ISAS
GPE1/ISAD
KSO16/GPC3
KSO17/GPC5
GINT/GPD5
L80HLAT/GPE0
L80LLAT/GPE7
GPG1/ID7
GPH6/ID6
GPH5/ID5
GPH4/ID4
GPH3/ID3
GPH0/ID0/SHBM
GPH2/ID2/BADDR1
GPH1/ID1/BADDR0
12,24 LAD0 LAD0 SMCLK0/GPB3 MBCLK 3,20,35
9 111 MBDATA
12,24 LAD1 LAD1 SMDAT0/GPB4 MBDATA 3,20,35
SM BUS
12,24 LAD2 8 LAD2 SMCLK1/GPC1 115 DNBSWON# 14
7 116 D7 BAS316
12,24 LAD3 LAD3 SMDAT1/GPC2
LID# 22 117
19 LID# LPCRST#/WUI4/GPD2 SMCLK2/GPF6 CAPSLED# 29
PCLK_EC 13 118 10K 10K
2 PCLK_EC LPCCLK SMDAT2/GPF7 CELL-SET 35
12,24 LFRAME# 6 LFRAME#
85 RF_LED
PS2CLK0/GPF0 RF_LED 27
R179
R180
LPCPD# 17 86
LPCPD#/WUI6/GPE6 PS2DAT0/GPF1 TP_LED# 27
PS2CLK1/GPF2 87 TP_ON 27
PS/2
12 GATEA20 126 GA20/GPB5 GPIO PS2DAT1/GPF3 88 PCIRST# 13,24,25
D8 BAS316 5 89
14 SERIRQ SERIRQ PS2CLK2/GPF4 TPCLK 27
14 KBSMI# 15 ECSMI#/GPD4 PS2DAT2/GPF5 90 TPDATA 27
D17 BAS316 23 LPC
14 SCI# ECSCI#/GPD3
PCURST# D15 BAS316 14 3VPCU
D18 BAS316 WRST#
12 RCIN# 4 KBRST#/GPB6
14 PM_BATLOW# 16 PWUREQ#/GPC7
C D16 BAS316 C
PWM0/GPA0 24 NUMLED# 29
25 R204
CIR_IN 119
123
GPC0/CRX
GPB2/CTX CIR
IT8512 PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
28
29
30
PWRLED# 27
ENBEEP 21
REFON 35
WLSW 24
10K R183
10K
T79 31 SWI# 14 U9
PWM5/GPA5 D13 BAS316 8512_SCE#
PWM6/GPA6 32 BT_LED# 29 1 CE# VDD 8
PWM 34 8512_SCK R182 47 8512_SCK_R 6
PWM7/GPA7 BT_ON 27 SCK
8512_SI R181 47 8512_SI_R 5 C147
3VPCU 8512_SO R205 15 8512_SO_R SI
TACH0/GPD6 47 FANSIG 29 2 SO HOLD# 7
48 0.1U
TACH1/GPD7 D/C# 35
3 WP# VSS 4
R212 120
TMR0/WUI2/GPC4 W25X80
470K TMR1/WUI3/GPC6 124 CCD_POWERON 19
3
WP# 2 Q37
14 WP#
PCURST# *MMBT3906
125 NBSWON# 27
1
C188 PWRSW/GPE4
RI1#/WUI0/GPD0 18 SUSB# 14
WAKE UP RI2#/WUI1/GPD1 21 ACIN 35
0.1U
WUI5/GPE5 35 -PCUHOLD
RING#/PWRFAIL#/LPCRST#/GPB7 112
TXD/GPB1 109 BATLED0#

UART RXD/GPB0 108 BATLED1# 29
66 TEMP_MBAT DNBSWON#
ADC0/GPI0 TEMP_MBAT 35
R197 10K 106 67 MBATV HWPG
FLRST#/WUI7/GPG0/TM ADC1/GPI1 MBATV 35
8512_SCK 105 68 SUSC#
FLCLK/SCK ADC2/GPI2 RF_SW 27
104 69 MID1
8512_SO FLAD3/GPG6 ADC3/GPI3 C187 C180 C176
103 FLAD2/SO FLASH ADC4/GPI4 70 EAPD 21
8512_SI 102 71 MID2
8512_SCE# FLAD1/SI ADC5/GPI5 MID3 *39P *39P *39P
101 FLAD0/SCE# ADC6/GPI6 72
R193 *100K 100 A/D D/A 73 R176 10K@EV 3VPCU
FLFRAME#/GPG2 ADC7/GPI7
MY0 36
B MY1 KSO0/PD0 R177 B
37 KSO1/PD1
MY2 38 *10K@IV
MY3 KSO2/PD2
39 KSO3/PD3 DAC0/GPJ0 76 CC-SET 35
MY4 40 KBMX 77
KSO4/PD4 DAC1/GPJ1 VFAN 29
MY5 41 78
KSO5/PD5 DAC2/GPJ2 CV-SET 35
MY6 42 79
KSO6/PD6 DAC3/GPJ3 ADJ 19 5VPCU
MY7 43 80
MY8 KSO7/PD7 DAC4/GPJ4
44 KSO8/ACK# DAC5/GPJ5 81
MY9 45 R423 CIR@0_4 C393 0.1u/10V_4
MY10 KSO9/BUSY
46 KSO10/PE
MY11 51 2 PMUX1
KSO11/ERR# CK32KE
KSI3/SLIN#
KSI1/AFD#
KSI0/STB#
MY12 PMUX2
KSI2/INIT#
52 KSO12/SLCT CLOCK CK32K 128

5VPCU
MY13 53 KSO13
AVSS
MY14 54
KSI4
KSI5
KSI6
KSI7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MY15 KSO14 U20

55 KSO15 Y3
R421 CIR_VCC 2
*10K_4 VCC
29 MY[0..15] IT8512 U10 1 4
58
59
60
61
62
63
64
65
1
12
27
49
91
113
122
75
2 3
AJ085120F02 CIR_IN 1 OUT
1
1
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
R171
0 C190 32.768KHZ C184 3 GND
10P 10P 4
29 MX[0..7]
2
GND
IR-IRM-V538-TR1
3VPCU IR-IRM-V538-TR1-3P-pb2
1
C192 C189 BEBK0076Z00
0.1U *0
2
1
NBSWON# 2 Q9
27 NBSWON# DTA124EU
3
-PCUHOLD 3VPCU
35 ACIN
D20 BAS316
A 14 SUSB# A
D19 BAS316
R229 R190 R191 R192
100K 100K 100K 100K

R622 0
MID1
R623 0
MID3 MID2 MID1
MID2
R624 0
MID3
R625 0
PB5M 0 0 0
12 CLEAR_CMOS
CLEAR_CMOS PROJECT : PB5/6
PB6 0 0 1 Quanta Computer Inc.
PB6M 0 1 0 EC ITE8512 1A
Date: Tuesday, June 10, 2008 Sheet 28 of 35

5 4 3 2 1
5 4 3 2 1
LED
CPU FAN
LED3
BATTERY CHARGE LED
29
1 3 1 2 R38 330_6 5VPCU
Q34 17-21SYGC/S530-E2/TR8
MMBT3906 LED17-21VGC-TR8
2
R610 3VPCU
28 BATLED1#
D 10K_4 D
3VPCU
VCC5
R570
100K
BLUE TOOTH LED 28 FANSIG R573
3
LED4
1 3 1 2 R41 330_6 VCC5 Q25 10K_4
DTC144EUA 2
VCC5
Q3 17-21SYGC/S530-E2/TR8
MMBT3906 LED17-21VGC-TR8 UMT_213-3-1_3 C561
2 VCC3
1
R42 VCC3 C568 BA144EUAZ04 *0.01u/16V_4
28 BT_LED#
0.1u/10V_4
10K_4 R582
*10K_4 U28 CON8
2 3 TH_FAN_POWER
LED2 VIN VO 3
GND 5 2
1 3 1 2 R30 330_6 VCC5 THERM_ALERT# 1 6
3,14 THERM_ALERT# /FON GND C565 C563 1
GND 7
Q35 17-21SYGC/S530-E2/TR8 4 8 85205-0300L
MMBT3906 LED17-21VGC-TR8 28 VFAN VSET GND 10u/10V_8 0.01u/16V_4
2
G995
R611 VCC3
28 CAPSLED#
10K_4 FANPWR = 1.6*VSET
G995/Pin1- internal pull high (+5V)
Number Lock LED
LED1
1 3 1 2 R17 330_6 VCC5
Q36 17-21SYGC/S530-E2/TR8
MMBT3906 LED17-21VGC-TR8
2
R612 VCC3
C 28 NUMLED# C
10K_4
Keyboard CONN
220Px4 CP6
MY10 24 7 8 MX5
28 MY10 24
MY15 23 5 6 MX4
28 MY15 23
MX4 22 3 4 MY15 3VPCU
28 MX4 22
MX5 21 1 2 MY10
28 MX5 21
MY8 20
28 MY8 20
MX6 19
28 MX6 19
MX0 18 220Px4 CP5
28 MX0 18
MY0 17 7 8 MY0 3VPCU
28 MY0 17
MX3 16 5 6 MX0 MY17 R198 *10K
28 MX3 16 28 MY17
MX1 15 3 4 MX6 RP17 MX0 R196 10K
28 MX1 15 28 MX0
MY13 14 1 2 MY8 10 1 MY3 MY16 R615 *10K
28 MY13 14 28 MY16
MX7 13 MY4 9 2 MY2 MY15 R616 10K
28 MX7 13 28 MY15
MX2 12 MY5 8 3 MY1
28 MX2 12
MY3 11 220Px4 CP4 MY6 7 4 MY0
28 MY3 11
MY11 10 7 8 MX7 MY7 6 5
28 MY11 10
MY12 9 5 6 MY13
28 MY12 9
MY2 8 3 4 MX1 10KX8
28 MY2 8
MY9 7 1 2 MX3
28 MY9 7
MY14 6 RP16
28 MY14 6
MY6 5 10 1
28 MY6 5
MY7 4 220Px4 CP3 MY11 9 2 MY10
28 MY7 4
B
MY5 3 7 8 MY12 MY12 8 3 MY9 B
28 MY5 3
MY1 2 5 6 MY11 MY13 7 4 MY8
28 MY1 2
MY4 1 3 4 MY3 MY14 6 5
28 MY4 1
1 2 MX2
CON3 10KX8
AFN240-A2G1T-24P-L
AFN240-A2G1T-24P-L-kw3 220Px4 CP2 RP15
7 8 MY6 10 1 MX3
5 6 MY14 MX4 9 2
3 4 MY9 MX5 8 3 MX2
P/N:DFFC24FR181 1 2 MY2 MX6 7 4 MX1
MX7 6 5
Bot contact
220Px4 CP1 10KX8
7 8 MY4
5 6 MY1
3 4 MY5
1 2 MY7
24 1
15" 17"
CAPSLED
K_LED_P
V V
(Pin 31)
A
FN_F10 A
K_LED_P
V
(Pin 6)
NUMLED
K_LED_P
V V
(Pin 1) PROJECT : PB5/6
SW/LED/Keyboard 1A

5 4 3 2 1
5 4 3 2 1
MAIND
MAIND 33,34
SUSD
SUSD 34
VIN
3 SYS_SHDN# 1 2
VIN
PR23
0_4 VL
D VIN PR178 D
1 2 PC26 PC27 PC24
2
0.1u/50V_6 10u/25V_1206
+ VL PD17 PC10 10_6 2200p/50V_4
UDZS5.1BTE-17 4.7u/10V_8
1
1
2
PR21 PR10 PR13
39K/F_4 PC13 0_4 PC12 0_4
1
PC31 PC32 PC34 PC29 PR12 1u/10V_6
*100U/25V_6X7.7 0.1u/50V_6 2200p/50V_6 10u/25V_1206 10K_4 0.1u/50V_6 PR32
1
2
5
6
7
8
PC28 *2.2_6
10u/25V_1206 PC14 PC11
1u/10V_6 0.1u/50V_6
2
3V5V_EN REF 4
3V_DH
1
8
7
6
5
PR9 *0_6 PC23
PR11 PQ8 *2200p/50V_6 OCP : 8A
100K_4 FDS8878
8
7
6
5
4
3
2
1
4 5V_DH 3VPCU
PQ10 PL2
LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF
3
2
1
FDS8878 2R2uH-5.8mR
OCP: 8A 3VPCU
PR14 3V_LX
5
6
7
8
5VPCU 5VPCU 9 32 REFIN2 196K/F_6
BYP REFIN2
1
PL1 10 31 1 2
1
2
3
2R2uH-5.8mR OUT1 PU2 ILIM2 PR39
C 11 FB1 OUT2 30 C
5VPCU 5V_LX 1 2 12 29 SKIP 4 2.2_6
PR20 178K/F_6 DDPWRGD_R 13 ILIM1 MAX17020 SKIP# DDPWRGD_R
PGOOD1 PGOOD2 28
2
8
7
6
5 3V5V_EN 14 27 3V5V_EN PR17 PC33 PC36
2
EN1 EN2
1
PR15 15 26 0_6 +
*0_4 PR34 DH1 DH2 0.1u/50V_6
16 LX1 LX2 25
+ 2.2_6 4 5V_DL 37 PC30 330U/6.3V/7343/ESR=25
PAD 2200p/50V_6
36
1
3
2
1
PAD
PGND
PVCC
PC8 PC15 PC7 PQ11
BST1
BST2
GND
PAD
PAD
PAD
2
DL1
DL2
PC19 PC22 FDS6690AS
NC
2
PQ9 0.1u/50V_6
PR16 PC25 FDS6690AS 0.1u/50V_6 PR28
35
34
33
17
18
19
20
21
22
23
24
0_4 2200p/50V_6 PR26 1/F_6
1
2
3
1/F_6 1 2
1 2 3V_DL PR18
1
*0_6
10u/25V_1206 0.1u/50V_6 3VPCU
VL PR27 SKIP PR19 *0_6 REF
330u/6.3V_6X5.7 PC17 0_6
2 0.1u/50V_6
PC20 PR22 0_6
3 1u/16V_6 PR25
PD1 *10K_6
OCP:8A 1 1PS302
DDPWRGD_R PR24 0_6
L(ripple current)
OCP:8A SYS_HWPG 28
PC16 PC21
=(19-5)*5/(2.2u*0.4M*19) 0.1u/50V_6 2 0.1u/50V_6 L(ripple current)
~4.18A 3 =(19-3.3)*3.3/(2.2u*0.5M*19)
B B
Iocp=8-(4.18/2)=5.91A PD2 ~2.48A
1 1PS302
Vth=5.91A*15mOhm=88.65mV Iocp=8-(2.48/2)=6.67A
R(Ilim)=(88.65mV*10)/5uA PR30
PR29 22_8 +15V_ALWP 1 2 VL Vth=6.67A*15mOhm=100.05mV
~177.3K 15V
1
PR31 *0_6 R(Ilim)=(100.05mV*10)/5uA
*200K_4
PC18 PR33 ~200.1K
0.1u/50V_6 *39K_4
2
3VPCU 3VPCU
5
6
7
8
1
2
5
6
PQ17
AO4468 RVCCD 3 PQ14
5VPCU 34 RVCCD
MAIND 4 AO6402
5VPCU 5VPCU 3VPCU 5VPCU
4
RVCC3
5
6
7
8
1
2
5
6
1
2
5
6
1
2
5
6
1
2
5
6
PQ7
3
2
1
AO4468
MAIND 3 PQ29 SUSD 3 PQ30 SUSD 3 PQ18 MAIND 3 PQ5 SUSD 4
AO6402 AO6402 AO6402 AO6402 VCC3
A A
4
5VSATA 5VUSB 3VSUS VCC5

3
2
1
PROJECT : PB5/6
5VSUS
SYSTEM 3V/5V 1A

5 4 3 2 1
5 4 3 2 1
PC139
2200p/50V_6
VIN
1
+
1
PC141
2
1
0.1u/50V_6
2
PR43
DELAY_VR_PWRGOOD 3,6,14
5
*2.2_6
PC145 PC147
10u/25V_1206 PC146 100U/25V_6X7.7
2
D 6266A_UG1 10u/25V_1206 D
4
PC35 VCC_CORE
1
2
3
PR68 4.99K/F_6 VIN VCC3 PQ46 *2200p/50V_6
PWR_MON 2 1 PGD_IN AOL1414
PL12 0.36uH
6266A_PH1 1 2
1
1
PR59
1
PC51 10/F_6 PR158 PR157
4
5
5
0.1u/50V_6 10_4 1.91K/F_4 PR41 + PC3 + PC2
2
5VPCU 2.2_6
330u/2V_7343 330u/2V_7343
2
1
6266A_LG1 4 4 PD3
2
3 PSI# PSI# PC42 *SSM24PT
1
PR50 0.1u/50V_6
1
2
3
1
2
3
10/F_6 PC132 PQ47 PQ13 PC37
0.1u/50V_6 AOL1412 AOL1412 2200p/50V_6
2
PR37 PR35
22
20
48
2
1
PR69 0_8 0_6 0_6
PC41
PGOOD
VCC
VIN
3V3
1u/25V_8 1
PR170 3.65K/F_6
VSUM
21 GND UGATE1 35
PR174 2.2_6 PR171 10K/F_6
Close to Phase 1 Inductor 49 GND_T BOOT1 36 1 2
1
Throttling temp. PR166 1/F_6
RVCC3 PC138
105 degree C 0.22u/25V_8
2
34 PR168 *0_6
PSI# PR152 0_4 PSI#_1 PHASE1 ISEN2
2 PSI#
LGATE1 32
C
PR149 VR_ON PR153 *0_4 PGD_IN 3 VIN C
*10K/F_4 PGD_IN +
PGND1 33
PR151 147K/F_6 4 PC149
RBIAS
1
24 ISEN1 PC142 560U/2.5V/ESR=10
ISEN1
1
3 H_PROCHOT# 5 2200p/50V_6
VR_TT#
2
PR177 470K_4 NTC PR62 4.02K/F_4 6 PC136
2
NTC 5VPCU 0.22u/25V_6
2
2 1 PC49 7 SOFT
PC44 1 0.022u/50V_6 PC40 PC144 PC143 PC140
2
1
.01u/16V_4 31 1 2 10u/25V_1206 10u/25V_1206 0.1u/50V_6
PR172 0_6 PVCC PR175
Panasonic 37 VID0
4 H_VID0 4.7u/25V_8 *2.2_6
ERT-J0EV474J PR169 0_6 38 27 6266A_UG2 4
4 H_VID1 VID1 UGATE2
PU7 PR173 2.2_6
2
PR167 0_6 39 ISL6262A 26 1 2
4 H_VID2
1
2
3
VID2 BOOT2
1
PSI#_1 PR165 0_6 40 PQ45 PC148
4 H_VID3 VID3 PC137 AOL1414 *2200p/50V_6
PR164 0_6 41 0.22u/25V_8 PL11 0.36uH
4 H_VID4
2
VID4 6266A_PH2
PHASE2 28 1 2
PR163 0_6 42
4 H_VID5 VID5
1
PR64 30 6266A_LG2
4
LGATE2
5
*0_6 PR161 0_6 43 PR42
4 H_VID6 VID6 + PC1
PGND2 29
PR56 0_4 VR_ON 44 PD4
28 VRON VR_ON
23 ISEN2 4 4 2.2_6 *SSM24PT 330u/2V_7343
2
PR58 499/F_4 DPRSLPVR ISEN2
6,14 PM_DPRSLPVR 45 DPRSLPVR
1
DPRSLPVR
1
2
3
1
2
3
PR60 0_4 46 PC135 PQ12 PQ48 PC38
3,6,12 ICH_DPRSTP# DPRSTP# 0.22u/25V_6 AOL1412 AOL1412 2200p/50V_6
2
PR61 0_4 CLKEN# 47 PR38 PR36
14 VR_PWRGD_CK410# CLK_EN# 0_6
PC47 1000p/50V_4 0_6
PR155 1K/F_4 25 2 1
VR_ON NC
B
OCSET 8 B
13 PR66 13.3K/F_4
VDIFF
PR55 PR154 PC128 19 VSUM
255R/F/0402 1000P/50V/X7R/0402 VSUM
10K/F_6
PR156 1K/F_4
12 FB2
1
PR162 PR57
11K/F_4 2.7K/F_4
11 PC134
2
FB
1
68n/25V_6 PR52 3.65K/F_6

VSUM
PR67 97.6K/F_4 2 1 PC133
2
0.22u/10V_6 PR176 PR51 10K/F_6

PC129 10 10K _6 NTC
470P/50V/X7R/0402 COMP
2 1 PR54 1/F_6
VO 18
PC48 Panasonic
DROOP
220P/50V/X7R/0402 9 PR53 *0_6

VW ERT-J1VR103J
VSEN
PR150 ISEN1
RTN
DFB
6.81K/F/0402
1
PR160
1 2 1K/F_4 PC43
15
14
16
17
0.33u/25V_6 Close to Phase 1 Inductor

2
PC130 1000p/50V_6
PR159
PC46 3.9K/F_4
2 1
0.01U/16V/X7R/0402
PC131 180p/50V_4
2 1 ISL6266_VO
A A
2
PC45 PC50
0.01U/16V/X7R/0402 .01u/16V_4
1
Parallel
PR65 0_4
VCCSENSE 4
PROJECT : PB5/6
VSSSENSE 4
PR63 0_4 Quanta Computer Inc.
CPU CORE 1A

5 4 3 2 1
1 2 3 4 5
A A
VIN
5VSUS
PR71
10_6
PD16
RB500V
1
PC60
5
PR147 PC55 PR148
1M_6 *0.1u/50V_6 *2.2_6
4.7u/10V_8
2
PR146 4 PC56 PC58 PC57 PC125 PC126
2
0_6 2200p/50V_6 2200p/50V_6 0.1u/50V_6 10u/25V_1206 10u/25V_1206
B B
1
2
3
PR70 0_6 PC123 PQ44 PC127
15 13 .1u/25V_8 AOL1414 *2200p/50V_6
20,28,33,34 MAINON EN/DEM BOOT
3VSUS 16 12 UGATE-1.05V
OCP: 14A
PC59 TON UGATE PL10
*0.1u/50V_6 1 11 PHASE-1.05V VCCP
VOUT PHASE
1
2 10 PR144 3.24K/F_6 1R5uH-3.9mR
VDD OC
5
PR141 PU6 PR142
*10K_6 3 RT8202 9 2.2_6
FB VDDP
4 8 LGATE-1.05V 4 + + PR145 PC122
28 HWPG_1.05V
2
PGOOD LGATE PC53 PC52 33p/50V_6
6 7 330u/2V_7343 330u/2V_7343 4.02K/F_6
1
2
3
GND PGND PC121
5 17 PQ43 2200p/50V_6
NC TPAD AOL1412
14
GND
GND
GND
GND
NC
1
PC61 PC124 PC54 PR143

1u/16V_6 10K/F_6
2
18
19
20
21
VCCPGND
VCCPGND *1000p/50V_6 .01u/50V_6 VCCPGND
1.05V_FB
C C
PR230
TON=3.85p*RTON*Vout/(Vin-0.5) Rds*OCP=RILIM*20uA VOUT=(1+R2/R3)*0.75
short
AOL1412 Rds=4.6mOhm
Frequency=Vout/(Vin*TON) VCCPGND
14A OCP --- OC=3.22K
D D
PROJECT : PB5/6
VCCP 1A

1 2 3 4 5
5 4 3 2 1
D D
VIN
1.8VSUS
5
6
7
8
1
PR134
PC70 *2.2_6
4
10u/10V_1206 PQ27
2
PU3 FDS8878
TPS51116 PC115 PC83 PC82
1 19 PC112 2200p/50V_6 10u/25V_1206 10u/25V_1206
VLDOIN DRVH *2200p/50V_6
2 20 PR88 0_6 PC79 0.1u/50V_6
OCP: 12.44A
SMDDR_VTERM
3
2
1
VTT VBST PL6
4 VTTSNS LL 18 1.8VSUS
PC81 PC77
10u/10V_8 10u/10V_8 51116GND 5 17 2R2uH-5.8mR
GND DRVL
5
6
7
8
3 VTTGND PGND 16
PR112 + PC119 + PC118
DIS_MODE 6 11 S3_1.8V PR108
MODE S3 0_6 MAINON 20,28,32,34
4 2.2/F_6 330u/4V_7343 330u/4V_7343
7 12 S5_1.8V PR106
SMDDR_VREF VTTREF S5 0_6 SUSON 28,34
PR133 5VIN 8 14 5VIN
0_6 PC86 COMP V5IN PR132 PC102
C 0.033u/50V_6 3VPCU 2200p/50V_6 C
9 VDDSNS PGOOD 13 3VPCU
GND
GND
GND
GND
GND
GND
GND
3
2
1
5VIN 10 15 100K/F_6
VDDQSET CS
PR126 PQ28
HWPG_1.8V 6,28
21
22
23
24
25
26
27
0_6 PC84 FDS6676AS_NL
51116GND PR98
*1000p/50V_6 5.1K/D_6
PR136 *0_6 DIS_MODE FOR DDR II

51116GND
5VPCU 5VIN
1.8VSUS PR137 0_6 PC150 PR122 1 PC110

*18P/50V/0402 0_6
4.7u/6.3V_6
2
51116GND
PR110
PR229 *110K/F_6
R2
short S3_1.8V S5_1.8V
(10u*PR98)/Rdson+Delta_I/2=Iocp
51116GND
PR109
R1 *76.8K/F_6 PC100 PC95
*0.1u/50V_6 *0.1u/50V_6
R1=(100*Vout-R2)K
B 51116GND B
1.8VSUS
MAIND
MAIND 30,34
1
2
5
6
MAIND 3 PQ41
FDC653N_NL
4
VCC1.8
A A
PROJECT : PB5/6
DDR 1.8V 1A
5 4 3 2 1
5 4 3 2 1
1.8VSUS
3VSUS
1
PR95
*100K_4
2
PU4
D D
5 VIN POK 7 HWPG_1.5V 28
9 VIN1 GND 1
PC93 PC89 VCC1.5
10u/6.3V_8 0.1u/10V_4
APL5913
20,28,32,33 MAINON 8 EN VOUT 3 VCC1.5 4,9,12,15,21,24
PR92 5VPCU
2.8A
1
0_6 6 4
PR91 VCNTL VOUT
FB
2
VIN RVCC1.5 15V 100K_4
2
PR97
1
PC78
PR1 PR5 *0.1u/50V_6
1M_6 PR4 1M_6 88.7K/F_4
22_8 PC87
1u/10V_4 PR94 PC91
100K/F_4 1 2 0.1u/10V_4
RVCC_ON_G RVCCD
RVCCD 30 PC85
3
3
47n/50V_4
2 PC94 PC92
28 RVCC_ON 2 2
Vout =0.8(1+R1/R2) 10u/6.3V_8 10u/6.3V_8
PR2
1M_6 PQ2 PQ3
=1.5V
1
PQ1 DMN601K-7 DMN601K-7

DTC144EU
1
1
C C
VIN SMDDR_VREF 1.8VSUS 3VSUS 5VSUS 15V

PU1 0.15A
PR3
28 RVCC_ON 2 1 3 SHDN VO 5 RVCC1.5
PR45 PR47 PR44 PR46 PR48 PR49 0_6 2 GND
1M_6 22_8 22_8 22_8 22_8 1M_6
3VPCU 1 4 PC5
VIN NC 1u/16V_6
SUS_ON_G SUSD G909
SUSD 30 PC4
3
3
2.2u/10V_6
3
PR40
28,33 SUSON 2 1M_6 2 2 2 2 2
PC39 PC6
PQ19 PQ15 PQ20 PQ21 PQ22 *2200p/50V_4 *0.1u/50V_6
PQ16 DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7
1
DTC144EU
1
1
B B
VIN VCC3 VCC5 VCC1.5 VCC1.8 15V
PR6 PR104 PR103 PR101 PR102 PR8

1M_6 22_8 22_8 22_8 22_8 1M_6
MAINON_ON_G MAIND
MAIND 30,33
3
3
3
PR7
2 1M_6 2 2 2 2 2
20,28,32,33 MAINON PC9
PQ34 PQ33 PQ31 PQ32 PQ6 *2200p/50V_4
PQ4 DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7
1
DTC144EU
1
A A
PROJECT : PB5/6
DISCHARGE 1A
5 4 3 2 1
5 4 3 2 1
PCN1
PF1
PF1
BUS-10A-1206
PL5
HI0805R800R-00_8
VA
PD11
*SSM34PT
0.02_7520
PR116
http://hobi-elektronika.net 1
2
PQ36 FDS6675
8
7
VIN 1
2
PQ42 FDS6675
8
7
1 1 2 1 2 VA2 3 6 3 6
2 PD12 5 5
3
4 PC106
SSM34PT
R1 PR74
1P
2P
4
PD13 PC104 PR114 PC108 PC107
33K_6
2200p/50V_6 PL4 SSM34PT 0.1u/50V_6 220K/F_6 0.1u/50V_6 2200p/50V_6
87502-0400-4P-L HI0805R800R-00_8 PC96 PC97 PC151
0.1u/50V_6 0.1u/50V_6 0.1u/50V_6
87502-0400-4P-L PC105 PC109
0.1u/50V_6 0.1u/50V_6
DFHS04FR741 1 6
PD10 PR113 0_6
SW1010CPT PR115 2 5 PR75
D/C# 28
1
D D
220K/F_6 10K_6
PR127 3 4
PD9
3
10K/F_6 PD14
ACIN_1 P4SMAJ20A PQ35
28 ACIN
IMD2AT108
2
CSIN_1 2
UDZS15B-7-F
PR130 PR129 PQ25
6.8K/F_6 *10K/F_6 CSIP_1 DMN601K-7
1
PL3 VIN
3VPCU HI0805R800R-00_8
PC74 VA3
2.2u/10V_8
ISL6251_VDD 1 2
PR107 PR100
PR80 2.2/F_6 20/F_6
Input sense resistor and Constant power setting table *100K_4
1
28 ACIN ACPRN PR124
PC88 4.7_6 PC98 PR89
PR81 0.1u/50V_6 4.7u/10V_8 *2.2_6
*0_6 ISL6251_VDDP PC80 PC114 PC153 PC152
UMA Discrete 1 2
0.1u/50V_6 10u/25V_1206 0.1u/50V_6
2
CSIP CSIN PC76 0.1u/50V_6
5
6
7
8
Add PR83,PR81 11/05 PD15 2200p/50V_6
19
20
15
20m Ohm 20m Ohm
1
RB500V PC71
PR116 PR87 *2200p/50V_6
CS+020AGM00 CS+020AGM00
CSIP
VDDP
CSIN
VDD
20/F_6 PR125 PC113 4
CSOP_1 CSOP 21 2.7_6 .1u/25V_8 PQ39
CSOP 6251B_2 6251B_1 FDS8878
10K Ohm 2.43K Ohm BOOT 16
2
PC75
47n/25V_6 PR140
PR123 CS31003F949 CS22433F913 17 ISL6251_UGATE PL9 0.033_3720
1
CSON_1 CSON 22 UGATE PCMC063T-6R8MN
3
2
1
CSON 6251LR MBAT+
10K Ohm 10K Ohm PR86 18 ISL6251_PHASE
1 2
PHASE
5
6
7
8
20/F_6
PR119 CS31003F949 CS31003F949
1
C C
1P
2P
PU5 14 ISL6251_LGATE PR85
ACPRN ISL6251A LGATE PC64
10A 10A PC73
23 ACPRN 4 2.2_6
.01u/50V_6
PF1 PR83 0.1u/50V_6
DKA00VFU000 DKA00VFU000 13
2
10/F_6 PGND
DCIN 24 12 PQ40
DCIN GND FDS6690AS PC72 PC65
3VPCU PR90 2200p/50V_6 CSOP_1 2200p/50V_6
3
2
1
82.5K/F_6 11 PC66 PC120
6251ACSET 2 VADJ CSON_1 10u/25V_1206 10u/25V_1206
PR84 PR82 ACSET
*100K_4 10K_6 PC116 Modify on 11/05 10
100p/50V_6 PR93 ACLIM VREF
3 EN
TEMP_MBAT
VCOMP
10K/F_6
ICOMP
CELLS
CHLIM
TEMP_MBAT 28
VRFE
CN12
ICM
HI0805R800R-00_8 PR123 PR121
10 1 P_BAT 1
PF2
2
PL7
MBAT+
R2 10K/F_6 *514K/F_6
6251ICOMP 5
9
2 ID
11 3 ID Float = 4.2V / CELL
B/I BUS-15A-1206 PR96 VADJ
4 TEMP_MBAT PL8 0_6 CV-SET 28
5 HI0805R800R-00_8 TEMP_MBAT 6251EN VREF ACLIM PR118 *0_6
6
6251VCOMP1
7
1
12 8
1
PC117 DMN601K-7 PR119 PR117

9 0.1u/50V_6 PQ26 PR181 PC103 R3 10K/F_6 *514K/F_6
2
13 PC67 PC68 ISL6251_VDD *10K_6 6251CELLS_1 100p/50V_6

SUYIN BATTERY 47p/50V_6 2 REFP
PC90 LIM = (1/R2)*(((0.05/VREF=2.39)VACLM)+0.050)

ADDRESS: 16H 47p/50V_6 .01u/50V_6 PR128
3
PR79 *100_4 CURRNT LIMIT POINT =(90w/19v)*0.85= 4.026A

3
6251VCOMP2
PR76 PR77 4.99K/F_6 ICMNT
ICMNT
100_4 100_4 2 1 PR105 PR179 4.026A=(1/0.02)((0.05/2.365)Vaclm+0.05)
3VPCU 28 CELL-SET 2 0_6 PR111 10K_6
3.3K/F_6 CC-SET 28
MBCLK 3,20,28 PQ37
Vaclm=((33//152)/(33//152+19.6//152))*Vref
3
B B
PR120 *DMN601K-7
MBDATA 3,20,28 *100K/F_6 R2=adapter current sense resistnece
1
PC101 2 CHG#
CHG# 28
1
.01u/50V_6
1
PR180
PD5 PD6 0_6
1
ZD5.6V ZD5.6V PQ49
PC99 PC111 DTC144EU
1
PC69 *100p/50V_6 *3300p/50V_4

2
PR78 *.01u/50V_6
*100K/F_6
2
CELL-SET = Low ----> Cells = VDD ---->4S

CELL-SET = High ----> Cells = GND ---->3S
PQ23
IMD2AT108 MBAT+
VIN 1 6 REFP
PR72
IMD2A
2 5 PC62
3VPCU 3VPCU
3 4 0.1U/25V/X7R/0603 200K/F_6
3
1
PD8 PD7
PQ24
3 ID 3TEMP_MBAT 28 REFON 2 REFP
DMN601K-7
*DA204U *DA204U
2
MBATV 28
A A
1
PR73 PC63
40.2K/F_6 0.01u/50V_6
2
PROJECT : PB5/6
CHARGER 1A

5 4 3 2 1

PackardBell EasyNote ML65 QUANTA PB5, PB6

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PackardBell EasyNote ML65 QUANTA PB5, PB6

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1 2 3 4 5 6 7 8

PCIE-6 PCIE-3 PCIE-1 PCIE-5

MINI CARD-1 MINI CARD-2 LAN

USB-6 ITE8512 VGA

INT SPK SPK AMP

Date: Friday, March 21, 2008 Sheet 1 of 35

PBY160808T-301Y-N_6 L50 VCCP

*10u/10V_6 10u/10V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4

Y2 PCLK_EC R107 33_4 PCLK_EC_R 6 VCC3

C100 33p/50V_4 CG_XOUT CG_XIN 60 41 CLK_PCIE_MINI_R RP6 1 2 0X2

ICS9LPRS365 RTM875T-606 R520 10K_4 PCLK_OZ129 <MAIN>:ICS9LPRS365BGLFT QCI:ALPRS365K13

FREQ. SEL TABLE

PCLK_EC C508 10p

FSC FSB FSA Frequency CLKUSB_48 C87 10p

0 0 0 266Mhz Q8 R134 14M_ICH C95 10p

1 1 0 400Mhz R112 0_4 CLK_BSEL2

1 1 1 Reserved R116 *0_4 PROJECT : PB5/6

Date: Friday, May 30, 2008 Sheet 2 of 35

Thermal Trip VCCP VCCP

2 Q29 R580 D31 Reserve 1K for XDP function VCCP

R581 R561 200_6 LM86VCC C554 0.1u/10V_4

XDP_TCK R36 56_4 10K_4 10K_4

56.2/F_4 MMBT3904 Q24 RHU002N06

14,29 THERM_ALERT# R565 0_4 THERM_ALERT#_R

VCC3 R569 330_4

No use PROCHOT CPU side still PU 56ohm.

H_PROCHOT#_D R70 *0_4

Date: Friday, May 30, 2008 Sheet 3 of 35

http://hobi-elektronika.net BOM Option Table

Need NC 20PCS 10u before A1 BOM released(A0 all stuff)

Place these parts reference Layout Note:

VCCP O X X +1.05V 4.5A Before VCC Stable

(See Penryn EMTS Rev:1.0 Table7,8 for voltage and current)

Date: Friday, May 30, 2008 Sheet 4 of 35

Date: Friday, May 30, 2008 Sheet 5 of 35

DDR CLK/ CONTROL/COMPENSATION

MCH_CFG_9 DMI_RXP0 C_PEG_TXN7 C158 EV@0.1u/10V_4 PEG_TXN7

T56 CFG_18 PEG_TXP[15:0] 20

NC_23 HDA_SYNC T166

*5.6P *5.6P *5.6P *5.6P *5.6P *5.6P

+1.8VSUS_GMCH +1.8VSUS_GMCH R495 1K/F_4 SM_RCOMP_VOH R137 *EV@0_4 HSYNC_G For IV @ NC

Date: Wednesday, June 04, 2008 Sheet 6 of 35

http://hobi-elektronika.net BOM Option Table

M_A_DQ36 SA_DQ_35 SA_DQS#_7 M_B_DQ36 SB_DQ_35 SB_DQS#_6 M_B_DQS#7

Date: Friday, May 30, 2008 Sheet 7 of 35

D AP33 W28 C463 C462 C163 + C156 D

0.1u/10V_4 0.22u/6.3V_4 0.22u/6.3V_4 22u/6.3V_8 270u/2V_7343

VCC GFX NCTF

T14 VCC_AXG_42 VCC_SM_LF2 BA37

1. Route VCC_AXG_SENSE and VSS_AXG_SENSE differentially

Date: Friday, March 21, 2008 Sheet 8 of 35

IV@10u/10V_8 IV@0.1u/10V_4 IV@0.01u/16V_4 EV@0_4 IV@0.1u/10V_4 IV@0.01u/16V_4

VCC1.5 R514 0_8 +1.5V_VCCA_PEG_BG AD48

+1.05VM_A_SM AR20 VCCA_SM_1

*2.2u/6.3V_6 10u/6.3V_8 0.1u/10V_4 DR3 VCCP

VCC1.5 R541 IHM@0_6 +1.5V_VCC_HDA VCC_TX_LVDS K47 +1.8VSUS_TXLVDS +1.05V_VCC_PEG

Date: Thursday, April 24, 2008 Sheet 9 of 35

VSS_1 VSS_100 AM36

North Bridge Strap Pin Configuration Table http://hobi-elektronika.net

DMI X2 Select 0 = DMI X2 R115 *4.02K/F_4

PCI Express Graphics 0 = Reverse Lanes R549 *4.02K/F_4

PCIE Loopback enable 0 = Enabled R550 *4.02K/F_4

ALLZ 0 = ALLZ mode enable R144 *4.02K/F_4

5.6P 5.6P 5.6P 5.6P 5.6P 5.6P

CCD@AO3413 C567 CCD@1000p_4 *CCD@4.7K_4 BAS316 D33 2