A PRESENTATION

ON
MID SEMESTER
REVIEW
DESIGN AND DEVELOPMENT OF
HIGH POWER AMPLIFIER
AT 3.4 GHz
COMMUNICATION SYSTEM ENGINEERING

L.J INSTITUTE OF ENGINEERING AND TECHNOLOGY

Prepared By: Patel Neel K

(140320705506)
M.E.(EC) SEM IV
Guided By: Mr. Nimesh Prabhakar
Asst. Professor
1
OUTLINE
• Motivation
• Objective
• Introduction
• Specification
• Literature Review
• Designing Steps
• Simulation & results
• Future Work Plan
• Conclusion
• References

2
MOTIVATION
• Power amplifiers are used in many applications likes,
transmitting antenna and Ranging transponder. The
transmitter–receivers are used not only for voice and data
communication but also for sensing in the form of a radar.
• Indian Regional Navigational Satellite System (IRNSS) is a
regional satellite navigation system owned by the Indian
government. The system is being developed by Indian Space
Research Organization (ISRO).
• There are two types of transponder is used in IRNSS:
 Navigation transponder
 Ranging transponder
• In ranging transponder, Power Amplifier is used in Satellite.
So, I will design a Power Amplifier at 3.4GHz.
3
OBJECTIVE
• To Study , Design and Development of Power Amplifier
at 3.4GHz frequency for Ranging transponder and select
Optimum design for performance.

4
INTRODUCTION
• Today there are many categories of amplifiers used for
multiple purposes. In simple terms an amplifier picks up a
weak signal and converts it into a strong one.

• It is widely used in several devices to boost electrical

signals. Radios, televisions and telephones are a few
examples to point out in this regard.

• The main function of power amplifier is amplify the power

which is used in various application.

5
SPECIFICATIONS
PARAMETERS VALUES

FREQUENCY 3.4 GHz

BANDWIDTH ±10MHz
GAIN (S21) >20dB
INPUT RETURN LOSS (S11) <-10dB

OUTPUT RETURN LOSS (S22) <-10dB

POWER EFFICENCY 40%

1 dB COMPRESSION POINT 36dBm

OUTPUT POWER 1Watt

Table 1 Specification of my parameters

6
 LITERATURE SURVEY
SR TITLE YEAR AUTHOR
1 DESIGN OF A VERY SMALL 3.5 GHZ 1W IEEE-2001 TOMOHIRO SENJU, TAKASHI
MMIC POWER AMPLIFIER WITH DIE- ASANO
SIZE REDUCTION TECHNOLOGIES.
2 DESIGN OF A 2 WATT, SUB-DB NOISE IEEE-2007 KEVIN W. KOBAYASHI,
FIGURE GAN MMIC LNA-POWER YAOCHUNG CHEN, IOULIA
AMPLIFIER WITH MULTI-OCTAVE SMORCHKOVA
BANDWIDTH FROM 0.2-8 GHZ.
3 DESIGN 5W HIGHLY LINEAR GAN EUMA- AHMED SAYED, GEORG BOECK
POWER AMPLIFIER WITH 3.4 GHZ 2008
BANDWIDTH.
4 DESIGN OF HIGH POWER S-BAND GAN IEEE-2011 MASLAK C CAO
MMIC POWER AMPLIFIERS FOR
WIMAX APPLICATIONS.
5 DESIGN 5.8 GHZ POWER AMPLIFIER IEEE-2012 JONATHAN PARKS,
SARAVANAN T K, YUN ZHANG
6 DESIGN A NEW GAN HEMT IJSRD- NICK L. MARCOUX,
NONLINEAR MODEL FOR 2012 CHRISTOPHER J. FISHER, DOUG
EVALUATION AND DESIGN OF 1-2 WHITE
WATT POWER AMPLIFIERS
7
Table 2 Literature survey papers
DESIGNING STEPS
Step 1 : Transistor Selection
Step 2 : Design Of S-Parameters
Step 3 : DC I/V Characteristics
Step 4 : Impedance Matching
Input Matching
Output Matching
Step 5 : Biasing Network
Step 6 : Design Of Power Amplifier
Step 7 : Harmonic Balance

8
TRANSISTOR SZA3044Z
SPECIFICATION
• From Few manufacturer companies transistors , The
comparisons between those transistors are shown in below
table and then I select three transistor from below best
transistors.
PARAMETER MGFC36V3436 SZA3044Z WPS-343724-99
-51
COMPANY NAME MITSUBISHI RFMD FAIRCHILD
TYPE OF TRANSISTOR FET BJT BJT
TECHNOLOGY GaN HEMT InGaP HBT Si BJT
OUTPUT POWER 5W 1W 9W
FREQUENCY BAND 3.4 to 3.6 GHz 3.3 to 3.8GHz 3.4 to 3.7 GHz
GAIN 16dB 21dB 14dB
EFFICIENCY 32% 30% 20%
Table 3 Transistor specification 9
S-PARAMETERS FOR
TRANSISTOR

Fig 1 Circuit Diagram Of S-Parameter[ADS screenshot]

10
Table 4 S parameters Results[ADS screenshot]
11
DC I/V CHARACTRISTICS
• We have to define the Output Power and Power Efficiency of
the Amplifier with the help of the DC IV Characteristics.
• As per the Biasing condition
Vce = 5V
Idc = 240 mA
• Result:
RF Output Power: 1.33W
DC Power Output: 2.47W
𝑅𝐹𝑂𝑢𝑡𝑝𝑢𝑡 𝑃𝑜𝑤𝑒𝑟
Efficiency= ∗ 100%
𝐷𝐶 𝑜𝑢𝑡𝑝𝑢𝑡 𝑃𝑜𝑤𝑒𝑟
1.33𝑊
= *100%
2.47𝑊
=54%
12
Fig 2 DC I/V Characteristics [ADS Screenshot]

13
Fig 3 DC I/V Characteristics Result [ADS Screenshot]

14
IMPEDANCE MATCHING
 In electronics, impedance matching is the practice of designing
the input impedance of an electrical load or the output
impedance of its corresponding signal source to maximize the
power transfer or minimize the signal reflection from the load.
 There are two types of Impedance matching:
(1) Input matching
(2) Output matching

15
INPUT MATCHING
• For matching the source and transistor, Input matching
network is required.
• Input matching network can be design by using SmGamm
Function in ADS tool.
L1= 1.4 nH C1= 0.5 pF
Z= 38.543-J*8.428 Ohm

Fig 4 Input Matching[ADS screenshot] 16

OUTPUT MATCHING
• For matching the load and transistor, Output matching network is required.
• Output matching network can be design by using SmGamma Function in
ADS tool.
L1=0.5 nH C1=2.85 pF
Z=4.878+J*4.178 Ohm

Fig 5 Output Matching[ADS screenshot]

17
INPUT AND OUTPUT MATCHING

Fig 6 Input Output Matching

18
RESULTS

Table 5 Impedance Matching Results[ADS screenshot]

19
RESULTS

Fig 7 Results[ADS screenshot]

20
BIASING NETWORK
• As per Transistor datasheet , recommended condition of biasing
network are
VCE=5,10V
IC=240,300mA.

• Consider the simple bipolar NPN shown in Fig. consisting of a

transistor and three resistors. To function correctly the amplifier
should produce at its output, an amplified version of the signal at
its input without distortion.

21
Fig 8 Biasing Circuit Network[ADS screenshot]

22
• I am measuring the value of the Voltage and Current in Biasing
Network as Show in the Fig. Also Show in the Below Table.

R1 R2 R3 Voltage Current
50 kOhm 0.62 kOhm 20.2 Ohm 5.01 V 240 mA

Table 6 Biasing Circuit Network Parameter

23
 HARMONIC BALANCE
• Due to this output signal contains fundamental frequency
components and some undesired frequency components, which
are integral multiple of input signal frequency. These additional
frequency components are called harmonics. Hence the output
is said to be distorted, this is called harmonic distortion.
• 1st Order Harmonic
f1=3GHz
f2=4GHz
• 3rd Order Harmonic
2f1-f2=2GHz
2f2-f1=5GHz
• 5th Order harmonic
3f1-2f2=100 MHz
Fig 9 Harmonic balance
3f2-2f1=6GHz

24
HARMONICS IN ADS

Fig 10 Harmonic Balance [ADS screenshot]

25
RESULTS

Fig 11 Harmonic Balance Results[ADS screenshot] 26

DESIGN OF POWER AMPLIFIER
USING BIASING NETWORK

Fig 12 Design Of Power Amplifier With Biasing Network [ADS screenshot] 27

RESULTS

Table 7 Design Of Power Amplifier With Biasing Network Results

28
Fig 13 Power Amplifier Results[ADS screenshot]
29
MEASURED RESULTS
Parameter Symbol Specification Measured results Measured
After Impedance results
Matching After Biasing
Network
Gain S21 ≥15dB 26.412dB 27.064dB
Input return loss S11 ≤ -10dB -39.873dB -15.440dB
Output return loss S22 ≤ -10dB -49.342dB -15.725dB
Output Power Pout 1W 1W 1.02W
Efficiency PAE <35% 39% 54%
Input/output Z0 50Ω 50Ω 50Ω
Impedance

Table 8 Measured results

30
FUTURE WORK PLAN
Months
Name of (July-2015 to April-2016)
Activity
July Aug Sept Oct Nov Dec Jan Feb Mar Apr
Literature survey   
Fundamental study    
Study of ADS  
Simulation of typical
examples  
Design Simulation
as per Specification    
Publication 1  
Thesis writing  
Publication 2  
31
Table 9 Remaining Work Plan
CONCLUSION
The Power Amplifier presented here does meet many of
the required specifications. The transistor is Stable for design
specifications. To make a power amplifier utilizing this device, a
matching networks , biasing network has been design with an
appropriate device modelling in ADS.

32
 REFERENCES
[1] Tomohiro Senju, Takashi Asano, Hiroshi Ishimura Microwave Solid-
state Department “A VERY SMALL 3.5 GHz 1 W MMIC
POWER AMPLIFIER WITH DIE SIZE REDUCTION
TECHNOLOGIES” Komukai Operations Toshiba Corporation,
Komukai, Toshiba-cho, Saiwai-ku, Kawasaki 2 12-858 1, Japan-
2001 IEEE pp-070-073.
[2] Kevin W. Kobayashi, YaoChung Chen, Ioulia Smorchkova, Roger
Tsai,Mike Wojtowicz, and Aaron Oki “A 2 WATT, SUB-DB NOISE
FIGURE GAN MMIC LNA-PA AMPLIFIER WITH MULTI-
OCTAVE BANDWIDTH FROM 0.2-8 GHZ” 2007 IEEE -
SIRENZA MICRODEVICES pp-619 -622.
[3] Paul saad, christian fager, hossein mashad nemati, haiying cao,
herbert zirath and kristoffer andersson ” A highly efficient 3.5 GHz
inverse class-F GaN HEMT power amplifier” European Microwave
Association International Journal of Microwave and Wireless
Technologies, 2010, 2(3-4), pp-317–324.

33
[4] Bilkent University, Nanotechnology Research Center, Bilkent, Ankara,
Istanbul Technical University, Electrical & Electronics Faculty,Maslak,
Istanbul, Turkey ” Design of High Power S-Band GaN MMIC Power
Amplifiers for WiMAX Applications” 2011 IEEE pp-01-04.

[5] Ahmed Sayed, Georg Boeck Microwave Engineering, Berlin University of

Technology Einsteinufer 25, 10587 Berlin, Germany ” 5W Highly Linear
GaN Power Amplifier with 3.4 GHz Bandwidth”European Microwave
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[6] U. K. Mishra, P. Parikh, and Y.-F. Wu, “AlGaN/GaN HEMTs−An overview of

device operations and applications”, Proceedings of the IEEE, vol. 90, no. 6,
June 2002, pp. 1022–1031.

[7] S. Keller et al., “GALLIUM NITRIDE BASED HIGH POWER

HETEROJUNCTION FIELD EFFECT TRANSISTORS: PROCESS
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34
[8] U.Schmid et al., “GaN devices for communication applications:
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[10] Nemati, H.; Fager, C.; Thorsell, M.; Herbert, Z “HIGH-EFFICIENCY

LDMOS POWER-AMPLIFIER DESIGN AT 1 GHZ USING AN
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[11] Rollett, J. “STABILITY AND POWER-GAIN INVARIANTS OF

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THANK YOU

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