Development of a High Power Density
GaN-based Transistor Low-Voltage High-Current
Phase-Shift Full-Bridge Current Doubler Converter
for Electric Vehicles
Sangjin Kim, Adhistira M. Naradhipa and Sewan Choi, Fellow, IEEE
Seoul National University of Science and Technology, South Korea
E-mail: schoi@seoultech.ac.kr
Abstract— In this paper, a 1.8kW, 200V-310V/12V-15V,
700kHz DC-DC converter with high power density of 8.1kW/L
(132.7W/in3) is developed for electric/hybrid vehicle application.
In order to achieve high power density, GaN-based transistors
at 700kHz switching frequency are applied to reduce passive
component volumes. Furthermore, reduction of planar
transformer size is achieved by applying the concept of the
matrix transformer with flux cancellation. The characteristics
of the 1st prototype and the 2nd prototype considered to improve
the power density are covered and the design considerations of
the gate driver for a high switching frequency of 700 kHz are
covered. A three-dimensional (3D) Maxwell FEA simulation
results are presented to give an accurate estimation of the core
loss and flux distribution of the magnetic components and
experimental results are also provided from a 1.8kW prototype.
Keywords—DC-DC converter, electric vehicle, high-
frequency, high power density.
I. INTRODUCTION
As the demand and necessity of automobiles with
environmentally friendly and high fuel efficiency are
increased, the development of hybrid electric vehicles
(HEVs) and electric vehicles (EVs) are attracting attention
from many automotive companies. In xEV application, an
isolated low-voltage high-current dc-dc (LDC) converter,
which has the power range of a few kilowatts (1kW-5kW) is
one of the key components that interface between the high
voltage battery (200V-440V) and low voltage battery (12V-
15V). Due to the increase of the number of electronic devices
such as portable charger, instrument panel, car navigation and
lamp [1], [2], it is required that the power density of the LDC
converter is increased in a limited space. The goal of
increasing the LDC power density is feasible as the wide-
bandgap (WBG) devices are easily obtainable. Using WBG,
the converter is able to operate at high-switching frequency.
Hence, there are the great passive components size reduction.
The previous work on converter with high power and high-
switching frequency (500kHz – 1MHz), [3] and [4], is having
a fixed input and output voltage condition. Therefore, a
resonant converter works as DCX is always selected, which
simplify the transformer design. The work in [5] is applying
high switching frequency converter to a wide voltage range,
which uses a two-stage topology with an LLC converter
operating as DCX in the isolated stage is applied. Thus, the
transformer design in [5] is also simple. However, the power
density is not high enough because of the two-stage approach.
In this paper a single-stage topology with a wide voltage
range and high-switching frequency are considered to
achieve the required power density. A resonant converter is
not suitable for wide voltage range application because the
Fig. 1. Phase shift full-bridge converter with the proposed
matrix transformer
operating frequency becomes wide, which complicates the
magnetic design. A single-stage PWM topology with fixed
switching frequency is more suitable for wide voltage range
application. However, there is a limit on the leakage
inductance value due to duty loss, especially when applying
a high switching frequency. Thus, the transformer should be
carefully designed in the single-stage PWM topology.
In the previous paper [6], three single-stage PWM topology
candidates which are active clamp forward (ACF),
asymmetrical half-bridge (ASHB), and phase shift full bridge
(PSFB) were compared to develop a low-voltage DC-DC
converter with high power density for EV applications. As a
result, the PSFB converter with current doubler (PSFB-CD) is
selected as the most suitable topology for achieving the target
power density since the number of passive components and
switching devices is small and the circuit is simple [7],[8]. A
matrix transformer [9] with flux cancellation [3],[4], which
reduces transformer footprint, core loss, and leakage
inductance was applied in [6] and achieved a power density of
5.63 kW/L (93.26W/in3) as well as a small leakage inductance.
In this paper, methods for further improving the power
density of the converter system in [3] are discussed. The
change of the PCB configuration and the footprint of each part
are compared. Also, topics such as transformer redesign,
power board, and heat dissipation design considering power
density improvement are covered. The LDC system in this
paper is achieving an 8.1kW/L (132.7W/in3) of power density,
which is 2.47kW/L (40.47W/in3) higher than the LDC system
in [6].
II. COMPARISON BETWEEN THE 1ST VERSION PROTOTYPE
AND 2ND VERSION PROTOTYPE
Table I shows the comparison between the 1st and 2nd
prototype of PSFB-CD for low voltage DC-DC converter in
EV application. In order to increase power density, both
prototypes are using the matrix transformer with flux
cancellation and power density calculation is excluding the
heatsink [6],[7]. The power density of the 1st prototype is
5.63kW/L, whereas the 2nd prototype is 8.1kW/L. Therefore,
 TABLE I
COMPARISON OF 1ST VERSION PROTOTYPE AND 2ND VERSION PROTOTYPE
Parameter 1st version prototype 2nd version prototype

Photograph

5.63kW/L 8.1kW/L
Power density
(88mm × 158 mm × 23mm) (85mm × 152mm × 17mm)
4EA 3EA
PCB components (Full bridge IMS board, Driver board, (Full bridge IMS board, Driver board,
Diode IMS board, Power board) Power board)
Height 23mm 17mm
FB IMS
3,080mm2 3,655mm2
board &
(88mm × 35mm) (85mm × 43mm)
Gate driver
Footprint 11,088mm2 7,735mm2
Power board
(88mm × 126mm) (85mm × 91mm)
1,530mm2
Input filter -
(85mm × 18mm)
22,724mm3 21,658mm3
Transformer volume
(52mm×19mm×23mm) (49mm×26mm×17mm)

Fig. 2. Secondary diode voltage rating according to
turn ratio of transformer
the 2nd prototype is achieving a power density improvement
of 2.47kW/L. The prototypes are designed and built under the
same specifications, and the specifications are as follows:
Po=1.8kW, Vin=200V~310V, Vo = 12.8-15.1V, and fs = 700
kHz.
The power density improvement is due to two factors, which
are the reduction of the prototype height and number of PCB.
Firstly, compared to the 1st prototype, the number of PCBs in
the 2nd prototype decreased from four to three. Secondly, the
prototype height decreased from 23mm to 17mm. Therefore,
the power density of the 2nd prototype is higher.
A. Components decription
The prototypes are composed of three parts which are the
Fig. 3. Leakage inductance limitation according to
switching frequency and turn ratio
FB IMS board, the driver board, and power board. The FB
IMS board is a board with a full bridge circuit using an IMS
board. It is designed using a GaN transistor and contains only
a power circuit. The gate driver for driving GaN transistor is
designed using a separate PCB board from the FB IMS board,
and it is fabricated using the 6-layer FR-4 PCB. The power
board is mainly composed of magnetic components and the
output terminal. In the case of the 1st prototype, the secondary
rectifier diode is using a separate IMS board referred by diode
IMS board. On the other hand, the 2nd prototype includes not
only magnetic components but also secondary rectifier diode
on the power board. This integration of the power board and
the diode IMS board reduces the total system footprint,
thereby achieving a significant power density increase.
 (a) (b)
Fig. 4. Design result of transformer (a) 1st version, (b) 2nd
version
Fig. 5. Design result of power board
B. Turn ratio and switching frequency selection
The target specification of this paper should be capable of
regulating at wide input voltage (200V~310V) and output
voltage (12.8V~15.1V) while achieving high power density.
Therefore, the turn ratio and switching frequency of the PSFB
should be carefully selected.
Generally, as the number of turns of the transformer
increases, the leakage inductance increases, so it is desirable
to design the number of turns small. On the other hand, if the
number of turns is small, the voltage rating of the secondary
side diode becomes high and the leakage inductance becomes
small, which may cause the ZVS turn on of the switch to fail.
As shown in Fig. 2, when the turn ratio of the transformer is
4 or less, the Schottky diode having the voltage rating of 100
V can not be used since the margin of the voltage rating of
the secondary side diode is insufficient. Also, if the turn ratio
is 6 or more, the number of turns increases, and the leakage
inductance may be made large, so output voltage regulation
may not be possible at wide input and output voltage range.
Therefore, a turn ratio of 5 : 1 was selected to use a diode with
a voltage rating of 100V.
The following equations (1) and (2) show the leakage
inductance limit and the duty loss (Dloss) of the PSFB for
regulating the output voltage under a wide input voltage
(Vin)range, respectively.
n ⋅ Vin ⋅ Dloss
Lk = (1)
2 ⋅ Io ⋅ fs
D transformer volume as shown in Table I. However, the power
n density increases greatly from 5.63kW/L to 7.29kW/L
Dloss = 0.5 − (2)
2 ⋅ Rds (on ) RD
⋅D+ + 1
n2 ⋅ Ro Ro
where n is turn ratio of the transformer, fs is switching
frequency, D is duty ratio, Rds(on) is on resistance of the switch,
RD is on resistance of diode and Ro is load resistance. Fig. 3
shows the leakage inductance limit value using the selected
turn ratio, equation (1) and (2). The leakage inductance limit
value becomes smaller as the frequency becomes higher, and
it is considered that the leakage inductance can be made lower
Fig. 6. 3D drawing of clamps
Fig. 7. 3D drawing of fully assembled 1.8kW low voltage
DC-DC converter with clamps
than 1.2 uH by referring to the reference literature [3]-[4] and
[10]-[11]. Therefore, the switching frequency is selected to
be 700 kHz in order to achieve high power density while
achieving leakage inductance.
C. Transformer redesign
The 1st prototype transformer and inductor had the highest
component height of 23mm. Hence, a reduction in the height
of the magnetic components was required to achieve the
target power density of 6kW/L.
Fig. 4(a) and Fig. 4(b) show the 1st and 2nd design results
of the transformer, respectively. As can be seen in Fig. 4, the
2nd version transformer has a 7mm height reduction compared
to the 1st version transformer. By modifying the minimum
height of the output terminal block placed on the PCB to
6.5mm, the overall height of the transformer can be designed
to be 17mm with the height of the upper plate of 6.5mm, the
height of the bottom plate of 6.5mm and the height of the
transformer leg is 4mm. As a result, the height of the 2nd
prototype of the converter became 17mm in Fig. 4(b) and the
cross-sectional area (Ac) of both transformers should remain
the same according to (1) when the maximum flux density
(Bmax) is 80mT.
ϕ ⋅Vin
Ac = (1)
2 ⋅ Bmax ⋅ N p ⋅ f s ⋅ 360°
The width of the 2nd version of the transformer should be
increased to keep the same Bmax, which means Ac1, Ac2, Ac3 and
Ac4 are same in Fig. 4. Therefore, no significant change in the
because of the reduction of the entire system maximum
height, which comes from the reduction in the height of the
transformer.
D. Power board and clamp design
As shown in Table I, the footprint of the 2nd prototype
power board is the largest improvement for the power density
compared to the 1st prototype. The power board footprint
reduction in the 2nd prototype is approximately 31% from the
 (a) (b)
Fig. 8. Design results of full bridge driving circuit (a) FB
IMS board, (b) Driver board
1st prototype. This comes from the integration of the diode
IMS board with the 2nd power board.
The IMS board was used in the 1st prototype because of
the high temperature of the output diodes were expected due
to high conduction losses caused by large output currents.
Using the IMS board solved the heat problem of the diode.
However, the production cost increased due to an increase in
the number of boards. In addition, the terminal blocks, which
connect the diode IMS board to the power, board results in a
larger footprint of the power board.
Fig. 5 shows the power board of the 2nd prototype. One of
the major changes is to reduce the footprint by placing the
output diode on the power board and remove the terminal
blocks. And the thermal interface material (TIM) is inserted
between the power board PCB and the heatsink to cool it.
However, due to the high thermal resistance of the PCB, the
diode cannot be not effectively dissipated, the heat of the
diode is further dissipated using a clamp. Fig. 6 shows the
clamps that helps dissipate the heat of the diodes and the
magnetic components. As shown in Fig. 7, these clamps are
connected to the prototype to hold the magnetic components
and dissipate the heat of diodes.
E. FB IMS board & Driver board
The design concept of full bridge circuit is to design the
GaN transistor board and the gate driver board on separate
boards, respectively. The IMS board is used to effectively
dissipate the heat generated by the GaN transistor due to the
high frequency operation of 700 kHz. The driver board is
designed using a 6-layer PCB and inserted into the FB IMS
board. This minimizes the stray inductance by minimizing the
distance between the gate terminal of GaN transistor and
driver IC outputs as well as effectively dissipating the heat
generated by the GaN transistor.
Generally, GaN transistor has very good switching
characteristics which are fast switching speed (high dv/dt)
and low loss compared to Si MOSFET. However high
frequency interference caused by high dv/dt characteristic
may lead to overstressing the GaN transistor since the
threshold voltage of GaN transistor is very low. Therefore,
for high-frequency switching of 700kHz of GaN transistor,
very careful gate driver PCB layout design is needed.
Actually, the 1st prototype was not able to test more than
400W due to switching malfunction caused by high
frequency interference. The switching malfunction is
considered that this occurred due to the following reasons
from GaN systems application notes [12]-[14].
1. Overlap between gate drive signal and drain copper pour.
2. Current path without flux cancellation.
3. Not enough ground copper pour.
(a)
(b)
Fig. 9. Maxwell FEA simulation results of transformer: (a)
Flux distribution (b) Core loss distribution
The design results of the 2nd driver board reflecting the
above three design considerations are shown in Fig. 8. The
improvement results can be confirmed from the experimental
results in Section V.
III. FEA SIMULATION RESULTS
A three-dimensional (3-D) Maxwell FEA simulation is
carried out after 3D modeling of the core shape, primary and
secondary windings. An accurate dimension modeling is
needed to estimate the flux distribution and core loss of the
designed transformer. Fig. 9(a) and Fig. 9(b) show the flux
distribution and core loss distribution, respectively. the FEA
simulation results. From Fig. 9(a), it can be seen that the
average flux density of the top core is 48mT and average flux
density of the bottom core is 53mT, which is matched between
the transformer design and the results. From Fig. 9(b), it can
be seen that the total average core loss is 6.62W. This value is
still below the core loss limitation which is 7W.
IV. EXPERIMENTAL RESULTS
As shown in Table I, a 2nd version 1.8kW prototype of the
full bridge phase shift converter has been built according to
the following specification : Po=1.8kW, Vin=200V~310V,
Vo=12.8V~15.1V and fs=700kHz. The measured leakage
inductance of the experimental prototype is 0.7μH, which is
below the maximum leakage inductance limit in the Table. I.
Therefore, the experimental prototype can operate for the
whole voltage range at the rated load. The 2nd prototype is
achieving an 8.1kW/L(132.7W/in3) of power density, which
is an improvement of 2.45kW/L compared to the power
density of the 1st version laboratory prototype. The power
density improvement is from the reduction of the height of
both transformer and inductor. Fig. 10 and Fig. 11show the
experimental results at the rated load. Fig. 10 shows the
waveform of switch drain-source voltage (vDS), and Fig. 11
shows leakage current (iLk), secondary voltage of transformer
(vsec) and diode voltage (vD). It can be seen that the switching
frequency of switch is applied at 700kHz. All switches
achieve ZVS turn on when Vin is 200V. When Vin is 310V,
only lagging leg switches achieve ZVS turn on because of the
transformer intrawinding capacitance. Voltage oscillation,
which is caused by resonance between leakage inductance and
the parasitic capacitance of the diode, is minimized by adding
 Fig. 10. Experimental waveform of switch drain-source
voltage
(a)
(b)
Fig. 11. Experimental results of 1.8kW prototype @
Full load. (a) Vin=200V, Vo=13.9V, (b) Vin=310V,
Vo=13.9V
snubber capacitor. The snubber capacitance was tuned until
the diode peak voltage reached avalanche energy guaranteed
in the diode datasheet.
Fig. 12 shows the measured efficiency curve of the
prototype. The measured peak efficiency is 90.1% at
Vin=200V, Vo=15.1V, and Po=1kW. At the rated load, the
largest part of the loss is from the conduction loss of diode,
which is 5.4%, as shown in Fig. 13. In order to increase the
rated load efficiency, synchronous rectification will be applied
in future work. In terms of light load efficiency, most of the
loss is from switching loss of the GaN transistor. Although
GaN FET has a very small output capacitance, the transformer
intrawinding capacitance causes the reduction of the ZVS
range. Increasing the ZVS range can be done by reducing the
transformer intrawinding capacitance. Thus, we plan to reduce
transformer intrawinding capacitance by adding insulation
Fig. 12. Measured efficiency of 2nd version experimental
prototype
Fig. 13. Loss analysis of experimental prototype at full
load (Vin=200V, Vo=13.9V, Po=1.8kW)
material between the PCB layers. Moreover, reduction of the
magnetizing inductance also results in ZVS range increase,
which we plan to do for the future work.
V. CONCLUSION
In this paper, a PSFB-CD converter with high power
density of 8.1kW/L (132.7W/in3) is developed by applying
700kHz of switching frequency. Method to improve the power
density was analyzed by comparing the characteristics of the
1st prototype and the 2nd prototype in terms of the number of
PCBs, the size of the transformer, and the structure design.
The matrix transformer concept is applied to split the
secondary current and reduce the leakage inductance effect of
the secondary windings. The FEA simulation results are
provided to verify the validity of the proposed transformer
design concept. The experimental results show that the 2nd
prototype is able to operate over a wide input voltage range
(200V~310V) and wide output voltage (12.8V~15.1V) with
1.8kW of rated load. The 2nd prototype achieves 90.1%
efficiency at the power of 1kW (Vin=200V), and the efficiency
improvement is possible by applying a synchronous
rectification in future work.
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