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Digital to Analog Conversion
Concept
Digital to analog conversion is a process in which signals having a few (usually two)
defined levels or states (digital) are converted into signals having a theoretically
infinite number of states (analog). A common example is the processing, by a modem,
of computer data into audio-frequency (AF) tones that can be transmitted over a
twisted pair telephone line. The circuit that performs this function is a digital-to-
analog converter (DAC). Basically, digital-to-analog conversion is the opposite of
analog-to-digital conversion. Binary digital impulses, all by themselves, appear as
long strings of ones and zeros, and have no apparent meaning to a human observer.
But when a DAC is used to decode the binary digital signals, meaningful output
appears. This might be a voice, a picture, a musical tune, or mechanical motion. Both
the DAC and the ADC are important in applications of digital signal processing.
The following circuit in Fig.16.1 is the basic approach to making the conversion from
stepwise digital information to an analog voltage. It's called R 2R ladder. The value of
R is not important as long as we maintain the ratio R/2R.
Applying super position to the above circuit in order to find the output voltage on the
most left resistance, one gets that each voltage source sees 3R resistance, and that:
I1 = I2 = I3 = I4 = V/3R where I1 is the current in branch 1 due to the voltage source
in this branch. At each node, the current is divided in two equal halves. Then the
current in the most left resistance will be:
Where (23 + 22 + 21 + 20) is the analog equivalent for a given voltage output.
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+ simulate
The conversion step is equal to the full-scale voltage divided by (2 n –1) where n is the
number of bits.
The main advantage of this type of converters is that the ratio between the largest to
the smallest resistor is only 2, which can be easily implemented.
We will realize DAC here using an op amp 741 and some resistors as shown in
Fig.7.2.
Procedure
maximized in
Fig.7.4.
Fig.16.3 the output of the circuit in Fig.7.2 according to the sequence from 0000to1111
Table 1
Digital input Ideal analog output
0000 -466.660 mV
0001 -716.657 mV
0010 -966.654 mV
0011 -1.217 V
0100 -1.467 V
0101 -1.717 V
0110 -1.967 V
0111 -2.217 V
1000 -2.467 V
1001 -2.717 V
1010 -2.967 V
1011 -3.217 V
1100 -3.467 V
1101 -3.717 V
1110 -3.967 V
1111 -4.217 V
Note that the conversion step equals about –310 mV, which is 5/(2 3 –1) V. Note
also that these values will vary a little bit if the resistors used have some tolerance
(i.e. not ideal)
Using the transient analysis of Multisim, you can measure the settling time * for
the above R-2R ladder. It will be calculated from T2-T1 as shown in Fig.7.4.
T1 T2
Fig 7.4. The transient response of the R-2R ladder for 1kHz
Summary
The digital to analog conversion is the process where we convert a digital input is
converted to an analog output. There are many ways to achieve this goal, one of
them is the R- 2R ladder described above.
Practical work
Table 2
Digital input Ideal analog output
0000 -466.660 mV
0001 -716.657 mV
0010 -966.654 mV
0011 -1.217 V
0100 -1.467 V
0101 -1.717 V
0110 -1.967 V
0111 -2.217 V
1000 -2.467 V
1001 -2.717 V
1010 -2.967 V
1011 -3.217 V
1100 -3.467 V
1101 -3.717 V
1110 -3.967 V
1111 -4.217 V
2) Plot the relationship between the digital input and the analog output according
to the values measured in question 1.
3) Change the input from 0000 to 1111 in 16 steps with a frequency 1 kHz, plot
the input-output graph.
4) Change the input from 0000 to 1111 in 16 steps with a frequency 1 MHz, plot
the input-output graph.
5) Calculate the minimum and the maximum error for the results obtained in
question 4.then calculate the mean square error of the ladder, given that the
error is the difference between the theoretical voltage and the measured
voltage and that the mean square error is given by: (1/n) Σ |Vt-Vm|2 where Vt is
the theoretical voltage and Vm is the measured voltage.
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* Settling time is the time needed for the output to change its state due to a change in the input.
EXPERIMENT 7.b+
DAC 0808*
Introduction to the chip
Procedure
Fig.7.7. Circuit configuration for the free running of the DAC 0808
Practical work
1) Record the output voltage to the following digital input shown in table 3.
Table 3
3) Calculate the maximum and the minimum error in your measurements, given
that the error is calculated from: |Vt –Vm| where Vt is the theoretical (ideal)
voltage output and Vm is the measured value.
4) Use the attached data sheet to specify the maximum input frequency that
guarantees a proper output.
1/ 150 ns