Q: RAID stand for? Q: What is data path cycle?

* Redundant Array of Inexpensive Disks * The process of running two operands through the
ALU and storing the result is called the data path
cycle

Q: A program that fetches, examine, and execute the Q: What is superscalar architecture?
instructions of another program is called what?
* Use a single pipeline but give it multiple functional
* Interpreter units. For example Pentium II architecture.

Q: What is Pipelining? Q: What is an Array Processor?

* To divide the instruction into many parts, each one * An Array Processor consists of a large number of
handled by a dedicated piece of hardware, all of which identical processors that perform the same sequence of
can run in parallel. instructions on different set of data.

Q: Pipelining allows a trade-off between latency and Q: What makes a vector processor different than an
processor bandwidth. What is Latency and Processor array processor?
Q: What is an n-bit codeword? (Hint: Error Correcting
Bandwidth? Q: To read or write a sector, first the arm must be
Code)
Q: What is Winchester Disk? moved
Q: SCSItostands
* Unlike the right
array for radial position.
processor all of theThis action
addition is called
operations
Q: What
WhatisisHamming
* Latency: howthe long
difference
Distance?
it takesbetween split
to execute cache and
an instruction Q:
what?
are performed in a single, heavily-pipelined adder.disk
What
The circular
is a Reed-Solomon
sequence ofCode?
bits written as the
*and
Harvard
An
InProcessor
n-bit
order
architecture?
unit
to Bandwidth:
containing
achieve high m data
surface
and r
and
check
how many MIPS the air bits
quality,
is
CPU makes
* Smalla complete
Computerrotation
SystemisInterface
called what?
*often
most
hasThe referred
disks
number
areas sealed
an
of n-bit
bit at
positions
codeword
the factory
in which
to prevent
two code
dust * Seek
A code that can correct multiple errors.
words
*from
Bothgetting
differ
are the
isin.called
same.the Hamming Distance. * Track

Computer Architecture
Q: What is striping?

* Distributing data over multiple drives Q: What is an Orange Book?

Q: VTOC stands for? Q: What
The unburned
is a Red
Yellow
Book?
areas
Book?between the pits are called
Q: EIDE
SLEDstands
standsfor?
for ? what?
* Precise standards written for CD-R (CD
* Volume Table of Contents *Recordable)
Defining
The precise
a precise
technical
standard
details
for what
for are
the now
CD called
were
* Extended
Single Large
Integrated
Expensive
Drive
Disk
Electronics published
* Lands in an official International Standard (IS
CD-ROMs
10149), popularly called the Red Book.

Computer Architecture
Q: What is difference between Digital Versatile Disk Q:Q: Two
The
Chipssmall
schemes
havecircles
a are
finite
commonly
used
gateas delay,
part
used
ofitfor
the
includes
applying
symbols
which
the
for
and
Q: UART
The
Digital
mapping
mouse
stands
Videosend
for?
of
Disk?
characters
a sequence ontoofintegers
3 bytesis to
called
the voltage
the
Q:
times?
ECL
inverter,
in
stands
display
NAND
for?terminals,
gate, and
nameNOR them?gate are called
computer
what? every time the mouse moves a certain what?
*minimum
Universal
Both are
distance.
Asynchronous
the same
It is called
(Digital
Receiver
what?
Versatile
Transmitter
Disk is the ** Passive
Emitter-Coupled
it includes
Matrix
bothDisplay
the
Logic
signal
andpropagation
Active MatrixtimeDisplay
through
official
* Character
name)code *theInversion
chip and the
Bubbles
switching time.
* Mickey

Computer Architecture
 Q: What is arebus
twoskew?
main approaches of Multithreading?
Q: FPM stands for Q: SMT
For devices
stands for
that act as both master and slave, a
Q: What
EDO
A Flipstands
is aFlop
comparator?
for?
is edge triggered, whereas a latch is combined
* It is possible
chip called
to what?
speed up the bus, but difficult
what?
* Fast Page Mode because
* Fine-grained
the signalsMultithreading
on different lines
andtravel
Coarse-grained
at slightly
* Extended
Level
its circuit
Triggered
Data
which
Output
is used to compare two input *different
Multithreading
bus
Simultaneous
transceiver
speeds, aMultithreading
problem is known as bus skew.
words.

Computer Architecture
Q: What is Fine-grained Multithreading? Q: TLP stands for?
Q: IfWhat
the average
is theseekdifference
time is 5between
ms (Millie
pages
seconds)
and
*Q: Storage Disks (Magnetic
Fine-grained Disks)switches
Multithreading are organized in
between *and
segments?
disk Level
Thread rotatesParallelism
at 10,000 RPM, then what is the
what
Q: MTTR
What
form?isstands
Entry for?
Time?
threads on each instruction, causing the execution of average
Q: MTTF rotation
stand for
time?
?
multiple threads to be interleaved. This interleaving is * Pages are fixed size blocks whereas segments are
* Platters,
Mean
The
often time
done Time
Tracks
infor
a To
theand
Repair
user
Sectors
to enter
round-robin the command.
fashion. *variable
Mean
Average
size
Timeblocks
To
Rotation
FailureTime = 0.5/10000 RPM =
0.5*60/10000 (divided 10,000 by 60 to convert it into
seconds) = 0.0030 sec = 3.0 ms
Computer Architecture
Q: Average Memory Access Time = Hit time + Miss
Rate * Latency Time
True Q: SDRAM
Q: What
Generally
is the Master
use of
stands UART?
for? and Slave words used in PCI
Q: APIC
What
A CPU
False is
stands
CRC?
with for?
8 data pins will take how many read Q: SEC standsWhat
architecture. for? are official terms used for Master
operations to read a 42 bit word? and
* ASlave?
UART (Universal
* Synchronous Dynamic Asynchronous
RAM Receiver
**Advanced
* False
It is a (True
check
Programmable
isuse to detect
Average Interrupt
errors. Access
Memory Controller
Time = Hit *Transmitter)
Single Edge is aCartridge
chip that can read a byte from the
* 6+
time Read
Missoperations
Rate * Miss Penalty) *data
Initiator
bus andandoutput
Target
it at
respectively
a time on a serial line for a
terminal, or input data from a terminal.

Computer Architecture
Q: What is opcode? Q: The data path is the part of the CPU that contains
what?
*Q:The
Therefirstare twoofdifferent
field ways to communicate
every instruction is the opcode with
memory:
Q:What a is32-bit
purpose
word-addressable
of MIR
(short for operation code), which identifies (MicroInstruction
memory theport and * ALU, its inputs and its outputs
an
Register)?
Q: 8-bit
what is
instruction byte-addressable
the difference
telling whether itbetween
memory
is ADD or True
port. dependence
The 32-bit
a BRANCH or Q: The
Instruction
Stopping
number
theinof
cycle
main
clock
and
memory
cycles
to wait
needed
have
for athe
to
needed
property
execute
value
athat
set
is
port
and Hazards?
is controlled
something else. by which register(s)? they
of
called
operations
arewhat?
executed
is called
in address
what? order except
* Its function is to hold the current microinstruction,
* There
whose MARbits
is no
drive
(Memory
difference.
the control
Address signals
Register)
that operate
and MDRthe * Path
Branch
Stalling
Length
instructions
(Memory
data path. Data Register)

Computer Architecture
Q: What is Spatial Locality? Q: When it is advices that do not use issue WAW
dependence?
* Spatial Locality is the observation that memory
locations with addresses numerically similar to a * If the result instruction is being written, do not
Q: What
Whenaccessed
recently isaWAR
register
dependence
(like EBP)
memory (Write
is used
location After
aretolikely
point
Read)?
to
to the
be Q: Moving
What
One
issue WAWor
is Cycle
code
more upward
words
Stealing?
dependence deep
over ainbranch
the stack
is called
are written
what?
Q:
base
RMM
of the
stands
local for?
stack frame,
accessed in the near future. it is called what? back t memory by a process called what?
* one instruction is trying to overwrite a register that * Hoisting
The process of having a DMA controller take bus
a* previous
Frame
Read-mostly
Pointer
instruction
memorymay not yet have finished *cycles
Dribbling
away from the CPU is called Cycle Stealing.
reading.

Computer Architecture
Q: Every Computer with virtual has a device for doing
the virtual to physical mapping. Name the device.

* MMU (Memory Management Unit)

Computer Architecture
Computer Architecture
Q: The most important register, which points to the Q: A program that fetches, examines and executes the
next instruction to be fetched for execution is called instructions of another program is
Called:

* Program Counter (PC) * Interpreter

Q. : RISC stands for Q SIMM stands for

* Reduced Instruction Set Computer * Single Inline Memory Module

Q DIMM stands for Q. What is nibble?

* Dual Inline Memory Module * A 4 bit memory location

Q : Internal architecture of 8086 and 8088 Q: If zero flag is Z=1, what will be the result?
microprocessors are of how much bits?

* 16 * Result will be Zero

Computer Architecture
Q How many bytes an Unpacked BCD format will Q How many bytes a Packed BCD format will take to
take to store 623 (Decimal). store 623 (Decimal).

* 3 bytes * 2 bytes

Q : VESA stand for Q. The memory map of a personal computer is divided

into different parts; name them

* Video Electronics Standards Association

* TPA (Transient Program Area), System Area,
Extended Memory

Q The 80386EX data bus and address bus contains QThe Pentium data bus and address bus contains how
how many bits? many bits?

* 16 and 26 bits respectively * 64 and 32 bits respectively

The Pentium OverDrive data bus and address bus

contains how many bits?

*32 and 32 bits respectively

Computer Architecture
Q. What is little endian format, give an example also? Q. What is big endian format, give an example of it?

*The most significant byte is always stored in the

* The least significant byte is always stored in the lowest memory location, and the least significant byte
lowest numbered memory location, and the most in the highest. e.g. Motorola family
significant byte in the highest. e.g. Intel family

Q ENIAC stands for Q : How many registers 80386 contains?

* Electronic Numerical Integrator and Calculator

*16 registers including FS and GS

Q What is VIF? Q In 8086 microprocessor, when CS (Code Segment)

working along with IP (Instruction Pointer); then what
type of address they generally calculate?

* Virtual Interrupt Flag (VIF); the VIF is a copy of the

interrupt flag bit available to the Pentium/Pentium *Instruction Address
Microprocessor

Q In 8086 microprocessor, when DS (Data Segment) Q. : What is the function of Access Rights Byte in
working along with BX, DI or SI then what type of microprocessor?
address they generally calculate?

* Data Address * It controls access to the protected mode memory.

Computer Architecture
Q What happens when G bit (Granularity bit) is zero Q What happens when G bit (Granularity bit) is one

*If G = 0, then the limit specifies a segment limit of * if G = 1, then the value of the limit is multiplied by
from 1 to 1M byte in length. 4K bytes

Q TLB stands for Q VCPI stands for

* Translation Look-aside Buffer * Virtual Control Program Interface (provided by

HIMEM. sys)

Q What is fan out of TTL (74 ALS) Q . In 8086/8088, the status bits S3 and S4 are used to
select the different memory segments. Which memory
segment will be selected when S3=0 and S4=1

* 10
* Code or no Segment

Q In 8086/8088, the status bits S3 and S4 are used to Q What will be the PCLK (Peripheral Clock) out put
select the different memory segments. Which memory of the 8284A, if the crystal oscillator is operated at 15
segment will be selected when S3=1 and S4=0 MHz?

* Stack Segment * 2.5 MHz

Computer Architecture