Beruflich Dokumente
Kultur Dokumente
CK
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD
REV ECN DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. DATE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
2011-04-18
D SCHEM,PCB,LIO,K21 D
EVT, 2011-4-14
1 1 Table of Contents
TABLE_TABLEOFCONTENTS_ITEM
B B
ALTERNATIVE PARTS
TABLE_ALT_HEAD
U1000
J2500
XDP CONN
INTEL CPU PG 23
2.2 GHZ
J3100
SANDYBRIDGE SFF 2C+2
PG 28
J2900
2 DIMMs
PG 9-13
DDR3-1067/1333MHZ
DIMM
D PG 27
J6900, J6950
D
POWER SUPPLY
DC/BATT
PG 64-74
PG 63
U5920
SYSTEM MISC
CLK U5400, U5410, U5420, U5360
CLOCK PG 19
CONN U3600
PCIe x4 eDP OUT X19 EXTERNAL A TRACKPAD/
PG 75 PWR
PG 76 PG 16-21 Bluetooth USB KEYBOARD
HDMI OUT
1 4 LANEs CIO CTRL PG 32 PG 43 PG 54, 53
RGB OUT
T29 Router PG 17
PG 34,35 DP DP OUT
U5701
J4610 J3402 J4501
10 11 12 13
DVI OUT
TP/KB
TMDS OUT
EXTERNAL B CAMERA IR
PSOC
USB
U2650 P1 P3 P2 PG 53
PG 17 PG 43 PG 32 PG 42
USB
9
(UP TO 14 DEVICES)
LVDS OUT
8
HUB-2
7
PG 18 U4800
USB
PG 18
PG 24
6
IR
5
Controller
4
J9000
PCI PG 44
3
U2600 P3 P1 P2
PG 18
2
LVDS
USB
1
CONN PCI-E HUB-1
0
B PG 74
PG 16
J2550
PG 24
B
JTAG SMBUS From PCH PCH XDP
PG 16
PG 16 CONN
PCI-E DIMM’s PG 23
PEG HDA
(UP TO 8 LINES)
PG 16 PG 16 PG 16
U6201
AUDIO
Codec
PG 57
U6500
PG 39
PG 37 PG 33
AUDIO IO SWITCH
PG 60
System Block Diagram
PG 61 DRAWING NUMBER SIZE
PG 61
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
2 OF 103
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 2 OF 13
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
AUDIO POWER
TRUE BI_MIC_HI 10 (PLACE BOTH NEAR J4701) TRUE PP5V_S3 4 (NEED 1 TP NEAR J4720 (PP5V_S3_CAMERA_F))
TRUE BI_MIC_LO 10 (UNFILTERED SIDE IS OK) (UNFILTERED SIDE IS OK)
TRUE I2C_LIO_SCL 6 13
I2C_LIO_SDA
C TRUE 6 13
GROUNDS
C
TRUE GND (NEED 2 TP NEAR J4720)
(NEED 2 TP NEAR J6701)
(NEED 2 TP NEAR J6702)
B B
A SYNC_MASTER=(K6_MLB) SYNC_DATE=(12/11/2009) A
PAGE TITLE
FUNC TEST
DRAWING NUMBER SIZE
=PP5V_S3_CAMERA 6 =PP3V42_S3_HALL 6
D =PP5V_S3_AUDIO_AMP 9 =PP3V42_G3H_AUDIO_UF 10 D
=PP5V_S3_AUDIO 7
12 6 =PP18V5_DCIN_CONN PP18V5_G3H
MIN_LINE_WIDTH=0.6MM
6 =PP3V3_S0_AUDIO PP3V3_S0 MIN_NECK_WIDTH=0.3MM
MIN_LINE_WIDTH=0.3MM VOLTAGE=18.5V
MIN_NECK_WIDTH=0.1MM MAKE_BASE=TRUE
VOLTAGE=3.3V
MAKE_BASE=TRUE
=PP3V3_S0_AUDIO_DIG 7 10
=PP3V3_S0_TEMP_SNR 6
Pogo pins
C C
APN: 870-1940
ZS8004
POGO-2.0OD-2.95H-K86-K87
SM
12 4 GND_MPM_CHGND 1 Place near MPM near edge of board (bottom side)
B B
Speaker clip
APN: 806-1178
SPKR-LIO-CLIP-K16
ESD BOSS
OMIT_TABLE
1 ZT0801
SM
Z0805
STDOFF-2.7OD1.6H-SM
12 4 GND_MPM_CHGND 1
Place near MPM near edge of board (bottom side)
Power Aliases
DRAWING NUMBER SIZE
D D
11
1 1 MF X5R 2 X5R
10UF 0.1UF C4616 R4691 2 201 603 603 J4610
20%
6.3V 2
20%
10V
100UF 0 PLACEMENT_NOTE=NEAR J4610 USB-LEFT-K99
X5R 2 CERM 20% 5% F-RT-TH
603 402 6.3V
2 POLY-TANT 1/20W CRITICAL 5
CASE-B2-SM
MF
2 201
L4610
90-OHM
DLP0NS
SYM_VER-1 1 VBUS
13 6 USB_EXTB_N 3 4 13 CONN_USB_EXTB_N 2 D-
BI
13 CONN_USB_EXTB_P 3 D+
4 GND
13 6 USB_EXTB_P 2 1
BI
6
2 5 3 4
514-0739
NC
IO
NC
IO
6 VBUS
BASED OFF CHARACTERIZATION ON OTHER DESIGNS C4690 IS NOT REQUIRED LEAVING IT AS NO STUFFED
1 GND
D4610
B RCLAMP0502N
SLP1210N6
B
CRITICAL
A SYNC_MASTER=(K84_MLB) SYNC_DATE=(11/09/2009) A
PAGE TITLE
D LIO POWER D
34 PIN LIO FLEX CONNECTOR
APN: 516S0870 3.0 MM RECEPTACLE OMIT J4701
WIREPAD-24AWG
1.47X0.85MM-TH-NSP
=PP18V5_DCIN_CONN 1
J4700 12 4
OMIT
AXK734227G J4702
F-ST-SM WIREPAD-24AWG
35 1.47X0.85MM-TH-NSP
1
1 2 OMIT J4703
SYS_ONEWIRE BI 12
9
SPACE THE HOLES 2MM APART CENTER TO CENTER
C
36
CRITICAL
L4720
90-OHM
DLP0NS
SYM_VER-1
USB_CAMERA_CONN_P 3 4 USB_CAMERA_P
CAMERA/ALS 13 3 6 13
2 7 SMC_LID_R 1
0 2 SMC_LID
4 PP5V_S3_CAMERA_F FERR-120-OHM-1.5A
6 MIN_LINE_WIDTH=0.5 mm
5 I2C_ALS_SCL 6 MIN_NECK_WIDTH=0.25 mm 0402-LF
3 6 5% VOLTAGE=5V
B NC
4 5
NC
1/16W
MF-LF
402
1 C4750
0.001UF
6 I2C_ALS_SDA 6
C4721
0.1uF
1 B
10% 8 20%
50V 10V
2 CERM CERM 2
402 402
APN:518S0767
4 =PP3V3_S0_TEMP_SNR
I2C aliases
1 C4730
0.1UF
10%
6.3V
2 X5R
5
I2C_LIO_SDA I2C_LIO_THERM_SDA 201
13 6 3 6 V+
MAKE_BASE=TRUE
13 6 3 I2C_LIO_SCL I2C_LIO_THERM_SCL 6
U4730
MAKE_BASE=TRUE
HPA00330AI
I2C_ALS_SCL SOT563
6
6 I2C_LIO_THERM_SDA 6 SDA ADD0
4
I2C_ALS_SDA
A 6
AUDIO CODEC
APPLE P/N 353S2355
L6201 U6201 CONSUMES 40MA MAX. FROM 1.5V RAIL
FERR-22-OHM-1A-0.065-OHM PP5V_AUDIO_HPAMP 7
=PP1V5_S0_AUDIO 1 2 PP1V5_S0_AUDIO_DIG
7 4 IN
MIN_LINE_WIDTH=0.6 MM
0201 MIN_NECK_WIDTH=0.2 mm
VOLTAGE=1.5V =PP1V5_S0_AUDIO 4 7
C6210 1 1
C6211
D 4.7UF
20%
4V
0.1UF
10%
6.3V
PP4V5_AUDIO_ANALOG IN 7 10 11
D
X5R-1 2 2 X5R
402 201 CRITICAL CRITICAL
C6216 1
C6215 1
24
46
25
16V
CRITICAL CRITICAL 2012-LLP 2 2 16V
9
PP4V5_AUDIO_ANALOG X5R TANT-POLY GND_AUDIO_CODEC
11 10 7 IN
C6221 1 1 C6220 MIN_LINE_WIDTH=0.20MM VD VA_REF VA_HP VA
402 2012-LLP
GND_AUDIO_CODEC
7 8 10 11
2
201 MIN_NECK_WIDTH=0.15MM CS4206B HPREF 39 MIN_LINE_WIDTH=0.30MM MIN_NECK_WIDTH=0.20MM AUD_HP_PORT_REF IN 10
QFN
NC NC_AUD_GPIO_0 NO_TEST=TRUE 2 GPIO0/DMIC_SDA1 LINEOUT_L1+ 35 NO_TEST=TRUE NC_AUD_LO1_P_L NC
NC NC_AUD_GPIO_1 NO_TEST=TRUE 12 GPIO1/DMIC_SDA2 LINEOUT_L1- 34 NO_TEST=TRUE NC_AUD_LO1_N_L NC
/SPDIF_OUT2
NC NC_AUD_GPIO_2 NO_TEST=TRUE 14 GPIO2 LINEOUT_R1+ 36 NO_TEST=TRUE NC_AUD_LO1_P_R NC
GPIO3 = SPKR AMP SHDN CONTROL 9 6 OUT AUD_GPIO_3 15 GPIO3 LINEOUT_R1- 37 NO_TEST=TRUE NC_AUD_LO1_N_R NC
11 IN AUD_SENSE_A 13 SENSE_A LINEOUT_L2+ 31 AUD_LO2_P_L OUT 9
MIN_LINE_WIDTH=0.20MM LFT. SPKR AMP. SIG. SOURCE
MIN_NECK_WIDTH=0.15MM CS4206_FLYP LINEOUT_L2- 30 AUD_LO2_N_L OUT 9
MIN_LINE_WIDTH=0.20MM
10 7 4 IN =PP3V3_S0_AUDIO_DIG MIN_NECK_WIDTH=0.15MM CS4206_FLYC LINEOUT_R2+ 32 AUD_LO2_P_R OUT 9
45 FLYP RT. SPKR AMP. SIG. SOURCE
LINEOUT_R2- 33 AUD_LO2_N_R OUT 9
C6222 1 1
C6223 43 FLYC
1 C6226 2.2UF 2.2UF 42 FLYN
20% 20%
0.1UF 6.3V
2 2
6.3V
MICBIAS 16 AUD_CODEC_MICBIAS 10
10% CERM CERM OUT
6.3V 402-LF 402-LF MIN_LINE_WIDTH=0.20MM
2 MIN_NECK_WIDTH=0.15MM
X5R
201 CS4206_FLYN
3 VL_HD CRITICAL MIN_LINE_WIDTH=0.20MM
MIN_NECK_WIDTH=0.15MM
C MIN_LINE_WIDTH=0.20MM
MIN_NECK_WIDTH=0.15MM
1 VL_IF
VCOM 28 CS4206_VCOM
C
LINEIN_L+ 21 NO_TEST=TRUE NC_AUD_LI_P_L NC
13 6 IN HDA_BIT_CLK 6 BITCLK
LINEIN_C- 22 NO_TEST=TRUE NC_AUD_LI_REF NC
13 6 IN HDA_SYNC LINEIN_R+ 23 NO_TEST=TRUE NC_AUD_LI_P_R NC
R6211 10 SYNC
22
13 6 OUT HDA_SDIN0 1 2 13 AUD_SDI_R 8 SDI MICIN_L+ 18 AUD_MIC_INP_L IN 10
EXT MIC CODEC INPUT
5% 5 SDO MICIN_L- 17 AUD_MIC_INN_L IN 10
1/20W
MF MICIN_R+ 19 AUD_MIC_INP_R IN 10
201 11 RESET* BI MIC CODEC INPUT
13 6 IN HDA_SDOUT MICIN_R- 20 AUD_MIC_INN_R IN 10
13 6 IN HDA_RST_L
NC NC_AUD_SPDIF_IN NO_TEST=TRUE 47 SPDIF_IN
VREF+_ADC 27 CS4206_VREF_ADC NC
NC NC_AUD_SPDIF_OUT NO_TEST=TRUE 48 SPDIF_OUT MIN_LINE_WIDTH=0.20MM
MIN_NECK_WIDTH=0.15MM
49
26
1 1
C6224 C6225
1UF 10UF
20% 20%
16V 2 2 16V
TANT TANT-POLY
0603-SM 2012-LLP
B B
MIN_LINE_WIDTH=0.5MM
11 10 8 7 GND_AUDIO_CODEC MIN_NECK_WIDTH=0.2MM
VOLTAGE=0V
A 5%
1/20W
MF 1
C6200
GND
2
NC 5
CRITICAL
C6202 1 1
CRITICAL
C6203 SYNC_MASTER=AUDIO SYNC_DATE=04/06/2011 A
201 PAGE TITLE
1UF XW6200 0.1UF 1.0UF
2
10%
10V
X5R
1
C6201
1UF
10%
SM
10%
16V
X5R-CERM 2
20%
10V
2 X5R-CERM
AUDIO: CODEC/REGULATOR
1 2 DRAWING NUMBER SIZE
402
2
10V 0201 0201-1
X5R
402
Apple Inc. 051-8933 D
GND_AUDIO_CODEC 7 8 10 11 REVISION
R
4.1.0
PLACE XW6200 BENEATH U6200, BETWEEN PINS 2 & 5 NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
62 OF 103
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 7 OF 13
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
10 7 IN AUD_HP_PORT_L OUT
CRITICAL
C6500 1
0.1UF NOSTUFF
10%
6.3V 2 1
X5R
201
R6502
10K
NC AUD_HP_ZOBEL_L 1%
MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM
1/20W
MF
R65001 2 201
39
5%
1/20W
MF
201 2
C 11 10 7 IN GND_AUDIO_CODEC
C
R65101
39
5% NOSTUFF
1/20W 1
MF
201 2 R6512
10K
1%
NC AUD_HP_ZOBEL_R 1/20W
MIN_LINE_WIDTH=0.30MM MF
MIN_NECK_WIDTH=0.20MM
CRITICAL 2 201
C6510 1
0.1UF
10%
6.3V 2
X5R
201
10 7 IN AUD_HP_PORT_R OUT
B B
A SYNC_MASTER=AUDIO SYNC_DATE=04/06/2011 A
PAGE TITLE
SPEAKER AMPLIFIERS
APN:353S2888
D D
GAIN 6DB
4 =PP5V_S3_AUDIO_AMP
C C6608 1 1
CRITICAL
C6603
C
A1
MIN_LINE_WIDTH=0.30 mm
0.1UF 47UF
10%
6.3V
20% MIN_NECK_WIDTH=0.20 MM
X5R
2 PVDD 2 6.3V
CRITICAL 201
POLY-TANT
2012-LLP
SPKRAMP_L_N_OUT 3 10
A2
201
5% 2
1/20W
MF
201
L6610
FERR-22-OHM-1A-0.065-OHM
SPKRAMP_INR_P
1 2
7 IN AUD_LO2_P_R OUT 6
B 0201
L6611
B
FERR-22-OHM-1A-0.065-OHM
1 2
7 IN AUD_LO2_N_R SPKRAMP_INR_N OUT 6
0201
A SYNC_MASTER=AUDIO SYNC_DATE=04/06/2011 A
PAGE TITLE
1 2 1 2
7 OUT AUD_MIC_INN_R BI_MIC_LO_F
5
0201 NC
11 7 PP4V5_AUDIO_ANALOG 10%
6.3V 1
X5R R6773
7 4 =PP3V3_S0_AUDIO_DIG MIKEY PORT B LEFT(HEADSET MIC) 201 2.4K
CRITICAL 1%
HP=80HZ, LP=10.63KHZ 1/20W
1 C6755 MF
1 4.7UF 2 201
R6762 20%
6.3V
10K 2 X5R-CERM1 11 10 8 7 GND_AUDIO_CODEC
5% 402 MIKEY 1A
1/20W
I2C PULLUPS ON SOUTHBRIDGE PAGE R6757 MF
201 2
APN:353S2640
1
33 2
MIKEY ADDRESS: WRITE=72H, READ=73H
13 6 IN I2C_MIKEY_SCL CHS_SCL 10
L6754 MIN_LINE_WIDTH=0.20MM
5%
A2
FERR-22-OHM-1A-0.065-OHM MIN_NECK_WIDTH=0.15MM
R6758 1/20W
MF
1 2
VOLTAGE=3.42V
1
33 2
201 AVDD 4 =PP3V42_G3H_AUDIO_UF PP3V42_AUDIO
13 6 BI I2C_MIKEY_SDA CHS_SDA 10
5% U6751
CD3282A1
0201
1/20W
MF WCSP
201 MIKEY 1 C6790
C3 SCL MICBIAS C1 HS_MIC_BIAS
1UF
10%
B3 SDA DETECT B1 HS_SW_DET NOSTUFF 2
10V 1 C6754
X5R
1 0.1UF
C 6 OUT AUD_I2C_INT_L D3 INT* BYPASS D1 HS_RX_BP R6763
1%
71.5K
402
2
10%
16V
X5R-CERM
C
6 AUD_IPHS_SWITCH_EN A3 ENABLE MIKEY 1 1/20W 0201
PLACE XWS 6700 & 6701 AT J6700 PINS
IN
A1
R6754 MF
2 201
11 IN HS_HDET HDET 1K 11 10 8 7 GND_AUDIO_CODEC CRITICAL
5%
L6700
C2 DGND
D2 AGND
1/20W
B2 CS MIKEY MF FERR-120-OHM-1.5A XW6700
A1
201 2 GND_AUDIO_CODEC SM
1 C6756 7 8 10 11
R67551 0.01UF
10% VDD
10 OUT US_HS_GND
MIN_LINE_WIDTH=0.4MM
1 2 AUD_CONNJ1_SLEEVE_XW 1
MIN_LINE_WIDTH=0.4MM
2
100K MIN_NECK_WIDTH=0.06MM 0402-LF MIN_NECK_WIDTH=0.2MM
5% 2 10V
1/20W
MF
X5R
201 U6750 CRITICAL
201 2 TS3A8235YFP L6702 XW6701
WCSP FERR-120-OHM-1.5A SM
CRITICAL
11 10 8 7 GND_AUDIO_CODEC CHS_CLAMPI
D4 RAMPI 10 OUT CH_HS_GND
MIN_LINE_WIDTH=0.4MM
1 2 AUD_CONNJ1_MIC_XW
MIN_LINE_WIDTH=0.4MM
1 2 AUDIO JACK: HP CONNECTOR WITH MIKEY
MIN_NECK_WIDTH=0.06MM 0402-LF MIN_NECK_WIDTH=0.2MM
D3
R6751 R6752 R6753 RAMPO CRITICAL
2
1K 1 1
2.2K 2 1
2.2K 2 CHS_CLAMPO
C4 CLAMPI L6701
MIKEY
FERR-33-OHM-0.8A-0.09-OHM
CRITICAL 5% 1% 1%
B4 1 2
C6752 R6750
MIKEY 1/20W
MF
1/20W
MF
1/20W
MF
CLAMPO US_HS_MIC AUD_CONNJ1_MIC
MIN_LINE_WIDTH=0.4MM
0.1UF 201 201 201 0201 MIN_NECK_WIDTH=0.2MM
2.2K 2 D2
7 OUT AUD_MIC_INP_L 1 2 HS_MIC_HI_RC 1 HS_MIC_HI MIC MIC1 B1 CRITICAL
GND1
GND2
1 2
7 OUT AUD_MIC_INN_L
FERR-120-OHM-1.5A 4 GND
R/C6750 FILTER TO ADDRESS OUT-OF-BAND GND
B 10%
6.3V NOISE ISSUE SEEN ON EARLY HEADSETS
(SEE RADAR # 6210118)
XW6751
SM
8 7 IN AUD_HP_PORT_L 1 2 AUD_CONNJ1_TIP
MIN_LINE_WIDTH=0.4MM
1 LEFT
B
X5R 0402-LF 2 RIGHT
C2
B2
B3
C3
MIN_NECK_WIDTH=0.2MM
201 7 AUD_HP_PORT_REF 1 2
CRITICAL 3 DET
PLACE XW6751 AS CLOSE TO U6750
BALL D1 AS POSSIBLE
US_HS_GND
L6705 6
10 IN FERR-120-OHM-1.5A SHLD_PIN
CH_HS_GND 7
10 IN
8 7 AUD_HP_PORT_R 1 2 AUD_CONNJ1_RING SHLD_PIN
IN 8
MIN_LINE_WIDTH=0.4MM SHLD_PIN
11 10 8 7 GND_AUDIO_CODEC 0402-LF MIN_NECK_WIDTH=0.2MM 9
CRITICAL
SHLD_PIN
L6706
FERR-470-OHM
11 AUD_J1_DET_R 1 2 AUD_CONNJ1_DET
OUT
MIN_LINE_WIDTH=0.4MM
0201 MIN_NECK_WIDTH=0.2MM
1 CRITICAL CRITICAL 1 1
2 2
DZ6702 DZ6704
ESDALC5-1BM2 ESDALC5-1BM2
SOD882 SOD882
1 1
A SYNC_MASTER=AUDIO SYNC_DATE=04/06/2011 A
PAGE TITLE
AUDIO: JACK
DRAWING NUMBER SIZE
D D
CODEC INPUT SIGNAL PATHS
C C
R6802 Q6800 1
100K 1 3 D
SSM6L36FE
SOT563
R6801
11 10 8 7 GND_AUDIO_CODEC 2
P-CH 270K
5%
5% 1/20W
1/20W MF
MF
201 2 201
G 5 AUD_J1_DET_R 10
IN
PORT A DETECT (HEADPHONES)
R6803 S 4 PP4V5_AUDIO_ANALOG
AUD_SENSE_A 1
39.2K2 AUD_PORTA_DET_L 6 D
7 10 11
L6801
7 OUT
C6800 1 FERR-470-OHM
1%
1/20W 0.1UF 1 2 AUD_IP_PERIPHERAL_DET
OUT 6
MF 10%
201 6.3V 2 0201
1NOSTUFF X5R
R6804 201
39.2K G 2 AUD_J1_DET_OD IN 11
1%
1/20W
MF S 1
2 201
GND_AUDIO_CODEC 7 8 10 11
N-CH
10 OUT HS_HDET
PLACE C6800 CLOSE TO Q6800
NOSTUFF
1
R6805
39.2K
B 1%
1/20W
MF
B
2 201
GND_AUDIO_CODEC 7 8 10 11
A SYNC_MASTER=AUDIO SYNC_DATE=04/06/2011 A
PAGE TITLE
D D
CRITICAL
MPM Connector F6901
CRITICAL L6914 6AMP-24V
J6910 250-OHM-5A
DLW5BT-SM-HF
PWR PP18V5_DCIN_UF_IN 1 2 =PP18V5_DCIN_CONN 4 6
MPM-DC-K21 SYM_VER-1
MIN_NECK_WIDTH=0.2 MM
F-RT-TH MIN_LINE_WIDTH=0.5 MM
PP18V5_DCIN_UF 4 1 VOLTAGE=18.5V 1206-1
6 MIN_NECK_WIDTH=0.2 MM
MIN_LINE_WIDTH=0.5 MM
1 C6914 C6901 1 1 C6920 C6921 1
VOLTAGE=18.5V 0.1UF 0.1UF 1000PF 1000PF
10% 10% 5% 5%
GND
1 GND_ADAPTER_UF 3 2 25V
2 X5R
25V
X5R 2 2 25V
NP0-C0G
25V
NP0-C0G 2
MIN_NECK_WIDTH=0.2 MM
PWR
2 MIN_LINE_WIDTH=0.5 MM
VOLTAGE=0V
402
GND 402 402 402
GND_DCIN_CHGND 6
3 MIN_NECK_WIDTH=0.2 MM
SIGNAL
4
L6915 MIN_LINE_WIDTH=0.5 MM
PWR R6913 600-OHM-300MA R6915 VOLTAGE=0V
GND
5
ADAPTER_SENSE_UF 1
22 2 ADAPTER_SENSE_UF_L 1 2 ADAPTER_SENSE_UF_IN 1
22 2
SIG ADAPTER_SENSE_UF_IN_R
5% 0402 5%
7 1/16W 1/16W
2 CRITICAL CRITICAL
C MF-LF
402
D6901 2 CRITICAL
2
D6904
MF-LF
402 C
APN: 514-0789 C6911 1 1 C6912 C6930 1 1 C6931 1 C6913 5V-10PF D6903 24.0V-50PF
0.22uF 0.1UF 1000PF 1000PF 470pF 1 SLP1006P2T-SM SLP1006P2T-SM
20% 10% 5% 5% 10% 24.0V-50PF 1
6.3V 2 2 25V 25V 25V 2 50V SLP1006P2T-SM
X5R X5R NP0-C0G 2 2 NP0-C0G CERM CRITICAL 2 1 CRITICAL 2
402 402 402 402 402
D6902 D6905
5V-10PF NOSTUFF 5V-10PF
SLP1006P2T-SM 1 R6905 SLP1006P2T-SM 1
0
4 GND_MPM_CHGND 1 2
MIN_NECK_WIDTH=0.2 MM
MIN_LINE_WIDTH=0.5 MM 5%
VOLTAGE=0V 1/16W
MF-LF
402
SMC_BC_ACOK_VCC
2
R6900 =PP3V42_G3H_ONEWIRE 4
1
2.0K
5% VCC SOT665
1/16W
MF-LF
402 1 U6900 TC7SZ08AFEAPE
5
MAX9940 2 SMC_BC_ACOK 6
SC70-5 A IN
SYS_ONEWIRE 4 INT EXT 5 4
6 BI U6901
Y
B
1 1 C6902
0.1UF
3 20%
GND NC 10V
2 CERM
402
3
NC
PLACEMENT_NOTE=PLACE NEAR U6901
B B
1-Wire OverVoltage Protection
A SYNC_MASTER=MASTER SYNC_DATE=MASTER A
PAGE TITLE
MPM CONNECTOR
DRAWING NUMBER SIZE
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET LAYER ALLOW ROUTE MINIMUM LINE WIDTH MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP
ON LAYER?
TABLE_PHYSICAL_RULE_ITEM
PHYSICAL_RULE_SET LAYER ALLOW ROUTE MINIMUM LINE WIDTH MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP
ON LAYER?
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET LAYER ALLOW ROUTE MINIMUM LINE WIDTH MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP
ON LAYER?
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET LAYER ALLOW ROUTE MINIMUM LINE WIDTH MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP
ON LAYER?
TABLE_PHYSICAL_RULE_ITEM
NET_TYPE
50_OHM_SE TOP,BOTTOM Y 0.090 MM 0.090 MM
TABLE_PHYSICAL_RULE_ITEM
ELECTRICAL_CONSTRAINT_SET PHYSICAL SPACING
USB_CAMERA_P
C 2X_DIELECTRIC * 0.254 MM ?
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
USB_CAMERA
USB_CAMERA
USB_90D
USB_90D
USB
USB USB_CAMERA_N
3 6
3 6
C
4X_DIELECTRIC * 0.508 MM ? USB_CAMERA USB_90D USB USB_CAMERA_CONN_P 6
TABLE_SPACING_RULE_HEAD TABLE_SPACING_RULE_HEAD
SPACING_RULE_SET LAYER LINE-TO-LINE SPACING WEIGHT SPACING_RULE_SET LAYER LINE-TO-LINE SPACING WEIGHT HDA_BIT_CLK HDA_55S HDA HDA_BIT_CLK 6 7
TABLE_SPACING_RULE_ITEM TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_HEAD
SMB * =2x_DIELECTRIC ?
PHYSICAL_RULE_SET LAYER ALLOW ROUTE MINIMUM LINE WIDTH MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAP
ON LAYER?
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_RULE_HEAD
HDA * =2x_DIELECTRIC ?
A SYNC_MASTER=(K24_MLB) SYNC_DATE=(04/06/2009) A
PAGE TITLE