Cypress Semiconductor’s

Programmable System-on-a-Chip (PSoC)

Overview

Doug Densmore – UC Berkeley

Barbara Schremp, Michael LaBouff, Sanjay Rekhi
Cypress Semiconductor
November 20, 2002

DUSD(Labs)
Outline

uCSA Motivations

uPSoC Background

uOverview
s Hardware and Applications

uSystem Details

uProgramming Model

uCSA Questions

uConclusions and Future Work

 CSA Motivation

uWe have been examining architectures and applications to

gain insight into programming environments for
Concurrent Systems Architectures.
uWe have looked primarily at high performance products
with specific application areas.
uCypress’ PSoC is aimed at the low end, embedded
microcontroller market.
s Cost ($2-3.50*) per device; Free software updates

* http://www.ebnonline.com
CSA Motivation
Architecture Type Context Presented

Philips Nexperia Multimedia Processor MPEG2 Decoding

C-Port C5 Network Processor IPv4 Forwarding

Intel IXP1200 Network Processor Architecture Abstraction

Broadcom Calisto Gateway-

Gateway-on-
on-a-Chip Architecture Overview

Virtex-
Virtex-II Pro Power PC + FPGA Mixed Version IP Router

iWarp Cell architecture Architecture Overview

RAW Tiled architecture Architecture Overview

Cypress PSoC Reconfigurable Microcontroller Architecture Overview

Tensilica Xtensa Reconfigurable RISC

?

Green – Application Specific; Blue – Generic

CSA Motivation

uExamine what is exposed to the programmer via both the

GUI provided for reconfiguring the part and the
interconnect, and the software environment for
programming it.
uIdentify the primitive components and identify their
interaction.
uExamine the mindset of someone working with the PSoC
and their design process.
Background

uDeveloped by Cypress Microsystems, a subsidiary of

Cypress Semiconductor. Acquired March 6th, 2000.
uPSoC Released November 13, 2000
s “As general purpose solutions, PSoC devices are targeted for
implementation in embedded applications, including audio,
wireless, handheld, data communications, Internet control,
industrial, and consumer systems. “
uNamed Innovation of the Year 2001 by EDN Magazine.

uBerkeley provided with a PSoC development kit as member

of GSRC.
http://www.cypressmicro.com
Hardware Overview
u Harvard Architecture Processor
s M8C; Up to 24MHz; Flexible Addressing modes
s Separate MAC; 8x8 multiply, 32 bit accumulate

u On Chip Memory
s Flash 4k to 16k - SONOS™-
SONOS™-based (Silicon Oxide Nitride Oxide Silicon)
s 256 Bytes SRAM
s EEPROM Emulation in Flash

u Programmable System on a Chip Blocks

s 12 Analog Blocks
s 8 Digital Blocks
Hardware Overview

uProgrammable Pin Configurations

s Interrupt on pin change

uPrecision, Programmable Clocking

s External 32kHZ clock

uDedicated Peripherals
s Watchdog and Sleep Timers
s Low Voltage Detection
s On-Chip voltage references

u“Complete” Software Development tools

Application Space Overview

uCompany Line*
s “PSoC™ Devices Integrate Programmable Analog and Digital
Functions To Simplify Design Of Wireless, Handheld, Data
Communications, and Industrial Systems”

uSample Application Notes

s Range Finder
s 1-GHz Vectorial Network Analyzer
s Remote Human Health Monitoring System

uDynamic reconfiguration is a key application point.

http://www.cypressmicro.com
System Overview
uKeys to note:
s Programmable interconnect
s Digital PSoC Blocks
s Analog PSoC Blocks
s Separate MAC
s Static Peripherals
t LVD, Decimator, etc

uExposed to Programmer
through “Module Placement
view”
uExposed to Programmer
through “Application View”
http://www.cypressmicro.com
 *Have in Embedded Systems Lab
Device Family Features
CY8C25122 CY8C26233 CY8C26443* CY8C26643
Operating Frequency 93.7kHz-
93.7kHz-24MHZ 93.7kHz-
93.7kHz-24MHZ 93.7kHz-
93.7kHz-24MHZ 93.7kHz-
93.7kHz-24MHZ
Operating Voltage 3.0-
3.0-5.25V 3.0-
3.0-5.25V 3.0-
3.0-5.25V 3.0-
3.0-5.25V
Program Memory (KB) 4 8 16 16
Data Memory (Bytes) 256 256 256 256
Digital PSOC Blocks 8 8 8 8
Analog PSOC Blocks 12 12 12 12
I/O Pins 6 16 24 40/44

External SMP
No Yes Yes Yes

Available Packages 8 PDIP 20 PDIP 28 PDIP 48 PDIP

20 SOIC 28 SOIC 48 SSOP
20 SSOP 28 SSOP 44 TQFP
http://www.cypressmicro.com
Development Kit ($147)
uIn-Circuit-Emulator (ICE)
s Provides debugging capabilities.
uY-Programmer
s Download configurations and
code to device; supports DIP
packages.
packages. Orlin Technology’s OTPSoC; Not included

uPOD, Pup, and Foot

s Bar LED and DIP Foot, POD rev E
uSamples
s 2 CY8C26443

uDevelopment Software
s Version 3.20 latest; have 3.10

Red is in embedded Systems Lab

Development Kit
M8C CPU Data
CPU
Program
Mem Mem

u8-bit, Harvard Architecture Microprocessor

uFive Hardware Registers

s Flags (F) – 3 Status Bits, Global Interrupt Bit, XIO (reg bank
switch)
s Program Counter (PC)– 16 bit; Full addressing of the 16K FLASH
s Accumulator (A)
s Stack Pointer (SP)
s Index (X) – Used in addressing Modes; Often used by peripherals
M8C CPU Address Space

http://www.cypressmicro.com
M8C Addressing Modes
u 10 Addressing Modes
s Source Immediate – ADD A, 7
s Source Direct – ADD A, [7]
s Source Indexed – ADD A, [X+7]
s Destination Direct - ADD [7], A
s Destination Indexed – ADD [X+7], A
s Destination Direct Source Immediate – ADD [7], 5
s Destination Indexed Source Immediate – ADD [X+7], 5
s Destination Direct Source Direct – ADD [7], [5]
s Source Indirect Post Increment – MVI A,[7]
s Destination Indirect Post Increment - MVI [7], A
M8C Instruction Set

uSupports a total of 256 instructions

s Divided into 37 instruction types
u Instructions take from 4 (ADD A, expr) to 15 (SSC) cycles.

u 1-3 Byte instructions

s 2 are the most prevalent, followed by 3 and then 1
u 7 instruction formats

uNotable instructions
s System Supervisor Call (SSC), INDEX (Relative Table Read;
Moves ROM into RAM; 13 cycles)
Digital Blocks

uTotal of 8, 8-bit digital blocks

s Four Digital Basic Type A (DBA) and four Digital Communications
Type A (DCA)
s Each can be configured independently or in combination
s Each have a unique Interrupt Vector and Interrupt Enable bit
uThree Configuration Registers to program
s Function Register – function and mode
t Timer, Counter, CRC/PRS, Deadband (for PWM), UART, Serial Peripheral
Interface (SPI)
s Input Register – data input and clock selection
s Output Register – select and enable outputs
Digital Blocks

uThree Data Registers

s Data0, Data1, Data2 – function dependent

uOne Control Register

uSample Register

uExposed in the “Module Placement View “

http://www.cypressmicro.com
Digital Block Topology

http://www.cypressmicro.com
Analog Blocks

u12 analog blocks

s 4 Continuous Time Blocks, 4 Type A Switched Capacitor, and 4
Type B Switched Capacitor

uThree Distinct outputs from each analog block

s The analog output bus (ABUS) shared by all blocks in analog
column.
s The comparator bus (CBUS) which is a digital resource shared by
all blocks in a column.
s The output bus (Out) which is shared by all blocks in the column
and can be reconfigured to send a signal externally.
Analog Blocks

uAnalog Block Registers

s Analog Column Clock Select Register
s Analog Reference Control Register
s Analog Clock Select Register
s Control0, Control1, Control2 Registers (Control3 for SwCap Blks)

uExposed in the “Module Placement View “

Analog Blocks

http://www.cypressmicro.com Switched Capacitor Type A Block

Analog Block Topology

http://www.cypressmicro.com
User Modules
PSoC Blocks Memory
uUser modules are what the
(Bytes)
programmer really sees when 12-
12-Bit ADC 2D, 1A 184 Flash
configuring the device. 6 SRAM
Programmable 1A CT 32 Flash
uCould be considered a primitive
Gain Amp
component along with the M8C 8-bit Counter 1D 66 Flash
and static peripherals.
6-Bit DAC 1A SwCp 47 Flash
uCurrent User Modules (sample
in table). 16-
16-bit CRC 2D 56 Flash

uNew modules in software Two Pole Band 2A SwCp 29 Flash

Pass Filter
updates.
16-
16-bit PWM 2D 115 Flash
Programming Model

uWindows based graphical programming environment both

for the configuration of the reconfigurable blocks and
interconnect, as well as the development of the software.
uMultiple Editors (“Views”)
s Device Editor
s Application Editor
s Debugger
Device Editor

uUser Module Selection View – select amongst the provided

user modules. View datasheet and schematic information
as well as the status of global resources (RAM, ROM,
Reconfigurable Blocks).
uModule Placement View – assign the user modules to
reconfigurable blocks. Configure the interconnect between
modules and the module parameters.
uPinout View –the pinout of the package selected. Assign
global buses to pins and activate interrupts on pins.
Application Editor

uOnce you “Generate an Application”, assembly code

libraries are generated which provide the functionality for
the user modules you have selected.
uThis view allows you to modify the “main” program as well
as the interrupt routine you wish so that you can program
the device.
uDone in assembly or C (C compiler sold separately; $145).
Debugger

uTypical debugger in which you can set breakpoints,

observe variables, monitor global resources (RAM, ROM,
Registers), and observe which configuration you are in.
uConnect to the ICE (through parallel port EPP mode).

uDownload configurations and code to the part.

Dynamic Reconfiguration

uIn the Module Selection view, you can import (or export)
configurations.
uConfigurations consist of user modules, their
interconnections, and their parameters.
uThen at runtime you can swap to another configuration via
call UnloadConfig_newled_proj
call LoadConfig_dynamic_improved

u This amounts to swapping out and reloading of the PSoC block

registers mentioned earlier.
s Stores the configurations in FLASH
s 100+ cycles (best guess)
Exporting Features to the Programmer

uUser Modules, Interconnect, Pin Assignment, M8C ISA,

Select Global Resources directly available through GUI.
s Define the topology of the chip
uPSoC Register Space can be accessed via individual
programming.
s With understanding of PSoC analog blocks you can create new
“user modules” or modify existing ones.
uAssembly gives you “lowest level access” to the
programming of M8C
s Have not used the C Complier
Programmer’s Thought Process
u Need to identify what user modules are required for a particular
application.
s There are certain modules which an application requires by default.
default.
u Peripherals that need to directly interact should be in the same
configuration.
s Must meet PSoC block constraints
u Generate configuration and use the provided APIs to program the
application.
u Programming the application
s Can use the resources to model the application as you choose
s C or M8C Assembly

u Program the part; test; iterate

CSA Model Support Examples

uPipe and Filter

s Peripherals (Filters); Reconfigurable Interconnect (Pipe)
s Can chain peripherals together

uProcess Control Systems

s Provide dynamic control from some plant
s Inputs received by peripherals, State in memory, Output via
peripherals
Exploiting Features of Hardware

uRequires you to completely define the relationships

between the user modules yourself.
s As opposed to having some tool help you optimize this in
someway.
s In contrast to RAW in which the compiler utilizes the hardware
efficiently.

uLibrary Routines automatically provided for software

programming.
Component Interaction

uLimited by which PSoC blocks the modules are placed on.

s May not have run out of blocks yet not be able to realize a
particular connection.

uDepending on the modules, they may communicate

through memory, pins, buses, or M8C register space.
uWhile they are able to function on their own, most
peripherals require the use of the M8C and interrupts.
PSoC Strengths

uVery Easy to configure both the reconfigurable blocks and

interconnect.
s GUI provides the programmer quick access to the majority of
primitives.

uTools automatically generate peripheral functions and

configuration macros.
s Just cut and paste

uMinutes to iterate through the design process

s Designer limited; not tool chain limited
PSoC Weaknesses

uWhile most features are available, if you want finer

granularity it either is not possible or you must set
registers manually.
s Wrong Primitives? Finite (read small) number of possibilities?
uWorking at a very low level of abstraction
s Assembly, interconnect
s Tools do not really help make design tradeoff decisions
uSmall amount of SRAM

uM8C not very powerful; potentially awkward

PSoC Conclusions

uPSoC provides a very flexible way in which to customize a

low end embedded microcontroller.
uGives the programmer access to most all reconfigurable
feature directly through a GUI
uTool generates substantial amount of peripheral code
automatically.
uDevelopment, testing, and implementation time is really a
function of the user, not the tool chain.
CSA Conclusions

uProgramming Model
s GUI and Automatically generated peripheral routines and
configuration calls.
uProgrammers’ Thought Process
s Application - User Modules – Connection – Application Code –
Test
uExport features either at high level (GUI) or low level (ASM)

uPrimitives
s User modules (perhaps PSoC Blocks), M8C, Memory,
Interconnect
Future Work

uCurrently creating tools to get performance estimations

from the PSoC
s ACE – Assembly Code Estimator – determines how many cycles
code will require.
s PET – Peripheral Estimator Tool – determines if a particular
configuration can be realized on the PSoC blocks and if so, which
inputs will be available.

uRough Constraints Framework

s Set of inequalities relating hardware resources
Questions?

Thanks to:
Cypress Semiconductor

DUSD(Labs)