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5 4 3 2 1

Table of Contents Revisions


Rev Description Date
2 Notes Approved

3 Block Diagram B Production Release 14-JUN-12 J.H.


4 MK21DN512 121BGA MCU & SKT
5 USB/OSBDM/V-TRAN/PWR
6 Peripherals
7 Sensors
8 Elevator Connectors

D D

C C

B B

A Microcontroller Solutions Group A

6501 William Cannon Drive West


Austin, TX 78735-8598

This document contains information proprietary to Freescale Semiconductor and shall not be used for
engineering design, procurement or manufacture in whole or in part without the express written permission
of Freescale Semiconductor.
ICAP Classification: FCP: ____ FIUO: X PUBI: ____
Designer: Drawing Title:
Jay Hartvigsen
TWR-K21D50M
Drawn by: Page Title:
Jay Hartvigsen Table of Contents/Revisions
Approved: Size Document Number Rev
Marilyn Hubbard C SCH-27405 PDF: SPF-27405 B

Date: Thursday, June 14, 2012 Sheet 1 of 8


5 4 3 2 1
5 4 3 2 1

1. Unless Otherwise Specified:


All resistors are in ohms
All capacitors are in uF
All voltages are DC
All polarized capacitors are aluminum electrolytic

2. Interrupted lines coded with the same letter or letter Power & Ground Nets
combinations are electrically connected.
NET VOLTAGE DESCRIPTION
D D
3. Device type number is for reference only. The number
varies with the manufacturer. P5V_USB 5V Primary input power. Filtered from USB connector. Input to USB power switch.
P5V_SW 5V Output of USB power switch controlled by the 5V_EN signal from the
4. Special signal usage: JM60 MCU. Used by OSBDM voltage translation circuits.
_B Denotes - Active-Low Signal
<> or [] Denotes - Vectored Signals P5V_TRG_USB 5V Output of USB power switch controlled by the VTRG_EN signal from
the JM60 MCU and the ELE_PS_SENSE signal from the TWR elevator
5. Interpret diagram in accordance with American connectors. Goes to regulator input select header.
National Standards Institute specifications, current
revision, with the exception of logic block symbology. USB0_VBUS 5V USB power from primary elevator Pin A57.
2. Net function indications:
Some nets have functions indicated in addition P5V_K21_USB 5V Secondary input power. Filtered from K21 micro AB USB connector. Goes to
to the net names. The net names are shown in regulator input select header
red and the MCU functions associated with the
net are shown in blue. If a net has no blue VOUT_3V3 3.3V VDD power from the regulator internal to the MCU.
function shown the net name indicates the P5V_ELEV 5V Power to the elevator boards.
associated function.
P3V3 3.3V Output of 3.3V regulator or from the Elevator connectors. May also be
supplied externally by connecting to the board voltage select header at
pins 1 and 4.
C C

P1V8 1.8V Output of the 1.8V regulator.


Power Flow
V_BRD 1.8 -3.3V Output of 1.8v or 3.3V regulators as selected by the board voltage select
header. May also be supplied externally by connecting to the board
voltage select header at pins 3 and 4.

VREG_IN 5V Power into the on board voltage regulators.

K21_VREGIN 5V Power into the K21 MCU voltage regulator. It is typically derived from the
K21 USB connector or the elevator USB0_VBUS pin.

VBAT 1.8-3.3V Voltage to the battery input of the MCU. The value depends on whether
the board is powered and at what value and the setting of the shunt that
selects the source of the battery voltage.
MCU_PWR 1.8-3.3V MCU digital power. Filtered from V_BRD
VDDA 1.8-3.3V VDDA power for MCU and analog circuits. Filtered from MCU_PWR.

GND 0V Digital and Analog Ground.


B B

A A

ICAP Classification: FCP: ___ FIUO: X PUBI: ___


Drawing Title:
TWR-K21D50M
Page Title:
Notes
Size Document Number Rev
C SCH-27405 PDF: SPF-27405 B

Date: Thursday, June 14, 2012 Sheet 2 of 8


5 4 3 2 1
5 4 3 2 1

D D

Sheet 4 Sheet 5 Sheet 6

OSJTAG/USB Bridge Circuit


MCF51JF128 MCU SDHC Memory Socket

8 MHz XTAL USB Micro B Connector


IRQ Push Buttons
MC9S08JM60
32.768 KHz XTAL K21 USB Micro AB
Voltage Translation Connector with
VDDA/VREFH filter Power Switch
USB Power Switch
VREF_OUT GPIO Header
OSJTAG AND EZPORT Header
VREGIN, VOUT33

VBAT Coin Cell Circuit Power Supply Circuits


C
Sheet 7 C

TAMPER Header Regulator Input Header

Regulator Output Header


TOWER PLUG-IN (TWRPI)
3.3V and 1.8V Regulators GENERAL PURPOSE HEADERS

ANALOG INPUTS

MMA7660 ACCELEROMETER

POTENTIOMETER

LEDs

B Sheet 8 B

ELEVATOR CONNECTORS

A A

ICAP Classification: FCP: ___ FIUO: X PUBI: ___


Drawing Title:
TWR-K21D50M
Page Title:
Block Diagram
Size Document Number Rev
C SCH-27405 PDF: SPF-27405 B

Date: Thursday, June 14, 2012 Sheet 3 of 8


5 4 3 2 1
5 4 3 2 1

VOUT_3V3

V_BRD
TP2 MCU_PWR
J8 DNP
1 L201
Default: 1-2 2 MCU_PWR_J 2 1
(use V_BRD) 3
100 OHM@100MHZ
HDR TH 1X3
C219 C215 C214 C221
0.1UF 0.1UF 0.1UF 0.1UF
D D

J7 VDDA
1
2016/25/32 2 Default: 1-2 L200
TP9
3V Coin Cell 2
3 (use MCU_PWR) 2 1 VDDA

HDR TH 1X3 100 OHM@100MHZ


BT200+ 3 VBATD
- 1
3 2 VCOIN 1 D200 VBAT
BAT54C C211
C220 0.1UF
BK-883
R228 0.1UF
1.0M

L10
K6

E7
E6
E5
F5

F6
U6
K21_VREGIN 5
JP1 C209 0.1UF

NC_E7
VDD1
VDD2
VDD3
VDDA

VSSA
VBAT
1 TAMPER0 L7 G5
2 TAMPER1 H5 TAMPER0/RTC_WAKEUP VREFH TP6
Default: 2-3 3 TAMPER2 J5 TAMPER1 G6 DNP
4 TAMPER3 H6 TAMPER2 VREFL
5 TAMPER4 J9 NC_H6 L3 VREF_OUT VOUT_3V3
NC_J9 VREF_OUT/CMP1_IN5/CMP0_IN5 VOUT_3V3 5
6 TAMPER5 J4
NC_J4
HDR 1X6 C210 C208 C207
ADC0_DP1 H1 0.1UF 2.2UF 0.1UF
6 ADC0_DP1 NC_H1
ADC0_DM1 H2 G2 K21_VREGIN
6 ADC0_DM1 NC_H2 VREGIN
G1 VOUT_3V3
ADC0_DP0 K1 VOUT33
7,8 ADC0_DP0 ADC0_DP0
ADC0_DM0 K2
7,8 ADC0_DM0 ADC0_DM0 PTC[0..19] 6,7,8
B9 PTC0/FBa_AD14/I2S0_TXD1 PTC0
ADC1_DP1 J1 PTC0/ADC0_SE14/SPI0_PCS4/PDB0_EXTRG/I2S0_TXD1 D8 FTM0_CH0/FBa_AD13/I2S0_TXD0 PTC1
C C
6 ADC1_DP1 NC_J1 PTC1/LLWU_P6/ADC0_SE15/SPI0_PCS3/UART1_RTS/FTM0_CH0/I2S0_TXD0
ADC1_DM1 J2 C8 FTM0_CH1/FBa_AD12 PTC2
6 ADC1_DM1 NC_J2 PTC2/ADC0_SE4b/CMP1_IN0/SPI0_PCS2/UART1_CTS/FTM0_CH1/I2S0_TX_FS B8 FTM0_CH2/CLKOUT PTC3
PTC3/LLWU_P7/CMP1_IN1/SPI0_PCS1/UART1_RX/FTM0_CH2/CLKOUTa/CLKOUT/I2S0_TX_BCLK A8 FTM0_CH3/FBa_AD11 PTC4
ADC1_DP0/ADC0_DP3 L1 PTC4/LLWU_P8/SPI0_PCS0/UART1_TX/FTM0_CH3/CMP1_OUT D7 PTC5/I2S0_RXD0/FBa_AD10 PTC5
7,8 ADC1_DP0/ADC0_DP3 ADC0_DP3 PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/I2S0_RXD0/CMP0_OUT/FTM0_CH2
ADC1_DM0/ADC0_DM3 L2 C7 PTC6/LLWU_P10/I2S0_RX_BCLK/FBa_AD9 PTC6
8 ADC1_DM0/ADC0_DM3 ADC0_DM3 PTC6/LLWU_P10/CMP0_IN0/SPI0_SOUT/PDB0_EXTRG/I2S0_RX_BCLK/I2S0_MCLK B7 PTC7/I2S0_RX_FS/FBa_AD8 PTC7
PTC7/CMP0_IN1/SPI0_SIN/USB_SOF_OUT/I2S0_RX_FS A7 PTC8/I2S0_MCLK/FBa_AD7 PTC8
ADC0_SE16 H3 PTC8/CMP0_IN2/I2S0_MCLK D6 PTC9/FBa_AD6 PTC9
6 ADC0_SE16 NC_H3 PTC9/CMP0_IN3/I2S0_RX_BCLK/FTM2_FLT0
ADC1_SE16/ADC0_SE22 J3 C6 PTC10/I2C1_SCL/FBa_AD5 PTC10
6 ADC1_SE16/ADC0_SE22 NC_J3 PTC10/I2C1_SCL/I2S0_RX_FS C5 I2C1_SDA/I2S0_RXD1/FBa_RW_B PTC11
DAC0_OUT PTC11/LLWU_P11/I2C1_SDA/I2S0_RXD1 B6 FBa_AD27 PTC12
8 DAC0_OUT DAC1_OUT K5 PTC12 A6 FBa_AD26 PTC13
8 DAC1_OUT K4 DAC0_OUT/CMP1_IN3/ADC0_SE23 PTC13 A5 FBa_AD25 PTC14
NC_K4 NC_A5 B5 FBa_AD24 PTC15
5,6,8 PTA[0..29] NC_B5 D5 PTC16
DNP PTA0 JTAG_TCLK/SWD_CLK/EZP_CLK J6 PTC16/UART3_RX C4 PTC17
CLKIN0 0 R232 PTA1 JTAG_TDI/EZP_DI H8 PTA0/JTAG_TCLK/SWD_CLK/EZP_CLK/UART0_CTS/UART0_COL/FTM0_CH5 PTC17/UART3_TX B4 PTC18
7,8 CLKIN0 PTA1/JTAG_TDI/EZP_DI/UART0_RX/FTM0_CH6 NC_B4
PTA2 JTAG_TDO/TRACE_SWO/EZP_DO/FTM0_CH7 J7 A4 PTC19
PTA3 JTAG_TMS/SWD_DIO H9 PTA2/JTAG_TDO/TRACE_SWO/EZP_DO/UART0_TX/FTM0_CH7 NC_A4
PTA3/JTAG_TMS/SWD_DIO/UART0_RTS/FTM0_CH0 PTD[0..15] 6,7,8
8MHz_EXTAL R229 PTA4 EZP_CS_B J8
0 PTA5 K7 PTA4/LLWU_P3/NMI/EZP_CS/FTM0_CH1 D4 SPI0_PCS0/FBa_ALE PTD0
V_BRD PTA5/USB_CLKIN/FTM0_CH2/I2S0_TX_BCLK/JTAG_TRST PTD0/LLWU_P12/SPI0_PCS0/UART2_RTS D3 SPI0_SCK/FBa_CS0_B PTD1
PTD1/ADC0_SE5b/SPI0_SCK/UART2_CTS
1

PTA12 CAN0_TX/FTM1_CH0 K8 C3 SPI0_SOUT/FBa_AD4 PTD2


X200 R230 PTA13 CAN0_RX/FTM1_CH1 L8 PTA12/FTM1_CH0/I2S0_TXD0/FTM1_QD_PHA PTD2/LLWU_P13/SPI0_SOUT/UART2_RX/I2C0_SCL B3 SPI0_SIN/FBa_AD3 PTD3
2 1.0M PTA14 PTA14/UART0_TX K9 PTA13/LLWU_P4/FTM1_CH1/I2S0_TX_FS/FTM1_QD_PHB PTD3/SPI0_SIN/UART2_TX/I2C0_SDA A3 PTD4/SPI0_PCS1/FBa_AD2 PTD4
8.00MHZ PTA14/SPI0_PCS0/UART0_TX/I2S0_RX_BCLK/I2S0_TXD1 PTD4/LLWU_P14/mADC0_SE21/SPI0_PCS1/UART0_RTS/FTM0_CH4/EWM_IN
DNP R231 PTA15 PTA15/UART0_RX L9 A2 PTD5/FBa_AD1 PTD5
0 PTA16 J10 PTA15/SPI0_SCK/UART0_RX/I2S0_RXD0 PTD5/ADC0_SE6b/SPI0_PCS2/UART0_CTS/UART0_COL/FTM0_CH5/EWM_OUT B2 PTD6/FTM0_CH6/FBa_AD0 PTD6
DNP PTA17 H10 PTA16/SPI0_SOUT/UART0_CTS/UART0_COL/I2S0_RX_FS/I2S0_RXD1 PTD6/LLWU_P15/ADC0_SE7b/SPI0_PCS3/UART0_RX/FTM0_CH6/FTM0_FLT0 A1 PTD7
R234
3

EXTAL0 L11 PTA17/SPI0_SIN/UART0_RTS/I2S0_MCLK PTD7/mADC0_SE22/CMT_IRO/UART0_TX/FTM0_CH7/FTM0_FLT1


0 PTA18/EXTAL0/FTM0_FLT2/FTM_CLKIN0
8MHz_XTL XTAL0 K11 A9 PTD9
PTA19/XTAL0/FTM1_FLT0/FTM_CLKIN1/LPTMR0_ALT1 NC_A9 B1 PTD10
PTA29 H11 NC_B1 C2 PTD11
NC_H11 NC_C2 C1 PTD12
6,7,8 PTB[0..23] NC_C1 D2 PTD13
PTB0 ADC0_SE8 G11 NC_D2 D1 PTD14
PTB1 ADC0_SE9 G10 PTB0/LLWU_P5/ADC0_SE8/I2C0_SCL/FTM1_CH0/FTM1_QD_PHA NC_D1 E1 PTD15
R233 PTB2 ADC0_SE12 G9 PTB1/ADC0_SE9/I2C0_SDA/FTM1_CH1/FTM1_QD_PHB NC_E1
B PTB2/ADC0_SE12/I2C0_SCL/UART0_RTS/FTM0_FLT3 PTE[0..19] 5,6,8 B
0 PTB3 PTB3/ADC0_SE13 G8
DNP PTB3/ADC0_SE13/I2C0_SDA/UART0_CTS/UART0_COL/FTM0_FLT0 E4 PTE0/SDHC0_D1/TRACE_CLKOUT/RTC_CLKOUT PTE0
PTB6 F11 PTE0/mADC0_SE10/SPI1_PCS1/UART1_TX/TRACE_CLKOUT/I2C1_SDA/RTC_CLKOUT E3 SDHC0_D0/TRACE_D3 PTE1
PTB7 E11 NC_F11 PTE1/LLWU_P0/mADC0_SE11/SPI1_SOUT/UART1_RX/TRACE_D3/I2C1_SCL/SPI1_SIN E2 SDHC0_DCLK/TRACE_D2 PTE2
PTB8 D11 NC_E11 PTE2/LLWU_P1/ADC0_DP2/mADC0_DP1/SPI1_SCK/UART1_CTS/TRACE_D2 F4 SDHC0_CMD/TRACE_D1 PTE3
PTB9 SPI1_PCS1 E10 NC_D11 PTE3/ADC0_DM2/mADC0_DM1/SPI1_SIN/UART1_RTS/TRACE_D1/SPI1_SOUT H7 SDHC0_D3/TRACE_D0 PTE4
PTB10 SPI1_PCS0/FBa_AD19 D10 NC_E10 PTE4/LLWU_P2/SPI1_PCS0/UART3_TX/TRACE_D0 G4 PTE5/SDHC0_D2 PTE5
PTB11 SPI1_SCK/FBa_AD18 C10 PTB10/SPI1_PCS0/UART3_RX/FTM0_FLT1 PTE5/SPI1_PCS2/UART3_RX F3 PTE6
PTB12 PTB12/FTM0_CH4 B11 PTB11/SPI1_SCK/UART3_TX/FTM0_FLT2 NC_F3
PTB13 PTB13/FTM0_CH5 C11 PTB12/UART3_RTS/FTM1_CH0/FTM0_CH4/FTM1_QD_PHA K3 UART2_TX PTE16
PTB13/UART3_CTS/FTM1_CH1/FTM0_CH5/FTM1_QD_PHB PTE16/ADC0_SE4a/SPI0_PCS0/UART2_TX/FTM_CLKIN0/FTM0_FLT3 H4 UART2_RX PTE17
PTB16 SPI1_SOUT/FBa_AD17 B10 PTE17/ADC0_SE5a/SPI0_SCK/UART2_RX/FTM_CLKIN1/LPTMR0_ALT3 A11 UART2_CTS_B PTE18
PTB17 SPI1_SIN/FBa_AD16 E9 PTB16/SPI1_SOUT/UART0_RX/FTM_CLKIN0/EWM_IN PTE18/ADC0_SE6a/SPI0_SOUT/UART2_CTS/I2C0_SDA A10 UART2_RTS_B PTE19
PTB18 I2S0_TX_BCLK/FBa_AD15 D9 PTB17/SPI1_SIN/UART0_TX/FTM_CLKIN1/EWM_OUT PTE19/ADC0_SE7a/SPI0_SIN/UART2_RTS/I2C0_SCL
PTB19 I2S0_TX_FS/FBa_OE_B C9 PTB18/FTM2_CH0/I2S0_TX_BCLK/FTM2_QD_PHA
PTB20 FBa_AD31 F10 PTB19/FTM2_CH1/I2S0_TX_FS/FTM2_QD_PHB PIN FUNCTIONS USED NET NAMES
PTB21 FBa_AD30 F9 NC_F10
PTB22 PTB22/FBa_AD29 F8 NC_F9
PTB23 PTB23/FBa_AD28 E8 NC_F8
NC_E8
NET NAMES PIN FUNCTIONS USED
C218 18PF EXTAL32 L5
XTAL32 L4 EXTAL32
XTAL32
1

DNP
Y200
J11
32.768KHz RESET

K21_USB_DP F1
2

C212 18PF K21_ USB_DN F2 USB0_DP


NC_F7

USB0_DM
VSS2
VSS4
VSS1
VSS3

DNP

RESET_B MK21DN512VMB5
5,7,8 RESET_B
F7
G7
L6
G3
K10

If using the K21 micro USB connector leave


A R225 33 A
6 K21_MICRO_USB_DP
R227 33 the 33 ohm resistors on nets K21_MICRO_USB_DP
6 K21_MICRO_USB_DN and K21_MICRO_USB_DN and do not populate the
resistors on USB0_DP and USB0-_DN.

If using the Tower USB install the 33 ohm


resistors on nets USB0_DP and USB0_DN and
R224 33 DNP remove the resistors on nets K21_MICRO_USB_DP ICAP Classification: FCP: ___ FIUO: X PUBI: ___
8 USB0_DP
R226 33 DNP Drawing Title:
8 USB0_DN and K21_MICRO_USB_DN.
TWR-K21D50M
Page Title:
K21D50M 121BGA MCU
Size Document Number Rev
C SCH-27405 PDF: SPF-27405 B

Date: Thursday, June 14, 2012 Sheet 4 of 8


5 4 3 2 1
5 4 3 2 1

R11 V_BRD
4,6,8 PTA[0..29]
10.0K
MCU_PWR MCU_PWR PIN FUNCTIONS USED NET NAMES
P5V_TRG_USB J1
1 2 JTAG_TMS/SWD_DIO PTA3
R215 3 4 JTAG_TCLK/SWD_CLK/EZP_CLK PTA0
10.0K 5 6 JTAG_TDO/TRACE_SWO/EZP_DO PTA2
DNP 8 JTAG_TDI/EZP_DI PTA1
J6
PTA4 EZP_CS_B R216 0 EZP_CSR_B KEY - PIN 7 9 10 RESET_B
2 11 12 TRACE_CLKOUT PTE0
Default: no shunt 1 TGT_PWR 13 14 TRACE_D0 PTE4
(Disconnect Target Power) 15 16 TRACE_D1 PTE3
17 18 TRACE_D2 PTE2
HDR 1X2 TH JTAG/EZPORT 19 20 TRACE_D3 PTE1

HDR_19P
4,6,8 PTE[0..19]
D D
4,7,8 RESET_B

V_BRD
JM[1..44]

C1
On Board OSJTAG/Serial Bridge 0.1UF

14
U2 PIN FUNCTIONS USED NET NAMES
P5V_USB 13

VCC
JM14 SCLK_OUT R19 4.99K 12 4OE 11 JTAG_TCLK PTA0
JM11 TCLK_EN 4A 4Y
OSJTAG Rev = 1 Board ID = 15
10 8 JTAG_TDI PTA1
JM13 DOUT 9 3OE 3Y
3A
R223 R221 R219 R201 R203 JM15 OUT_EN 4 6 JTAG_TMS PTA3
10.0K 10.0K 10.0K 10.0K 10.0K JM26 BRK_TMS 5 2OE 2Y
2A R21
DNP DNP
0
JM34 TXD_RXD_EN 1 3 BRDG_RXD UART2_RX PTE17

GND
V_BRD OSBDM_REV2 JM42 JM8 T_TXD1 2 1OE 1Y
OSBDM_REV1 JM41 1A
OSBDM_REV0 JM40 SN74LVC126APWG4

7
R200 BRD_ID1 JM27 V_BRD
10.0K P5V_USB BRD_ID0 JM25 UART/USB
U5
P5V_SW V_BRD BRIDGE
VTRG_IN JM28 R222 R220 R217 R202 R204 R20
10.0K 10.0K 10.0K 1.3K 18K 5 1 10.0K
C205 C206 C200 DNP DIR VCCA 6
10UF 0.1UF 0.1UF VCCB R38
0
JM9 T_RXD1 3 4 BRDG_TXD UART2_TX PTE16
2 A B
GND PIN FUNCTIONS USED NET NAMES

16
31
U200
SN74LVC1T45
V_BRD

VDD1
VDDAD/VREFH
C C
JM8 T_TXD1 8 23 5V_EN JM23
JM9 T_RXD1 9 PTE0/TxD1 PTB0/MISO2/ADP0 24 VTRG_EN JM24 P5V_SW V_BRD
10 PTE1/RxD1
PTE2/TPM1CH0
PTB1/MOSI2/ADP1
PTB2/SPSCK2/ADP2
25 BRD_ID0 JM25 U4 R36 TDO
JM11 TCLK_EN 11 26 BRK_TMS JM26 5 1 10.0K
JM12 DIN 12 PTE3/TPM1CH1 PTB3/SS2/ADP3 27 BRD_ID1 JM27 DIR VCCA 6
PTE4/MISO1 PTB4/KBIP4/ADP4 VCCB R39
JM13 DOUT 13 28 VTRG_IN JM28
PTE5/MOSI1 PTB5/KBIP5/ADP5 0
JM14 SCLK_OUT 14 JM12 DIN 3 4 TDO_R JTAG_TDO PTA2
JM15 OUT_EN 15 PTE6/SPSCK1 2 A B P3V3
PTE7/SS1 40 OSBDM_REV0 JM40 GND V_BRD PIN FUNCTIONS USED NET NAMES
PTC0/SCL 41 OSBDM_REV1 JM41
PTC1/SDA SN74LVC1T45
4 42 OSBDM_REV2 JM42
5 PTF0/TPM1CH2 PTC2 43 R49
6 PTF1/TPM1CH3 PTC3/TxD2 1 TRESET_OUT JM1 R46 330
7 PTF4/TPM2CH0 PTC4 44 10.0K
PTF5/TPM2CH1 PTC5/RxD2 DNP

RSTR
JM21 5V_FAULT 21 29 TPWR_B JM29 R51 RESET_B
PTG0/KBIP0 PTD0/ADP8/ACMP+

3
JM22 VTRG_FAULT 22 30 STATUS_B JM30 10.0K 4 RESET
JM34 TXD_RXD_EN 34 PTG1/KBIP1 PTD1/ADP9/ACMP- 33 TRESET_IN JM33 JM1 TRESET_OUT RST_BD 1 Q1
35 PTG2/KBIP6 PTD2/KBIP2/ACMPO MMBT3904LT1G 3
MANUAL

A
JM60_XTAL 37 PTG3/KBIP7 C15

2
JM60_EXTAL 38 PTG4/XTAL 2 JM60_IRQ_B R50 0.1UF D7
PTG5/EXTAL IRQ/TPMCLK
RESET
3 10.0K 2 RESET ORANGE
36

JM60_RESET_B
VSSAD/VREFL

R14 10M VUSB3V3 20 BKGD/MS P5V_USB SW1


R214 33 JM60_DN 18 VUSB33 P5V_SW V_BRD 1 PB switch

C
U201
VSSOSC

R213 33 JM60_DP 19 USBDN


USBDP 5 1
VSS1

R37 DIR VCCA 6


Y2 4MHz 10.0K VCCB
1 2 MC9S08JM60CLD JM33 TRESET_IN 3 4 RESET_B
39
17
32

2 A B
GND

JM_BKGD C4
SN74LVC1T45 BOARD POWER SELECTOR TABLE
C2 C3 C202 C204 1000PF
Shunt V_BRD Source

(Disable Bootload)
18PF 18PF 10UF 0.1UF

Default: no shunt
B B

STATUS 1-2 VOUT_3V3 (from MCU)


D1 YEL/GRN P5V_USB
J5 JM30 STATUS_B R40 1.0K PU_ST C A
3-5 3.3V from regulator (default)
2
1

1 2 P5V_USB
3 4 D2 LED_YELLOW
5 6 J9 JM29 TPWR_B R41 1.0K PU_TP C A
J2 TP3 P5V_USB HDR 1X2 TH 5-7 1.8V from regulator
8

1050170001
DNP
HDR_2X3
JM60 TPWR
SHELL3

SHELL4

L1
JM21 5V_FAULT
1 USB_VBUS 1 2 Bootload V_BRD can also be sourced by removing all
VBUS 2 USB_DN JM60 BDM Enable JM22 VTRG_FAULT P5V_SW shunts and applying an external supply
D- 3 USB_DP
D+
ID
4 330 OHM voltage to pin 5 with the associated GND
5 R206 10.0K 5V_EN JM23 U202
SHELL2

SHELL1

GND U3 TP12 TP5 TP13 TP8 JM23 5V_EN 1 2 TP4 connected to pin 6.
ENA FLGA
2

SP0503B
R205 10.0K VTRG_EN JM24
JM24 VTRG_EN R218 2.2K 4 3
DNP (Note that the RESET LED (sheet 5), the four
ENB FLGB user LEDs (sheet 7), and the accelerometer
7

7 8
IN OUTA (sheet 7) are powered by P3V3 and will not
L2
Q200 6 5 work when using only an external source.)
1

3 ELE_PS_B GND OUTB C5


USB-SHLD 1 2 ELE_PS_SENSE 1 MIC2026-1YM 10UF
R1
2
330 OHM TP7
8 ELE_PS_SENSE P5V_TRG_USB PDTC115T P5V_ELEV
D3 MSS1P3L
P5V_TRG_USB A C

K21_VREGIN
K21_VREGIN 4
VOUT_3V3 TP11
4 VOUT_3V3
Default: 3-5 V_BRD
(Power from R42
A TP10 P3V3 A
VSRC_SEL_LP 3.3V regulator) PU_PO_LED
Default: 1-2, 5-6

A
(Power from OSBDM USB J11
supports JF USB Host mode) 1 2 VREG_IN J17 270 YEL/GRN
3 4 C216 1 2 C19 C201 C203 C21 C222 D4
P5V_K21_USB 5 6 10UF 3 4 10UF 0.1UF 0.1UF 0.1UF 0.1UF
6 P5V_K21_USB
7 8 U203
4
U204
4
5 6
POWER ON
7 8 ICAP Classification: FCP: ___ FIUO: X PUBI: ___
TAB TAB

C
HDR_2x4 1 Drawing Title:
USB0_VBUS VIN 3 1 3 P1V8
8 USB0_VBUS OUTPUT IN OUT HDR_2x4 TWR-K21D50M
C213 Page Title:
VREG IN 10UF GND GND C217
SELECTOR MIC2920A-3.3WS MIC5239-1.8 10UF BOARD POWER Note that not all functions of the board will operate at 1.8V. OSJTAG/PWR/V-TRANSLATORS
2 2
SELECTOR Also, please check that tower boards used with this board Size
C
Document Number
SCH-26990 PDF: SPF-26990
Rev
B
(See Table) have the correct I/O voltages when this board is set to 1.8V.
Date: Thursday, June 14, 2012 Sheet 5 of 9
5 4 3 2 1
5 4 3 2 1

4,7,8 PTC[0..19]

D D
Note: this SDHC socket is powered by V_BRD which may be 1.8V or 3.3V.
No provision is made for dynamic switching between the two voltages.
Therefore, this interface may not work properly when the MCU is running
from 1.8V.
Interrupts
V_BRD V_BRD
4,5,8 PTE[0..19] SD Card
R47 SW3 PIN FUNCTIONS USED NET NAMES
10.0K P200DNP
NET NAMES PIN FUNCTIONS USED DNP 4 1 LLWU_P10 PTC6

PTE5 SDHC0_D2 9
PTE4 SDHC0_D3 1 DAT2 3 2

CD_WP_COMMON
PTE3 SDHC0_CMD 2 CD/DAT3
3 CMD PB switch
4 VSS1
PTE2 SDHC0_DCLK 5 VDD
6 CLK SW2

CD_SW
PTE1 SDHC0_D0 7 VSS2
DAT0

WP
PTE0 SDHC0_D1 8 4 1 PTC7
DAT1
C20

10
11
16
J16 DNP 10UF MMC-SD Connector 3 2
1 DNP
R58 10.0K D3PD 2 Default: None PB switch

DNP HDR 1X2 TH


NET NAMES PIN FUNCTIONS USED

PTC18 SD_CARD_DETECT

PTC19 SD_CARD_WP R44 4.70K SD_WP_R


C C
DNP

K21 USB Interface (Host or Device)

PTC8

U205
PTC9 K21_USB_ENA 1 2 K21_USB_FLGA
ENA FLGA
P5V_ELEV R236 10.0K K21_USB_ENB 4 3
ENB FLGB
2
1

2
1
R235
10.0K 7 8
J22 IN OUTA J23
HDR 1X2 TH 6 5 HDR 1X2 TH
Default: 1-2 GND OUTB
(Enable USB Power) MIC2026-1YM Default: 1-2
(Enable USB Flag)
S1
S3

L3
330 OHM
1 K21_USB_VBUS 1 2 P5V_K21_USB
P5V_K21_USB 5
5V

2 K21_MICRO_USB_DN
K21_MICRO_USB_DN 4
D-

3 K21_MICRO_USB_DP
K21_MICRO_USB_DP 4
D+

4 U8
ID

5 SP0503B
G

MICRO USB AB 5
B B
J19
L4
S2
S4

K21_USB_SHLD 1 2

PTD7 K21_USB_ID_J 330 OHM


2
1

J21
HDR 1X2 TH
4,5,8 PTA[0..29]
GPIO Header
PTA29

4,7,8 PTB[0..23]
J20
1 2 PTA29
PTB7 PTB7 3 4
PTB22 PTB22 5 6 ADC0_DP1
ADC0_DP1 4
PTB23 PTB23 7 8 ADC0_DM1
ADC0_DM1 4
9 10
PTC18 PTC18 11 12 ADC1_DP1
ADC1_DP1 4
PTC19 PTC19 13 14 ADC1_DM1
ADC1_DM1 4
15 16
PTD9 PTD9 17 18 ADC0_SE16
ADC0_SE16 4
PTD10 PTD10 19 20 ADC1_SE16/ADC0_SE22
ADC1_SE16/ADC0_SE22 4
PTD11 PTD11 21 22
PTD12 PTD12 23 24 PTD13

HDR_2X12
PTD13

A A
4,7,8 PTD[0..15]

ICAP Classification: FCP: ___ FIUO: X PUBI: ___


Drawing Title:
TWR-K21D50M
Page Title:
Peripherals
Size Document Number Rev
C SCH-27405 PDF: SPF-27405 B

Date: Thursday, June 14, 2012 Sheet 6 of 8


5 4 3 2 1
5 4 3 2 1

V_BRD

VDDA GENERAL PURPOSE


J10
Default: 1-2 1
TWRPI V_BRD V_BRD

V_BRD (Remove to measure 2 V_BRD


TWRPI current) R8
HDR 1X2 TH 0 R6 R7

GPT_VBRD
4.70K 4.70K
R10 P5V_ELEV R9

GPT_VDA
10.0K J4 10.0K J3
D D
PIN FUNCTIONS USED NET NAMES
1 2 1 2 Note: The TWRPI connectors are powered
3
5
4
6
PIN FUNCTIONS USED NET NAMES PTC10 I2C1_SCL 3
5
4
6
I2C1_SDA PTC11 by V_BRD which may be 1.8V or 3.3V.
7 8 TWRPI_ADC0 ADC0_SE8 PTB0 7 8
PTB1 ADC0_SE9 TWRPI_ADC1 9 10 PTB17 SPI1_SIN 9 10 SPI1_SOUT PTB16
11 12 TWRPI_ADC2 ADC1_DP0/ADC0_DP3 PTB10 SPI1_PCS0 11 12 SPI1_SCK PTB11 Not all TWRPI boards will work at 1.8V.
13 14 13 14
15 16 PTB3 TWRPI_GPIO0 15 16 TWRPI_GPIO1 PTC0
4,8 ADC0_DP0
ADC0_DP0 TWRPI_ID0 17 18 TWRPI_ID1 ADC0_DM0 PTC16 TWRPI_GPIO2 17 18 TWRPI_GPIO3 PTC17 Check that TWRPI boards will work at 1.8V
19 20 RESET_B 19 20 TWRPI_GPIO5 PTB12
NET NAMES PIN FUNCTIONS USED PTB13 TWRPI_GPIO4 before using them with this board when
NET NAMES PIN FUNCTIONS USED
V_BRD is jumpered for 1.8V.
CON_2X10 CON_2X10

4,5,8 RESET_B
DNP
0 R5
4,8 ADC0_DM0 CLKIN0 4,8

4,8 ADC1_DP0/ADC0_DP3

4,6,8 PTB[0..23]

4,6,8 PTC[0..19]

4,6,8 PTD[0..15]

C C

ACCELEROMETER
V_BRD

P3V3

V_BRD
V_BRD
POTENTIOMETER
+ C7
C8 C10

1
4.7uF 0.1UF 0.1UF R43
R53 5K
10.0K 2 POTJ ADC0_SE12 PTB2
NET NAMES PIN FUNCTIONS USED DNP

2
1
14
1
U7 C6

3
PTC10 I2C1_SCL 4 0.1UF J12

VDDIO

VDD
PTC11 I2C1_SDA 6 SCL HDR 1X2 TH
SDA
J18 Default: 1-2
ACC_SA0 7 11 ACCL_INT1 1 2 PTB0 (Enable Potentiometer
SA0 INT1 9 ACCL_INT2 3 4 PTB1
INT2
ACC_BYP 2 3 HDR_2X2
BYP NC3 8
R57 NC8 13 Default: 1-2, 3-4
NC13
GND1
GND2
GND3

10.0K 15 (Enable Accel Interrupts)


C13 NC15 16
0.1UF NC16
MMA8451Q
5
10
12

B B

LEDS

P3V3 P3V3 P3V3 P3V3

R45 R48 R52 R54


1.0K 1.0K 330 270
LEDGR

LEDOR
LEDYR

LEDBR
A

D5 D6 D8 D9
YEL/GRN LED_YELLOW ORANGE BLUE
C

Default: 1-2, 3-4, 5-6, 7-8


(Enable LEDs)
A A
J15
PTD4 1 2 LED_J_PTD4
PTD5 3 4 LED_J_PTD5
PTD6 5 6 LED_J_PTD6
PTD7 7 8 LED_J_PTD7

HDR_2x4
ICAP Classification: FCP: ___ FIUO: X PUBI: ___
Drawing Title:
TWR-K21D50M
Page Title:
Sensors
Size Document Number Rev
C SCH-27405 PDF: SPF-27405 B

Date: Thursday, June 14, 2012 Sheet 7 of 8


5 4 3 2 1
5 4 3 2 1

PTA[0..29]
4,5,6 PTA[0..29]
PTB[0..23]
4,6,7 PTB[0..23]
PTC[0..19]
4,6,7 PTC[0..19]
PTD[0..15]
4,6,7 PTD[0..15]
PTE[0..19]
4,5,6 PTE[0..19]

D 5 ELE_PS_SENSE D

P5V_ELEV P5V_ELEV P5V_ELEV P5V_ELEV

P3V3 P3V3 P3V3 P3V3

J14A J14B
B1 A1 D1 C1
B2 5V_1 5V_2 A2 D2 5V_3 5V_4 C2
B3 GND_1 GND_9 A3 D3 GND_17 GND_25 C3
B4 3.3V_1 3.3V_4 A4 PIN FUNCTIONS USED NET NAMES D4 3.3V_8 3.3V_11 C4
NET NAMES PIN FUNCTIONS USED B5 ELE_PS_SENSE_1 3.3V_5 A5 D5 ELE_PS_SENSE_2 3.3V_12 C5
B6 GND_2 GND_10 A6 I2C1_SCL PTC10 D6 GND_18 GND_26 C6
PTB11 SPI1_SCK B7 GND_3 GND_11 A7 I2C1_SDA PTC11 D7 GND_19 GND_27 C7
PTB9 SPI1_PCS1 B8 SDHC_CLK/SPI1_CLK I2C0_SCL A8 D8 SPI2_CLK I2C2_SCL C8
PTB10 SPI1_PCS0 B9 SDHC_D3/SPI1_CS1 I2C0_SDA A9 UART2_CTS_B PTE18 D9 SPI2_CS1 I2C2_SDA C9
PTB16 SPI1_SOUT B10 SDHC_D3/SPI1_CS0 GPIO9/UART1_CTS A10 PTE5 D10 SPI2_CS0 GPIO25 C10
PTB17 SPI1_SIN B11 SDHC_CMD/SPI1_MOSI GPIO8/SDHC_D2 A11 PTA17 D11 SPI2_MOSI ULPI_STOP C11
SDHC_D0/SPI1_MISO GPIO7/SD_WP_DET SPI2_MISO ULPI_CLK
B12 A12 D12 C12
B13 ETH_COL_1 ETH_CRS A13 D13 ETH_COL_2 GPIO26 C13
B14 ETH_RXER_1 ETH_MDC_1 A14 D14 ETH_RXER_2 ETH_MDC_2 C14
B15 ETH_TXCLK_1 ETH_MDIO_1 A15 D15 ETH_TXCLK_2 ETH_MDIO_2 C15
B16 ETH_TXEN_1 ETH_RXCLK_1 A16 D16 ETH_TXEN_2 ETH_RXCLK_2 C16
B17 ETH_TXER ETH_RXDV_1 A17 D17 GPIO18 ETH_RXDV_2 C17
B18 ETH_TXD3 ETH_RXD3 A18 D18 GPIO19/SDHC_D4 GPIO27/SDHC_D6 C18
PTE19 UART2_RTS_B B19 ETH_TXD2 ETH_RXD2 A19 D19 GPIO20/SDHC_D5 GPIO28/SDHC_D7 C19
PTE0 B20 ETH_TXD1_1 ETH_RXD1_1 A20 D20 ETH_TXD1_2 ETH_RXD1_2 C20
B21 ETH_TXD0_1 ETH_RXD0_1 A21 I2S0_MCLK PTC8 D21 ETH_TXD0_2 ETH_RXD0_2 C21
PTA5 B22 GPIO1/UART1_RTS I2S0_MCLK A22 I2S0_TX_BCLK PTB18 D22 ULPI_NEXT/USB_HS_DM ULPI_DATA0/I2S1_MCLK C22
CLKIN0 B23 GPIO2/SDHC_D1 I2S0_DOUT_SCK A23 I2S0_TX_FS PTB19 D23 ULPI_DIR/USB_HS_DP ULPI_DATA1/I2S1_DOUT_SCK C23
4,7 CLKIN0 B24 GPIO3 I2S0_DOUT_WS A24 D24 UPLI_DATA5/USB_HS_VBUS ULPI_DATA2/I2S1_DOUT_WS C24
PTE0 RTC_CLKOUT B25 CLKIN0 I2S0_DIN0 A25 I2S0_RXD0 PTC5 D25 ULPI_DATA6/USB_HS_ID ULPI_DATA3/I2S1_DIN0 C25
B26 CLKOUT1 I2S0_DOUT0 A26 I2S0_TXD0 PTC1 D26 ULPI_DATA7 ULPI_DATA4/I2S1_DOUT0 C26
PTB0 ADC0_SE8 0 R13 RB27 B27 GND_4 GND_12 A27 RA27 0 R211 ADC0_DP0 D27 GND_20 GND_28 C27
AN7 AN3 ADC0_DP0 4,7 LCD_HSYNC/LCD_P24 AN11
PTB1 ADC0_SE9 0 R12 RB28 B28 A28 RA28 0 R212 ADC0_DM0 D28 C28
AN6 AN2 ADC0_DM0 4,7 LCD_VSYNC/LCD_P25 AN10
PTB2 ADC0_SE12 0 R4 RB29 B29 A29 RA29 0 R208 ADC1_DP0/ADC0_DP3 D29 C29
AN5 AN1 ADC1_DP0/ADC0_DP3 4,7 AN13 AN9
C PTB3 ADC0_SE13 0 R3 RB30 B30 A30 RA30 0 R209 ADC1_DM0/ADC0_DM3 D30 C30 C
AN4 AN0 ADC1_DM0/ADC0_DM3 4 AN12 AN8
B31 A31 DAC0_OUT D31 C31
GND_5 GND_13 DAC0_OUT 4 GND_21 GND_29
B32 A32 D32 C32
4 DAC1_OUT DAC1 DAC0 LCD_CLK/LCD_P26 GPIO29/UART2_DCD
B33 A33 FTM1_CH1 PTA13 D33 C33
B34 TMR3 TMR1 A34 FTM1_CH0 PTA12 D34 TMR11 TMR9 C34
PTA14 B35 TMR2 TMR0 A35 PTA15 D35 TMR10 TMR8 C35
PTA2 FTM0_CH7 B36 GPIO4 GPIO6 A36 D36 GPIO21 GPIO30/UART3_DCD C36
PTD6 FTM0_CH6 B37 3.3V_2 3.3V_6 A37 FTM0_CH3 PTC4 D37 3.3V_9 3.3V_13 C37
B38 PWM7 PWM3 A38 FTM0_CH2 PTC3 D38 PWM15 PWM11 C38
PTB13 FTM0_CH5 B39 PWM6 PWM2 A39 FTM0_CH1 PTC2 D39 PWM14 PWM10 C39
PTB12 FTM0_CH4 B40 PWM5 PWM1 A40 FTM0_CH0 PTC1 D40 PWM13 PWM9 C40
B41 PWM4 PWM0 A41 UART0_RX PTA15 D41 PWM12 PWM8 C41
PTA13 CAN0_RX B42 CAN0_RX UART0_RX A42 UART0_TX PTA14 D42 CAN2_RX UART2_RXD/TSI0 C42
PTA12 CAN0_TX B43 CAN0_TX UART0_TX A43 D43 CAN2_TX UART2_TXD/TSI1 C43
PTD3 SPI0_SIN B44 1WIRE UART1_RX A44 UART2_RX PTE17 VDDA D44 LCD_CONTRAST UART2_RTS/TSI2 C44
PTD2 SPI0_SOUT B45 SPI0_MISO/IO1 UART1_TX A45 VSSAR UART2_TX PTE16 D45 LCD_OE/LCD_P27 UART2_CTS/TSI3 C45
PTD0 SPI0_PCS0 B46 SPI0_MOSI/IO0 VSSA A46 VDDAR 0 R2 DNP D46 LCD_D0/LCD_P0 UART3_RXD/TSI4 C46
PTD4 SPI0_PCS1 B47 SPI0_CS0 VDDA A47 0 R1 DNP D47 LCD_D1/LCD_P1 UART3_TXD/TSI5 C47
PTD1 SPI0_SCK B48 SPI0_CS1 CAN1_RX A48 D48 LCD_D2/LCD_P2 UART3_RTS/CAN3_RX C48
B49 SPI0_CLK CAN1_TX A49 PTD15 J13 D49 LCD_D3/LCD_P3 UART3_CTS/CAN3_TX C49
PTC10 I2C1_SCL B50 GND_6 GND_14 A50 PTA29 PTA14 1 D50 GND_22 GND_30 C50
PTC11 I2C1_SDA B51 I2C1_SCL GPIO14 A51 2 D51 GPIO23 LCD_D4/LCD_P4 C51
PTC10 B52 I2C1_SDA GPIO15 A52 PTD9 PTA17 3 D52 GPIO24 LCD_D5/LCD_P5 C52
PTE6 B53 GPIO5/SPI0_HOLD/IO3 GPIO16/SPI0_WP/IO2 A53 PTD10 D53 LCD_D12/LCD_P12 LCD_D6/LCD_P6 C53
PTE5 B54 RSRV_B53 GPIO17 A54 USB0_DN HDR TH 1X3 D54 LCD_D13/LCD_P13 LCD_D7/LCD_P7 C54
RSRV_B54 USB0_DM USB0_DN 4 LCD_D14/LCD_P14 LCD_D8/LCD_P8
B55 A55 USB0_DP D55 C55
IRQ_H USB0_DP USB0_DP 4 IRQ_P/SPI2_CS2 LCD_D9/LCD_P9
PTB8 B56 A56 USB0_VBUS Default: 1-2 D56 C56
IRQ_G USB0_ID USB0_VBUS 5 (Use PTA14 for IRQ_O/SPI2_CS3 LCD_D10/LCD_P10
PTB6 B57 A57 D57 C57
B58 IRQ_F USB0_VBUS A58 I2S0_RX_BCLK PTC6 RESET_OUT_B) D58 IRQ_N LCD_D11/LCD_P11 C58
PTA16 B59 IRQ_E I2S0_DIN_SCK A59 I2S0_RX_FS PTC7 D59 IRQ_M I2S1_DIN_SCK C59
PTD14 B60 IRQ_D I2S0_DIN_WS A60 I2S0_RXD1 PTC11 D60 IRQ_L I2S1_DIN_WS C60
RB61 B61 IRQ_C I2S0_DIN1 A61 I2S0_TXD1 PTC0 D61 IRQ_K I2S1_DIN1 C61
PTC6 0 R207 RB62 B62 IRQ_B I2S0_DOUT1 A62 RESET_B TP1 D62 IRQ_J I2S1_DOUT1 C62
IRQ_A RSTIN RESET_B 4,5,7 IRQ_I LCD_D15/LCD_P15
PTC5 0 R210 B63 A63 RESET_OUT_B DNP D63 C63
PTD0 FBa_ALE B64 EBI_ALE/EBI_CS1 RSTOUT A64 D64 LCD_D18/LCD_P18/SD_RX_0+ LCD_D16/LCD_P16/SD_GND C64
PTD1 FBa_CS0_B B65 EBI_CS0 CLKOUT0 A65 CLKOUT PTC3 PTC3 CLKOUT D65 LCD_D19/LCD_P19/SD_RX_0- LCD_D17/LCD_P17/SD_GND C65
B66 GND_7 GND_15 A66 FBa_AD14 PTC0 D66 GND_23 GND_31 C66
PTB18 FBa_AD15 B67 EBI_AD15 EBI_AD14 A67 FBa_AD13 PTC1 D67 EBI_AD20/LCD_P42/SD_GND EBI_BE_32_24/LCD_P28/SD_TX_0+ C67
B
PTB17 FBa_AD16 B68 EBI_AD16 EBI_AD13 A68 FBa_AD12 PTC2 D68 EBI_AD21/LCD_P43/SD_GND EBI_BE_23_16/LCD_P29/SD_TX_0- C68 B
PTB16 FBa_AD17 B69 EBI_AD17 EBI_AD12 A69 FBa_AD11 PTC4 D69 EBI_AD22/LCD_P44/SD_RX_1+ EBI_BE_15_8/LCD_P30/SD_GND C69
PTB11 FBa_AD18 B70 EBI_AD18 EBI_AD11 A70 FBa_AD10 PTC5 D70 EBI_AD23/LCD_P45/SD_RX_1- EBI_BE_7_0/LCD_P31/SD_GND C70
PTB10 FBa_AD19 B71 EBI_AD19 EBI_AD10 A71 FBa_AD9 PTC6 D71 EBI_AD24/LCD_P46/SD_GND EBI_TSIZE0/LCD_P32/SD_TX_1+ C71
PTB19 FBa_OE_B B72 EBI_R/W EBI_AD9 A72 FBa_AD8 PTC7 D72 EBI_AD25/LCD_P47/SD_GND EBI_TSIZE1/LCD_P33/SD_TX_1- C72
PTB20 FBa_AD31 B73 EBI_OE EBI_AD8 A73 FBa_AD7 PTC8 D73 EBI_AD26/LCD_P48/SD_RX_2+ EBI_TS/LCD_P34/SD_GND C73
PTB21 FBa_AD30 B74 EBI_D7 EBI_AD7 A74 FBa_AD6 PTC9 D74 EBI_AD27/LCD_P49/SD_RX_2- EBI_TBST/LCD_P35/SD_GND C74
PTB22 FBa_AD29 B75 EBI_D6 EBI_AD6 A75 FBa_AD5 PTC10 D75 EBI_AD28/LCD_P50/SD_GND EBI_TA/LCD_P36/SD_TX_2+ C75
PTB23 FBa_AD28 B76 EBI_D5 EBI_AD5 A76 D76 EBI_AD29/LCD_P51/SD_GND EBI_CS4/LCD_P37/SD_TX_2- C76
PTC12 FBa_AD27 B77 EBI_D4 EBI_AD4 A77 FBa_AD4 PTD2 D77 EBI_AD30/LCD_P52/SD_RX_3+ EBI_CS3/LCD_P38/SD_GND C77
PTC13 FBa_AD26 B78 EBI_D3 EBI_AD3 A78 FBa_AD3 PTD3 D78 EBI_AD31/LCD_P53/SD_RX_3- EBI_CS2/LCD_P39/SD_GND C78
PTC14 FBa_AD25 B79 EBI_D2 EBI_AD2 A79 FBa_AD2 PTD4 D79 LCD_D20/LCD_P20/SD_GND EBI_CS1/LCD_P40/SD_TX_3+ C79
PTC15 FBa_AD24 B80 EBI_D1 EBI_AD1 A80 FBa_AD1 PTD5 D80 LCD_D21/LCD_P21/SD_REFCLK+ GPIO31/LCD_P41/SD_TX_3- C80
PTC11 FBa_RW_B B81 EBI_D0 EBI_AD0 A81 FBa_AD0 PTD6 D81 LCD_D22/LCD_P22/SD_REFCLK- LCD_D23/LCD_P23/SD_GND C81
B82 GND_8 GND_16 A82 D82 GND_24 GND_32 C82
NET NAMES PIN FUNCTIONS USED 3.3V_3 3.3V_7 3.3V_10 3.3V_14
PIN FUNCTIONS USED NET NAMES
PCI EXPRESS TOWER SYSTEM PRIMARY PCI EXPRESS TOWER SYSTEM SECONDARY

Note that signals coming from the elevator are usually 3.3V.
They should not be used when the board is configured for
1.8V operation.

A A

ICAP Classification: FCP: ___ FIUO: X PUBI: ___


Drawing Title:
TWR-K21D50M
Page Title:
Elevator Connectors
Size Document Number Rev
C SCH-27405 PDF: SPF-27405 B

Date: Thursday, June 14, 2012 Sheet 8 of 8


5 4 3 2 1

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