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NETWORK ANALYSIS
A two-port network makes possible the isolation of either a complete circuit or part of it and
replacing it by its characteristic parameters. Once this is done, the isolated part of the circuit
becomes a "black - box" with a set of distinctive properties, enabling us to abstract away its
specific physical buildup, thus simplifying analysis. Any linear circuit with four terminals can be
transformed into a two-port network provided that it does not contain an independent source and
satisfies the port conditions.
There are a number of alternative sets of parameters that can be used to describe a linear two-
port network, the usual sets are respectively called z, y, h, g, and ABCD parameters, each
described individually below. These are all limited to linear networks since an underlying
assumption of their derivation is that any given circuit condition is a linear superposition of
various short-circuit and open circuit conditions.
7. What is Laplace Transform?
Ans. By applying the Laplace transform, one can change an ordinary differential equation into an
algebraic equation, as algebraic equation is generally easier to deal with. Another advantage of
Laplace transform is in dealing the external force is either impulsive , (the force lasts a very shot
time period such as the bat hits a baseball) or the force is on and off for some regular or irregular
period of time
The Laplace transform of a function f(t), defined for all real numbers t ≥ 0, is the function F(s),
defined by:
The meaning of the integral depends on types of functions of interest. A necessary condition for
existence of the integral is that ƒ must be locally integrable on [0,∞). For locally integrable
functions that decay at infinity or are of exponential type, the integral can be understood as a
(proper) Lebesgue integral. However, for many applications it is necessary to regard it as a
conditionally convergent improper integral at ∞. Still more generally, the integral can be
understood in a weak sense, and this is dealt with below.
One can define the Laplace transform of a finite Borel measure μ by the Lebesgue integral
An important special case is where μ is a probability measure or, even more specifically, the
Dirac delta function. In operational calculus, the Laplace transform of a measure is often treated
as though the measure came from a distribution function ƒ. In that case, to avoid potential
confusion, one often writes
CONTROL SYSTEMS
1. what is Open Loop and closed loop control systems?
Ans. In Open-Loop control, no feedback loop is employed and system variations which cause
the output to deviate from the desired value are not detected or corrected.
A Closed-Loop system utilizes feedback to measure the actual system operating parameter being
controlled such as temperature, pressure, flow, level, or speed. This feedback signal is sent back
to the controller where it is compared with the desired system setpoint. The controller develops
an error signal that initiates corrective action and drives the final output device to the desired
value. In the DC Motor Drive illustrated above, the tachometer provides a feedback.
In this block diagram, I have represented the DC motor and the potentiometer attached to its
shaft as the transfer function G(s), and the amplifier with gain A. We will determine what the
allowable range of A is to keep the system stable. The input of G(s) is the armature voltage of the
motor, ea, and its output is the motor shaft angular position, θm.
From the block diagram,
Ans. The terms transient response arise naturally in the context of sine wave analysis. When the
input sine wave is switched on, the filter takes a while to ``settle down'' to a perfect sinewave at
the same frequency. The filter response during this ``settling'' period is called the transient
response of the filter.
Definition
A system is stable if its impulse response approaches zero as time approaches infinity
The system stability can also be defined in terms of bounded (limited) inputs.
Definition
A system is stable if every bounded input produces a bounded output.
where X is the input to the compensator, Y is the output, s is the complex Laplace transform
variable, z is the zero frequency and p is the pole frequency.
Ans. A stack is a storage device that stores information in a last-in-first-out(LIFO) fashion. Only
two type of operations are possible in a stack, namely push and pop operations. Push places data
onto the top of the stack, while pop removes the topmost program and in some cases the
operating can be used explicitly for execution of a program.
Ans. Control memory is a random access memory (RAM) consisting of addressable storage
registers. It is primarily used in mini and mainframe computers. It is used as a temporary storage
for data. Access to control memory data requires less time than to m a in memory; this speeds up
CPU operation by reducing the number of memory references for data storage and retrieval.
Access is performed as part of a control section sequence while the master clock oscillator
is running. The control memory addresses are divided into two groups: a task mode and
an executive (interrupt) mode.
Ans. A decimal arithmetic unit is a digital function that performs decimal micro-operations. It
can add or subtract decimal numbers, usually by forming the 9's or 10'scomplement of the
subtrahend. The unit accepts coded decimal numbers and generates results in the same adopted
binary code. A single-stage decimal arithmetic unit consists of nine binary input variables and
five binary output variables, since a minimum of four bits is required to represent each coded
decimal digit. Each stage must have four inputs for the augend digit, four inputs for the addend
digit, and an input-carry. The outputs include four terminals for the sum digit and one for the
output-carry. Of course, there is a wide variety of possible circuit configurations dependent on
the code used to represent the decimal digits.
Ans. A CPU cache is a cache used by the central processing unit of a computer to reduce the
average time to access memory. The cache is a smaller, faster memory which stores copies of the
data from the most frequently used main memory locations. As long as most memory accesses
are cached memory locations, the average latency of memory accesses will be closer to the cache
latency than to the latency of main memory.
When the processor needs to read from or write to a location in main memory, it first checks
whether a copy of that data is in the cache. If so, the processor immediately reads from or writes
to the cache, which is much faster than reading from or writing to main memory.
6. What are Peripheral devises?
Ans. Peripheral devise are the computer devices that are connected to the computer externally
such as printer, scanner, keyboard, mouse, tape device, microphone and external modem. They
can be internal such as CD-ROM or internal modem and external as the scanner, printer and Zip
drive. Peripheral devices can be classified according to their functions.
Input: Input devices are the type of the computer devices that are used to provide the control
signals to the computer. Keyboard and the Mouse are the examples of the input devices.
Output: Output devices are the devices that are used to display the results. Printer, scanner,
speaker and the monitor are the examples of the output devices.
Storage: A storage device is a device that is used to store the input.
7. What is Parallel processing?
Ans. Parallel processing is the simultaneous processing of the same task on two or
more microprocessors in order to obtain faster results. The computer resources can include a
single computer with multiple processors, or a number of computers connected by a network, or
a combination of both. The processors access data through shared memory. Some
supercomputer parallel processing systems have hundreds of thousands of microprocessors.
Ans. A computer consists of a set of components (CPU, memory, I/O) that communicate with
each other.
The collection of paths connecting the various modules is call the Interconnection Structures.
The design of this structure will depend on the exchange that must be made between
Modules.
MICROPROCESSORS
AND INTERFACING
Ans. Macro is a group of instruction. The macro assembler generates the code in the program
each time where the macro is called. Macros are defined by MACRO & ENDM directives.
Creating macro is similar to creating new opcodes that can be used in the program
• INIT MACRO
• MOV DS
• MOV ES, AX
• ENDM
2. What is Branch Instruction?
Ans. Branch instructions perform a test by evaluating a logical condition and depending on the
outcome of the condition modify the program counter to take the branch or continue to the next
instruction.
Branch instructions are always relative to the current program counter. That is, the next
instruction is obtained by adding a signed offset to current program counter:
PC += (int)offset
Branches are inherently relocatable. That is, the program can be moved to any other block of
memory and still execute correctly. Jump instructions, by contrast, specify an absolute memory
reference. If the underlying program is moved in memory, those jump memory references
pointing to the interior of the moved block must be changed.
The Problem: to be transferred, using programmed or minute more than a Large files could
take interrupt I/O.
The Solution: Allow the Peripheral I/O device communicate directly with memory, commonly
called a Direct-Memory Access. With DMA data transfer rates of 10-50 million bytes per second
can be achieved.
4. What is 8255 PPI - Programmable Peripheral Interface?
Ans. The meaning of ‘interrupts’ is to break the sequence of operation.While the cpu is
executing a program,on ‘interrupt’ breaks the normal sequence of executionof instructions,
diverts its execution to some other program called Interrupt Service Routine (ISR).After
executing ISR , the control is transferred back again to the main program.
Purpose of Interrupts
Interrupts are particularly useful when interfacing I/O devices that provide or require data at
Ans. It is a data method which is used when the I/O device and the microprocessor match in
speed. To transfer a data to or from the device, the user program issues a suitable instruction
addressing the device. The data transfer is completed at the end of the execution of this
instruction.
7.What is RISC?
Ans. The 8051 has three very general types of memory. To effectively program the 8051 it is
necessary to have a basic understanding of these memory types.
The memory types are illustrated in the following graphic. They are: On-Chip Memory, External
Code Memory, and External RAM.
On-Chip Memory refers to any memory (Code, RAM, or other) that physically exists on the
microcontroller itself. On-chip memory can be of several types, but we'll get into that shortly.
External Code Memory is code (or program) memory that resides off-chip. This is often in the
form of an external EPROM.
External RAM is RAM memory that resides off-chip. This is often in the form of standard static
RAM or flash RAM.
1.
2. TF0
3.
4. TF1
5. RI/TI
Out of these, and are external interrupts whereas Timer and Serial port interrupts are
generated internally. The external interrupts could be negative edge triggered or low level
triggered. All these interrupt, when activated, set the corresponding interrupt flags. Except for
serial interrupt, the interrupt flags are cleared when the processor branches to the Interrupt
Service Routine (ISR). The external interrupt flags are cleared on branching to Interrupt Service
Routine (ISR), provided the interrupt is negative edge triggered. For low level triggered external
interrupt as well as for serial interrupt, the corresponding flags have to be cleared by software by
the programmer.
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