1

Indirect Control of Capacitor Supported DVR

for Power Quality Improvement in Distribution
System
#
Bhim Singh, Senior Member IEEE, *Jayaprakash P, *Kothari D P, Senior Member IEEE,
$
Ambrish Chandra, Senior Member IEEE and $Kamal-Al-Haddad, Fellow IEEE

critical consumer loads from tripping and consequent loss.

Abstract--The dynamic voltage restorer (DVR) is used to
regulate the voltage at the load terminals from various power
quality problems like sag, swell, harmonics, unbalance etc., in
supply voltage. In this paper, a novel control strategy is proposed
to control a capacitor supported DVR for sag, swell, harmonics
and unbalance in supply voltage. The reference signal for the
series connected DVR is obtained indirectly from the extracted
load terminal reference voltage. The proposed DVR control
strategy is validated through extensive computer simulation
studies using MATLAB software with its Simulink and power
system block set.
Index Terms-- Power quality, distribution system, dynamic
voltage restorer, voltage source converter.
I. INTRODUCTION
The installation of custom power devices at the consumer
point is governed by the IEEE standard [3].
A DVR is connected between the supply and the sensitive
load so that it can insert a voltage of required waveform.
Hence it can protect sensitive consumer loads from supply
disturbances. In a capacitor supported DVR, the power
absorbed/supplied is zero in the steady state. The voltage
injected by the DVR should be in quadrature with the feeder
current [2]. The analysis, design and voltage injection
schemes of capacitor supported DVR is discussed in the
literature [4]-[6] and the different control strategies are
developed [7]-[9]. The instantaneous reactive power theory
[7], sliding mode controller based [8], symmetrical
components based [9] control techniques for series

P OWER quality in the distribution system is widely studied compensator are reported in the literature. In this paper, a new
due to its impact on some sensitive loads [1]. Power control algorithm is developed based on unit templates [10]
quality problems include sags, swells, transients and other for the control of capacitor supported DVR for sag, swell,
distortions to the sinusoidal waveform [1]. The new group of harmonics and unbalance in supply voltage. The computer
devices called custom power devices [2] are developed and simulation is performed using MATLAB software with its
installed for the improvement of power quality in the simulink and power system block set for verifying the
distribution system. They are mainly of three categories such proposed control algorithm.
as shunt connected distribution static compensator vsa
(DSTATCOM), series connected compensator like dynamic Za vSa vCa vLa
voltage restorer (DVR) and unified power quality conditioner isa
(UPQC) which is connected in both shunt and series. The vsb
Zb Tr 3-Phase
series connected compensator can regulate the load terminal
loads
voltage from the ‘low quality’ supply voltage and protect the isb
vsc
Zc
#
Bhim Singh is with department of Electrical Engineering, Indian Institute of isc
Technology, Delhi, Hauz-Khas, New Delhi-110016, India (email:
bsingh@ee.iitd.ac.in)
* Lr Cr
Jayaprakash P is with Centre for Energy Studies, Indian Institute of
Technology, Delhi, Hauz-Khas, New Delhi-110016, India (email:
jayaprakashpee@gmail.com)
*
D P Kothari is with Centre for Energy Studies, Indian Institute of Technology,
Delhi, Hauz-Khas, New Delhi-110016, India (email: dpk0710@yahoo.com) Cdc
$
Ambrish Chandra is with department of Electrical Engineering, Êcole de
Technologie Superieure, 1100 Notre Dame Ouest, Universite du Quebec,
DVR
Montreal, Quebec H3C1K3, Canada,Telephone - +91-9899496868, +91-011-
26591045, Fax No. - +91-011-26581606 (email: ambrish.chandra@etsmtl.ca)
$
Kamal-Al-Haddad is with department of Electrical Engineering, Êcole de
Technologie Superieure, 1100 Notre Dame Ouest, Universite du Quebec, Fig. 1. Schematic diagram of capacitor supported DVR
Montreal, Quebec H3C1K3, Canada,Telephone - +91-9899496868, +91-011-
26591045, Fax No. - +91-011-26581606 (email: kamal.al-haddad@etsmtl.ca)

©2008 IEEE.
 2

II. PRINCIPLE OF OPERATION OF DVR this has two components, Vcd and Vcq. The voltage in-phase
The schematic diagram of a capacitor supported DVR is with current (Vcd) is to regulate the dc bus voltage and also to
shown in Fig. 1. Three voltage sources (vsa, vsb, vsc ) represents meet the power loss in the VSC. The voltage in quadrature
the 3-phase three-wire supply system and the series source with the current (Vcq) is to regulate the load voltage (VL) at
impedance are shown as Za, Zb and Zc. The DVR uses a
transformer (Tr) to inject voltage in series with the supply
voltage. A voltage source converter (VSC) along with a dc
capacitor (Cdc) is used as a DVR. The ripple in the injected
voltage is filtered using a series inductor (Lr) and a parallel Vcd VL
capacitor (Cr). The load considered is a three phase lagging
power factor load.
Fig. 2 shows the phasor diagram of the DVR operation for Vcq Vc
θ
the compensation of sag in the supply voltage. The load IL
terminal voltage and current during pre-sag condition are θ V L (p re sa g ) = V ra te d
represented as VL(presag) and IL’. After the sag event, the supply Vs
voltage (Vs) is of lower in magnitude that of pre-sag IL’
condition. The voltage injected by the DVR (Vc) is used to Fig. 2. Phasor diagram of capacitor supported DVR for sag compensation
maintain the load voltage (VL) at the rated magnitude and

vdc vdc* isa isb isc vLa vLb vLc

Compute in-phase unit voltage Compute amplitude of load

PI controller
vectors terminal voltage
usad usbd uscd
VCd* vLp*
vLp
Compute in-phase Compute quadrature unit voltage
voltage vector PI controller
vector

usaq usbq uscq VCq*

vCcd* Compute quadrature voltage

vCbd* vector

vCad* vCbq* vCcq*

vCaq*

Compute total three phase

reference DVR voltages
vCa* vCb* vCc*
vSa1
vSa
Fundamental vSb1 Compute three phase reference
vSb vSc1
extractor load voltages
vSc
vLa* vLb* vLc*
vLa
vLb PWM controller
vLc

IGBT gate signals

Fig. 3 Control scheme of the DVR


constant magnitude. The aim of the control algorithm is to
achieve these two components of the injection voltage. The
swell, harmonic and unbalance in supply voltage are also
compensated by the proposed DVR through extracting the
required reference voltage.
III. DVR CONTROL STRATEGY
The proposed control algorithm is derived from the
algorithm presented in [10] in which the shunt compensator is
controlled for harmonic current compensation, load current
balancing and power factor correction. Here, the sag, swell,
harmonic voltage and unbalance in supply voltage are
compensated by controlling the DVR. The load terminal
voltage is regulated and the waveform is controlled to
sinusoidal. The proposed control scheme is shown in Fig. 3.
The reference signal for the load terminal voltage (vLa*,
vLb , vLc*) is extracted from the sensed load terminal voltages
* component (vCaq*, vCbq*, vCcq*) and the fundamental of supply
(vLa, vLb, vLc), supply currents (iSa, iSb, iSc), supply voltages
(vSa, vSb, vSc) and the dc bus voltage (vdc) of DVR as feed back
signals. There are two proportional-integral (PI) controllers
used to estimate the in-phase and quadrature components of
the injected fundamental voltage by the DVR. The harmonic
voltage to be injected is estimated from the sensed supply
voltage (vSa, vSb, vSc) by extracting the fundamental
component (vSa1, vSb1, vSc1) of it.
Three phase unit voltage templates (uSad, uSbd, uScd) are
Fig. 4. MATLAB model of the DVR connected system
3
derived in-phase with the supply currents (iSa, iSb, iSc). The dc
bus voltage of the DVR is regulated using a PI controller over
the sensed (vdc) and reference values (vdc* ) of dc bus voltages.
This PI controller output is considered as the amplitude (VCd*)
of the in-phase component of the injection voltages (vCad*,
vCbd*, vCcd*) derive the amplitude (VLp*) of the quadrature
component of the injection voltages (vCaq*, vCbq*, vCcq*) of the
DVR by using it over the amplitude of sensed load voltage
(VLp) and reference value (VLp*) of the load terminal voltage.
The fundamental component of the supply voltage (vSa1,
vSb1, vSc1) is extracted from the sensed supply voltage (vSa, vSb,
vSc) using the synchronous reference frame (SRF)
transformation [11]. The reverse of the SRF transformation
after filtering the dc component gives the fundamental
component of the supply voltage. The algebraic sum of the in-
phase component (vCad*, vCbd*, vCcd*), the quadrature
voltage (vSa1, vSb1, vSc1) are taken as the reference load
voltages (vLa*, vLb*, vLc*). A pulse width modulation (PWM)
controller is used over the reference (vLa*, vLb*, vLc*) and
sensed load voltages values (vLa, vLb, vLc) to generate gating
signals for the IGBT’s (insulated gate bipolar transistors) of
the VSC. The carrier wave (triangular) frequency is set at
10kHz. The gating pulses switch the IGBT’s of the VSC for
the compensation of sag, swell, unbalance and harmonics in
supply voltage.
 4

Fig. 5 MATLAB model of the control scheme of DVR

IV. MATLAB BASED SIMULATION OF DVR SYSTEM

Fig. 4 shows the MATLAB model of the DVR connected
system. The supply voltage is realized by using a three-phase
voltage source and source impedance is connected in its
series. In order to simulate the disturbances at the PCC
voltage, an additional load is switched on with a circuit
breaker. The load considered is a lagging power factor load.
The DVR is connected in series with the supply using an
injection transformer. The VSC is connected to the
transformer along with a ripple filter. The dc bus capacitor is
selected based on the transient energy requirement and the dc
bus voltage is selected based on the injection voltage level.
The dc capacitor decides the ripple content in the dc voltage.
The system data are given in Appendix
The control algorithm for the DVR is modeled in
MATLAB and is given in Fig. 5. The control scheme shown
in Fig. 3 is modeled here. The reference load terminal
voltages are derived from the sensed supply voltages, supply
currents, load terminal voltages and the dc bus voltage of
DVR.

V. PERFORMANCE OF DVR SYSTEM

The performances of the DVR for different supply
disturbances is tested under various operating conditions. The
proposed control algorithm is tested for different power Fig. 6 Compensation of supply voltage sag using DVR
 5

Fig. 8 Compensation of supply voltage unbalance using DVR

Fig. 7 Compensation of supply voltage swell using DVR

quality events like voltage sag (Fig. 6), voltage swell (Fig. 7),
unbalance in supply voltage (Fig. 8) and harmonics in supply
voltage (Fig. 9). Fig. 6 shows a balanced sag of 30% in supply
voltage at 0.15 s and occurs for 5 cycles of ac mains. The
DVR injects fundamental voltage (vc) in series with the supply
voltage (vs). The load terminal voltage (vL) is regulated at the
rated value. The supply current (is), amplitude of supply
voltage (VSp) the amplitude of load terminal voltage (VLp) and
the dc bus voltage (vdc) are also shown in the Fig. 6.
The dynamic performance of the DVR for a swell in
supply voltage is given in Fig.7. The load voltage (vL) is
regulated at rated value, which shows the satisfactory
performance of the DVR. The supply current (is), the
amplitude of load terminal voltage (VLp), the amplitude of
supply voltage (VSp) and the dc bus voltage (vdc) are also
shown in the Fig. 7. The dc bus voltage is regulated at the
reference value, though small fluctuation occur during
transients.
The performance of DVR for an unbalance in supply
voltage is shown in Fig. 8. The phase voltages at the PCC are
different in magnitude at 0.2s as given in the voltage at PCC
(vs) of Fig. 8. Now the DVR injects unequal fundamental
voltages (vc) so that the load terminal voltage (vL) is regulated
to constant magnitude. The supply current (is), the amplitude
of load terminal voltage (VLp), the amplitude of supply voltage
(VSp) and the dc bus voltage (vdc) are also shown in the Fig. 8
to demonstrate the satisfactory behavior of DVR.
The harmonics compensation in supply voltage is tested
and depicted in Fig. 9. The voltage at PCC is disturbed by
switching on of a non-linear load and the load terminal Fig. 9 Compensation of supply voltage harmonics using DVR
voltage (vL) is undistorted and constant in magnitude due to
 6

Fig. 10 Load voltage along with harmonic spectrum

Fig. 11 Voltage at PCC along with harmonic spectrum

the injection of harmonic voltage (vc) by the DVR. The load

terminal voltage (vL) has a total harmonic distortion (THD) of
1.2% (Fig. 10) at the time of disturbance and the voltage at
PCC has a THD of 7.33% (Fig. 11). The supply current is also
sinusoidal with a THD of 0.14% (Fig. 12).

VI. CONCLUSION
The proposed control scheme of DVR has been validated
through computer simulation using MATLAB software along
with simulink and power system block set toolboxes. The
reference voltages for the DVR has been obtained indirectly
by extracting the reference load terminal voltage. The
performance of the DVR has been observed to be satisfactory
for various power quality disturbances like sag, swell,
unbalance and harmonics in supply voltage. Moreover, it is
able to provide self-supported dc bus of the DVR through
power transfer from ac line at fundamental frequency. Fig. 12 Supply current along with harmonic spectrum

VII. APPENDIX [3] lEEE Recommended Practices and Recommendations for

The parameters of the system considered are: Harmonics Control in Electric Power Systems, IEEE std. 519,
1992.
Line Impedance, L s = 3.5mH, R s = 0.01Ω
[4] M. Vilathgamuwa, R. Perera, S. Choi, and K. Tseng, “Control of
Load: 8.5kVA, pf : 0.707lag energy optimized dynamic voltage restorer”, in Proc. of IEEE
IECON’99, vol. 2,1999, pp. 873–878.
Ripple filter: C = 1µF, L r = 3.1mH
r
[5] Il-Yop Chung., Dong-Jun Won, Sang-Young Park, Seung-Il Moon
DC bus voltage: Vdc = 150V and Jong-Keun Park, “The DC link energy control method in
dynamic voltage restorer system”, International Journal of
DC bus capacitance: C = 1000µF
dc
Electrical Power & Energy Systems, vol. 25, no. 7, pp. 525-531,
Sept. 2003.
AC line voltage: VLL = 415V , 50Hz , [6] A. Moreno-Munoz, D Oterino, M Gonzalez, F A Olivencia and J J
PWM switching frequency: 10kHz Gonzalez-de-la-Rosa, “Study of sag compensation with DVR”, in
Proc. of IEEE MELECON, Benalmadena(Malaga), Spain, May
Transformer: 20kVA,100V / 400V 2006, pp 990-993.
[7] H. Akagi, E H Watanabe and M Aredes, Instantaneous power
VIII. REFERENCES theory and applications to power conditioning, John Wiley and
[1] Math H.J. Bollen, Understanding power quality problems voltage Sons, New Jersey, USA, 2007.
sags and interruptions, IEEE Press, New York, 2000. [8] B. N. Singh, Chandra A, Al-Haddad K and B Singh,
[2] A. Ghosh and G. Ledwich, Power Quality Enhancement using “Performance of sliding-mode and fuzzy controllers for a static
Custom Power devices, Kluwer Academic Publishers, London, synchronous serieseries compensator”, IEE Proc. on Generation,
2002.

Transmission and Distribution, vol. 146, no. 2, pp. 200 – 206,
March 1999.
[9] A. Ghosh, A.K Jindal and A Joshi, “Design of a capacitor-
supported dynamic voltage restorer (DVR) for unbalanced and
distorted loads”, IEEE Trans. on Power Delivery, vol. 19, no.1,
pp. 405 – 413, Jan. 2004.
[10] A. Chandra, B. Singh, B.N. Singh and K. AI-Haddad, “An
improved control algorithm of shunt active filter for voltage
regulation, harmonic elimination, power-factor correction, and
balancing of nonlinear loads“, IEEE Trans. on Power Electronics,
vol. 15 no. 3, pp 495 –507, May 2000.
[11] S. Bhattacharya and D. Diwan, “Synchronous Frame Based
Controller Implementation for a Hybrid Series Active Filter
System’’, in Proc. of IEEE IAS Meeting I995, pp 2531-2540.
IX. BIOGRAPHIES
Bhim Singh (SM’99) was born in Rahamapur, India, in
1956. He received the B.E (Electrical) degree from the
University of Roorkee, Roorkee, India, in 1977 and the
M.Tech and Ph.D. degree from the Indian Institute of
Technology (IIT) Delhi, New Delhi, India, in 1979 and
1983, respectively. In 1983, he joined the Department of
Electrical Engineering, University of Roorkee, as a
lecturer, and in 1988 became a Reader. In December 1990, he joined the
Department of Electrical Engineering, IIT Delhi, as an Assistant Professor. He
became an Associate Professor in 1994 and Professor in 1997. His area of
interest includes power electronics, electrical machines and drives, active filters,
FACTS, HVDC and power quality.
Dr. Singh is a fellow of Indian National Academy of Engineering (INAE), the
Institution of Engineers (India) (IE (I)), and the Institution of Electronics and
Telecommunication Engineers (IETE), a life member of the Indian Society for
Technical Education (ISTE), the System Society of India (SSI), and the National
Institution of Quality and Reliability (NIQR) and Senior Member of Institute of
Electrical and Electronics Engineers (IEEE).
Jayaprakash P is on deputation for research in the
Indian Institute of Technology, Delhi, from the
department of Electrical and Electronics Engg. of Govt.
College of Engg. Kannur, Kerala. He received his B Tech
(University of Calicut, Kerala) and M Tech (IIT Delhi)
in 1996 and 2003 respectively. His fields of interest are
power quality, power electronics, power system etc.
D. P. Kothari (SM’03) received the B.E. (Electrical),
M.E. (Power Systems), and Doctoral degree in electrical
engineering from the BITS, Pilani, India. He is
Professor, Centre for Energy Studies and Director I/C
(Retd.), Indian Institute of Technology, New Delhi. His
activities include optimal hydro-thermal scheduling, unit
commitment, maintenance scheduling, energy conservation and power quality.
He has guided 16 Ph. D scholars and has contributed extensively in these areas
as evidenced by the 335 research papers authored by him. He has also authored
15 books on power systems. He was a Visiting Professor at the Royal Melbourne
Institute of Technology, Melbourne, Australia, in 1982 and 1989. He was a
National Science Foundation Fellow at Purdue University, West Lafayette, IN,
in 1992. He was Principal of Visvesvaryaya Regional Engineering College,
Nagpur, India, during 1997–1998. Prof. Kothari has received several best paper
awards and gold medals for his work.
7
Ambrish Chandra (SM’99) was born in India in 1955. He
received B E degree from the university of Rorkee (presently
IIT), India, M. Tech from I.I.T., New Delhi, India, and Ph.D.
degree from University of Calgary, Canada, in 1977, 1980,
and 1987, respectively. He worked as a Lecturer and later as
a Reader at University of Roorkee. Since 1994 he is working
as a Professor in Electrical Engineering Department at École de technologie
supérieure, University of Québec, Montreal, Canada. His main research interests
are renewable energy, power quality, active filters, static reactive power
compensation, and flexible AC transmission systems (FACTS). Dr. Chandra is a
senior member of IEEE and member of the Ordre des ingénieurs du Québec,
Canada.
Kamal Al-Haddad (S’82–M’88–SM’92-F’07) was born in Beirut, Lebanon, in
1954. He received the B.Sc.A. and the M.Sc.A. degrees from the University of
Québec, Trois-Riviéres, QC, Canada, in 1982 and 1984, respectively, and the
Ph.D. degree from the Institut National Polythechnique,
Toulouse, France, in 1988. From June 1987 to June 1990,
he was a Professor with the Engineering Department,
Université du Québec á Trois Riviéres. In June 1990, he
joined the teaching staff as a Professor of the Electrical
Engineering Department of the École de Technologie
Supérieure, Montreal, QC. Since 2002, he has been the
holder of Canada Research Chair In Electric Energy
Conversion and Power Electronics CRC-EECPE. He has supervised more than
50 Ph.D. and M.Sc.A. students working in the field of power electronics and has
been the director of graduate study programs at the ETS from1992 till 2003. He
is a co-author of the Power System Blockset software of Matlab. He is a
consultant and has established very solid link with many Canadian industries
working in the field of power electronics, electric transportation, aeronautics,
and telecommunications. He is the Chief of ETS-Bombardier Transportation
North America division, a joint industrial research laboratory on electric traction
system and power electronics. He is an Associate Editor of the Canadian Journal
of Electrical and Computer Engineering (CJECE). His fields of interest are high
efficient static power converters, harmonics and reactive power control using
hybrid filters, switch mode and resonant converters including the modeling,
control, and development of prototypes for various industrial applications in
electric traction, power supply for drives, telecommunication etc.
Dr. Al-Haddad received the “Outstanding Ross Medal Award” from IEEE
Canada in 1997, and the Outstanding Researcher from the ETS in 2000. He is
active in the IEEE Industrial Electronics and IEEE Power electronics societies
where he has authored more than 150 Transactions and conference papers. He
was General Chairman of IEEE-ISIE2006 Conference. He is also an IEEE
fellow.