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2.5V 0.1µF
2.7V/3V CMOS X7R
5V OFF 2.7V ≥2V
OFF ON –2.5V
ON ≤–2V
VDD EN VDD EN VDD
LTC1966 LTC1966 DC + AC LTC1966
DC + AC DC AC INPUT DC DC
INPUTS IN1 VOUT IN1 VOUT INPUT IN1 VOUT
CAVE OUTPUT (1VPEAK) CAVE OUTPUT (1VPEAK) CAVE OUTPUT
(1VPEAK IN2 OUT RTN IN2 OUT RTN 1µF
1µF IN2 OUT RTN 1µF
DIFFERENTIAL)
VSS GND EN CC VSS GND VSS GND
0.1µF
DN288 F01a DN288 F01b
–5V –2.5V –2.5V DN288 F01c
Figure 1a. ±5V Supplies, Differential, Figure 1b. 2.7V Single Supply, Figure 1c. ±2.5V Supplies, Single
DC-Coupled RMS-to-DC Converter Single Ended, AC-Coupled RMS-to-DC Ended, DC-Coupled RMS-to-DC
Converter with Shutdown Converter with Shutdown
06/02/288
VIN
–0.4 ±1
LPF VOUT
–0.6 CONVENTIONAL DN288 F03
LOG/ANTILOG
–0.8
Figure 3. LTC1966 Block Diagram
60Hz SINEWAVES
–1.0
0 50 100 150 200 250 300 350 400 450 500
VIN (mV ACRMS) DN288 F02
The ∆Σ is a 2nd order modulator with excellent linearity.
It has a single-bit output whose average duty cycle is
Figure 2. Quantum Leap in Linearity Performance proportional to the ratio of the input signal divided by the
output. The single-bit output is used to selectively buffer
or invert the input signal. Again, this is a circuit with
The meter reading will fall fairly quickly at first, but will
slow down and keep slowing down and can take as long excellent linearity because it operates at only two gains:
–1 and +1. The average effective multiplication over time
as a few minutes to get back down to an effective zero. In
will be on the straight line between these two points.
contrast, the same situation using an LTC1966 gives a
true zero reading within seconds. The lowpass filter performs the averaging of the RMS
function and must have a lower corner frequency than the
Still another problem with the log/antilog approach is the
lowest frequency of interest. The LTC1966 needs only one
need for an absolute value circuit at its front end. Because
the input current takes a different path depending on the capacitor on the output to implement the lowpass filter.
The user selects this capacitor depending on frequency
input polarity, there is a polarity dependant gain error. To
range and settling time requirements, given the 85kΩ
see this effect, put an asymmetric signal waveform with
output impedance.
10% to 30% duty cycle into your RMS meter. Now swap
the inputs around. You will typically see about a 0.5% This topology is inherently more stable and linear than
difference in the readings. If you don’t see that much log-antilog implementations primarily because all of the
difference, change the signal amplitude and try again. signal processing occurs in circuits with high gain op
(Note that this effect will be apparent on DC signals as amps operating closed loop. Note that the internal scalings
well, but that most RMS meters are internally AC coupled are such that the ∆Σ output duty cycle is limited to 0% or
precluding a DC test.) Because of its symmetric ∆Σ 100% only when VIN exceeds ±4 • VOUT.
inputs, the LTC1966 does not have an absolute value
Summary
circuit, and this error is eliminated.
The LTC1966 is a breakthrough in RMS-to-DC conversion
How the LTC1966 RMS-to-DC Converter Works bringing a new level of accuracy to RMS measurements.
The LTC1966 uses a completely new implementation It is extremely simple to connect and provides excellent
(Figure 3). A ∆Σ modulator acts as the divider and a simple accuracy over temperature and time without requiring
polarity switch is used as the multiplier. Applying VOUT to trims. These features, along with its small size and
the ∆Σ reference voltage results in the VIN2/VOUT function micropower operation, make the LTC1966 suitable for a
before the lowpass filter and causes the RMS-to-DC wide range of RMS-to-DC applications, including hand-
conversion. held measurement devices.