ELEC3240 Electronics L1

ELEC3240 Laboratory 1 Basic BJT Amplifiers

I. Aim
In this exercise, two single BJT amplifier circuits will be examined. In particular, the
common emitter and common collector amplifiers will be analyzed with regard to
high and low frequency response, linearity, voltage gain and input / output resistance.

II. Equipment
 EE323 Lab 2 Panel  Signal generator
 Dual DC supply  Dual trace oscilloscope
 Decade Box Resistor  Digital multimeter

III.  Parameter
The transistor parameter, , shows large variations from device to device. It is also
affected by the transistor operating conditions (temperature and bias). For the
theoretical calculations in this laboratory you should use a mid-range value (say  =
200)

IV. Common Collector Amplifier

+15V

R3
R1 C1/2 22k
Rdecade 1k 100nF
Q1

R2 C7/8
10k 47F
vs vin
R4 R6
vout
8.2k 3.3k

For the common collector amplifier shown above, perform the following tasks.

LAB REPORT

1. [1 mark] Draw the small signal model for the experimental circuit.

2. [2 marks] Measure the input resistance (with no load connected at the

output) by applying a sinusoidal voltage (approx 100mV 10kHz) and
adjust the decade resistance, Rdecade, until vin = 0.5vs. At this point the
decade resistance value is equal to the input resistance. Calculate the
theoretical input resistance and compare this to the measured value.
ELEC3240 Electronics L2

3. [2 marks] Briefly explain why a multimeter cannot be used to

measure the small signal input resistance of the amplifier circuit.

4. [2 marks] Measure the output resistance by applying a small signal

source (approx. 100mV, 10kHz) and moving the decade resistance to
the output terminals. Adjust the decade resistance until the output
drops to half its open circuit value. The value of the resistance
required to achieve this is the output resistance. Calculate the
theoretical output resistance and compare this to the measured value.

5. [2 marks] With a load resistance of 1k and an appropriate source

voltage measure the mid-band voltage gain, Av = vout / vs, for the
circuit. Calculate the theoretical mid-band voltage gain and compare
this to the measured value.

6. [3 marks] Measure the high and low frequency –3dB points for the
circuit. Use a 1k load resistance while making these
measurements. Calculate the theoretical high and low frequency –
3dB points and compare these values with those measured.

V. Common Emitter Amplifier

+15V

R3 R5 R7
22k 3.3k C5/6 100k
0.1F
vout
R1 C1/2
1k 100nF
Q1

R2 C7/8
10k 47F
vs vin
R4 R6 R8
8.2k 3.3k 100

For the common emitter amplifier shown above, perform the following tasks.

LAB REPORT

7. [1 mark] Draw the small signal model for the experimental circuit.

8. [2 marks] Using the technique from point 4 measure the output

resistance. Calculate the theoretical output resistance and compare
this to the measured value.
ELEC3240 Electronics L3

9. [2 marks] With a load resistance of 10k and an appropriate source

voltage measure the mid-band voltage gain, Av = vout / vs, for the
circuit. Calculate the theoretical mid-band voltage gain and compare
this to the measured value.

10. [4 marks] Increase the amplitude of the input until you observe
clipping in the output waveform caused by both saturation and cut-off
in the transistor. Record the output voltage levels at which cut-off
and saturation occur. Demonstrate that these values match with the
theoretical expectation.

11. [4 marks] Measure the high and low frequency –3dB points for the
circuit. Use a 10k load resistance for these measurements.
Calculate the theoretical high and low frequency –3dB points and
compare these values with those measured. Comment on how the
bandwidth of the common emitter amplifier compares to that of the
common collector amplifier.
ELEC3240 Electronics L4

Appendix A Circuit and Component Data

Capacitors
C1/2 100nF
C3/4 22F
C5/6 0.1F
C7/8 47F

Resistors
R1 1k
R2 10k
R3 22k
R4 8.2k
R5 3.3k
R6 3.3k
R7 100k
R8 100
R9 47
R10 1

Other Components
Q1 BC337 NPN BJT: 50 < hFE < 300 for IC = 1mA
Cbc  5pF for VCE  5V; fT  200MHz for IC  1mA

Lab Panel Design

+VCC

R3 R5 R7
22k 3.3k C5/6 100k
0.1F
R1
C1/2
1k 100nF
Q1
R9
R2 C3/4 C7/8 R8 47
10k 47F 47F 100

R4 R6 C9 R10
8.2k 3.3k 33F 1
ELEC3240 Electronics L5

ELEC3240 Laboratory 2 JFET simulation exercise

I. Aim
In this exercise, a JFET will be used as an example of a depletion mode FET in the
current source and common source amplifier circuits.

II. Introduction to Simulation Software

At Callaghan there are two options for simulation software – SABER or DXP
(Protel). Generally, it is recommended that SABER be used as this software is
utilised in other courses (ELEC3250, ELEC4210) although DXP can be used if
students prefer. Note the circuit schematics shown are created in DXP.

To start the simulation software select

Start  Programs  Synopsis  Saber X-2005.09  Saber Sketch

An introductory tutorial on SABER has been created by RE Betz. This is available on

the Blackboard web site for ELEC3240 and is worth looking at to gain some
familiarity with the package.

III. FET Parameter Measurement

Our first task is to measure the VP and IDSS values for the 2N5459 n-channel JFET
that we will use for this exercise.

Drain Saturation Current (IDSS)

Perform a “DC Operating Point” analysis of the following circuit. The value of the
drain current will equal the IDSS value for the JFET.

12V
1

12V
VSRC
Q1
3 2N5459
2

GND

Pinch off voltage (VP)

Perform a “DC Transfer” analysis of this circuit varying the 5Vneg source from –8 to
0V in steps of 0.1V. By observing when the drain current starts to increase you can
determine the VP value for the JFET.
ELEC3240 Electronics L6

12V

1
Q1 12V
VG 3 2N5459 VSRC

2
5Vneg
VSRC

GND

LAB REPORT
1. [1 mark] Record IDSS value measured.
2. [1 mark] Record VP value measured.

IV. JFET Current Sources

Perform a “Vary Parameter” analysis of the circuit below, varying R2 from 5k to
600k in steps of 5k.

12V

R2
1k

VD
1

Q1 12Vpos
3 2N5459 VSRC
2

VS

R1
6.8k

GND

LAB REPORT
3. [2 marks] Measure and plot the load current / voltage
characteristic for the circuit (i.e. graph of IL versus VL). R2 is
effectively the load for this circuit. So you are to graph the
current through R2 versus the voltage across R2.
4. [1 mark] Calculate the theoretical value that load current should
be regulated to while the FET is operating in is forward active
region.
5. [2 marks] From the graph determine the current source
compliance. (The compliance is the range of voltages for which
the current source behaves as intended). Show what the
theoretical compliance range should be.
ELEC3240 Electronics L7

V. Common Source Amplifier

Simulate the following circuit.

12V

R1 Rd
3.3k
1000K Cout
VD Vout

1
470n
Cin Q1 12Vpos
Vs Rs Vin VG 3 2N5459 VSRC

100K

2
47n Vso Rl
10KHz
VSIN 20K
R2 Rso Cso
Res1 6.8k
330k 10u

GND

LAB REPORT
6. [2 marks] Set the sinusoidal voltage source to 10mVpk 5kHz by
editing the voltage source model parameters. Perform a
“Transient Analysis” over an appropriate length of time and
observe source and output voltage waveforms. Measure the
voltage gain of the circuit.
7. [1 mark] Calculate the bias current in the FET using the IDSS and
VP values obtained in section III.
8. [1 mark] Calculate the transconductance parameter, gm, for the
small signal model.
9. [1 mark] Calculate the theoretical gain of the amplifier.
10. [4 marks] Increase the amplitude of the source to 2Vpk. Re run
the “Transient Analysis” and observe the voltage levels in the
output waveform at which the JFET enters its cut-off and triode
regions of operation. Demonstrate that these values match with
the theoretical expectation.
11. [4 marks] Measure the frequency response of the circuit by
running an “AC Small Signal Analysis” with a frequency range
1Hz to 200kHz. By observing Vout determine the high and low
frequency –3dB points for the circuit. Calculate the theoretical
high and low frequency –3dBpoints for the circuit (Note for the
JFET Cgs = 2.25pF and Cgd = 6pF).
ELEC3240 Electronics L8

ELEC3240 Laboratory 3 BJT Circuits

I. Aim
In this laboratory exercise the use of a BJT in transistor based current mirrors and
differential pairs will be investigated.

II.  Measurement
Construct the circuit below.

+10V

470k 1k Vo

11

9
10

LAB REPORT

1. [1 mark] For the circuit derive an equation for  in terms of the voltage
across the collector resistor.

2. [1 mark] Hence, determine the transistors  value.

III. Matched Transistor Current Mirrors

Construct the circuit below, varying RDECADE from 100 to 2k in steps of 100.
+10V

IL

1k Rdecade VL

1 5

2 4
3 3
ELEC3240 Electronics L9

LAB REPORT

3. [2 marks] Measure and plot the load current / voltage characteristic for
the circuit (i.e. graph IL versus VL). RL is effectively the load for this
circuit. So you are to graph the current through RL versus the voltage
across RL.

4. [2 marks] From the current – voltage graph determine the Norton

resistance of the current source and its compliance (i.e. the voltage
range over which the current source regulates current to the expected
value).

5. [1 mark] Calculate the theoretical load current for the current mirror,
while operating in its linear region, and compare this to the value
measured.

6. [1 mark] Calculate the theoretical compliance range for the current

mirror and compare this to the value measured.

Repeat the previous measurements but for the current ratio mirror below. This time
vary RDECADE from 100 to 3.1k in steps of 200.
+10V
IL

1k Rdecade VL

1 5 11

2 4 9
3 3 10

LAB REPORT

7. [2 marks] Measure and plot a graph of IL vs VL.

8. [2 marks] From the current – voltage graph determine the Norton

resistance of the current source and its compliance (i.e. the voltage
range over which the current source regulates current to the expected
value).

9. [1 mark] Calculate the theoretical load current for the current mirror,
while operating in its linear region, and compare this to the value
measured.

10. [1 mark] From the Norton resistance measurements for the current
mirror and current ratio mirror estimate a value for the Early voltage
of the transistors.
ELEC3240 Electronics L10

IV. Differential Amplifier

Construct the differential amplifier circuit shown below.
+10V

1k 1k

Vout1 Vout2
8 11
Vin1 Vin2
6 9
7 10
10k 10k

10k

1 5

2 4
3 3

-10V

LAB REPORT

11. [3 marks] Connect a signal source (approx. 5Vpk 100Hz) at both vin1
and vin2 and measure the output voltages. Hence, measure the
common mode gain of the differential amplifier. Calculate the
theoretical common mode gain and compare this value with that
measured.

12. [3 marks] Connect a signal source (approx. 5mVpk 100Hz) to vin1 and
short vin2 to 0V. Hence, measure the differential mode gain of the
differential amplifier. Calculate the theoretical differential mode gain
and compare this value with that measured.
ELEC3240 Electronics L11

Appendix A CA3046 Data

The CA3046 IC contains 5 matched NPN transistors on a single 14pin IC. All
transistors, except 2 that share an emitter connection, have independent connections,
as illustrated below;
1 5

7 1 2 4

8 11 14
6 9 12

8 14 7 10 13

40 <  < 400

VBE  0.6V
VBE matched between transistors to within 5mV
 matched between transistors to within 20%
PRECAUTIONS AND HINTS

1. The pin 13 of the CA3046 (the emitter in the circuit of 4) is internally

connected to the substrate of the IC. This pin must always be connected to the
most negative rail being used. In part 7 please ensure supply rails for
thermometer circuit are changed to 0V and –10V.
2. Set the current limit of the 10V power supplies to about 50mA.
3. The pins on the IC are numbered counter-clockwise from pin 1 when viewed
from the top. The pin 1 end of the IC is marked with a white dot of “liquid
paper” on the bottom side of the IC (as the normal pin 1 identification mark on
the top side may be obscured by the heating resistor),
4. Keep all wires as short and direct as possible. Use the tools provided to cut the
breadboarding wires to the correct length.
5. You may find it easier if you temporarily remove the IC from the breadboard
when wiring up each circuit. If so be sure to replace the IC with the correct
pin 1 orientation before reapplying power.
6. Use the vertical rows on the breadboard for power supply rails and place local
bypass capacitors across these rails. (Use the small rectangular shaped 0.1F,
marked 104, provided).
7. Many of the circuits are prone to parasitic oscillations (at about 100MHz) if
they are poorly laid out. (Note if the circuit oscillates you will usually notice a
sudden unexpected drop in the temperature voltage measurement) Even with
the best layout it may not be possible to avoid oscillations when the decade
resistor is wired in the circuit (use as short as possible wires for this). In this
case place a 1nF capacitor between the transistor base and VEE (That is place a
capacitor from pins 12 to 13 in the temperature circuit and pin 2 to VEE in the
circuit of part 6).
ELEC3240 Electronics L12

ELEC3240 Laboratory 4 Power Amplifiers

I. Aim
The aim of this experiment is to look at the linearity of four power amplifiers.

II. Equipment
 EE421 complementary buffer experiment lab panel
 Dual DC supply
 Signal generator
 Dual trace oscilloscope

For all parts of this experiment a  12V power supply should be used on the
complementary buffer experiment lab panel.

III. Class B Amplifier

Connect the signal generator to V3 and use R20 (1k) as the load to Q3/Q4. Use a
triangular wave input (approx. 5Vpk 100Hz) as the voltage source.

LAB REPORT

1. [4 marks] On the same graph record the input and output voltage
signals as a function of time. Identify and explain the key
differences between the input and output waveforms.

2. [2 marks] Change the load to R19 (22). Again graph the input and
output voltage waveforms on the same graph. Explain the effect of
the reduced load resistance on these waveforms.

3. [2 marks] Change the load to C8 (0.1F). Again graph the input

and output voltage waveforms on the same graph. Explain the
change in the output voltage waveform.

IV. Class B Amplifier with Negative Feedback

Connect the class B amplifier at the output of a non-inverting operational amplifier
circuit with gain of 2 (use U1 and associated components, the class B amplifier should
be inside the op-amp feedback circuit). Use R19 (22) as the load to Q3 / Q4.

LAB REPORT

4. [4 marks] Use a triangular wave input (approx. 5Vpk 100Hz) as the

voltage source. Measure and graph on the same time scale the
input, output and op-amp output voltages. Identify and explain the
key features of the op-amp output voltage waveform.
ELEC3240 Electronics L13

5. [3 marks] Use a triangular wave input (approx. 5Vpk 10kHz) as the

voltage source. Measure and graph on the same time scale the
input, output and op-amp output voltages. Identify and explain the
distortion observed in the output waveform.

V. Class AB Amplifier
Connect the signal generator to V1 and use R20 (1k) as the load connected to V0.
Use a triangular wave input (approx. 5Vpk 100Hz) as the voltage source.

LAB REPORT

6. [3 marks] On the same graph record the input and output voltage
signals as a function of time. Identify and explain the key
differences between the input and output waveforms. Compare the
amount of crossover distortion in the class B and AB amplifier
results

7. [3 marks] Change the load resistance to R19 (22). On the same

graph record the input and output voltage signals as a function of
time. Identify and explain the key differences between the input
and output waveforms with the reduced load resistance.

VI. Class AB Amplifier with Negative Feedback

Connect the class AB amplifier at the output of a non-inverting operational amplifier
circuit with gain of 2 (use U1 and associated components, the class AB amplifier
should be inside the op-amp feedback circuit). Use R19 (22) as the load.

LAB REPORT

8. [4 marks] Use a triangular wave input (approx. 0.5Vpk 10kHz) as

the voltage source. Measure and graph on the same time scale the
input, output and op-amp output voltages. Compare the results
with those from section IV.
ELEC3240 Electronics L14

Appendix A Lab Panel Data

R1, R7 33k C1 - C4, C8 0.1F

R2, R6, R8, R9 10k C5 – C7 N/C
R3, R4, R11, R14 27
R5, R10, R13 47 D1, D2 Signal diodes
R12 220
R15, R16, R17, R18 N/C Q1, Q3 BC337 NPN BJT
R19 22 Q2, Q4 BC327 PNP BJT
R20 1k U2 741 op amp

R8 C5

+VC
+VC C6
C1
R9
R2 R1 R15
U1
VO
V2
C2 R16
R10
Q1 -VC
C7
+VC
D1 R3
R17
V1 VO R11
C3
D2 R4
R18
R5 R12 Q3
Q2
V3 VO R19
Q4
R6
C4 R20
R13
R7 R14
C8
-VC
-VC
ELEC3240 Electronics L15

ELEC3240 Laboratory 5 Op-amps

I. Aim
The aim of this exercise is to compare the theoretical and practical behaviour of some
op-amp circuits.

II. Equipment
 EE421 op-amp experiment lab panel
 Dual DC supply
 Signal generator
 Dual trace oscilloscope

For all parts of this experiment a  12V power supply should be used on the op-amp
lab panel.

III. Inverting Amplifier – Frequency Response

Construct the following circuit.
R27 10k

R9
1k
Vin -
U2 Vout
+

R23
1k

LAB REPORT

1. [2 marks] Apply a sinusoidal input voltage (approx. 1Vp-p 1kHz) and

observe Vout with the oscilloscope. Measure the amplifier’s gain
and compare this with the theoretical gain.

2. [1 marks] Increase the input voltage amplitude until the output

waveform is clipped. Record the maximum output voltage range
for linear operation. How does this value compare with that for an
ideal op-amp?

3. [2 mark] Increase the input frequency to about 150kHz and observe

the output waveform. Explain why the output waveform changes
shape. Determine an estimate of the op-amps maximum slew rate.
ELEC3240 Electronics L16

IV. Inverting Amplifier with Zero Input

Construct the circuit below, and measure the DC voltage at V out for several values of
R. Suggested values are R = 0, 330k (R20), 820k (R19) and 1.5M (R18)
R28 1M5

R21
1M5
-
U2 Vout
+

LAB REPORT

4. [2 marks] Plot Vout as a function of R. Explain the significance of

the results.

V. Half Wave Rectifier

R11
10k
Vin Vout

- D1
U2
+ V*

Let Vin be a 5Vrms sine wave. Observe Vin, Vout and V* for two input frequencies (one
very low frequency, and one where the imperfections in the rectifying action are
obvious).

LAB REPORT

5. [2 marks] On the same graph plot Vin, Vout and V* for low
frequencies.

6. [3 marks] Explain the circuit operation.

7. [2 marks] On the same graph plot Vin, Vout and V* for high
frequencies.

8. [2 marks] Explain why distortion occurs in the output waveform.

ELEC3240 Electronics L17

VI. Improved Half Wave Rectifier

R10
10k
Vout

D4
D1
R11
10k
Vin -
U2 V*
+

Let Vin be a 5Vrms sine wave. Observe Vin, Vout and V* for high input frequencies
only (use the same frequency from part 10).

Warning Be careful of the wiring here. It is easy to get the polarity of the diodes
wrong.

LAB REPORT

9. [2 marks] On the same graph plot Vin, Vout and V* for high
frequencies.

10. [2 marks] Explain why the distortion is reduced in this instance.

ELEC3240 Electronics L18

Appendix A Lab Panel Data

The layout of the panel is attached, and component values are shown below.

R1, R2 47R R16 6k8 R28 1M2

R3 4R7 R17 47k R29 100k
R4, R5 47R R18 1M2
R6 10k R19 820k C1 - C4 0.1F
R7 100R R20 330k C5 1F
R8 N/C R21 1M2 C6 - C8 0.1F
R9 1k R22 4k7
R10, R11 10k R23 1k D1 - D4 Silicon
R12 100k R24 N/C signal diodes
R13 10k variable R25 47k
R14 6k8 R26 100k U1 LM324
R15 10k R27 10k U2 741

Some of the relevant data for the op-amps are,

Vos Ioff Ibias Slew rate fT CMRRmin gainmin

741 6mV 200nA 500nA 0.5 V/s 1-2MHz 70dB 2104
LM324 7mV 50nA 250nA 0.5 V/s 1MHz 65dB 2.5104