An eye on design:

Effective embedded system software

G
ood software design is ass impor-
tant in the development of a
product as a strong foundation in Sachin P. Kamat
the construction of an edifice.
This is particularly important in the devel-
opment of an embedded system where
resources like memory, power, and pro-
cessing capabilities are limited. Continu-
ous innovation, fast-changing consumer
needs, and the drive to remain ahead of
competitors in terms of market share and
product profile has drastically reduced the
time to market a product and its develop-
ment life cycle. The cost of defect correction
increases with the development lifecycle
stage. Post-release defect fixing is the most
costly. Thus, it is important to have good
software design and a process in place so
that stringent deadlines can be met and
rework activities minimized.
Good software design should effec-
tively utilize all the hardware capabilities
provided by the system-on-chip (SOC).
Present day SOCs can contain over 30 dif-
ferent intellectual properties with single-
or multicore processors and several
hardware accelerators for multimedia and
graphics data processing. Some SOCs also
contain a dedicated digital signal proces-
sor (DSP) for performing specialized
tasks. A system-level block diagram of a
typical SOC used for general application
purposes in consumer and entertainment
electronic products like personal digital
assistants (PDA), smart phones, portable
media players, gaming consoles, car navi-
gation systems, and DVD players is shown
in Fig. 1.
An engineer entrusted with the devel-
opment of a specific module or a sub-
system should start by studying and ana-
lyzing the SOC architecture as a whole
and then move toward the analysis of the
particular module under consideration. A
top-down design approach helps in tak-
ing into consideration the interdepen-
dencies between various modules, and
thus resource sharing and interface de-
sign can be done in an effective manner.
A post-processor, for example, is one

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System Peripherals
Timers
PLL
DMA
Keypad
Touch Screen
High Speed Bus
Connectivity
Audio I/F
Serial I/F
Infrared I/F
Modem I/F
USB I/F
Fig. 1 Block diagram of a typical general purpose application processor SOC.
such module present in a multimedia
device that is utilized by many other
modules like the camera and video and
image decoders for doing color space
conversion (YUV to RGB and vice
versa), image scaling, and cropping or
rotating operations. It is essential to
design this module in such a way that
multiple modules can access it in an
optimal and nonconflicting way. Fig. 2
illustrates the use of a post processor
by multiple peripherals in a multimedia
embedded system.
Hardware architecture analysis
should immediately be followed by
software requirement analysis to under-
stand the software requirements and
map it to hardware capabilities. The
hardware might provide several ad-
vanced features that may not be possi-
ble to implement in software all at once
for various reasons. However, the
design should be accommodative
enough for possible feature addi-
tion and expansion at a later date.
For example, the SOC might sup-
port dual external camera inter-
faces. But it may be required to
attach only one camera for a par-
ticular model of a product built
using this SOC. The software
design should be such that it pro-
vides provision for connecting
and using a second external
camera for a different model of
the product using the same SOC.
Similarly, upgrading to multiple Fig. 2 A block diagram, which illustrates the usage of a
memory cards or a higher resolu- post-processor module by multiple peripherals for color of other peripherals during the
tion of LCD should also be pos- space conversion.
34
Memory is an important and sparse
Multimedia resource in any embedded system, and
Acceleration it should be used very conservatively.
Camera I/F Only the required size of memory
Video Engine should be allocated at the required
time, and it should be freed immedi-
CPU Image Engine
ately upon completion of the operation.
2D/3D Graphics The holding up of memory unneces-
TV Out sarily when it is not required deprives
other applications from utilizing it,
and hence, they might fail to load.
Wherever possible, memory should be
shared between modules that operate
on the same data. This conserves
Memory Interfaces memory and improves the performance
of the system by reducing the number
of memory transfer operations. A
shared memory system requires well-
LCD designed memory protection and a
Controller
synchronization mechanism to avoid
simultaneous read and write operations
and to avoid overflow and underflow
conditions. Care should also be taken
to avoid possible race conditions.
sible without architectural redesign. Engineers involved in the develop-
SOCs designed for multimedia applica- ment of device drivers should give
tions generally have multiformat codecs special consideration to the usage of
(MFC) implemented in hardware. MFC cache memory, direct memory access
can support simultaneous encoding and (DMA), and interrupt handling mecha-
decoding of multiple streams of multi- nism. Making a memory cacheable
media data of different formats like improves the performance of the sys-
MPEG-4, H.263, and H.264. The design tem. At the same time, it also adds a lot
should take into consideration the use of overhead if there are too many
cache misses. Direct memory access
helps in faster transfer of bulk data
without the intervention of the pro-
cessing unit. Similarly, interrupt driven
mechanism is more efficient than poll-
ing as it frees the processing unit from
constant monitoring. It also improves
the responsiveness of the system. Inter-
rupt handling mechanism should be
designed in such a way that it does not
case scenarios where these features hamper the real-time performance of
may be used and other advanced the system.
software application features that may An SOC contains several clock sources.
become essential in the near future. The main clock, or processor clock,
which runs at the highest frequency
is primarily responsible for the
overall system performance and
Video Image power consumption. The periph-
Camera
Decoder Decoder
erals are connected by a peripheral
YUV YUV YUV clock and the bus may be clocked
Post by the hardware clock. All three
Processor clocks are in some definite propor-
RGB tion with the main clock (e.g., 4:2:1
or 2:1:1). These clocks can further
be gated or subdivided using clock
LCD Display TV Out
dividers to lower the frequency as
per the requirements. Care should
be taken not to affect the operation
clock alteration.
IEEE POTENTIALS
 Sometimes it is not possible for a par-
ticular peripheral or a piece of software
code to handle and process all possible
cases of input data. A stable software
design should have a mechanism to
handle unsupported and corrupted data
gracefully. Wherever possible, a soft-
ware workaround and fallback mecha-
nism should be provided to handle these
kind of invalid data.
Power is another important and scarce
resource in battery powered devices. The
design should take into account power
management aspects to enhance the bat-
tery life and reduce the heat dissipation
of the chip. Power management features
are provided by the hardware chip as
well as by the operating system running
on it. Dynamic voltage and frequency
scaling (DVFS) is a popular power man-
agement technique employed in embed-
ded systems. The software design should
encompass these features and utilize the
hooks provided by the hardware and
software platforms.
Wherever there is a possibility of
implementing a design in multiple ways,
the engineer should analyze and assess
each method and choose the one that is
most optimal. Good software design
should exploit all the features provided
by the hardware and give provisions for
developing scalable, portable, modular,
and highly efficient software in terms of
power consumption, memory usage,
and performance. Since a high perfor-
mance output generally requires more
memory and consumes more power,
good software design is one that is a bal-
anced tradeoff between high perfor-
mance, low memory usage, and low
power consumption.
Read more about it
• T. A. Henzinger and J. Sifakis,
“The discipline of embedded systems
design,” Computer, vol. 40, no. 10, pp.
32–40, Oct. 2007.
• V. Narayanan and Y. Xie, “Reli-
ability concerns in embedded system
designs,” Computer, vol. 39, no. 1, pp.
118–120, Jan. 2006.
About the author
Sachin P. Kamat (sachin.kamat@ieee.
org) received his bachelor’s degree in ele-
ctrical and electronics engineering from
the National Institute of Technology,
Karnataka, India, in 2003. Currently he is
working as development lead with Sam-
sung India Software Operations, Banga-
lore, India, handling the software design
of high-end multimedia phones.

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