14-3 IEEE Asian Solid-State Circuits Conference

November 16-18, 2009 / Taipei, Taiwan

A 400-MHz/900-MHz/2.4-GHz Multi-band FSK

Transmitter in 0.18-μm CMOS
Kuan-Chao Liao, Po-Sheng Huang*, Wei-Hao Chiu, and Tsung-Hsien Lin
Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taiwan
*Airoha Technology Corp., Taiwan

ABSTRACT- A multi-band FSK transmitter (Tx) is section II, the Tx architecture is presented. Section III
presented in this paper. The Tx is designed to operate at the discusses key building blocks, including the proposed
ISM frequency bands at 433/868/915 MHz, 2.4 GHz, and MICS wideband mixer and VCO. In Section IV, experimental
band at 402~405 MHz, and supports a data rate well over 1 results are presented, and the conclusions are given in
Mbps. The Tx adopts an analog modulator which allows a
Section V.
deviation frequency ranging from 714 kHz to 3.2 MHz. In
addition, this work proposes an inductor-less wideband mixer
and a voltage-controlled oscillator to save the chip area. II. PROPOSED TRANSMITTER ARCHITECTURE
Fabricated in a 0.18-ȝm CMOS process, the proposed Tx
consumes 8.9 mA to 12 mA from a 1.8-V supply voltage at There are two general approaches to design a FSK Tx:
different frequency bands. The measured FSK errors range mixer-based and PLL-based. Several PLL-based Tx
from 13.9 % to 15.4 %, which are adequate for most low-cost topologies exist, each has its own serious shortcomings. For
wireless applications. The proposed multi-band Tx occupies an
area of 1.6 mm × 1.9 mm.
example, the open-loop Tx suffers from carrier frequency
drift; while the data rate of the closed-loop Tx is bounded by
I. INTRODUCTION the loop bandwidth. For moderate-to-high data rate system,
mixer-based Tx is often adopted. However, this is usually at
The deployment of low-power low-cost short-range the cost of higher power consumption and larger chip area,
wireless data communication systems operating in the since more circuit blocks are required in a mixer-based
license-free industrial, scientific, and medical (ISM) bands is architecture.
likely to expand dramatically in the near future. The As depicted in Fig. 1, the proposed FSK Tx is a mixer-
allocated radio frequency spectrum and the associated based design. The FSK modulation signal is generated in the
certification requirements for ISM bands differ widely from analog modulator according to the baseband data. The
region to region. In the United States, an unlicensed ISM modulator output is then filtered and frequency up-converted
band for continuous transmission is located between via a wideband mixer. Finally, a PA driver is used to drive
902~928 MHz. In the European Union, two 2-MHz-wide an antenna. To support major ISM bands below 2.4 GHz, the
bands are located at 433 MHz and 868 MHz. In Japan, ISM PLL (VCO) is designed to operate from 3 GHz to 5 GHz.
bands exist at 426, 449, and 469 MHz. In addition, the ISM The VCO output is then frequency divided to generate
band allocated at 2.4~2.48 GHz is almost universally quadrature local-oscillator (LO) signal at proper frequencies.
available. To accommodate these frequencies in one radio, a To demonstrate the operation at the three major bands, an
device supporting multi-band operation is required. integer-N PLL is used (i.e. not all frequencies are supported
Typical short-range radios choose non-coherent FSK as
in this prototype).
the signaling scheme. To meet the needs of different
applications, the transceiver must accommodate a wide range Wideband
Mixer
of data rates and FSK deviation frequencies. Consequently, I/Q
Baseband PA
the modulation index, ȕ, defined in terms of the peak FSK Data
Analog
Filter Driver
Modulator
deviation frequency (fdev) and the data rate (fdata) as ȕ =
2×fdev/fdata, also varies widely. For typical G/FSK 2.4 GHz/
I/Q 900 MHz/
applications, the transceiver must support a modulation 400 MHz/
index ranges from 0.2 to 5. This adds to the design difficulty 3 GHz ~ 5 GHz
VCO
in a FSK radio.
f REF
In this paper, a multi-band FSK transmitter (Tx) designed PFD/CP LPF Ί2 Ί2 Ί2

for 400-MHz/900-MHz/2.4-GHz ISM bands is presented. To

reduce the chip area, inductor-less circuits are proposed to ΊN
implement the wideband mixer and voltage-controlled
oscillator (VCO). This work consists of a programmable
analog modulator, a filter, a multi-band PLL-based Fig. 1. Simplified block diagram of the proposed multi-band FSK
frequency synthesizer, a wideband mixer, and a PA driver. In TX.

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 III. BUILDING BLOCK IMPLEMENTATIONS
A. Analog Modulator and Low-Pass Filter
Conventionally, the IF modulation signal comes from
digital baseband followed by DACs and low-pass filters.
Although this structure is straightforward, it may suffer from
higher power consumption and larger silicon area, especially
when the data rate is increased. To avoid these potential
issues, the analog modulator is adopted in this work, as
shown in Fig. 2 [1]. In this modulator design, the deviation
frequency is made programmable by switching the resistor
arrays.
A low-pass filter following the modulator serves to limit
the signal bandwidth and removes the harmonic contents of
the modulation signal [2]. The filter incorporates a 2nd-order
active-RC topology. Some form of RC calibration is required
to tightly control the circuit time constants of the filters and
the modulator simultaneously [3].
+_
+
IIF
+ _
VBB
_
+
QIF
_
+_
Fig. 2. Analog modulator architecture.
B. Proposed Wideband Mixer
To support multi-band operation while avoid using
multiple LC tanks, a wideband mixer is required.
Unfortunately, typical resistor loading causes a severe trade-
off between bandwidth and power consumption. To address
this difficulty, a broadband circuit technique is applied to a
double-balanced mixer. Fig. 3 depicts the proposed
wideband mixer. Compared to a conventional double-
balanced mixer, the proposed one incorporates the Cherry-
Hopper amplifier, in which a local feedback is applied to
broaden the circuit bandwidth, as the loading stage [4]. In
Fig. 3, both I/Q paths are added in current and drive the
Cherry-Hooper loading stage. However, the voltage
headroom of the circuit will be much limited due to the use
of Cherry-Hooper topology as the output loading. To
alleviate this problem, folding technique is applied to the
input (IF) port to reduce the number of stacked transistors.
Also, in the consideration of power consumption, the current
will be scaled down when the mixer operated at lower bands.
The simulation result of the proposed mixer is shown in
Fig. 4. The simulation is performed with a LO voltage swing
of 400 mV. The input at the IF port is a 1-MHz 1-mV signal.
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From this figure, the f3dB is about 4 GHz, which is a
considerable bandwidth.
Cherry-Hooper Amplifier
VRF
- +
I path Q path
VIF,Q+ VIF,Q-
VLO,I+ VLO,I+ VLO,Q+ VLO,Q+
VIF,I+ VIF,I-
VLO,I- VLO,Q-
Fig. 3. Proposed double-balanced mixer with the Cherry-Hopper
loading stage and folded IF port.
Fig. 4. Simulation result of the proposed wideband mixer; the
circuit bandwidth is around 4 GHz.
C. Proposed Voltage-Controlled Oscillator
In order to achieve the goal of area saving and wide
frequency tuning range, this work chooses an inductor-less
architecture to realize the VCO. Conventional ring oscillator
employs multi-stages connected in a positive feedback loop
to generate oscillation. This usually leads to large power
consumption. The circuit described in [5] proposed a two-
stage ring VCO and can achieve low-power operation.
However, this is at the cost of reduced signal swing which
results in inferior phase noise.
The proposed inductor-less VCO is shown in Fig. 5. Two
cross-coupled transistor pairs, M1/M2 and M3/M4 form the
upper and lower positive-feedback latches, respectively. The
oscillation process can be conceptually described as follows.
Assuming at some point of time, voltage VA is high; the
voltage VB will be low, since M1/M2 form a latch. It follows
that M2 is on while M1 can be considered off. The
conducting path via M2 now carries a current to charge up
VD. As the voltage VD increases, VC decreases (since M3/M4
form the lower latch). Meanwhile, the increase in voltage VD IV. EXPERIMENTAL RESULTS
also pushes the VB higher. If VB is higher than VC more than
The proposed multi-band FSK Tx is fabricated in the
transistor threshold voltage, M1 will be turned on. This in
TSMC 1P6M 0.18-μm CMOS process. Three major
turn creates a current path to charge up VC. Meanwhile, the
frequency bands (400-MHz/900-MHz/2.4-GHz) are verified
increase in VD eventually turns M2 off, stopping the charging successfully. Only the results measured at the 2.4-GHz band
process for voltage VD. Next, what happens at the right-hand are shown for conciseness.
side of the circuit (VA and VC) is the same as that at VB and Fig. 6 shows the output spectrum of the FSK Tx when the
VD. An oscillation is therefore sustained. baseband data is “1”. In this figure, the main tone is the
modulated signal, while the first tone in the left is the LO
leakage, and the second tone in the left is the image. The LO
R1 R1
Vo+ Vo-
leakage is about -37 dBc and the image is around -36 dBc.
VA VB Fig. 7 shows the measured eye-diagram when the input data
M1 M2 are alternating between “1” and “0”, at a data rate of 1 Mbps.
R2 The plot shows a good opening eye. Fig. 8 plots the
CTUNE
measured frequency detection results at a data rate of 1 Mbps.
Both Fig. 7 and Fig. 8 demonstrate a successful operation of
VCTRL the proposed FSK Tx.
VC VD

M3 M4

Fig. 5. Proposed inductor-less VCO.

Notice that, the proposed inductor-less VCO architecture
looks similar to a typical relaxation oscillator. The main
difference is that the lower transistors in the proposed VCO
are configured as a latch; while in a relaxation oscillator, the
lower part is a current source. Replacing the current source
with a latch allows the VCO to operate at higher speed and
dissipate less power. In the proposed VCO, the frequency
tuning elements is composed of MOS varactors and a
switching-capacitor array [7]. 3-bit digitally-controlled
capacitance array is incorporated to cover the desired
frequency range from 3.2 GHz to 4.8 GHz. A linearization Fig. 6. Measured output spectrum with fixed input data “1” at the
2.4-GHz band.
scheme is adopted by shifting the DC bias point of the MOS
varactors to widen the linear frequency tuning range.
The measured VCO phase noise at 2.4 GHz (at the output
of the divide-by-2 circuit following the 4.8-GHz VCO) is -97
dBc at 1-MHz offset from the carrier. Table 1 lists the
measured VCO performance of this work and some other
inductor-less VCOs [5,8]. Based on the FOM formula in [6],
the proposed VCO compares favorably.
Table 1. Comparison of the inductor-less VCO FOM
Fig. 7 Measured eye-diagram
This Work [5] [8]
Power 4 mW 17 mW 15 mW
Center Frequency 2.4 GHz 3.6 GHz 29 GHz
Offset Frequency 1 MHz 1 MHz 10 MHz
Phase Noise -97 dBc/Hz -90 dBc/Hz -96 dBc/Hz
FOM 158 148.9 153

In short, the proposed VCO architecture reuses the same

current for the upper latch and lower latch, which is a key to
achieve low power and high oscillating frequency. Fig. 8 Measured frequency detection result.

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 The FSK error measured at the 400-MHz, 900-MHz, and
2.4-GHz bands are 13.88%, 14.68%, and 15.38%,
respectively. Operated from a 1.8-V supply voltage, the
current consumptions at the three bands are 8.9 mA, 11.5
mA, and 12 mA, respectively. The chip micrograph is shown
in Fig. 9. The whole multi-band Tx occupies an area of 1.62ʳ
mm ×ʳ 1.9 mm, including the ESD-protection pads. Finally,
Table 2 summarizes the experimental results.
V. CONCLUSION
In this paper, a multi-band FSK Tx is implemented to
operate at the 400-MHz/900-MHz/2.4-GHz bands. The Tx
adopts a mixer-based architecture and is designed to support
a data rate over 1 Mbps. To reduce the chip area, several
inductor-less circuits are devised. A mixer which
incorporates a Cherry-Hopper amplifier as the loading stage
is proposed to widen the circuit bandwidth without resorting
to the inductive-peaking technique. In the oscillator design,
the proposed VCO adopts the current reuse principle to
strengthen the latches for a given current. It achieves a
higher frequency operation at lower power consumption,
resulting in a better VCO FOM among inductor-less
architectures. The proposed Tx is verified in a 0.18-μm
CMOS process, and is suitable for low-cost wireless
applications.

ACKNOWLEDGEMENT

The authors wish to thank the National Chip

Implementation Center (CIC), Taiwan, for fabricating this
chip. This work is supported by the National Science
Council, Taiwan, ROC.

REFERENCES
Fig. 9 Chip photo.
[1] H. Darabi, B. Ibrahim, and A. Rofougaran, “An Analog GFSK
Table 2 Summary of the Experimental Results Modulator in 0.35-ȝm CMOS,” IEEE J. Solid-State Circuits,
vol. 39, pp. 2292-2296, Dec. 2004.
Process TSMC 1P6M 0.18-ȝm CMOS [2] K. Linggajaya, D.-A. Anh, M.-J Guo, and T.-K Seng, “A New
Active Polyphase Filter for Wideband Image Reject
Supply Voltage 1.8 V Downconverter,” in Proc. IEEE ICSE2002, pp. 213-217. Dec.
2002
Modulation 2FSK [3] Y.-C. Chen, W.-H. Chiu, and T.-H. Lin, “A 120-MHz Active-
RC Filter with an Agile Frequency Tuning Scheme in 0.18-μm
Data Rate 1 Mbps
CMOS,” in Proc. IEEE VLSI-DAT, pp. 208-211, April 2008.
FSK fdev 714 kHz - 3.2 MHz [4] B. Razavi, Design of Integrated Circuits for Optical
Communications, McGRAW-HILL, International Edition
Operation Band 400 MHz 900 MHz 2.4 GHz 2003.
[5] W.-H. Tu, J.-Y. Yeh, H.-C. Tsai, and C.-K. Wang, “A 1.8V
LO Leakage -28.5 dBc -33.8 dBc -37.4 dBc 2.5-5.2 GHz CMOS Dual-input Two-stage Ring VCO,” in
Proc. IEEE AP-ASIC2004, pp. 134-137. Aug. 2004
IMRR -33.3 dBc -40 dBc -36.2 dBc [6] Donhee Ham and Ali Hajimiri, “Concepts and Methods in
Optimization of Integrated LC VCOs,” IEEE J. Solid-State
OP1dB -3.9 dBm -2.8 dBm -3.1 dBm Circuits, vol. 36, pp. 896-909, June 2001.
Phase Noise -114 -107.9 -97 [7] T.-H. Lin and W. J. Kaiser, “A 900-MHz 2.5-mA CMOS
Frequency Synthesizer with an Automatic SC Tuning Loop,”
at 1-MHz offset dBc/Hz dBc/Hz dBc/Hz IEEE J. Solid-State Circuits, pp. 424-431, March 2001.
Mixer Current 1.7mA 2.6mA 2.8mA [8] J.-O. Plouchart, J. Kim, N. Zamdmer, M. Sherony, Y. Tan, M.
Yoon, M. Talbi, A. Ray, and L. Wagner, “A 31 GHz CML
FSK Error 13.88 % 14.68 % 15.38 % Ring VCO with 5.4 ps Delay in a 0.12-ȝm SOI CMOS
technology,” in Proc. IEEE ESSCRIC, pp. 357-360, Sept.
Output Power -12 dBm -14.5 dBm -19.5 dBm 2003.
Current
8.9 mA 11.5 mA 12 mA
Consumption
Chip Area 1.62 mm × 1.9 mm

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