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00 01 00 11 100000000000 10

1.5 Encode the following words into bits using the ASCII encoding table in Figure 1.5.
a. LET
Solutions
b. to Homework – 1
RESET!
EE / CSc.120A : Logic Design
T9.Net
Wintera)2010
1001100 1000101 1010100
b) 1010010 1000101 1010011 1000101 1010100 0100001
c) 0111001 0101110 1001110 1100101 1110100
1.6 Convert the following binary numbers to decimal numbers:
a. 100
b. 1011
c. 0000000000001
d. 111111
e. 101010
a) 4
b) 11
c) 1
d) 63
e) 42 1.1 Solutions to Exercises b 3
1.7 Convert the following binary numbers to decimal numbers:
a. 1010
a. 000111
4 c 1 Introduction b.
b. 1111
1000000
c.
c. 11001100
11110
d. 11111
a.d. 9111100
e. 10111011001
e. 15
b. 0011010
a)
a)c.10
7 32
b)
b)d.64
15140
c)
c) 204
30
a) 1001
d)
d) 31
60
b)
e) 1111
e) 1497
26
c) 100000
1.8
1.9 Convert
Convert
d) 10001100the
thefollowing
followingbinary numbers
decimal to decimal
numbers numbers:
to binary numbers using the subtraction
method:
1.13 Convert the following decimal numbers to binary numbers using the divide-by-2
a. 9
method:
a.b. 19
15
c.
b. 30 32
c.d. 64
140
a)d.1001
128
b)10011
a) 1111
c) 11110
b) 100000
d) 10001100
c) 1000000
d) 10000000
1.10 Convert the following decimal numbers to binary numbers using the subtraction
method:the following decimal numbers to binary numbers using the divide-by-2
1.14 Convert
method:
a. 19
a.b. 330
c. 65
b. 64
c.d. 90
128
a)d.10011
100
b)11
a) 11110
c) 1000001
b) 1000000
d)1011010
c) 10000000
d) 1100100
1.11 Convert the following decimal numbers to binary numbers using the subtraction
method:the following decimal numbers to binary numbers using the divide-by-2
1.15 Convert
method:
a. 3
a.b. 23
65
b.
c. 8790
c.d. 123
100
Department
a) 11of Electrical Engineering
d. 101
University of California, Riverside
b)10111
a) 1000001
c) 1010111
b) 1011010
d)1111011
c) 1100100
d) 1100101
1.12 Convert the following decimal numbers to binary numbers using the divide-by-2
c. 0F100
c. 11110001
d. 1101101111100
d. 100
a) 255
a) CD
b) 61602
Solutions
b) A5
to Homework – 1
EE / CSc) F1
c) 120A
61696 : Logic Design
d)2010
Winterd) 1B7C
256
1.18 Convert
1.23 Convert the
the following
followinghexadecimal
binary numbers to hexadecimal:
numbers to decimal:
a. 10
a. 11100111
b. 11001000
b. 4E3
c. FF0
c. 10100100
d. 011001101101101
d. 200
a)
a) 16E7
b) 1251
b) C8
c) A4
c) 4080
d) 512
d) 336D
1.19 Convert
1.24 Convert the
the decimal
following hexadecimal
number numbers
128 to the to binary:
following number systems:
a. binary
a. FF
b. hexadecimal
b. F0A2
c. base
c. 0F100
three
d. base
d. 100 five
a)e.1111
base1111
fifteen
b) 1111 0000 1010 0010
a) 10000000
10 c 1 Introduction b)c) 80
0000 1111 0001 0000 0000
d) 0001 0000 0000
c) 11202
d) 1003
1.20 Convert
} the following hexadecimal numbers to binary:
e)
} a.884F5E
1.30 Suppose
b. 3FAD a particular TV set-top box at a hotel supports encrypted video, and that
decrypting
c. 3E2A each video frame consists of three sub-tasks A, B and C. The execution
14
14 cc 22 Combinational
Combinational Logic Design
times of each task on a microprocessor versus a custom digital circuit are 100 ms
d. DEED
versus 1 ms for A, 10 ms versus 2 ms for B, and 15 ms versus 1 ms for C. Partition
2.6 A a) 0100
tasks1111
themodern 0101
desktop
among 1110
a processor, such as
microprocessor thecustom
and Pentium 4, hascircuitry,
digital about 300 million
such that transitors.
you mini-
b) 0011
How the
mize 1111
bigamount1010
would ofa 1101
modern desktopcircuitry,
custom digital processor be meeting
while if we used vacuum tubes
the constraint of the
of decrypt-
1940s,
ing assuming
at least a vacuum
30 frames tube has an area of 1 square inch?
per second.
300,000,000 transistors * 1 in2/transistor
A microprocessor-only implementation = 300,000,000
requires
2
100ms forinA,(over
10ms2for
million
B, andsquare
15ms
feet)C - 125ms total or 8 frames per second (fps). Changing sub-task A to a custom
for
digital circut reduces the per-frame execution time to 1ms+10ms+15ms = 26ms,
Section 2.3: permits
which The CMOS Transistor
in excess of 30fps to be decrypted.
1.31
2.7 The owner
Describe theofbehavior
a baseball stadium
of the CMOS wants to eliminate paper tickets for gaining
transistor
entrance to baseball
circuit shown games.
in Figure She
2.63, wouldindicating
clearly like to sell tickets electronically
x and allow
those
when attending the circuit
the transistor game to enter by scanning their fingerprint. The owner has two
conducts.
options for installing the fingerprint recognition system. The first y option is a system
When x is a logical 0, the top transistor will con-
that implements the fingerprint recognition using software executing on a micropro-
duct, otherwise the top transistor will not con-
cessor. The second option is a custom digital circuit designed specifically for finger-
duct. Likewise, when y is a logical 0, the bottom
print recognition. The software system requires Figure 2.63: Circuit
5.5 seconds combiningan
to recognize
transistor will conduct and not conduct other- two CMOS transistors.
individual’s fingerprint and costs $50 per unit, whereas the digital circuit requires
wise.
1.3 seconds for recognition and costs $100 per unit. The owner wants to ensure that
2.8 Ifeveryone
we applyattending
a voltagethe
togame
the gate
willofbea able
CMOS transistor,
to enter why doesn’t
the stadium before the
the current flow
game starts,
to the
and transistor’s
thus needs to source
be ableortodrain?
support 100,000 people entering the stadium within 15
minutes. Compare
An insulator exists the two alternative
between the gate andsystems in terms of
the source-drain how many
channel, people cur-
prohibiting per
minute each system can support, how many units
rent from flowing to the transistor’s source or drain. of each system would be needed to
support 100,000 people in 15 minutes, and what the overall cost of installation
would
Section 2.4: be for theLogic
Boolean two competing systems. Blocks for Digital Circuits
Gates -- Building
The software system can support 60s/m / 5.5s/person = 10.910 people/m; the custom
2.9 Which Boolean operation, AND, OR or NOT, is appropriate for each of the follow-
digital circuit can support 60s/m / 1.3s/person = 46.154 people/m.
ing:
Wea. need
Detecting
to findmotion
how inmanyany systems
motion sensor surrounding
are needed a house
to support (eachpeople
100,000 motioninsen-
15
mins,sor
oroutputs when motion
100,0001people / 15m =is6,666.667
detected).people/m. We need 6,666.667 people/m
/ 10.910 people/m
b. Detecting that=three
612 buttons
softwareare
systems
being or 6,666.667
pressed people/m / (each
simultaneously 46.154button
people/m
out-
= 145puts
custom
1 whendigital circuit
a button is systems.
being pressed).
Department of Electrical
c. Detecting theEngineering
absence of light from a light sensor (the light sensor outputs 1
Using
University the light
ofwhen software
California, system would cost 612 systems * $50/system = $30,600; using
isRiverside
sensed).
the custom
a) OR digital circuit system would cost 145 systems * $100/system = $14,500.
b) AND
1.32 How many possible partitionings are there of a set of N tasks where each task can be
c) NOT
implemented on the microprocessor or as a custom digital circuit?
puts2.13
Figure 1 when
when:a (a)
button
x =is being
1 and pressed).
y = 0, (b) x = 1 and y = 1.
c. Detecting the absence of light from a light sensor (the light sensor outputs 1
0
when light is sensed). 0
a) OR
Solutions to Homework –x 1 y 0 y 1 to Exercises b 15
x 2.1 Solutions
b) 120A
EE / CS AND : Logic Design F F
Winterc)2010
NOT y y
c) WaterValveOpenx = SystemEnabled AND NOT (RainDetected OR FreezingTem-
2.10 Convert the following English problem statementsxto Boolean equations:
peraturesDetected) 1 1
a. A flood detector should (a) turnFon a pump if water is detected and the system is set
2.11 Evaluate the Boolean equation = (a AND b) OR c (b) OR d for the given values of
to enabled
variables a, b, c, and d:
b. A house
2.16 Convert each energy monitor should
of the following sound
equations an alarm
directly it is nightcircuits:
to gate-level and light is detected
a. inside
a=1, b=1,
a room c=1,
but d=0 is not detected.
motion
a.F = ab’ + bc + c’
b. An
c. a=0, b=1, c=1, d=0should open the sprinkler’s water valve if the system is
b.F =irrigation system
ab + b’c’d’
c. enabled
a=1, b=1,and c=0,
niether
d=0rain nor freezing temperatures are detected.
c.F = ((a + b’) * (c’ + d)) + (c + d + e’)
a) d.
Pumpa=1, = WaterDetected
b=0, c=1, d=1AND SystemEnabled
b) a a AND NOT 2.1 Solutions to Exercises b 15
a)Alarm
F = (1 =AND
Night AND LightInsideDetected
b 1) OR 1 OR 0 = 1 OR 1 OR b 0=1
MotionDetected
b) F = (0 AND 1) OR 1 OR 0 = 0 OR 1 OR 0 = 1
F
c)c)WaterValveOpen
F = (1 AND c 1) OR 0 OR 0 = 1 FOR 0AND
= SystemEnabled OR 0NOT= 1 (RainDetected OR FreezingTem-
peraturesDetected)
d) F = (1 AND 0) OR 1 OR 1 = 0 OR 1 OR c 1=1
2.11
2.12 Evaluate
Evaluatethe the Boolean equation
equation F = a
Boolean(a) (aAND
AND ORc)AND
d (bb)OR c OR ddfor
forthe
thegiven
givenvalues
values of
of
variables
variablesa, a,b, c,and
b,c, andd:
d: (b)
a.a. a=1,
a=1,b=1,
b=1,c=1,
c=0,d=0
d=1
b.b. a=0, a
a=0,b=1,
b=0,c=1,
c=0,d=0
d=1b
c.c. a=1,
a=1,b=1,
b=0,c=0,
c=0,d=0
d=0
c
d.d. a=1, b=0, c=1, d=1
a=1, b=0, c=1, d=1d
F
a)a)FF==(11 AND (11) OR 0)
1 OR
AND0 =11=OR 1 OR1 0AND
1 AND =1 1=1
b)
b)FF==(0 0 AND (01) OR 0)
1 OR
AND0 =10=OR 1 OR0 0AND
0 AND =1 1=0
c)c)FF==(1 AND 1) OR 0 ORe 0 = 1 OR 0 OR 0 = 1
1 (0 0) AND 0 = 1 AND 0 AND 0 = 0
(c)
d)
d)FF==(1 1 AND (00) OR 1)
1 OR
AND1 =10=OR 1 OR1 1AND
1 AND =1 1=1
2.12
2.13 Evaluate
2.17 Evaluateeach
Convert the
theBoolean
Boolean equation FF==aaAND
equationequations
of the following AND (b(bOR
directly OR (c ANDdd))
to c)AND
gate-level for for
the the
circuits: given values
given of
values
variables
ofa.Fvariables
a, b,
a, c,
b,and
c, and
d: d:
= a’b’ + b’c
a.
a. 2.1 Solutions to Exercises b 17
b.F = b=1,
a=1,
a=1, b=1,+c=0,
ab bc d=1
c=0, d=1
+ cd + de
b.b. a=0,
a=0,b=0,
b=0,c=0,c=0,d=1d=1
c.F =
c.c. a=1,
a=1, ((ab)’
b=0,
b=0,c=0, +
c=0,d=0d=0(c)) + (d + ef)’
18 c 2 Combinational Logic Design
d.d. a=1,
a=1,b=0,a c=1,
b=0, c=1,d=1d=1 a
a)a)FF==11AND AND (1
(1OROR 0)
(0AND
AND 1 =
1)) 1= AND
1 AND1 AND
(1 b 1== 1 1 AND 1 = 1
sensor withboutput S that indicates whether F music 0)
OR is playing (S=1 means music is
b)
b) FF==00ANDAND (0
(0 OR
OR 0)
(0 AND
AND 1 =
1)) 0= AND
0 AND0 AND
(0
c a motion sensor M that indicatesc whetherOR 1 =
0) 0 0 AND 0 = 0
=
playing) and people are dancing (M=1
c)
c)FF==11people
means
AND
AND(0 (0OR
are OR 0)
(0AND
ANDThe
dancing).
00))
= strobe
1= AND
1 AND0 AND OR0an
light(0has
= input
0) 0 1 AND
= 0 =turns
L that 0 Fthe light on
(a)
d)
d) FF ==11AND
AND (0
(0 OR
OR 1)
(1 AND
AND 1 =
1)) 1= AND
1 AND1 AND
(0 d
OR 1 =
1) 1
= 1 AND
when L is 1, and the disco ball has an input B that turns the ball on when 1 = 1 B is 1. The
2.13 DJ wants
2.14 Evaluate
Show theBoolean
thethe disco ball
conduction to turn
equation
paths andFon only
o=utput
a ANDwhen(bof
value music
OR
ethe(cORisAND
playing
gated)) and
for nobody
givenis values
the circuit
transistor danc-
in Fig-
ing,
of and the
urevariables
2.11 DJb,
when:
a, wants
(a)c,xandthe
= d:1strobe
and light
y = to0,turn
(b)on
x only
= 1when and ymusic
(b)= 1.is playing and peo-
ple
a. are
a=1,dancing.
b=1, c=0, Using d=1AND,aOR, and NOT gates, create a simple digital circuit to
activate: (a) the disco 0ball, 0 andb (b) the strobe light. 0
1
b. a=0, b=0, c=0, d=1 c
S y Sy
c. a=1, b=0, c=0, d=0 1 d1 1 F1
Mx B Mx L
d. a=1, b=0, c=1, d=1(a) e F F
1 f0 1 (b)
(c) 1
a) F = 1 AND (1 ORx(0 AND 1))y = 1 AND (1 OR x0) = 1 ANDy1 = 1
2.18 b) Fwant
2.21 Convert
We = 0 each
AND of(0the
to conciselyORfollowing
(0 1
AND
describe 1))
the=following
0 AND
equations (0situation
ORto0)
directly 10 AND
=using
gate-level 0 = 0 equation. We
circuits:
a Boolean
c) F = 1 AND (0 OR (0 (a) 0)) = 1 AND (0 OR 0) = 1(b)
AND AND 0 =0
want
a.Fto1=fireabca football
+ORa’bc coach (by setting F=1) if he is mean (represented by M=1). If
d)
heFis=not AND
mean,(0but (1 AND
has a losing 1))season
= 1 AND (0 OR 1) by
(represented = 1the
AND 1 = 1 variable L=1),
Boolean
b.F = a + bcd’ + ae + f’
we want
2.14 Show the to fire him anyways.
conduction paths andWrite o utputanvalue
equation thatOR
of the translates the situation
gate transistor circuitdirectly
in Fig-
c.F
to a = (aequation
Boolean + b) + for (c’
F, * (dany
without + simplification.
e + fg))
ure 2.11 when: (a) x = 1 and y = 0, (b) x = 1 and y = 1.
a a
F = M +b(M’ * L) 0 b 0
c 0 c1
y F yd
Section 2.5: Boolean Algebra 1 1 F
1 1
x F xe F
2.22 For the function F = (a)1a + a’b + acd + c’:
0 f1 1
x
a. List all the variables. y x y
(b)
1 a 1
b. List all the literals.
(a) b (b) F
c. List all the product terms.c
Department of Electrical Engineering
a) a,ofb,California,
University c, d Riverside d
e
b) a, a’, b, a, c, d, c’
f (c)
c) a, a’b, acd, c’ g
2.23 For the function F = a’d’ + a’c + b’cd’ + cd:
he is not mean, but has a losing season (represented2.1 by Solutions to Exercises
the Boolean b 19
variable L=1),
we want to fire him anyways. Write an equation that translates the situation directly
toc.a Boolean equationtofor
You are eligible F, without
play any simplification.
on a particular basketball team if you are tall and fast, or
F=M + and
(M’ slow.
* L) Simplify this equation.
Solutions totall
Homework –1
d. You are NOT
EE / CS 120A : Logic Design eligible to play on a particular football team if you are short and
Section 2.5: Boolean
slow, or if Algebra
you are light. Simplify to sum of products form.
Winter 2010
2.22 For the function F = to
e. You are eligible a play
+ a’bon both the basketball
+ acd + c’: and football teams above, based
on the above criteria. Hint: combine the two equations into one equation by
a. List all thethem.
ANDing variables.
a) Ride = TH’ +literals.
b. List all the T’H
b)c.Ride
List=all(TH’
the product
+ T’H)’terms.
= (TH’)’(T’H)’ = (T’ + H)(T + H’) = T’H’ + TH
a)
c) a, b, c, d = T
Basketball
b)
d) a, a’, b, a,=c,(T’F’
Football d, c’ + H’)’ = (T’F’)’H = (T + F)H = TH + FH
c)
e) a, a’b, acd, c’
BasketballAndFootball = T(TH + FH) = TH + TFH
2.23
2.25 For
Let the function
variables S represent
F = a’d’ a package
+ a’cbeing small, H+being
+ b’cd’ cd: heavy, and E being expen-
sive.
20 c 2 Combinational Logic Let’s
a. ListDesign consider a
all the variables. package that is not small as big, not heavy as light, and not
expensive as inexpensive. Write a Boolean equation to represent the following:
b. List all the literals.
a. You all canthedeliver packages only if the packages are either small and expensive,
F’c.=List
(a + a’)b’ product
+ b’ + ac’ terms.
+ b’c’ (The b’ term makes all other terms with b’ redun-
a)
or big
a, b, c, d
and inexpensive.
dant)
F’b.a’,
b) = You
b’ can
ac’c,NOT
d’,+a’, b’, c,deliver
d’, c, da package that is listed above. Use algebra to simplify the
c) a’d’, a’c, b’cd’, cd of products.
equation to sum
2.29 Use DeMorgan’s Law to find the inverse of the following equation: F = ac’ +
c. You can load the packages into your truck only if the packages are small and
2.24 Let
abd’ variables
+ acd. T represent
Reduce to being tall, H being form.
sum-of-products heavy, and F being fast. Let’s consider
light, small and heavy, or big and light. Simplify the equation.
anyone
F’d.= You who
(ac’ can is
+ abd’ not tall
+ acd)’ as short, not heavy as light, and not fast as slow. Write a Bool-
ean equation NOT
to load the
represent thepackages
following: described above. Simplify to sum of products.
F’ = (ac’)’(abd’)’(acd)’
a) Deliver = SE + S’E’
F’a.=You
(a’ +may ride+ ab’particular
c’’)(a’ + d’’)(a’ +amusement
c’ + d’) park ride only if you are either tall and
b) Deliver = (SE + S’E’)’ = (SE)’(S’E’)’ = (S’ + E’)(S + E) = S’E + SE’
F’ =light,
(a’ + or short
c)(a’ and
+ b’ heavy.+ c’ + d’)
+ d)(a’
c) Load = SH’ + SH + S’H’ = SH’ + SH + SH’ + S’H’ = S + H’
F’ =You(a’ +maya’b’ + a’dride + a’can+amusement
b’c + cd)(a’park
+ c’ ride
+ d’)if you are either tall and light, or
d)b.Load = (S +NOT H’)’ = S’H
F’ =short
a’ + a’c’ + a’d’ +
and heavy. Usea’b’ + a’b’c’
algebra + a’b’d’ the
to simplify + a’d + a’cc’to+sum
equation a’cd’of+products.
a’b’c + b’cc’ +
2.26 Use
b’cd’algebraic
+ a’cd + manipulation
cc’d + cdd’ (The to convert the following
a’ term makes all otherequation
terms withto a’
sum-of-products
redundant)
form:
F’ = a’F+ =b’cd’ a(b + c)(d’) + ac’(b + d)
F = (ab + ac)d’ + ac’b + ac’d
Section
F =2.6: Representations
abd’ + acd’ + ac’b + of Boolean Functions
ac’d
2.27
2.30 Use algebraic
Convert manipulation
the following Boolean to equations
convert the
to afollowing equation to sum-of-products
digital circuit:
form: F = a’b(c +
a. F(a,b,c) = a’bc + ab d’) + a(b’ + c) + a(b + d)c
F b.
= a’bc + a’bd’ +=ab’a’b
F(a,b,c) + ac + (ab + ad)c
F c.
= a’bc
F(a,b,c) = abcac++ abc
+ a’bd’ + ab’ + ab ++acda + b + c
F = a’bc + a’bd’ + ab’ + ac
d. F(a,b,c) = c’
2.28 Use DeMorgan’s Law to find the inverse of the following equation: F = abc +
a
a’b. Reduce to bsum-of-products form. Hint: Start withaF’ = (abc + a’b)’.
c F b F
F’ = (abc + a’b)’
F’ = (abc)’(a’b)’ (b)
F’ = (a’ + b’ + c’)(a’’ + b’)(a)
F’ = (a’ + b’ + c’)(a
a + b’)
c F
F’ = a(a’ + b’ +bc’) + b’(a’ + b’ + c’)
c + a’b’ + b’ + b’c’
F’ = 0 + ab’ + ac’
F (d)

(c)

2.31 Create a Boolean equation representation of the


digital circuit in Figure 2.64. a
F = (ab’ + b)’ b
F

Figure 2.64: Combinational circuit


F.

Department of Electrical Engineering


University of California, Riverside
1 0 0 1 1 0 0 1
1 0 1 1 1 0 1 0
1 1 0 1 1 1 0 1
Solutions to Homework – 1
1 1 1 1 1 1 1 0
EE / CS 120A : Logic Design
(c) (d)
Winter 2010
2.34 Convert each of the following Boolean equations to a truth table:
a. F(a,b,c) = a’ + bc’
22
22 cc 22 Combinational
Combinational Logic
Logic Design
Design
b. F(a,b,c) = (ab)’ + ac’ + bc
c. F(a,b,c) = ab + ac + ab’c’ + c’
d.F(a,b,c,d) = a’bc + d’
Inputs
Inputs Outputs
Outputs Inputs
Inputs Outputs
Outputs
aa b b c
c F
F a b
a b c
c F
F
00 0 0 0
0 1
1 0 0
0 0 0
0 1
1
00 0 0 1
1 1
1 0
0 0 0 1
1 1
1
00 1 1 0
0 1
1 0
0 1 1 0
0 1
1
00 1 1 1
1 1
1 0
0 1 1 1
1 1
1
11 0 0 0 1 0 0 1
11 0 1 0 1 0 1 1
11 1 0 1 1 1 0 1
11 1 1 0 1 1 1 1
(a) (b)

Inputs
Inputs Outputs Inputs Outputs
aa b c F a b c d F
00 0 0 1 0 0 0 0 1
00 0 1 0 0 0 0 1 0
00 1 0 1 0 0 1 0 1
00 1 1 0 0 0 1 1 0
11 0 0 1 0 1 0 0 1
11 0 1 1 0 1 0 1 0
11 1 0 1 0 1 1 0 1
11 1 1 1 0 1 1 1 1
(c) 1 0 0 0 1
1 0 0 1 0
1 0 1 0 1
1 0 1 1 0
1 1 0 0 1
1 1 0 1 0
1 1 1 0 1
1 1 1 1 0
(d)

2.35 Fill
2.35 Fill in Table 2.1’s columns for the
Table 2.1: Truth table.
table.
equation: F= ab + b’
equation:
Inputs Outputs
Outputs
a b ab b’ ab+b’ ab+b’ F F
0 0 0 1 1 11
0 1 0 0 0 00
1 0 0 1 1 11
1 1 1 0 1 11

Department of Electrical Engineering


University of California, Riverside
F = a’(b’c’ + bc’) + a(b’c’ + b’c + bc’) 1 0 1 1
F = a’((b’ whether
2.51 Determine + b)c’) +thea(b’(c’ + c) + bc’)
two cir- 1 1 0 1
2.36 cuits
Convert
F = a’c’ thea(b’
in Figure
+ function
2.67 shown in athe truth table ina
areFequiva-
+ bc’) Table
1 12.2: 1 1Truth0 table.
Table
lent 2.2 tousing:
circuits an equation. Don’t minimize
(a) algebraic b the equa-b
Solutions to Homework
manipulation, and– 1 (b) truth F c a b c FG
tion. c
EE / CS 120A
tables. : Logic Design
2.40 Convert the function F shown in the d truth table in d 0 0 0 0
Winter F = a’b’c + a’bc’ + a’bc + ab’c + abc’ + abc
2010 Table 2.4: Truth table.
Table
a) F = ab2.4
+ cdto and
an Gequation.
= (1*((ab)’Don’t minimize the 0 0 1 1
2.37 *Use algebraic manipulation to Figure
minimize 2.67:
theCombinational
equation a bF andcG. F
circuits
equation.
(cd)’)’)’ 0 1 0 1
obtained
In in Exercise
canonical 2.36
sum-of-minterms 0 0 0 0
F = a’b’c + abc’ + abc 0 1 1 1
form, F = a’b’cd 0 and 0 1= a’b’c’d’
1
F = a’b’c + a’bc’+ +a’bcd
a’bc++ab’cd
ab’c ++ abc’d’
abc’ ++abcabc’d + abcd’ + abcd1 0 G0 0
2.41 +Use algebraic
a’b’c’d + manipulation
a’b’cd’+ a’bc’d’ + to minimize
a’bc’d + the+equa-
a’bcd’ ab’c’d’ + ab’c’d
0 + ab’cd’.
1 0 F 0and G
F = a’(b’c + bc’ + bc) + a(b’c + bc’ + bc) 1 0 1 1
tion obtained
are in Exercise
= G’) 2.40.
F =not equivalent
a’(b’c + b(c’ (F+ c)) + a(b’c + b(c’ + c)) 0 1 1 0
1 1 0 1
b) a’b’c + abc’ + abc
F = a’(b’c + b) + a(b’c + b) 1 0 0 0
1 1 1 1
a’b’c
F = (a’ + ab(c’+ +b)c)
+ a)(b’c 1 0 1 0
F Inputs
a’b’c
= b’c ++ b ab Outputs Inputs Outputs
1 1 0 1
24 c 2 Combinational Logica Design
b c d F a b c d F
2.42 Convert
2.38 Create a the
truth table forFthe circuit of Figure table
2.64 1 1 1 1
0 0 0function 0 0 shown in the truth 0 0 in0 0Table 1 2.3: Truth table.
Table
. 0 0 0 1 02.3 to an equation. Don’t minimize the
0 0 0 1 a1 b c F
equation.
0 0 1 0 0 0 0 1 0 01 0 0 1
Inputs Outputs
F0 = a’b’c’
0 +1a’bc’ 1 + ab’c’
1 + ab’c + abc’ 0 0 1 1 0
a b F 0 0 1 0
2.39 Use 0 algebraic
1 0 manipulation
0 0 to0minimize 0 1 0 0 01 1 0 1
0 1 the equa-
0 obtained
tion 1 0 in 1 0 2.38
Exercise 0 1 0 1 1
0 1 0 0 1 1 0
0 1 1 0 0 0 1 1 0 1
F = a’b’c’ + a’bc’ + ab’c’ + ab’c 1 + 0abc’0 1 0 0 1
0 1 1 1 1 0 1 1 1 0
F
26 c 2 Combinational Logic= a’(b’c’
Design + bc’) + a(b’c’ + b’c
1 + bc’)
1 0 1 0 1 1
F1 0 0 0 0
= a’((b’ + b)c’) + a(b’(c’ + c) + bc’) 1 0 0 0 11 1 0 1
2.43 F1 0 + a(b’
= a’c’ 0 +1bc’)0 1 0 0 1 1
2.50 Create a
Determine truth
1 0 1 0 0 table
whether for
thethe circuit
Boolean of Figure
function 2.65.
G1 = 0 1 0 11 1 1 0
a’b’c
1 0+ ab’c 1 1 +Inputs abc’ + abc is equiva-
1 1 0 1aOutputs 1 0
lent1 to the function represented
b c by
2.40 Convert1 the0function 0 a 1F shown in the
thecircuit
ab’ truth ina’c
+ 1btable1 in0bF 0 0
Table 2.4: Truth table.
Figure 2.66. H
Table
1 12.4 0 to an1 equation.
0 1 0 0Don’t 0 minimize1 01 the00 1 0
a b c F
The 1 circuit
equation.1 in 1 Figure
0 0 2.661 0 represents
1 0 the equa- 1 11 1c1 0 0
tion H = ab + b’c. In canonical sum-of-minterms 0 0 0 0
F1 1 1abc’1+ abc
= a’b’c
H = +abc’
01 1 0 1 1 01 Figure11 2.66:
1 Combinational
0
form, (a) + abc + a’b’c + ab’c, which is (b) 0 0 1 circuit 1
0 1 1 1 1 H. 1
2.41 equivalent
Use algebraic to G.manipulation to minimize the equa- 0 1 0 0
1 0 0 1 0 2.11Solutions to Exercises b 27
2.52 tion obtained
2.51 *Figure
Determine in Exercise
2.68whether
shows two two2.40.
the circuitscir-in which the inputs of the circuits0 are 1 unlabeled.
1 0
1 0 1 1 0 1
cuits in Figure
Fa.=Determine
a’b’c + abc’ 2.67
+ are equiva-
abc a
whether1 the 1 a are equivalent.
1 two0 circuits 0 1 0 1 0 0labell-
1Hint: Try all possible
lent circuits
F =ings using:
a’b’cof+the
ab(c’ +(a)c) algebraic b b
inputs1 for 1both 1circuits. 0 F1 c 1 0 1 0G
manipulation,
Fb.=How + ab and
a’b’c many (b) truth 1 c
tables. circuit com- d
1 1 0 1
d
2.42 Create
2.44 Convert parisons
a truthwill
the+function you
table forneed
the to
circuit of Figure 2.64
in the truth table in Table 2.2 to a1digital 1 circuit.
1 1
a) F perform
= ab cdtoand GF =shown
determine (1*((ab)’
if Figure 2.67: F
Combinational circuits F and G.
* (cd)’)’)’
two circuits with 10 unla- b
In canonical
beled inputs sum-of-minterms
are equiva- c G
form,lent?
F = a’b’cd + a’bcd + ab’cd + abc’d’ + abc’d + abcd’ F + abcd and G = a’b’c’d’
+ a’b’c’d + a’b’cd’+ a’bc’d’ + a’bc’d Figure+2.68:
a’bcd’ + ab’c’d’ +circuits
Combinational ab’c’dF+andab’cd’.
G. F and G
2.45 are not
Convert
Section equivalent (F
the function F shown
2.7: Combinational
a. = G’)
Logicin the truth table in Table 2.3 to a digital circuit.
Designb)Process a
If we have sequence ‘abc’-
2.53 A museum
Inputs has threec rooms, each with a motion
Outputs sensor (m0, m1,FOutputs
Inputs and m2) that outputs
1 when
F = a
a b c d F+
motion
b +is detected.
c At night, the only person
a b c d F in the museum is one security
guard who walks from b room to room. Create a circuit that sounds an alarm (by set-
0 0 0 0 0 0 0 0 0 1
ting an output A to 1) if motion is ever detected in more than one room at a time
0G = 0ab + 0 b +1 ac 0 0 0 0 1 1
(i.e., in two or three rooms), meaning there must be an intruder or intruders in the
0 = 0a + b
1 + c
0 0
museum. Start with a truth table. 0 0 1 0 1
2.46 Convert
0 the 0 function
1 1 F shown1 in the truth table
0 in 0Table12.4 1to a digital
0 circuit.
Step 1 - both
Since Capture the function
the equations are same, no matter what the sequences are the end result will be same.
0 1 0 0 0 a 0 1 0 0 1
0 1 0 1 0 Inputs 0 Outputs
1 0 1 1
It can be concluded the two
b circuits are equivalent.
0 1 1 0 0 m2 m1 m00 A1 1 0 1
0 1 1 1 1 c
b. 0 0 0 0 01 1 F 1 0
1 0 0 0 0 0 0 1 1 00 0 0 1
with 10 unlabeled inputs will produce 10! = 3628800
1 the 0 comparison
0 1 would 0 0 1 0 1 00 0 1 1
and be 3628800 times.
2.47 Convert the
1 0 1 0 0 following Boolean equations
0 1 to1canonical
1 10 sum-of-minterms
1 0 1 form:
1 of Electrical
0 1 Engineering
1 1 1 0 0 0
1 0 1 1 0
Department
University1of California,
1 0 Riverside
0 1 1 0 1 1 11 0 0 0
1 1 0 1 1 1 1 0 1 11 0 1 0
1 1 1 0 1 1 1 1 1 11 1 0 0
1 1 1 1 1 1 1 1 1 0
Step 2 - Convert to equations

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