Home Assignment No-4

Subject: Digital Logic Design Marks: 100

Course: BEE-1B&C Issue: 15 Apr 2011
Instructor: Arshad Nazir Due on: 06 May 2011
(09:45 AM)
Note:
9 Attempt the given problem set in a sequential order. Be neat and show
complete work.
9 Make an index on the first page showing summary of the problems solved
along-with page numbers and also specify the missed ones.
9 No late submissions will be accepted unless prior approval from the teacher
has been obtained under extreme exigencies. The assignments submitted after
due date/time will be graded zero.
9 Plagiarism is the unacknowledged use of other people’s work, including the
copying of assignments from the other students. Plagiarism is considered as a
serious offence by the university and serious penalties apply. Any assignment
found copied will be graded zero and strict disciplinary action will also be
initiated against the students involved in cheating.
9 All the students will submit a certificate with the assignment work stating the
originality of their efforts with no copying from others.
9 Note that Twenty Marks are reserved for presentation, quality work, table of
contents, and certificate attached with the assignment work.
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Problem No-1 Design a Full Adder (FA) circuit that adds a pair of digits a, b along
with input carry cin and produces s and cout. Show following design
steps:-
a. List the truth table.
b. Write the minterm list equations for each output variable.
c. Simplify each output function using any simplification
method.
d. Draw the logic diagram using exclusive-OR, AND, and OR
gates.
Also implement your design using minimum number of two-input
NAND gates. Any solution with 9 or fewer gates will be acceptable.
Assume that only normal inputs are available from the source.

Problem No-2 A BCD to seven-segment decoder is a combinational circuit that

converts a decimal digit in BCD to an appropriate code for the
selection of segments in a display indicator used for displaying the
decimal digit in a familiar form. The seven outputs of the decoder
(a, b, c, d, e, f, g) select the corresponding segments in the display,
as shown in figure P4-9(a) of your text book and reproduced below.
The numeric display chosen to represent the decimal digit is shown

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 in figure P4-9(b). Design the BCD to seven-segment decoder using
a minimum number of gates. The six invalid combinations result in
blank display.

Problem No-3 Design a circuit that will add either 1 or 2 to a 4-bit binary number
N. Let the inputs N3, N2, N1, N0 represent N. The input K is a control
signal. The circuit should have outputs M3, M2, M1, M0, which
represent the 4-bit number M. When K=0, M=N+1. When K=1,
M=N+2. Assume that the inputs for which M>11112 will never
occur.

Design the circuit using only 2, 3, and 4-input NAND gates and
inverters. Try to minimize the total number of gates and inverters
required. The input variables K, N3, N2, N1, and N0, will be available
from toggle switches. Any solution that uses 13, or fewer gates and
inverters (not counting the five inverters for the inputs) is
acceptable.

Problem No-4 Design an Arithmetic Logic Unit (ALU) to perform the following
functions:

Select Lines Output Z Comments

S0 S1
1 1 X plus Y Addition
1 0 X plus Ý plus 1 2’s complement Subtraction
0 1 X Y Boolean AND
0 0 X Y Exclusive-OR

Problem No-5 Design a commercial Decimal-to-BCD priority encoder with inputs

D0, D1, D2,…, D9 and outputs w, x, y, z. Provide an output V to
indicate that at least one of the inputs is present. The input with the
highest subscript number has the highest priority.

Specify the truth table, derive algebraic expressions for each output
function and draw the logic diagram of the encoder circuit.

Problem No-6 Implement the Boolean function

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 f (A,B,C,D,E)= A+C′D+BD′+B′D+B′CE
with two 8-to-1 multiplexers, one 2-to-1 multiplexer and external
gates. Connect inputs B, C, D, and E to the selection lines. The
input requirements for the data lines will be a function of the input
variable A. The values of the variables are obtained by expressing
F as a function of A for each of the four cases when BCDE=0000,
0001, 0010,…, 1111. These functions must be implemented with
external gates.

Problem No-7 The 4:1 multiplexer function has four data inputs A, B, C, and D,
two select control inputs S1,S0 , and a single positive logic output Z
that operates as follows; S1 ,S0 =00 gates A to Z; S1 ,S0 =01 gates B
to Z; S1 ,S0 =10 gates C to Z; S1 ,S0 =11 gates D to Z.

Draw the schematic that implements multiplexer function using a

decoder, inverting tri-state buffers and conventional inverters.

Problem No-7 A simple security system for two doors consists of a card reader
and a keypad.

A
Card reader B X To
door1
To
Logic Y door2
Circuit Z To
C alarm
D
Keypad E

A person may open a particular door if he or she has a card

containing the corresponding code and enters an authorized
keypad code for that card. The outputs from the card reader are as
follows:
A B
No card inserted 0 0
Valid code for door1 1 0
Valid code for door2 1 1
Invalid card code 0 1
To unlock a door, a person must hold down the proper keys on the
keypad and, then, insert card in the reader. The authorized keypad
codes for door1 are 101 and110, and the authorized keypad codes
for door2 are 101 and 111. If the card has an invalid code or if the

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 wrong keypad code is entered, the alarm will ring when the card is
inserted. If the correct keypad code is entered, the corresponding
door will be unlocked when the card is inserted.
Design the logic circuit for this simple security system. Your circuit’s
inputs will consist of a card code AB, and a keypad code CDE. The
circuit will have three outputs XYZ (if X or Y=1, door1 or 2 will be
opened; if Z=1, the alarm will sound). Design your circuit using
NAND gates only.
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“Good Luck”