“Embedded Implementation of Space Vector PWM using FPGA”
Ashish Gupta
Assistant Professor
Department of Electronics Engineering,
MPEC, Kanpur, INDIA.
ashish3179@rediffmail.com
Abstract - This Paper introduces the working
principle of space vector pulse width modulation
(SVPWM), and presents a new circuit realization of
SVPWM generator based on a flexible, high
computation speed and cost effective field
programmable gate array (FPGA) embedded
technique. Controlling of the machines using the
vector control techniques is becoming more popular
nowadays. The need for extensive computations has
no more become an objection to the vector control
implementation. This is due to the wide availability
of high speed digital processors. The method of
decoupling the variables and controlling them
independently is known as vector control. To relieve
the controller from the time consuming
computational task of PWM signal generation, a
new method of Space Vector PWM signal
generation is implemented in FPGA using
Hardware Description Language VHDL. The Space
Vector PWM pulses are first designed in
MATLAB/SIMULINK environment and relevant
coding are written to generate the pulses and then
by using software conversion tool the M files are
converted into VHDL coding. Thus the triggering
pulses are given to the inverter circuit and hence
the switching pattern generated will reduce the
harmonic content and switching losses.
Keywords : FPGA- Field Programmable Gate
Array, SVM, Space Vector PWM, VHDL, Induction
motor drive
1 Introduction
The Pulse Width Modulation (PWM) Technique
called “Vector Modulation”, which is based on
space vector theory, is the most important
development in the last few years [1]. Although,
several of PWM methods have been created in the
past, the vector modulation technique appears to be
the best alternative. FPGA’s development reached a
level of maturity that made them the good choice of
1
implementation in many fields [2]. FPGA based
embedded implement of SVPWM can make the
computing power of processor and the logical
processing power of hardware circuit combined,
thus the processing efficiency of CPU and the
logical units utilization can be improved . Figure 1
shows a SVPWM control system based on FPGA-
embedded technique –
Figure 1: SVPWM control system based on FPGA-
embedded technique
Recent applications of FPGA’s in industrial
electronics include mobile- robot path planning and
intelligent transportation [3], current control applied
to power converters, real-time hardware in the loop
testing for control design, Controller
implementation, separating and recovering
independent source signals, and neural computation.
Since the concept of multilevel PWM converter was
introduced, various modulation strategies have been
developed and studied in detail, such as multilevel
sinusoidal PWM, multilevel selective harmonic
elimination and space vector modulation. Among
these strategies, the space vector PWM (SVPWM)
[4]stands out because it offers significant flexibility
to optimize switching waveforms and is well suited
for digital implementation. Complexity and
computational cost of traditional SVPWM
techniques increases with the number of levels of
the converter, and most of all use trigonometric
functions or pre-computed tables. A symmetrical
space vector modulation PWM pattern is proposed
in this paper, it shows the advantage of lower THD to above equations, the eight switching vectors,
without increasing the switching losses. Thus this output line to neutral voltage (phase voltage), and
paper demonstrates that a more efficient and faster output line-to-line voltages in terms of DC-link
solution is the use of Field Programmable Gate Vdc, are given in Table.1 shows the eight inverter
Array (FPGA’s), it investigates how to generate a voltage vectors (V0 to V7)
variable PWM waveform based on Xilinx FPGA
[5].The rest of the paper is organized as follows.
Section II introduces the principle of symmetrical
space vector PWM method. Section III shows
details on FPGA. Section IV shows the m-file
coding/Simulink blocks required to generate Space
Vector Pulses. Section V explains the experimental
results and Section VI is the conclusion

2. Principle of Space Vector PWM

In vector coordinates, the combinations of three- Figure 3: Circuit model of PWM inverter with
phase inverter output voltages form eight space center-taped grounded DC bus.
vectors shown in Figure. 2 There are six nonzero
space vectors forming an origin centered hexagon, Switching Line to Neutral Line to line
and two zero space vectors (V0-V7) located at the Voltage Vectors Voltage voltage
origin. The hexagon is the maximum boundary of Vectors a b c Van Vbn Vcn Vab Vbc Vca
the space vector, and the circle is the maximum V0 0 0 0 0 0 0 0 0 0
trajectory of the regular sinusoidal outputs in linear V1 1 0 0 2/3 -1/3 -1/3 1 0 -1
modulation. This figure also explains the PWM V2 1 1 0 1/3 1/3 -2/3 0 1 -1
V3 0 1 0 -1/3 2/3 -1/3 -1 1 0
output patterns in the six regions (denoted as sector
V4 0 1 1 -2/3 1/3 1/3 -1 0 1
I–VI) separately. In accordance with three-phase to V5 0 0 1 -1/3 -1/3 2/3 0 -1 1
two-phase transformation, the three-phase inputs V6 1 0 1 1/3 -2/3 1/3 1 -1 0
(Va, Vb, Vc) are transformed into (Vα, Vβ) as the V7 1 1 1 0 0 0 0 0 0
reference vector.
Table-1 Details of different phase and line
voltages for the eight states.

3. Field Programmable Gate Array

A Field-Programmable Gate Array or FPGA is a

Figure 2: Basic Eight Switching Vector and Vector
Representing of Sector 1.
As shown in Figure. 3, there are eight possible
combinations of on and off patterns for the three
upper power switches. The on and off states of the
lower power devices are opposite to the upper one
and so are easily determined once the states of the
upper power transistors are determined. According
silicon chip containing an array of configurable
logic blocks (CLBs). Unlike an Application
Specific Integrated Circuit (ASIC) which can
perform a single specific function for the lifetime of
the chip an FPGA can be reprogrammed to perform
different function in a matter of microseconds. The
design used Xilinx development tools, and is
realized in a single FPGA chip with no external
memory. The benefits of this design are as follows
 The whole system is implemented in only a
single chip consequently the circuit is very
compact.
 Systems of FPGA chip are more reliable
because they do not need any control software

2
 Faster design and verification time, design 4.1 Simulink Model to generate
change without penalty. Space Vector PWM
In this paper programming FPGA using Hardware
Description Languages and coding are used to
generate the Space Vector Modulation for the
inverter circuit. The point to be remember here is
that instead of writing the direct VHDL coding
firstly the M-File coding is written to generate the
SVPWM pulses and then after by using he software
converter VHDL coding is generated. Hence the
work requires less time and fast operation. The
MATLAB/SIMULINK environment is familiar to
large number of software programmers and since
m-file coding is very much common to most of the
programmers it becomes easier to work in this
software. A very attractive high-level design/
simulation tool is provided by FPGA and is called
XILINX. It is a very flexible design tool, which
allows Testing of a high-level structural description
of the design and makes possible quick changes and
corrections. The circuit description structure is very
similar to the way the design could be implemented
later. Therefore mapping tool allowing conversion
of such a structure into VHDL code would save the
designer’s time, which otherwise has to be spent in
rewriting the same structure in VHDL and probably
making mistakes that will need debugging. Figure 4.1: Simulink Model for Overall System

4. Simulation Steps:

(1) Initialize system parameters in MATLAB/

SIMULINK .

(2) Perform M-File coding to

(i) Determine sector.
(ii) Determine time duration T1, T2, T0.
(iii) Determine the switching time (Ta,Tb
and Tc) of each transistor (S1 to S6).
(iv) Generate the inverter output voltages
(VAB, VBC, VCA).
(v) Generate VHDL Codings through
software convertion tool.
(vi) Burn the program in the FPGA kit.

(3) View the SVPWM waveform by XILINX. Figure 4.2: Outage Simulink Model for
“Space Vector PWM Generator”

3
 Tech-
SPWM SVPWM
nique
Output Output
M. I. line THD line THD
(M) voltage (%) voltage (%)
(peak V) (peak V)
0.4 180.80 162.11 192.70 154.07
0.5 266.50 123.35 312.20 108.78
0.6 289.40 117.12 318.10 105.69
0.7 369.20 94.52 436.60 81.19
0.8 396.10 89.73 442.90 78.56
0.9 472.90 70.69 552.30 53.62
1.0 502.40 64.83 567.90 49.15
Parameter used : Fundamental frequency :50 Hz,
Switching frequency:10 KHz ,
DC Voltage : 600 volts
Table 2: Comparisons between SPWM and
SVPWM by varying modulation index.
Figure 4.3: Subsystem Simulink Model for
“Space Vector PWM Generator”

5. Results and Discussions

The control scheme is simple in architecture and

thus facilitates the realization of the developed
SVPWM controller using FPGA based circuit
design approach. The designed SVPWM control IC
has been realized using single FPGA. The
simulation results of internal module and the final
output of Space Vector PWM switching pattern has
been achieved with a fundamental frequency of 50
Hz. Such a wide frequency control with very high Figure 5: Locus comparison of maximum linear
frequency-switching is only possible by utilizing the control voltage in Sine PWM and SVPWM.
state-of-art VLSI digital circuit design approach.
From the result the switching pattern generated will
reduce the harmonic content and switching losses.
A comparisons between spwm and svpwm by
varying modulation index is shown in the below
mentioned table 2 and which evidently shows the
greater advantage of controlling the drive by
SVPWM technique. Figure 5 shows the Locus
comparison of maximum linear control voltage in
Sine PWM and SVPWM. Figure 6, 7 and 8
represents the axis converter, Delay time, Output of
each inverter respectively. Figure 9, 10, shows the
simulation results of Van, Vab, Vac and simulation
results of pulse patterns. Similarly figure 11,12
shows Matlab Simulation results of Vab, Vbc & Fig 6: Three to Two axis converter. (Va, Vb, Vc)
Vac and Van, Vbn & Vcn. are transformed into (Vα, Vβ)

4
 Fig 7: Delay time
Fig 8: Output of each inverter
Fig 9: Simulation results of Van, Vab and Vac
Fig 10: Simulation results of pulse patterns
5
Fig 11:Matlab Simulation results of Vab,Vbc & Vac
Fig 12:Matlab Simulation results of Van,Vbn & Vcn
6. Conclusion
In this paper, a theoretical study concerning the
SVPWM control strategy on the voltage inverter
based on FPGA is presented. This aims on one hand
to prove the effectiveness of the SVPWM in the
contribution in the switching power losses
reduction. SVPWM is among the best solution to
achieve good voltage transfer and reduced harmonic
distortion in the output of an inverter. On the other
hand since Field programmable gate array (FPGA)
have better advantages compared to microprocessor
and DSP control, this modulation technique is
implemented in an FPGA by initially generating m-
file through MATLAB/SIMULINK environment.
The FPGA coding makes it easier in designing the
vector modulation pattern generator using field
programmable Array. Moreover the MATLAB/
SIMULINK environment is familiar to large
number of software programmers and since m-file
coding is very much common to most of the
programmers it becomes easier for individuals to
work in this software. The switching pattern
generated will reduce the harmonic content,
provides efficient as well as flexible control and
reduces the total size of the system. This SVPWM
IC can be used for high performance ac drives and
power conditioning equipment as a modulator.

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