MICROCONTROLLER ASSIGNMENT – 1

- JNANESH M.
1MS07EC038

10. With a diagram, list the specific features of 8051 microcontroller.

8051 Block Diagram

The 8051 architecture consists of these specific features:

 • Eight-bit CPU with registers A(the accumulator) and B

• Sixteen-bit program counter(PC) and data pointer(DPTR)

• Eight-bit program status word(PSW)

• Eight-bit stack pointer(SP)

• Internal ROM or EPROM(8751) of 0(8031) to 4K(8051)

• Internal RAM of 128 bytes :

1) Four register banks, each containing eight registers
2) Sixteen bytes, which may be addressed at the bit level
3) Eighty bytes of general purpose data memory

• Thirty-two input/output pins arranged as four 8-bit ports:P0-P3

• Two 16-bit timer/counters: T0 and T1

• Full duplex serial data receiver/transmitter: SBUF

• Control registers: TCON, TMOD, SCON, PCON, IP and IE

• Two external and three internal interrupt sources

• Oscillator and clock circuits

11. With the help of timing diagram, explain how to interface 8K EPROM and 4K
RAM to 8051 microcontroller.

The 8051 accesses external RAM when certain program instructions are executed.
External ROM is accessed whenever the EA (external access) pin is connected to ground
or when the PC contains an address higher than the last address in the internal 4K ROM
(0FFFH).8051 designs can thus use internal and external ROM automatically; the 8031,
having no internal ROM, must have EA grounded.
The figure shows the timing associated with an external memory access cycle.
During any memory access cycle, port 0 is time multiplexed. That is, it first provides the
lower byte of the 16-bit memory address, then acts as a bi-directional data bus to write or
read a byte of memory data.Port2 provides the high byte of the memory address during
the entire memory read/write cycle.
The lower address byte from port 0 must be latched into an external register to
save the byte. Address byte save is accomplished by the ALE clock pulse that provides
the correct timing for the ‘373 type data latch. The port 0 pins then become free to serve
as a data bus.
 If the memory access is for a byte of program code in the ROM, the PSEN
(program store enable) pin will go low to enable the ROM to place a byte of program
code on the data bus. If the access is for a RAM byte, the WR (write) or RD (read) pins
will go low, enabling data to flow between the RAM and the data bus.

A0 – A7
PSEN

RD
A8
WR

RD WR

ALE’

External Memo

Reading ROM us
12. Write a program to swap the contents of registers R7 and R6 in register
bank 0, in four different ways.

ORG 0000H

; Method 1
MOV A,R6 ;Copy contents of R6 in R5
MOV R5,A ;Save contents of R6 in R5
MOV A,R7 ;Copy contents of R7 to A
MOV R6,A ;Contents of R7 now in R6
MOV A,R5 ;Retrieve contents of R6
MOV R7,A ;Contents of R6 now in R7

; Method 2
MOV 10H,06H ;Copy contents of R6 to RAM address 10H
MOV 06H,07H ;Copy contents of R7 to R6
MOV 07H,10H ;Copy saved contents of R6 to R7

; Method 3
PUSH 07H ; Push contents of R7 on the stack
PUSH 06H ; Push contents of R6 on the stack
POP 07H ; POP contents of R6 to R7
POP 06H ; POP contents of R7 to R6

; Method 4
XCH A,R6 ;Exchange contents of A and R6
XCH A,R7 ;Contents of R6 now in R7;R7 in A
XCH A,R6 ;Contents of R7 now in R6;A same
LJMP $
END

13. List out the different bit addressable SFR’s available in 8051.

SFR Direct Address(hex) Bit Addresses(hex)

A 0E0 0E0-0E7
B 0F0 0F0-0F7
IE 0A8 0A8-0AF
IP 0B8 0B8-0BF
P0 80 80-87
P1 90 90-97
P2 0A0 0A0-0A7
P3 0B0 0B0-0B7
PSW 0D0 0D0-0D7
TCON 88 88-8F
SCON 98 98-9F
14. Explain the following instructions with examples:

SWAP A
Function: Swap nibbles within the accumulator.
Flags affected: None
The SWAP instruction interchanges the lower nibble(D0-D3) with the
upper nibble(D4-D7) inside register A.
Example:
MOV A,#23H ; A=23H (0010 0011 in binary)
SWAP A ; A=32H (0011 0010 in binary)

XCHD A, @Ri
Function: Exchange digits
Flags affected: None
The XCHD instruction exchanges only the lower nibble of A with the
lower nibble of the RAM location pointed to by Ri, leaving the upper nibbles in
both places intact.
Example: Assuming RAM location 40H has the value 97H
MOV A,#12H ;A=12H
MOV R1,#40H ; R1=40H
XCHD A,@R1 ;A=17H and RAM location 40H has 92H.

DA A
Function: Decimal adjust accumulator after addition
Flags affected: CY
This instruction is used after addition of BCD numbers to convert the
result back to BCD. The data is adjusted in the following two possible cases:
1. It adds 6 to the lower 4 bits of A if it is greater than 9 or if AC=1.
2. It also adds 6 to the upper 4 bits of A if it is greater than 9 or if CY=1.
Example:
MOV A,#47H ;
ADD A,#38H ; A=47H+38H,invalid BCD
DA A ; A=85H,valid BCD

MUL AB
Function: Multiply A*B
Flags affected: OV,CY
This multiplies an unsigned byte in A by an unsigned byte in register B.
The result is placed in A and B where A has the lower byte and B has the higher
byte. This instruction always clears the CY flag; however, OV is changed
according to the product. If the product is greater than FFH, OV=1;otherwise, it is
cleared.
Example:
MOV A,#25H ;
MOV B,#78H ;
 MUL AB ; A=58H, B=11H, CY=0, AND OV=1
; (25H*78H=1158H)

15. Explain different ranges for jump instructions available in 8051 microcontroller.

JUMP instructions may have one of three ranges:

• Relative range of +127d, -128d bytes from the instruction following the JUMP
instruction.
• Absolute range on the same 2K byte page as the instruction following the JUMP
instruction.
• Long range of any address from 0000h to FFFFh, anywhere in program memory.

Jumps that replace the program counter contents with a new address that is greater
than the address of the instruction following the jump by 127d or less than the address of
the instruction following the jump by 128d are called Relative jumps.
They are named so because the address placed in PC is relative to the address where the
jump occurs. Relative jumping needs only one byte of data to be specified, thus saving
program bytes and speeds up program execution. Also, programs using relative jumps are
relocatable. The disadvantage of using relative addressing is the requirement that all
addresses jumped be within a range of +127d,-128d bytes of the jump instruction.

Absolute range makes use of the concept of dividing the memory into logical
divisions called pages. The 8051 program memory is arranged as 2K pages, giving a total
of 32d(20h) pages. The upper 5 bits of the program counter hold the page number, and
the lower 11 bits hold the address within each page. Absolute addressing has the
advantage of allowing jumps over longer programming distances than does relative
addressing. The page change presents no problem when branching ahead but could be
troublesome if the branch is backwards in the program.

Addresses that can access the entire program space from 0000h to FFFFh use
long range addressing. Long-range addresses require more bytes of code to specify and
are relocatable only at the beginning of 64K pages. Since we are limited to a nominal
ROM address range of 64K, the program must be reassembled every time a long-address
range changes and these branches are not generally relocatable. Long-range addressing
has the advantage of using the entire program address space available to the 8051.