LabVIEW FPGA

Overview
The LabVIEW FPGA course prepares you to design, debug, and implement efficient, optimized applications using the
LabVIEW FPGA Module and reconfigurable I/O (RIO) hardware. You learn how to compile and deploy your VIs to
different types of NI targets, such as NI R Series multifunction RIO, CompactRIO, NI FlexRIO, and NI RIO instruments.
You develop applications where you learn to acquire digital and analog I/O, control loop timing, and pass data between
your host VI and your FPGA target.

Duration Registration
Classroom: Two (2) Days Register online at ni.com/training or
Online: Four (4) Days call (800)433-3488 fax: (512)683-9300
email info@ni.com
Audience
• LabVIEW FPGA Module users and users preparing Outside North America, contact your local NI Office.
to develop applications using LabVIEW FPGA and Worldwide Contact Info: ni.com/global
RIO hardware
• Users and technical managers evaluating LabVIEW Part Number
FPGA in purchasing decisions 910661-xx
• LabVIEW or LabVIEW Real-Time Users who need -01 NI Corporate or Branch
the performance and flexibility of an FPGA -11Regional
hardware target -21 Onsite (at your facility)
-69 Online
Prerequisites
• LabVIEW Core 1 course or equivalent experience After attending this course, you will be able to:
• Understand system architectures for LabVIEW
Other recommended courses FPGA and NI RIO hardware
• LabVIEW Core 2 course • Select hardware for your FPGA system
• LabVIEW Real-Time Applications course • Configure NI RIO hardware
• Create & compile your LabVIEW FPGA VI and
NI Products Used During the Course
download to NI RIO hardware
• LabVIEW Professional Development System
• Acquire and output analog and digital
• LabVIEW Real-Time Module measurements
• LabVIEW FPGA Module • Understand and control timing of operations on
• PXI-7831R Reconfigurable I/O (simulated) FPGA target
• CompactRIO 9074 Real-Time Controller • Design and implement applications using the
LabVIEW FPGA module
Note: The LabVIEW FPGA course covers use the LabVIEW
Real-Time Module in conjunction with the LabVIEW FPGA
Module for basic communication between a Real-Time host
and an FPGA target. Refer to the LabVIEW Real-Time
Applications course for further instruction on creating a well-
architected Real-Time application.

ni.com/training
LabVIEW FPGA Course Outline
Introduction to LabVIEW FPGA • Basic Optimizations
This lesson introduces FPGA and LabVIEW FPGA. You FPGA I/O
learn the components of a LabVIEW FPGA system and the In this lesson, you learn how to add FPGA I/O to your
types of applications that are well-suited for LabVIEW FPGA. LabVIEW project and use it on the block diagram. You
You also explore a comparison between a LabVIEW FPGA also learn about the differences between performing I/O
system and a traditional measurement system. Topics on an R Series device and on a CompactRIO chassis, and
include: you learn the differences between integer and fixed-point
• Introduction to FPGA Technology data. Using I/O Nodes, you learn how to access both
• LabVIEW FPGA System analog and digital data. Topics include:
• Comparison with DAQmx • Configuring FPGA I/O
• LabVIEW FPGA Applications • I/O Types
• Integer Math
LabVIEW FPGA Basics
• Fixed-Point Math
In this lesson, you learn about the two major RIO
• CompactRIO
architectures: FPGA on Windows and FPGA for Real-Time.
• Error Handling
You also learn about R Series devices and CompactRIO, two
of the different RIO platforms. You then learn to configure
Timing an FPGA VI
your RIO hardware in Measurement and Automation
In this lesson, you learn to use the Loop Timer to set your
Explorer (MAX) and create a LabVIEW FPGA project.
FPGA loop rates, the Wait to add delays between events,
Topics include:
and the Tick Count to benchmark your FPGA code. Topics
• Evaluating system requirements
include:
• Reconfigurable I/O architectures
• Timing Express VIs
• FPGA Platforms
• Implementing Loop Execution Rates
• System Configuration
• Creating Delays between Events
• Creating a LabVIEW FPGA project
• Measuring Time between Events
• Benchmarking Loop Periods
FPGA Programming Basics
In this lesson, you learn how to reconfigure an FPGA target
Data Sharing on FPGA
using the LabVIEW FPGA Module. You gain a high-level
In this lesson, you learn how to transfer data between
understanding of how logic is implemented on the FPGA and
multiple loops on your FPGA VI. You examine three data
how LabVIEW code is translated and compiled into FPGA
sharing methods: variables, FPGA memory, and FPGA
hardware. After you develop an FPGA VI, you test, debug,
FIFOs. You learn the benefits of each technique and when
compile and then execute on an FPGA target. You examine
each should be used. Topics include:
different reports generated during compilation and learn
• Parallel Loops
techniques to optimize your code for size. Topics include:
• Shared Resources
• Defining FPGA Logic with LabVIEW
• Variables
• Developing the FPGA VI
• Memory Nodes
• Interactive Front Panel Communication
• Race Conditions
• Selecting an Execution Mode
• FPGA FIFOs
• Compiling the FPGA VI
• Comparison of Data Sharing Methods

ni.com/training
LabVIEW FPGA Course Outline
DMA Data Transfers
Single-Cycle Timed Loop Execution In this lesson, you expand your knowledge of transferring
In this lesson you learn to improve performance of your data between your host system and FPGA by using DMA
FPGA VI by using the Single-Cycle Timed Loop (SCTL) FIFOs . With DMA FIFOs you can ensure that no data is lost
which executes at the rate of selectable FPGA clocks. Topics when streaming data to your host system. Topics include:
include: • LabVIEW FPGA and Host Communication
• Data Flow in FPGA • DMA FIFOs
• Single-Cycle Timed Loop • Lossless DMA Transfer
• Single-cycle Timed Loop Errors • Interleaving
• Optimizing Code within a While Loop
Modular Programming and Code Reuse
Basic Host Integration In this lesson, you learn how to most efficiently use subVIs in
In this lesson, you learn how to interface with your FPGA VI your FPGA application. You learn when to set your VIs as re-
from your host PC or real-time controller. You create host VIs entrant or non-reentrant, depending on your FPGA needs.
to control and pass data between your FPGA and host You also learn about FPGA Controls so that you can
system. Topics include: reference FIFOS, memory, and I/O nodes in subVIs. Topics
• Windows Host Integration include:
• Developing a Windows Host VI • Review of SubVIs
• Introduction to Real-Time • Using SubVIs on the FPGA
• Developing a RT Host VI • Reentrancy and Non-reentrancy in FPGA
• Developing a Windows VI • Control Types for Passing to SubVIs
• Prepare RT Host for Final Application
• Testing FPGA SubVIs
• LabVIEW FPGA IPNet

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